exynos4.dtsi 9.3 KB

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  1. /*
  2. * Samsung's Exynos4 SoC series common device tree source
  3. *
  4. * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. * Copyright (c) 2010-2011 Linaro Ltd.
  7. * www.linaro.org
  8. *
  9. * Samsung's Exynos4 SoC series device nodes are listed in this file. Particular
  10. * SoCs from Exynos4 series can include this file and provide values for SoCs
  11. * specfic bindings.
  12. *
  13. * Note: This file does not include device nodes for all the controllers in
  14. * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
  15. * nodes can be added to this file.
  16. *
  17. * This program is free software; you can redistribute it and/or modify
  18. * it under the terms of the GNU General Public License version 2 as
  19. * published by the Free Software Foundation.
  20. */
  21. /include/ "skeleton.dtsi"
  22. / {
  23. interrupt-parent = <&gic>;
  24. aliases {
  25. spi0 = &spi_0;
  26. spi1 = &spi_1;
  27. spi2 = &spi_2;
  28. i2c0 = &i2c_0;
  29. i2c1 = &i2c_1;
  30. i2c2 = &i2c_2;
  31. i2c3 = &i2c_3;
  32. i2c4 = &i2c_4;
  33. i2c5 = &i2c_5;
  34. i2c6 = &i2c_6;
  35. i2c7 = &i2c_7;
  36. };
  37. chipid@10000000 {
  38. compatible = "samsung,exynos4210-chipid";
  39. reg = <0x10000000 0x100>;
  40. };
  41. pd_mfc: mfc-power-domain@10023C40 {
  42. compatible = "samsung,exynos4210-pd";
  43. reg = <0x10023C40 0x20>;
  44. };
  45. pd_g3d: g3d-power-domain@10023C60 {
  46. compatible = "samsung,exynos4210-pd";
  47. reg = <0x10023C60 0x20>;
  48. };
  49. pd_lcd0: lcd0-power-domain@10023C80 {
  50. compatible = "samsung,exynos4210-pd";
  51. reg = <0x10023C80 0x20>;
  52. };
  53. pd_tv: tv-power-domain@10023C20 {
  54. compatible = "samsung,exynos4210-pd";
  55. reg = <0x10023C20 0x20>;
  56. };
  57. pd_cam: cam-power-domain@10023C00 {
  58. compatible = "samsung,exynos4210-pd";
  59. reg = <0x10023C00 0x20>;
  60. };
  61. pd_gps: gps-power-domain@10023CE0 {
  62. compatible = "samsung,exynos4210-pd";
  63. reg = <0x10023CE0 0x20>;
  64. };
  65. gic:interrupt-controller@10490000 {
  66. compatible = "arm,cortex-a9-gic";
  67. #interrupt-cells = <3>;
  68. interrupt-controller;
  69. reg = <0x10490000 0x1000>, <0x10480000 0x100>;
  70. };
  71. combiner:interrupt-controller@10440000 {
  72. compatible = "samsung,exynos4210-combiner";
  73. #interrupt-cells = <2>;
  74. interrupt-controller;
  75. reg = <0x10440000 0x1000>;
  76. };
  77. sys_reg: sysreg {
  78. compatible = "samsung,exynos4-sysreg", "syscon";
  79. reg = <0x10010000 0x400>;
  80. };
  81. watchdog@10060000 {
  82. compatible = "samsung,s3c2410-wdt";
  83. reg = <0x10060000 0x100>;
  84. interrupts = <0 43 0>;
  85. clocks = <&clock 345>;
  86. clock-names = "watchdog";
  87. status = "disabled";
  88. };
  89. rtc@10070000 {
  90. compatible = "samsung,s3c6410-rtc";
  91. reg = <0x10070000 0x100>;
  92. interrupts = <0 44 0>, <0 45 0>;
  93. clocks = <&clock 346>;
  94. clock-names = "rtc";
  95. status = "disabled";
  96. };
  97. keypad@100A0000 {
  98. compatible = "samsung,s5pv210-keypad";
  99. reg = <0x100A0000 0x100>;
  100. interrupts = <0 109 0>;
  101. clocks = <&clock 347>;
  102. clock-names = "keypad";
  103. status = "disabled";
  104. };
  105. sdhci@12510000 {
  106. compatible = "samsung,exynos4210-sdhci";
  107. reg = <0x12510000 0x100>;
  108. interrupts = <0 73 0>;
  109. clocks = <&clock 297>, <&clock 145>;
  110. clock-names = "hsmmc", "mmc_busclk.2";
  111. status = "disabled";
  112. };
  113. sdhci@12520000 {
  114. compatible = "samsung,exynos4210-sdhci";
  115. reg = <0x12520000 0x100>;
  116. interrupts = <0 74 0>;
  117. clocks = <&clock 298>, <&clock 146>;
  118. clock-names = "hsmmc", "mmc_busclk.2";
  119. status = "disabled";
  120. };
  121. sdhci@12530000 {
  122. compatible = "samsung,exynos4210-sdhci";
  123. reg = <0x12530000 0x100>;
  124. interrupts = <0 75 0>;
  125. clocks = <&clock 299>, <&clock 147>;
  126. clock-names = "hsmmc", "mmc_busclk.2";
  127. status = "disabled";
  128. };
  129. sdhci@12540000 {
  130. compatible = "samsung,exynos4210-sdhci";
  131. reg = <0x12540000 0x100>;
  132. interrupts = <0 76 0>;
  133. clocks = <&clock 300>, <&clock 148>;
  134. clock-names = "hsmmc", "mmc_busclk.2";
  135. status = "disabled";
  136. };
  137. mfc: codec@13400000 {
  138. compatible = "samsung,mfc-v5";
  139. reg = <0x13400000 0x10000>;
  140. interrupts = <0 94 0>;
  141. samsung,power-domain = <&pd_mfc>;
  142. status = "disabled";
  143. };
  144. serial@13800000 {
  145. compatible = "samsung,exynos4210-uart";
  146. reg = <0x13800000 0x100>;
  147. interrupts = <0 52 0>;
  148. clocks = <&clock 312>, <&clock 151>;
  149. clock-names = "uart", "clk_uart_baud0";
  150. status = "disabled";
  151. };
  152. serial@13810000 {
  153. compatible = "samsung,exynos4210-uart";
  154. reg = <0x13810000 0x100>;
  155. interrupts = <0 53 0>;
  156. clocks = <&clock 313>, <&clock 152>;
  157. clock-names = "uart", "clk_uart_baud0";
  158. status = "disabled";
  159. };
  160. serial@13820000 {
  161. compatible = "samsung,exynos4210-uart";
  162. reg = <0x13820000 0x100>;
  163. interrupts = <0 54 0>;
  164. clocks = <&clock 314>, <&clock 153>;
  165. clock-names = "uart", "clk_uart_baud0";
  166. status = "disabled";
  167. };
  168. serial@13830000 {
  169. compatible = "samsung,exynos4210-uart";
  170. reg = <0x13830000 0x100>;
  171. interrupts = <0 55 0>;
  172. clocks = <&clock 315>, <&clock 154>;
  173. clock-names = "uart", "clk_uart_baud0";
  174. status = "disabled";
  175. };
  176. i2c_0: i2c@13860000 {
  177. #address-cells = <1>;
  178. #size-cells = <0>;
  179. compatible = "samsung,s3c2440-i2c";
  180. reg = <0x13860000 0x100>;
  181. interrupts = <0 58 0>;
  182. clocks = <&clock 317>;
  183. clock-names = "i2c";
  184. pinctrl-names = "default";
  185. pinctrl-0 = <&i2c0_bus>;
  186. status = "disabled";
  187. };
  188. i2c_1: i2c@13870000 {
  189. #address-cells = <1>;
  190. #size-cells = <0>;
  191. compatible = "samsung,s3c2440-i2c";
  192. reg = <0x13870000 0x100>;
  193. interrupts = <0 59 0>;
  194. clocks = <&clock 318>;
  195. clock-names = "i2c";
  196. pinctrl-names = "default";
  197. pinctrl-0 = <&i2c1_bus>;
  198. status = "disabled";
  199. };
  200. i2c_2: i2c@13880000 {
  201. #address-cells = <1>;
  202. #size-cells = <0>;
  203. compatible = "samsung,s3c2440-i2c";
  204. reg = <0x13880000 0x100>;
  205. interrupts = <0 60 0>;
  206. clocks = <&clock 319>;
  207. clock-names = "i2c";
  208. status = "disabled";
  209. };
  210. i2c_3: i2c@13890000 {
  211. #address-cells = <1>;
  212. #size-cells = <0>;
  213. compatible = "samsung,s3c2440-i2c";
  214. reg = <0x13890000 0x100>;
  215. interrupts = <0 61 0>;
  216. clocks = <&clock 320>;
  217. clock-names = "i2c";
  218. status = "disabled";
  219. };
  220. i2c_4: i2c@138A0000 {
  221. #address-cells = <1>;
  222. #size-cells = <0>;
  223. compatible = "samsung,s3c2440-i2c";
  224. reg = <0x138A0000 0x100>;
  225. interrupts = <0 62 0>;
  226. clocks = <&clock 321>;
  227. clock-names = "i2c";
  228. status = "disabled";
  229. };
  230. i2c_5: i2c@138B0000 {
  231. #address-cells = <1>;
  232. #size-cells = <0>;
  233. compatible = "samsung,s3c2440-i2c";
  234. reg = <0x138B0000 0x100>;
  235. interrupts = <0 63 0>;
  236. clocks = <&clock 322>;
  237. clock-names = "i2c";
  238. status = "disabled";
  239. };
  240. i2c_6: i2c@138C0000 {
  241. #address-cells = <1>;
  242. #size-cells = <0>;
  243. compatible = "samsung,s3c2440-i2c";
  244. reg = <0x138C0000 0x100>;
  245. interrupts = <0 64 0>;
  246. clocks = <&clock 323>;
  247. clock-names = "i2c";
  248. status = "disabled";
  249. };
  250. i2c_7: i2c@138D0000 {
  251. #address-cells = <1>;
  252. #size-cells = <0>;
  253. compatible = "samsung,s3c2440-i2c";
  254. reg = <0x138D0000 0x100>;
  255. interrupts = <0 65 0>;
  256. clocks = <&clock 324>;
  257. clock-names = "i2c";
  258. status = "disabled";
  259. };
  260. spi_0: spi@13920000 {
  261. compatible = "samsung,exynos4210-spi";
  262. reg = <0x13920000 0x100>;
  263. interrupts = <0 66 0>;
  264. tx-dma-channel = <&pdma0 7>; /* preliminary */
  265. rx-dma-channel = <&pdma0 6>; /* preliminary */
  266. #address-cells = <1>;
  267. #size-cells = <0>;
  268. clocks = <&clock 327>, <&clock 159>;
  269. clock-names = "spi", "spi_busclk0";
  270. pinctrl-names = "default";
  271. pinctrl-0 = <&spi0_bus>;
  272. status = "disabled";
  273. };
  274. spi_1: spi@13930000 {
  275. compatible = "samsung,exynos4210-spi";
  276. reg = <0x13930000 0x100>;
  277. interrupts = <0 67 0>;
  278. tx-dma-channel = <&pdma1 7>; /* preliminary */
  279. rx-dma-channel = <&pdma1 6>; /* preliminary */
  280. #address-cells = <1>;
  281. #size-cells = <0>;
  282. clocks = <&clock 328>, <&clock 160>;
  283. clock-names = "spi", "spi_busclk0";
  284. pinctrl-names = "default";
  285. pinctrl-0 = <&spi1_bus>;
  286. status = "disabled";
  287. };
  288. spi_2: spi@13940000 {
  289. compatible = "samsung,exynos4210-spi";
  290. reg = <0x13940000 0x100>;
  291. interrupts = <0 68 0>;
  292. tx-dma-channel = <&pdma0 9>; /* preliminary */
  293. rx-dma-channel = <&pdma0 8>; /* preliminary */
  294. #address-cells = <1>;
  295. #size-cells = <0>;
  296. clocks = <&clock 329>, <&clock 161>;
  297. clock-names = "spi", "spi_busclk0";
  298. pinctrl-names = "default";
  299. pinctrl-0 = <&spi2_bus>;
  300. status = "disabled";
  301. };
  302. pwm@139D0000 {
  303. compatible = "samsung,exynos4210-pwm";
  304. reg = <0x139D0000 0x1000>;
  305. interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
  306. #pwm-cells = <2>;
  307. status = "disabled";
  308. };
  309. amba {
  310. #address-cells = <1>;
  311. #size-cells = <1>;
  312. compatible = "arm,amba-bus";
  313. interrupt-parent = <&gic>;
  314. ranges;
  315. pdma0: pdma@12680000 {
  316. compatible = "arm,pl330", "arm,primecell";
  317. reg = <0x12680000 0x1000>;
  318. interrupts = <0 35 0>;
  319. clocks = <&clock 292>;
  320. clock-names = "apb_pclk";
  321. #dma-cells = <1>;
  322. #dma-channels = <8>;
  323. #dma-requests = <32>;
  324. };
  325. pdma1: pdma@12690000 {
  326. compatible = "arm,pl330", "arm,primecell";
  327. reg = <0x12690000 0x1000>;
  328. interrupts = <0 36 0>;
  329. clocks = <&clock 293>;
  330. clock-names = "apb_pclk";
  331. #dma-cells = <1>;
  332. #dma-channels = <8>;
  333. #dma-requests = <32>;
  334. };
  335. mdma1: mdma@12850000 {
  336. compatible = "arm,pl330", "arm,primecell";
  337. reg = <0x12850000 0x1000>;
  338. interrupts = <0 34 0>;
  339. clocks = <&clock 279>;
  340. clock-names = "apb_pclk";
  341. #dma-cells = <1>;
  342. #dma-channels = <8>;
  343. #dma-requests = <1>;
  344. };
  345. };
  346. fimd: fimd@11c00000 {
  347. compatible = "samsung,exynos4210-fimd";
  348. interrupt-parent = <&combiner>;
  349. reg = <0x11c00000 0x20000>;
  350. interrupt-names = "fifo", "vsync", "lcd_sys";
  351. interrupts = <11 0>, <11 1>, <11 2>;
  352. clocks = <&clock 140>, <&clock 283>;
  353. clock-names = "sclk_fimd", "fimd";
  354. samsung,power-domain = <&pd_lcd0>;
  355. status = "disabled";
  356. };
  357. };