bcm2835.dtsi 2.8 KB

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  1. /include/ "skeleton.dtsi"
  2. / {
  3. compatible = "brcm,bcm2835";
  4. model = "BCM2835";
  5. interrupt-parent = <&intc>;
  6. chosen {
  7. bootargs = "earlyprintk console=ttyAMA0";
  8. };
  9. soc {
  10. compatible = "simple-bus";
  11. #address-cells = <1>;
  12. #size-cells = <1>;
  13. ranges = <0x7e000000 0x20000000 0x02000000>;
  14. timer {
  15. compatible = "brcm,bcm2835-system-timer";
  16. reg = <0x7e003000 0x1000>;
  17. interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
  18. clock-frequency = <1000000>;
  19. };
  20. intc: interrupt-controller {
  21. compatible = "brcm,bcm2835-armctrl-ic";
  22. reg = <0x7e00b200 0x200>;
  23. interrupt-controller;
  24. #interrupt-cells = <2>;
  25. };
  26. watchdog {
  27. compatible = "brcm,bcm2835-pm-wdt";
  28. reg = <0x7e100000 0x28>;
  29. };
  30. rng {
  31. compatible = "brcm,bcm2835-rng";
  32. reg = <0x7e104000 0x10>;
  33. };
  34. uart@20201000 {
  35. compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
  36. reg = <0x7e201000 0x1000>;
  37. interrupts = <2 25>;
  38. clock-frequency = <3000000>;
  39. };
  40. gpio: gpio {
  41. compatible = "brcm,bcm2835-gpio";
  42. reg = <0x7e200000 0xb4>;
  43. /*
  44. * The GPIO IP block is designed for 3 banks of GPIOs.
  45. * Each bank has a GPIO interrupt for itself.
  46. * There is an overall "any bank" interrupt.
  47. * In order, these are GIC interrupts 17, 18, 19, 20.
  48. * Since the BCM2835 only has 2 banks, the 2nd bank
  49. * interrupt output appears to be mirrored onto the
  50. * 3rd bank's interrupt signal.
  51. * So, a bank0 interrupt shows up on 17, 20, and
  52. * a bank1 interrupt shows up on 18, 19, 20!
  53. */
  54. interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
  55. gpio-controller;
  56. #gpio-cells = <2>;
  57. interrupt-controller;
  58. #interrupt-cells = <2>;
  59. };
  60. spi: spi@20204000 {
  61. compatible = "brcm,bcm2835-spi";
  62. reg = <0x7e204000 0x1000>;
  63. interrupts = <2 22>;
  64. clocks = <&clk_spi>;
  65. #address-cells = <1>;
  66. #size-cells = <0>;
  67. status = "disabled";
  68. };
  69. i2c0: i2c@20205000 {
  70. compatible = "brcm,bcm2835-i2c";
  71. reg = <0x7e205000 0x1000>;
  72. interrupts = <2 21>;
  73. clocks = <&clk_i2c>;
  74. status = "disabled";
  75. };
  76. i2c1: i2c@20804000 {
  77. compatible = "brcm,bcm2835-i2c";
  78. reg = <0x7e804000 0x1000>;
  79. interrupts = <2 21>;
  80. clocks = <&clk_i2c>;
  81. status = "disabled";
  82. };
  83. sdhci: sdhci {
  84. compatible = "brcm,bcm2835-sdhci";
  85. reg = <0x7e300000 0x100>;
  86. interrupts = <2 30>;
  87. clocks = <&clk_mmc>;
  88. status = "disabled";
  89. };
  90. };
  91. clocks {
  92. compatible = "simple-bus";
  93. #address-cells = <1>;
  94. #size-cells = <0>;
  95. clk_mmc: mmc {
  96. compatible = "fixed-clock";
  97. reg = <0>;
  98. #clock-cells = <0>;
  99. clock-frequency = <100000000>;
  100. };
  101. clk_i2c: i2c {
  102. compatible = "fixed-clock";
  103. reg = <1>;
  104. #clock-cells = <0>;
  105. clock-frequency = <250000000>;
  106. };
  107. clk_spi: spi {
  108. compatible = "fixed-clock";
  109. reg = <2>;
  110. #clock-cells = <0>;
  111. clock-frequency = <250000000>;
  112. };
  113. };
  114. };