armada-xp-openblocks-ax3-4.dts 3.5 KB

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  1. /*
  2. * Device Tree file for OpenBlocks AX3-4 board
  3. *
  4. * Copyright (C) 2012 Marvell
  5. *
  6. * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. */
  12. /dts-v1/;
  13. /include/ "armada-xp-mv78260.dtsi"
  14. / {
  15. model = "PlatHome OpenBlocks AX3-4 board";
  16. compatible = "plathome,openblocks-ax3-4", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
  17. chosen {
  18. bootargs = "console=ttyS0,115200 earlyprintk";
  19. };
  20. memory {
  21. device_type = "memory";
  22. reg = <0 0x00000000 0 0xC0000000>; /* 3 GB */
  23. };
  24. soc {
  25. internal-regs {
  26. serial@12000 {
  27. clock-frequency = <250000000>;
  28. status = "okay";
  29. };
  30. serial@12100 {
  31. clock-frequency = <250000000>;
  32. status = "okay";
  33. };
  34. pinctrl {
  35. led_pins: led-pins-0 {
  36. marvell,pins = "mpp49", "mpp51", "mpp53";
  37. marvell,function = "gpio";
  38. };
  39. };
  40. leds {
  41. compatible = "gpio-leds";
  42. pinctrl-names = "default";
  43. pinctrl-0 = <&led_pins>;
  44. red_led {
  45. label = "red_led";
  46. gpios = <&gpio1 17 1>;
  47. default-state = "off";
  48. };
  49. yellow_led {
  50. label = "yellow_led";
  51. gpios = <&gpio1 19 1>;
  52. default-state = "off";
  53. };
  54. green_led {
  55. label = "green_led";
  56. gpios = <&gpio1 21 1>;
  57. default-state = "off";
  58. linux,default-trigger = "heartbeat";
  59. };
  60. };
  61. gpio_keys {
  62. compatible = "gpio-keys";
  63. #address-cells = <1>;
  64. #size-cells = <0>;
  65. button@1 {
  66. label = "Init Button";
  67. linux,code = <116>;
  68. gpios = <&gpio1 28 0>;
  69. };
  70. };
  71. mdio {
  72. phy0: ethernet-phy@0 {
  73. reg = <0>;
  74. };
  75. phy1: ethernet-phy@1 {
  76. reg = <1>;
  77. };
  78. phy2: ethernet-phy@2 {
  79. reg = <2>;
  80. };
  81. phy3: ethernet-phy@3 {
  82. reg = <3>;
  83. };
  84. };
  85. ethernet@70000 {
  86. status = "okay";
  87. phy = <&phy0>;
  88. phy-mode = "sgmii";
  89. };
  90. ethernet@74000 {
  91. status = "okay";
  92. phy = <&phy1>;
  93. phy-mode = "sgmii";
  94. };
  95. ethernet@30000 {
  96. status = "okay";
  97. phy = <&phy2>;
  98. phy-mode = "sgmii";
  99. };
  100. ethernet@34000 {
  101. status = "okay";
  102. phy = <&phy3>;
  103. phy-mode = "sgmii";
  104. };
  105. i2c@11000 {
  106. status = "okay";
  107. clock-frequency = <400000>;
  108. };
  109. i2c@11100 {
  110. status = "okay";
  111. clock-frequency = <400000>;
  112. s35390a: s35390a@30 {
  113. compatible = "s35390a";
  114. reg = <0x30>;
  115. };
  116. };
  117. sata@a0000 {
  118. nr-ports = <2>;
  119. status = "okay";
  120. };
  121. usb@50000 {
  122. status = "okay";
  123. };
  124. usb@51000 {
  125. status = "okay";
  126. };
  127. devbus-bootcs@10400 {
  128. status = "okay";
  129. ranges = <0 0xf0000000 0x8000000>; /* @addr 0xf000000, size 0x8000000 */
  130. /* Device Bus parameters are required */
  131. /* Read parameters */
  132. devbus,bus-width = <8>;
  133. devbus,turn-off-ps = <60000>;
  134. devbus,badr-skew-ps = <0>;
  135. devbus,acc-first-ps = <124000>;
  136. devbus,acc-next-ps = <248000>;
  137. devbus,rd-setup-ps = <0>;
  138. devbus,rd-hold-ps = <0>;
  139. /* Write parameters */
  140. devbus,sync-enable = <0>;
  141. devbus,wr-high-ps = <60000>;
  142. devbus,wr-low-ps = <60000>;
  143. devbus,ale-wr-ps = <60000>;
  144. /* NOR 128 MiB */
  145. nor@0 {
  146. compatible = "cfi-flash";
  147. reg = <0 0x8000000>;
  148. bank-width = <2>;
  149. };
  150. };
  151. pcie-controller {
  152. status = "okay";
  153. /* Internal mini-PCIe connector */
  154. pcie@1,0 {
  155. /* Port 0, Lane 0 */
  156. status = "okay";
  157. };
  158. };
  159. };
  160. };
  161. };