armada-370-db.dts 2.3 KB

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  1. /*
  2. * Device Tree file for Marvell Armada 370 evaluation board
  3. * (DB-88F6710-BP-DDR3)
  4. *
  5. * Copyright (C) 2012 Marvell
  6. *
  7. * Lior Amsalem <alior@marvell.com>
  8. * Gregory CLEMENT <gregory.clement@free-electrons.com>
  9. * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  10. *
  11. * This file is licensed under the terms of the GNU General Public
  12. * License version 2. This program is licensed "as is" without any
  13. * warranty of any kind, whether express or implied.
  14. */
  15. /dts-v1/;
  16. /include/ "armada-370.dtsi"
  17. / {
  18. model = "Marvell Armada 370 Evaluation Board";
  19. compatible = "marvell,a370-db", "marvell,armada370", "marvell,armada-370-xp";
  20. chosen {
  21. bootargs = "console=ttyS0,115200 earlyprintk";
  22. };
  23. memory {
  24. device_type = "memory";
  25. reg = <0x00000000 0x40000000>; /* 1 GB */
  26. };
  27. soc {
  28. internal-regs {
  29. serial@12000 {
  30. clock-frequency = <200000000>;
  31. status = "okay";
  32. };
  33. sata@a0000 {
  34. nr-ports = <2>;
  35. status = "okay";
  36. };
  37. mdio {
  38. phy0: ethernet-phy@0 {
  39. reg = <0>;
  40. };
  41. phy1: ethernet-phy@1 {
  42. reg = <1>;
  43. };
  44. };
  45. ethernet@70000 {
  46. status = "okay";
  47. phy = <&phy0>;
  48. phy-mode = "rgmii-id";
  49. };
  50. ethernet@74000 {
  51. status = "okay";
  52. phy = <&phy1>;
  53. phy-mode = "rgmii-id";
  54. };
  55. mvsdio@d4000 {
  56. pinctrl-0 = <&sdio_pins1>;
  57. pinctrl-names = "default";
  58. /*
  59. * This device is disabled by default, because
  60. * using the SD card connector requires
  61. * changing the default CON40 connector
  62. * "DB-88F6710_MPP_2xRGMII_DEVICE_Jumper" to a
  63. * different connector
  64. * "DB-88F6710_MPP_RGMII_SD_Jumper".
  65. */
  66. status = "disabled";
  67. /* No CD or WP GPIOs */
  68. };
  69. usb@50000 {
  70. status = "okay";
  71. };
  72. usb@51000 {
  73. status = "okay";
  74. };
  75. spi0: spi@10600 {
  76. status = "okay";
  77. spi-flash@0 {
  78. #address-cells = <1>;
  79. #size-cells = <1>;
  80. compatible = "mx25l25635e";
  81. reg = <0>; /* Chip select 0 */
  82. spi-max-frequency = <50000000>;
  83. };
  84. };
  85. pcie-controller {
  86. status = "okay";
  87. /*
  88. * The two PCIe units are accessible through
  89. * both standard PCIe slots and mini-PCIe
  90. * slots on the board.
  91. */
  92. pcie@1,0 {
  93. /* Port 0, Lane 0 */
  94. status = "okay";
  95. };
  96. pcie@2,0 {
  97. /* Port 1, Lane 0 */
  98. status = "okay";
  99. };
  100. };
  101. };
  102. };
  103. };