abilis_tb101.dtsi 8.7 KB

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  1. /*
  2. * Abilis Systems TB101 SOC device tree
  3. *
  4. * Copyright (C) Abilis Systems 2013
  5. *
  6. * Author: Christian Ruppert <christian.ruppert@abilis.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. /include/ "abilis_tb10x.dtsi"
  22. /* interrupt specifiers
  23. * --------------------
  24. * 0: rising, 1: low, 2: high, 3: falling,
  25. */
  26. / {
  27. clock-frequency = <500000000>; /* 500 MHZ */
  28. soc100 {
  29. bus-frequency = <166666666>;
  30. pll0: oscillator {
  31. clock-frequency = <1000000000>;
  32. };
  33. cpu_clk: clkdiv_cpu {
  34. clock-mult = <1>;
  35. clock-div = <2>;
  36. };
  37. ahb_clk: clkdiv_ahb {
  38. clock-mult = <1>;
  39. clock-div = <6>;
  40. };
  41. iomux: iomux@FF10601c {
  42. /* Port 1 */
  43. pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
  44. pingrp = "mis0_pins";
  45. };
  46. pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
  47. pingrp = "mis1_pins";
  48. };
  49. pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
  50. pingrp = "gpioa_pins";
  51. };
  52. pctl_tsin_p1: pctl-tsin-p1 { /* Parallel TS-in 1 */
  53. pingrp = "mip1_pins";
  54. };
  55. /* Port 2 */
  56. pctl_tsin_s2: pctl-tsin-s2 { /* Serial TS-in 2 */
  57. pingrp = "mis2_pins";
  58. };
  59. pctl_tsin_s3: pctl-tsin-s3 { /* Serial TS-in 3 */
  60. pingrp = "mis3_pins";
  61. };
  62. pctl_gpio_c: pctl-gpio-c { /* GPIO bank C */
  63. pingrp = "gpioc_pins";
  64. };
  65. pctl_tsin_p3: pctl-tsin-p3 { /* Parallel TS-in 3 */
  66. pingrp = "mip3_pins";
  67. };
  68. /* Port 3 */
  69. pctl_tsin_s4: pctl-tsin-s4 { /* Serial TS-in 4 */
  70. pingrp = "mis4_pins";
  71. };
  72. pctl_tsin_s5: pctl-tsin-s5 { /* Serial TS-in 5 */
  73. pingrp = "mis5_pins";
  74. };
  75. pctl_gpio_e: pctl-gpio-e { /* GPIO bank E */
  76. pingrp = "gpioe_pins";
  77. };
  78. pctl_tsin_p5: pctl-tsin-p5 { /* Parallel TS-in 5 */
  79. pingrp = "mip5_pins";
  80. };
  81. /* Port 4 */
  82. pctl_tsin_s6: pctl-tsin-s6 { /* Serial TS-in 6 */
  83. pingrp = "mis6_pins";
  84. };
  85. pctl_tsin_s7: pctl-tsin-s7 { /* Serial TS-in 7 */
  86. pingrp = "mis7_pins";
  87. };
  88. pctl_gpio_g: pctl-gpio-g { /* GPIO bank G */
  89. pingrp = "gpiog_pins";
  90. };
  91. pctl_tsin_p7: pctl-tsin-p7 { /* Parallel TS-in 7 */
  92. pingrp = "mip7_pins";
  93. };
  94. /* Port 5 */
  95. pctl_gpio_j: pctl-gpio-j { /* GPIO bank J */
  96. pingrp = "gpioj_pins";
  97. };
  98. pctl_gpio_k: pctl-gpio-k { /* GPIO bank K */
  99. pingrp = "gpiok_pins";
  100. };
  101. pctl_ciplus: pctl-ciplus { /* CI+ interface */
  102. pingrp = "ciplus_pins";
  103. };
  104. pctl_mcard: pctl-mcard { /* M-Card interface */
  105. pingrp = "mcard_pins";
  106. };
  107. pctl_stc0: pctl-stc0 { /* Smart card I/F 0 */
  108. pingrp = "stc0_pins";
  109. };
  110. pctl_stc1: pctl-stc1 { /* Smart card I/F 1 */
  111. pingrp = "stc1_pins";
  112. };
  113. /* Port 6 */
  114. pctl_tsout_p: pctl-tsout-p { /* Parallel TS-out */
  115. pingrp = "mop_pins";
  116. };
  117. pctl_tsout_s0: pctl-tsout-s0 { /* Serial TS-out 0 */
  118. pingrp = "mos0_pins";
  119. };
  120. pctl_tsout_s1: pctl-tsout-s1 { /* Serial TS-out 1 */
  121. pingrp = "mos1_pins";
  122. };
  123. pctl_tsout_s2: pctl-tsout-s2 { /* Serial TS-out 2 */
  124. pingrp = "mos2_pins";
  125. };
  126. pctl_tsout_s3: pctl-tsout-s3 { /* Serial TS-out 3 */
  127. pingrp = "mos3_pins";
  128. };
  129. /* Port 7 */
  130. pctl_uart0: pctl-uart0 { /* UART 0 */
  131. pingrp = "uart0_pins";
  132. };
  133. pctl_uart1: pctl-uart1 { /* UART 1 */
  134. pingrp = "uart1_pins";
  135. };
  136. pctl_gpio_l: pctl-gpio-l { /* GPIO bank L */
  137. pingrp = "gpiol_pins";
  138. };
  139. pctl_gpio_m: pctl-gpio-m { /* GPIO bank M */
  140. pingrp = "gpiom_pins";
  141. };
  142. /* Port 8 */
  143. pctl_spi3: pctl-spi3 {
  144. pingrp = "spi3_pins";
  145. };
  146. pctl_jtag: pctl-jtag {
  147. pingrp = "jtag_pins";
  148. };
  149. /* Port 9 */
  150. pctl_spi1: pctl-spi1 {
  151. pingrp = "spi1_pins";
  152. };
  153. pctl_gpio_n: pctl-gpio-n {
  154. pingrp = "gpion_pins";
  155. };
  156. /* Unmuxed GPIOs */
  157. pctl_gpio_b: pctl-gpio-b {
  158. pingrp = "gpiob_pins";
  159. };
  160. pctl_gpio_d: pctl-gpio-d {
  161. pingrp = "gpiod_pins";
  162. };
  163. pctl_gpio_f: pctl-gpio-f {
  164. pingrp = "gpiof_pins";
  165. };
  166. pctl_gpio_h: pctl-gpio-h {
  167. pingrp = "gpioh_pins";
  168. };
  169. pctl_gpio_i: pctl-gpio-i {
  170. pingrp = "gpioi_pins";
  171. };
  172. };
  173. gpioa: gpio@FF140000 {
  174. compatible = "abilis,tb10x-gpio";
  175. interrupt-controller;
  176. #interrupt-cells = <1>;
  177. interrupt-parent = <&tb10x_ictl>;
  178. interrupts = <27 1>;
  179. reg = <0xFF140000 0x1000>;
  180. gpio-controller;
  181. #gpio-cells = <1>;
  182. gpio-base = <0>;
  183. gpio-pins = <&pctl_gpio_a>;
  184. };
  185. gpiob: gpio@FF141000 {
  186. compatible = "abilis,tb10x-gpio";
  187. interrupt-controller;
  188. #interrupt-cells = <1>;
  189. interrupt-parent = <&tb10x_ictl>;
  190. interrupts = <27 1>;
  191. reg = <0xFF141000 0x1000>;
  192. gpio-controller;
  193. #gpio-cells = <1>;
  194. gpio-base = <3>;
  195. gpio-pins = <&pctl_gpio_b>;
  196. };
  197. gpioc: gpio@FF142000 {
  198. compatible = "abilis,tb10x-gpio";
  199. interrupt-controller;
  200. #interrupt-cells = <1>;
  201. interrupt-parent = <&tb10x_ictl>;
  202. interrupts = <27 1>;
  203. reg = <0xFF142000 0x1000>;
  204. gpio-controller;
  205. #gpio-cells = <1>;
  206. gpio-base = <5>;
  207. gpio-pins = <&pctl_gpio_c>;
  208. };
  209. gpiod: gpio@FF143000 {
  210. compatible = "abilis,tb10x-gpio";
  211. interrupt-controller;
  212. #interrupt-cells = <1>;
  213. interrupt-parent = <&tb10x_ictl>;
  214. interrupts = <27 1>;
  215. reg = <0xFF143000 0x1000>;
  216. gpio-controller;
  217. #gpio-cells = <1>;
  218. gpio-base = <8>;
  219. gpio-pins = <&pctl_gpio_d>;
  220. };
  221. gpioe: gpio@FF144000 {
  222. compatible = "abilis,tb10x-gpio";
  223. interrupt-controller;
  224. #interrupt-cells = <1>;
  225. interrupt-parent = <&tb10x_ictl>;
  226. interrupts = <27 1>;
  227. reg = <0xFF144000 0x1000>;
  228. gpio-controller;
  229. #gpio-cells = <1>;
  230. gpio-base = <10>;
  231. gpio-pins = <&pctl_gpio_e>;
  232. };
  233. gpiof: gpio@FF145000 {
  234. compatible = "abilis,tb10x-gpio";
  235. interrupt-controller;
  236. #interrupt-cells = <1>;
  237. interrupt-parent = <&tb10x_ictl>;
  238. interrupts = <27 1>;
  239. reg = <0xFF145000 0x1000>;
  240. gpio-controller;
  241. #gpio-cells = <1>;
  242. gpio-base = <13>;
  243. gpio-pins = <&pctl_gpio_f>;
  244. };
  245. gpiog: gpio@FF146000 {
  246. compatible = "abilis,tb10x-gpio";
  247. interrupt-controller;
  248. #interrupt-cells = <1>;
  249. interrupt-parent = <&tb10x_ictl>;
  250. interrupts = <27 1>;
  251. reg = <0xFF146000 0x1000>;
  252. gpio-controller;
  253. #gpio-cells = <1>;
  254. gpio-base = <15>;
  255. gpio-pins = <&pctl_gpio_g>;
  256. };
  257. gpioh: gpio@FF147000 {
  258. compatible = "abilis,tb10x-gpio";
  259. interrupt-controller;
  260. #interrupt-cells = <1>;
  261. interrupt-parent = <&tb10x_ictl>;
  262. interrupts = <27 1>;
  263. reg = <0xFF147000 0x1000>;
  264. gpio-controller;
  265. #gpio-cells = <1>;
  266. gpio-base = <18>;
  267. gpio-pins = <&pctl_gpio_h>;
  268. };
  269. gpioi: gpio@FF148000 {
  270. compatible = "abilis,tb10x-gpio";
  271. interrupt-controller;
  272. #interrupt-cells = <1>;
  273. interrupt-parent = <&tb10x_ictl>;
  274. interrupts = <27 1>;
  275. reg = <0xFF148000 0x1000>;
  276. gpio-controller;
  277. #gpio-cells = <1>;
  278. gpio-base = <20>;
  279. gpio-pins = <&pctl_gpio_i>;
  280. };
  281. gpioj: gpio@FF149000 {
  282. compatible = "abilis,tb10x-gpio";
  283. interrupt-controller;
  284. #interrupt-cells = <1>;
  285. interrupt-parent = <&tb10x_ictl>;
  286. interrupts = <27 1>;
  287. reg = <0xFF149000 0x1000>;
  288. gpio-controller;
  289. #gpio-cells = <1>;
  290. gpio-base = <32>;
  291. gpio-pins = <&pctl_gpio_j>;
  292. };
  293. gpiok: gpio@FF14a000 {
  294. compatible = "abilis,tb10x-gpio";
  295. interrupt-controller;
  296. #interrupt-cells = <1>;
  297. interrupt-parent = <&tb10x_ictl>;
  298. interrupts = <27 1>;
  299. reg = <0xFF14A000 0x1000>;
  300. gpio-controller;
  301. #gpio-cells = <1>;
  302. gpio-base = <64>;
  303. gpio-pins = <&pctl_gpio_k>;
  304. };
  305. gpiol: gpio@FF14b000 {
  306. compatible = "abilis,tb10x-gpio";
  307. interrupt-controller;
  308. #interrupt-cells = <1>;
  309. interrupt-parent = <&tb10x_ictl>;
  310. interrupts = <27 1>;
  311. reg = <0xFF14B000 0x1000>;
  312. gpio-controller;
  313. #gpio-cells = <1>;
  314. gpio-base = <86>;
  315. gpio-pins = <&pctl_gpio_l>;
  316. };
  317. gpiom: gpio@FF14c000 {
  318. compatible = "abilis,tb10x-gpio";
  319. interrupt-controller;
  320. #interrupt-cells = <1>;
  321. interrupt-parent = <&tb10x_ictl>;
  322. interrupts = <27 1>;
  323. reg = <0xFF14C000 0x1000>;
  324. gpio-controller;
  325. #gpio-cells = <1>;
  326. gpio-base = <90>;
  327. gpio-pins = <&pctl_gpio_m>;
  328. };
  329. gpion: gpio@FF14d000 {
  330. compatible = "abilis,tb10x-gpio";
  331. interrupt-controller;
  332. #interrupt-cells = <1>;
  333. interrupt-parent = <&tb10x_ictl>;
  334. interrupts = <27 1>;
  335. reg = <0xFF14D000 0x1000>;
  336. gpio-controller;
  337. #gpio-cells = <1>;
  338. gpio-base = <94>;
  339. gpio-pins = <&pctl_gpio_n>;
  340. };
  341. };
  342. };