abilis_tb100.dtsi 8.5 KB

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  1. /*
  2. * Abilis Systems TB100 SOC device tree
  3. *
  4. * Copyright (C) Abilis Systems 2013
  5. *
  6. * Author: Christian Ruppert <christian.ruppert@abilis.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. /include/ "abilis_tb10x.dtsi"
  22. /* interrupt specifiers
  23. * --------------------
  24. * 0: rising, 1: low, 2: high, 3: falling,
  25. */
  26. / {
  27. clock-frequency = <500000000>; /* 500 MHZ */
  28. soc100 {
  29. bus-frequency = <166666666>;
  30. pll0: oscillator {
  31. clock-frequency = <1000000000>;
  32. };
  33. cpu_clk: clkdiv_cpu {
  34. clock-mult = <1>;
  35. clock-div = <2>;
  36. };
  37. ahb_clk: clkdiv_ahb {
  38. clock-mult = <1>;
  39. clock-div = <6>;
  40. };
  41. iomux: iomux@FF10601c {
  42. /* Port 1 */
  43. pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
  44. pingrp = "mis0_pins";
  45. };
  46. pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
  47. pingrp = "mis1_pins";
  48. };
  49. pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
  50. pingrp = "gpioa_pins";
  51. };
  52. pctl_tsin_p1: pctl-tsin-p1 { /* Parallel TS-in 1 */
  53. pingrp = "mip1_pins";
  54. };
  55. /* Port 2 */
  56. pctl_tsin_s2: pctl-tsin-s2 { /* Serial TS-in 2 */
  57. pingrp = "mis2_pins";
  58. };
  59. pctl_tsin_s3: pctl-tsin-s3 { /* Serial TS-in 3 */
  60. pingrp = "mis3_pins";
  61. };
  62. pctl_gpio_c: pctl-gpio-c { /* GPIO bank C */
  63. pingrp = "gpioc_pins";
  64. };
  65. pctl_tsin_p3: pctl-tsin-p3 { /* Parallel TS-in 3 */
  66. pingrp = "mip3_pins";
  67. };
  68. /* Port 3 */
  69. pctl_tsin_s4: pctl-tsin-s4 { /* Serial TS-in 4 */
  70. pingrp = "mis4_pins";
  71. };
  72. pctl_tsin_s5: pctl-tsin-s5 { /* Serial TS-in 5 */
  73. pingrp = "mis5_pins";
  74. };
  75. pctl_gpio_e: pctl-gpio-e { /* GPIO bank E */
  76. pingrp = "gpioe_pins";
  77. };
  78. pctl_tsin_p5: pctl-tsin-p5 { /* Parallel TS-in 5 */
  79. pingrp = "mip5_pins";
  80. };
  81. /* Port 4 */
  82. pctl_tsin_s6: pctl-tsin-s6 { /* Serial TS-in 6 */
  83. pingrp = "mis6_pins";
  84. };
  85. pctl_tsin_s7: pctl-tsin-s7 { /* Serial TS-in 7 */
  86. pingrp = "mis7_pins";
  87. };
  88. pctl_gpio_g: pctl-gpio-g { /* GPIO bank G */
  89. pingrp = "gpiog_pins";
  90. };
  91. pctl_tsin_p7: pctl-tsin-p7 { /* Parallel TS-in 7 */
  92. pingrp = "mip7_pins";
  93. };
  94. /* Port 5 */
  95. pctl_gpio_j: pctl-gpio-j { /* GPIO bank J */
  96. pingrp = "gpioj_pins";
  97. };
  98. pctl_gpio_k: pctl-gpio-k { /* GPIO bank K */
  99. pingrp = "gpiok_pins";
  100. };
  101. pctl_ciplus: pctl-ciplus { /* CI+ interface */
  102. pingrp = "ciplus_pins";
  103. };
  104. pctl_mcard: pctl-mcard { /* M-Card interface */
  105. pingrp = "mcard_pins";
  106. };
  107. /* Port 6 */
  108. pctl_tsout_p: pctl-tsout-p { /* Parallel TS-out */
  109. pingrp = "mop_pins";
  110. };
  111. pctl_tsout_s0: pctl-tsout-s0 { /* Serial TS-out 0 */
  112. pingrp = "mos0_pins";
  113. };
  114. pctl_tsout_s1: pctl-tsout-s1 { /* Serial TS-out 1 */
  115. pingrp = "mos1_pins";
  116. };
  117. pctl_tsout_s2: pctl-tsout-s2 { /* Serial TS-out 2 */
  118. pingrp = "mos2_pins";
  119. };
  120. pctl_tsout_s3: pctl-tsout-s3 { /* Serial TS-out 3 */
  121. pingrp = "mos3_pins";
  122. };
  123. /* Port 7 */
  124. pctl_uart0: pctl-uart0 { /* UART 0 */
  125. pingrp = "uart0_pins";
  126. };
  127. pctl_uart1: pctl-uart1 { /* UART 1 */
  128. pingrp = "uart1_pins";
  129. };
  130. pctl_gpio_l: pctl-gpio-l { /* GPIO bank L */
  131. pingrp = "gpiol_pins";
  132. };
  133. pctl_gpio_m: pctl-gpio-m { /* GPIO bank M */
  134. pingrp = "gpiom_pins";
  135. };
  136. /* Port 8 */
  137. pctl_spi3: pctl-spi3 {
  138. pingrp = "spi3_pins";
  139. };
  140. /* Port 9 */
  141. pctl_spi1: pctl-spi1 {
  142. pingrp = "spi1_pins";
  143. };
  144. pctl_gpio_n: pctl-gpio-n {
  145. pingrp = "gpion_pins";
  146. };
  147. /* Unmuxed GPIOs */
  148. pctl_gpio_b: pctl-gpio-b {
  149. pingrp = "gpiob_pins";
  150. };
  151. pctl_gpio_d: pctl-gpio-d {
  152. pingrp = "gpiod_pins";
  153. };
  154. pctl_gpio_f: pctl-gpio-f {
  155. pingrp = "gpiof_pins";
  156. };
  157. pctl_gpio_h: pctl-gpio-h {
  158. pingrp = "gpioh_pins";
  159. };
  160. pctl_gpio_i: pctl-gpio-i {
  161. pingrp = "gpioi_pins";
  162. };
  163. };
  164. gpioa: gpio@FF140000 {
  165. compatible = "abilis,tb10x-gpio";
  166. interrupt-controller;
  167. #interrupt-cells = <1>;
  168. interrupt-parent = <&tb10x_ictl>;
  169. interrupts = <27 1>;
  170. reg = <0xFF140000 0x1000>;
  171. gpio-controller;
  172. #gpio-cells = <1>;
  173. gpio-base = <0>;
  174. gpio-pins = <&pctl_gpio_a>;
  175. };
  176. gpiob: gpio@FF141000 {
  177. compatible = "abilis,tb10x-gpio";
  178. interrupt-controller;
  179. #interrupt-cells = <1>;
  180. interrupt-parent = <&tb10x_ictl>;
  181. interrupts = <27 1>;
  182. reg = <0xFF141000 0x1000>;
  183. gpio-controller;
  184. #gpio-cells = <1>;
  185. gpio-base = <3>;
  186. gpio-pins = <&pctl_gpio_b>;
  187. };
  188. gpioc: gpio@FF142000 {
  189. compatible = "abilis,tb10x-gpio";
  190. interrupt-controller;
  191. #interrupt-cells = <1>;
  192. interrupt-parent = <&tb10x_ictl>;
  193. interrupts = <27 1>;
  194. reg = <0xFF142000 0x1000>;
  195. gpio-controller;
  196. #gpio-cells = <1>;
  197. gpio-base = <5>;
  198. gpio-pins = <&pctl_gpio_c>;
  199. };
  200. gpiod: gpio@FF143000 {
  201. compatible = "abilis,tb10x-gpio";
  202. interrupt-controller;
  203. #interrupt-cells = <1>;
  204. interrupt-parent = <&tb10x_ictl>;
  205. interrupts = <27 1>;
  206. reg = <0xFF143000 0x1000>;
  207. gpio-controller;
  208. #gpio-cells = <1>;
  209. gpio-base = <8>;
  210. gpio-pins = <&pctl_gpio_d>;
  211. };
  212. gpioe: gpio@FF144000 {
  213. compatible = "abilis,tb10x-gpio";
  214. interrupt-controller;
  215. #interrupt-cells = <1>;
  216. interrupt-parent = <&tb10x_ictl>;
  217. interrupts = <27 1>;
  218. reg = <0xFF144000 0x1000>;
  219. gpio-controller;
  220. #gpio-cells = <1>;
  221. gpio-base = <10>;
  222. gpio-pins = <&pctl_gpio_e>;
  223. };
  224. gpiof: gpio@FF145000 {
  225. compatible = "abilis,tb10x-gpio";
  226. interrupt-controller;
  227. #interrupt-cells = <1>;
  228. interrupt-parent = <&tb10x_ictl>;
  229. interrupts = <27 1>;
  230. reg = <0xFF145000 0x1000>;
  231. gpio-controller;
  232. #gpio-cells = <1>;
  233. gpio-base = <13>;
  234. gpio-pins = <&pctl_gpio_f>;
  235. };
  236. gpiog: gpio@FF146000 {
  237. compatible = "abilis,tb10x-gpio";
  238. interrupt-controller;
  239. #interrupt-cells = <1>;
  240. interrupt-parent = <&tb10x_ictl>;
  241. interrupts = <27 1>;
  242. reg = <0xFF146000 0x1000>;
  243. gpio-controller;
  244. #gpio-cells = <1>;
  245. gpio-base = <15>;
  246. gpio-pins = <&pctl_gpio_g>;
  247. };
  248. gpioh: gpio@FF147000 {
  249. compatible = "abilis,tb10x-gpio";
  250. interrupt-controller;
  251. #interrupt-cells = <1>;
  252. interrupt-parent = <&tb10x_ictl>;
  253. interrupts = <27 1>;
  254. reg = <0xFF147000 0x1000>;
  255. gpio-controller;
  256. #gpio-cells = <1>;
  257. gpio-base = <18>;
  258. gpio-pins = <&pctl_gpio_h>;
  259. };
  260. gpioi: gpio@FF148000 {
  261. compatible = "abilis,tb10x-gpio";
  262. interrupt-controller;
  263. #interrupt-cells = <1>;
  264. interrupt-parent = <&tb10x_ictl>;
  265. interrupts = <27 1>;
  266. reg = <0xFF148000 0x1000>;
  267. gpio-controller;
  268. #gpio-cells = <1>;
  269. gpio-base = <20>;
  270. gpio-pins = <&pctl_gpio_i>;
  271. };
  272. gpioj: gpio@FF149000 {
  273. compatible = "abilis,tb10x-gpio";
  274. interrupt-controller;
  275. #interrupt-cells = <1>;
  276. interrupt-parent = <&tb10x_ictl>;
  277. interrupts = <27 1>;
  278. reg = <0xFF149000 0x1000>;
  279. gpio-controller;
  280. #gpio-cells = <1>;
  281. gpio-base = <32>;
  282. gpio-pins = <&pctl_gpio_j>;
  283. };
  284. gpiok: gpio@FF14a000 {
  285. compatible = "abilis,tb10x-gpio";
  286. interrupt-controller;
  287. #interrupt-cells = <1>;
  288. interrupt-parent = <&tb10x_ictl>;
  289. interrupts = <27 1>;
  290. reg = <0xFF14A000 0x1000>;
  291. gpio-controller;
  292. #gpio-cells = <1>;
  293. gpio-base = <64>;
  294. gpio-pins = <&pctl_gpio_k>;
  295. };
  296. gpiol: gpio@FF14b000 {
  297. compatible = "abilis,tb10x-gpio";
  298. interrupt-controller;
  299. #interrupt-cells = <1>;
  300. interrupt-parent = <&tb10x_ictl>;
  301. interrupts = <27 1>;
  302. reg = <0xFF14B000 0x1000>;
  303. gpio-controller;
  304. #gpio-cells = <1>;
  305. gpio-base = <86>;
  306. gpio-pins = <&pctl_gpio_l>;
  307. };
  308. gpiom: gpio@FF14c000 {
  309. compatible = "abilis,tb10x-gpio";
  310. interrupt-controller;
  311. #interrupt-cells = <1>;
  312. interrupt-parent = <&tb10x_ictl>;
  313. interrupts = <27 1>;
  314. reg = <0xFF14C000 0x1000>;
  315. gpio-controller;
  316. #gpio-cells = <1>;
  317. gpio-base = <90>;
  318. gpio-pins = <&pctl_gpio_m>;
  319. };
  320. gpion: gpio@FF14d000 {
  321. compatible = "abilis,tb10x-gpio";
  322. interrupt-controller;
  323. #interrupt-cells = <1>;
  324. interrupt-parent = <&tb10x_ictl>;
  325. interrupts = <27 1>;
  326. reg = <0xFF14D000 0x1000>;
  327. gpio-controller;
  328. #gpio-cells = <1>;
  329. gpio-base = <94>;
  330. gpio-pins = <&pctl_gpio_n>;
  331. };
  332. };
  333. };