omap-usb.txt 3.2 KB

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  1. OMAP GLUE AND OTHER OMAP SPECIFIC COMPONENTS
  2. OMAP MUSB GLUE
  3. - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb"
  4. - ti,hwmods : must be "usb_otg_hs"
  5. - ti,has-mailbox : to specify that omap uses an external mailbox
  6. (in control module) to communicate with the musb core during device connect
  7. and disconnect.
  8. - multipoint : Should be "1" indicating the musb controller supports
  9. multipoint. This is a MUSB configuration-specific setting.
  10. - num-eps : Specifies the number of endpoints. This is also a
  11. MUSB configuration-specific setting. Should be set to "16"
  12. - ram-bits : Specifies the ram address size. Should be set to "12"
  13. - interface-type : This is a board specific setting to describe the type of
  14. interface between the controller and the phy. It should be "0" or "1"
  15. specifying ULPI and UTMI respectively.
  16. - mode : Should be "3" to represent OTG. "1" signifies HOST and "2"
  17. represents PERIPHERAL.
  18. - power : Should be "50". This signifies the controller can supply upto
  19. 100mA when operating in host mode.
  20. - usb-phy : the phandle for the PHY device
  21. Optional properties:
  22. - ctrl-module : phandle of the control module this glue uses to write to
  23. mailbox
  24. SOC specific device node entry
  25. usb_otg_hs: usb_otg_hs@4a0ab000 {
  26. compatible = "ti,omap4-musb";
  27. ti,hwmods = "usb_otg_hs";
  28. ti,has-mailbox;
  29. multipoint = <1>;
  30. num-eps = <16>;
  31. ram-bits = <12>;
  32. ctrl-module = <&omap_control_usb>;
  33. };
  34. Board specific device node entry
  35. &usb_otg_hs {
  36. interface-type = <1>;
  37. mode = <3>;
  38. power = <50>;
  39. };
  40. OMAP DWC3 GLUE
  41. - compatible : Should be "ti,dwc3"
  42. - ti,hwmods : Should be "usb_otg_ss"
  43. - reg : Address and length of the register set for the device.
  44. - interrupts : The irq number of this device that is used to interrupt the
  45. MPU
  46. - #address-cells, #size-cells : Must be present if the device has sub-nodes
  47. - utmi-mode : controls the source of UTMI/PIPE status for VBUS and OTG ID.
  48. It should be set to "1" for HW mode and "2" for SW mode.
  49. - ranges: the child address space are mapped 1:1 onto the parent address space
  50. Sub-nodes:
  51. The dwc3 core should be added as subnode to omap dwc3 glue.
  52. - dwc3 :
  53. The binding details of dwc3 can be found in:
  54. Documentation/devicetree/bindings/usb/dwc3.txt
  55. omap_dwc3 {
  56. compatible = "ti,dwc3";
  57. ti,hwmods = "usb_otg_ss";
  58. reg = <0x4a020000 0x1ff>;
  59. interrupts = <0 93 4>;
  60. #address-cells = <1>;
  61. #size-cells = <1>;
  62. utmi-mode = <2>;
  63. ranges;
  64. };
  65. OMAP CONTROL USB
  66. Required properties:
  67. - compatible: Should be "ti,omap-control-usb"
  68. - reg : Address and length of the register set for the device. It contains
  69. the address of "control_dev_conf" and "otghs_control" or "phy_power_usb"
  70. depending upon omap4 or omap5.
  71. - reg-names: The names of the register addresses corresponding to the registers
  72. filled in "reg".
  73. - ti,type: This is used to differentiate whether the control module has
  74. usb mailbox or usb3 phy power. omap4 has usb mailbox in control module to
  75. notify events to the musb core and omap5 has usb3 phy power register to
  76. power on usb3 phy. Should be "1" if it has mailbox and "2" if it has usb3
  77. phy power.
  78. omap_control_usb: omap-control-usb@4a002300 {
  79. compatible = "ti,omap-control-usb";
  80. reg = <0x4a002300 0x4>,
  81. <0x4a00233c 0x4>;
  82. reg-names = "control_dev_conf", "otghs_control";
  83. ti,type = <1>;
  84. };