pwm-imx.c 6.0 KB

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  1. /*
  2. * simple driver for PWM (Pulse Width Modulator) controller
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * Derived from pxa PWM driver by eric miao <eric.miao@marvell.com>
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/slab.h>
  14. #include <linux/err.h>
  15. #include <linux/clk.h>
  16. #include <linux/io.h>
  17. #include <linux/pwm.h>
  18. #include <mach/hardware.h>
  19. /* i.MX1 and i.MX21 share the same PWM function block: */
  20. #define MX1_PWMC 0x00 /* PWM Control Register */
  21. #define MX1_PWMS 0x04 /* PWM Sample Register */
  22. #define MX1_PWMP 0x08 /* PWM Period Register */
  23. /* i.MX27, i.MX31, i.MX35 share the same PWM function block: */
  24. #define MX3_PWMCR 0x00 /* PWM Control Register */
  25. #define MX3_PWMSAR 0x0C /* PWM Sample Register */
  26. #define MX3_PWMPR 0x10 /* PWM Period Register */
  27. #define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4)
  28. #define MX3_PWMCR_DOZEEN (1 << 24)
  29. #define MX3_PWMCR_WAITEN (1 << 23)
  30. #define MX3_PWMCR_DBGEN (1 << 22)
  31. #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
  32. #define MX3_PWMCR_CLKSRC_IPG (1 << 16)
  33. #define MX3_PWMCR_EN (1 << 0)
  34. struct imx_chip {
  35. struct clk *clk;
  36. int clk_enabled;
  37. void __iomem *mmio_base;
  38. struct pwm_chip chip;
  39. int (*config)(struct pwm_chip *chip,
  40. struct pwm_device *pwm, int duty_ns, int period_ns);
  41. };
  42. #define to_imx_chip(chip) container_of(chip, struct imx_chip, chip)
  43. static int imx_pwm_config_v1(struct pwm_chip *chip,
  44. struct pwm_device *pwm, int duty_ns, int period_ns)
  45. {
  46. struct imx_chip *imx = to_imx_chip(chip);
  47. /*
  48. * The PWM subsystem allows for exact frequencies. However,
  49. * I cannot connect a scope on my device to the PWM line and
  50. * thus cannot provide the program the PWM controller
  51. * exactly. Instead, I'm relying on the fact that the
  52. * Bootloader (u-boot or WinCE+haret) has programmed the PWM
  53. * function group already. So I'll just modify the PWM sample
  54. * register to follow the ratio of duty_ns vs. period_ns
  55. * accordingly.
  56. *
  57. * This is good enough for programming the brightness of
  58. * the LCD backlight.
  59. *
  60. * The real implementation would divide PERCLK[0] first by
  61. * both the prescaler (/1 .. /128) and then by CLKSEL
  62. * (/2 .. /16).
  63. */
  64. u32 max = readl(imx->mmio_base + MX1_PWMP);
  65. u32 p = max * duty_ns / period_ns;
  66. writel(max - p, imx->mmio_base + MX1_PWMS);
  67. return 0;
  68. }
  69. static int imx_pwm_config_v2(struct pwm_chip *chip,
  70. struct pwm_device *pwm, int duty_ns, int period_ns)
  71. {
  72. struct imx_chip *imx = to_imx_chip(chip);
  73. unsigned long long c;
  74. unsigned long period_cycles, duty_cycles, prescale;
  75. u32 cr;
  76. c = clk_get_rate(imx->clk);
  77. c = c * period_ns;
  78. do_div(c, 1000000000);
  79. period_cycles = c;
  80. prescale = period_cycles / 0x10000 + 1;
  81. period_cycles /= prescale;
  82. c = (unsigned long long)period_cycles * duty_ns;
  83. do_div(c, period_ns);
  84. duty_cycles = c;
  85. /*
  86. * according to imx pwm RM, the real period value should be
  87. * PERIOD value in PWMPR plus 2.
  88. */
  89. if (period_cycles > 2)
  90. period_cycles -= 2;
  91. else
  92. period_cycles = 0;
  93. writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);
  94. writel(period_cycles, imx->mmio_base + MX3_PWMPR);
  95. cr = MX3_PWMCR_PRESCALER(prescale) |
  96. MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
  97. MX3_PWMCR_DBGEN | MX3_PWMCR_EN;
  98. if (cpu_is_mx25())
  99. cr |= MX3_PWMCR_CLKSRC_IPG;
  100. else
  101. cr |= MX3_PWMCR_CLKSRC_IPG_HIGH;
  102. writel(cr, imx->mmio_base + MX3_PWMCR);
  103. return 0;
  104. }
  105. static int imx_pwm_config(struct pwm_chip *chip,
  106. struct pwm_device *pwm, int duty_ns, int period_ns)
  107. {
  108. struct imx_chip *imx = to_imx_chip(chip);
  109. return imx->config(chip, pwm, duty_ns, period_ns);
  110. }
  111. static int imx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
  112. {
  113. struct imx_chip *imx = to_imx_chip(chip);
  114. int rc = 0;
  115. if (!imx->clk_enabled) {
  116. rc = clk_prepare_enable(imx->clk);
  117. if (!rc)
  118. imx->clk_enabled = 1;
  119. }
  120. return rc;
  121. }
  122. static void imx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
  123. {
  124. struct imx_chip *imx = to_imx_chip(chip);
  125. writel(0, imx->mmio_base + MX3_PWMCR);
  126. if (imx->clk_enabled) {
  127. clk_disable_unprepare(imx->clk);
  128. imx->clk_enabled = 0;
  129. }
  130. }
  131. static struct pwm_ops imx_pwm_ops = {
  132. .enable = imx_pwm_enable,
  133. .disable = imx_pwm_disable,
  134. .config = imx_pwm_config,
  135. .owner = THIS_MODULE,
  136. };
  137. static int __devinit imx_pwm_probe(struct platform_device *pdev)
  138. {
  139. struct imx_chip *imx;
  140. struct resource *r;
  141. int ret = 0;
  142. imx = devm_kzalloc(&pdev->dev, sizeof(*imx), GFP_KERNEL);
  143. if (imx == NULL) {
  144. dev_err(&pdev->dev, "failed to allocate memory\n");
  145. return -ENOMEM;
  146. }
  147. imx->clk = devm_clk_get(&pdev->dev, "pwm");
  148. if (IS_ERR(imx->clk))
  149. return PTR_ERR(imx->clk);
  150. imx->chip.ops = &imx_pwm_ops;
  151. imx->chip.dev = &pdev->dev;
  152. imx->chip.base = -1;
  153. imx->chip.npwm = 1;
  154. imx->clk_enabled = 0;
  155. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  156. if (r == NULL) {
  157. dev_err(&pdev->dev, "no memory resource defined\n");
  158. return -ENODEV;
  159. }
  160. imx->mmio_base = devm_request_and_ioremap(&pdev->dev, r);
  161. if (imx->mmio_base == NULL)
  162. return -EADDRNOTAVAIL;
  163. if (cpu_is_mx1() || cpu_is_mx21())
  164. imx->config = imx_pwm_config_v1;
  165. else
  166. imx->config = imx_pwm_config_v2;
  167. ret = pwmchip_add(&imx->chip);
  168. if (ret < 0)
  169. return ret;
  170. platform_set_drvdata(pdev, imx);
  171. return 0;
  172. }
  173. static int __devexit imx_pwm_remove(struct platform_device *pdev)
  174. {
  175. struct imx_chip *imx;
  176. imx = platform_get_drvdata(pdev);
  177. if (imx == NULL)
  178. return -ENODEV;
  179. return pwmchip_remove(&imx->chip);
  180. }
  181. static struct platform_driver imx_pwm_driver = {
  182. .driver = {
  183. .name = "mxc_pwm",
  184. },
  185. .probe = imx_pwm_probe,
  186. .remove = __devexit_p(imx_pwm_remove),
  187. };
  188. static int __init imx_pwm_init(void)
  189. {
  190. return platform_driver_register(&imx_pwm_driver);
  191. }
  192. arch_initcall(imx_pwm_init);
  193. static void __exit imx_pwm_exit(void)
  194. {
  195. platform_driver_unregister(&imx_pwm_driver);
  196. }
  197. module_exit(imx_pwm_exit);
  198. MODULE_LICENSE("GPL v2");
  199. MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");