core.h 25 KB

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  1. /*
  2. * core.h -- Core Driver for Wolfson WM8350 PMIC
  3. *
  4. * Copyright 2007 Wolfson Microelectronics PLC
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. *
  11. */
  12. #ifndef __LINUX_MFD_WM8350_CORE_H_
  13. #define __LINUX_MFD_WM8350_CORE_H_
  14. #include <linux/kernel.h>
  15. #include <linux/mutex.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/completion.h>
  18. #include <linux/regmap.h>
  19. #include <linux/mfd/wm8350/audio.h>
  20. #include <linux/mfd/wm8350/gpio.h>
  21. #include <linux/mfd/wm8350/pmic.h>
  22. #include <linux/mfd/wm8350/rtc.h>
  23. #include <linux/mfd/wm8350/supply.h>
  24. #include <linux/mfd/wm8350/wdt.h>
  25. /*
  26. * Register values.
  27. */
  28. #define WM8350_RESET_ID 0x00
  29. #define WM8350_ID 0x01
  30. #define WM8350_REVISION 0x02
  31. #define WM8350_SYSTEM_CONTROL_1 0x03
  32. #define WM8350_SYSTEM_CONTROL_2 0x04
  33. #define WM8350_SYSTEM_HIBERNATE 0x05
  34. #define WM8350_INTERFACE_CONTROL 0x06
  35. #define WM8350_POWER_MGMT_1 0x08
  36. #define WM8350_POWER_MGMT_2 0x09
  37. #define WM8350_POWER_MGMT_3 0x0A
  38. #define WM8350_POWER_MGMT_4 0x0B
  39. #define WM8350_POWER_MGMT_5 0x0C
  40. #define WM8350_POWER_MGMT_6 0x0D
  41. #define WM8350_POWER_MGMT_7 0x0E
  42. #define WM8350_SYSTEM_INTERRUPTS 0x18
  43. #define WM8350_INT_STATUS_1 0x19
  44. #define WM8350_INT_STATUS_2 0x1A
  45. #define WM8350_POWER_UP_INT_STATUS 0x1B
  46. #define WM8350_UNDER_VOLTAGE_INT_STATUS 0x1C
  47. #define WM8350_OVER_CURRENT_INT_STATUS 0x1D
  48. #define WM8350_GPIO_INT_STATUS 0x1E
  49. #define WM8350_COMPARATOR_INT_STATUS 0x1F
  50. #define WM8350_SYSTEM_INTERRUPTS_MASK 0x20
  51. #define WM8350_INT_STATUS_1_MASK 0x21
  52. #define WM8350_INT_STATUS_2_MASK 0x22
  53. #define WM8350_POWER_UP_INT_STATUS_MASK 0x23
  54. #define WM8350_UNDER_VOLTAGE_INT_STATUS_MASK 0x24
  55. #define WM8350_OVER_CURRENT_INT_STATUS_MASK 0x25
  56. #define WM8350_GPIO_INT_STATUS_MASK 0x26
  57. #define WM8350_COMPARATOR_INT_STATUS_MASK 0x27
  58. #define WM8350_CHARGER_OVERRIDES 0xE2
  59. #define WM8350_MISC_OVERRIDES 0xE3
  60. #define WM8350_COMPARATOR_OVERRIDES 0xE7
  61. #define WM8350_STATE_MACHINE_STATUS 0xE9
  62. #define WM8350_MAX_REGISTER 0xFF
  63. #define WM8350_UNLOCK_KEY 0x0013
  64. #define WM8350_LOCK_KEY 0x0000
  65. /*
  66. * Field Definitions.
  67. */
  68. /*
  69. * R0 (0x00) - Reset/ID
  70. */
  71. #define WM8350_SW_RESET_CHIP_ID_MASK 0xFFFF
  72. /*
  73. * R1 (0x01) - ID
  74. */
  75. #define WM8350_CHIP_REV_MASK 0x7000
  76. #define WM8350_CONF_STS_MASK 0x0C00
  77. #define WM8350_CUST_ID_MASK 0x00FF
  78. /*
  79. * R2 (0x02) - Revision
  80. */
  81. #define WM8350_MASK_REV_MASK 0x00FF
  82. /*
  83. * R3 (0x03) - System Control 1
  84. */
  85. #define WM8350_CHIP_ON 0x8000
  86. #define WM8350_POWERCYCLE 0x2000
  87. #define WM8350_VCC_FAULT_OV 0x1000
  88. #define WM8350_REG_RSTB_TIME_MASK 0x0C00
  89. #define WM8350_BG_SLEEP 0x0200
  90. #define WM8350_MEM_VALID 0x0020
  91. #define WM8350_CHIP_SET_UP 0x0010
  92. #define WM8350_ON_DEB_T 0x0008
  93. #define WM8350_ON_POL 0x0002
  94. #define WM8350_IRQ_POL 0x0001
  95. /*
  96. * R4 (0x04) - System Control 2
  97. */
  98. #define WM8350_USB_SUSPEND_8MA 0x8000
  99. #define WM8350_USB_SUSPEND 0x4000
  100. #define WM8350_USB_MSTR 0x2000
  101. #define WM8350_USB_MSTR_SRC 0x1000
  102. #define WM8350_USB_500MA 0x0800
  103. #define WM8350_USB_NOLIM 0x0400
  104. /*
  105. * R5 (0x05) - System Hibernate
  106. */
  107. #define WM8350_HIBERNATE 0x8000
  108. #define WM8350_WDOG_HIB_MODE 0x0080
  109. #define WM8350_REG_HIB_STARTUP_SEQ 0x0040
  110. #define WM8350_REG_RESET_HIB_MODE 0x0020
  111. #define WM8350_RST_HIB_MODE 0x0010
  112. #define WM8350_IRQ_HIB_MODE 0x0008
  113. #define WM8350_MEMRST_HIB_MODE 0x0004
  114. #define WM8350_PCCOMP_HIB_MODE 0x0002
  115. #define WM8350_TEMPMON_HIB_MODE 0x0001
  116. /*
  117. * R6 (0x06) - Interface Control
  118. */
  119. #define WM8350_USE_DEV_PINS 0x8000
  120. #define WM8350_USE_DEV_PINS_MASK 0x8000
  121. #define WM8350_USE_DEV_PINS_SHIFT 15
  122. #define WM8350_DEV_ADDR_MASK 0x6000
  123. #define WM8350_DEV_ADDR_SHIFT 13
  124. #define WM8350_CONFIG_DONE 0x1000
  125. #define WM8350_CONFIG_DONE_MASK 0x1000
  126. #define WM8350_CONFIG_DONE_SHIFT 12
  127. #define WM8350_RECONFIG_AT_ON 0x0800
  128. #define WM8350_RECONFIG_AT_ON_MASK 0x0800
  129. #define WM8350_RECONFIG_AT_ON_SHIFT 11
  130. #define WM8350_AUTOINC 0x0200
  131. #define WM8350_AUTOINC_MASK 0x0200
  132. #define WM8350_AUTOINC_SHIFT 9
  133. #define WM8350_ARA 0x0100
  134. #define WM8350_ARA_MASK 0x0100
  135. #define WM8350_ARA_SHIFT 8
  136. #define WM8350_SPI_CFG 0x0008
  137. #define WM8350_SPI_CFG_MASK 0x0008
  138. #define WM8350_SPI_CFG_SHIFT 3
  139. #define WM8350_SPI_4WIRE 0x0004
  140. #define WM8350_SPI_4WIRE_MASK 0x0004
  141. #define WM8350_SPI_4WIRE_SHIFT 2
  142. #define WM8350_SPI_3WIRE 0x0002
  143. #define WM8350_SPI_3WIRE_MASK 0x0002
  144. #define WM8350_SPI_3WIRE_SHIFT 1
  145. /* Bit values for R06 (0x06) */
  146. #define WM8350_USE_DEV_PINS_PRIMARY 0
  147. #define WM8350_USE_DEV_PINS_DEV 1
  148. #define WM8350_DEV_ADDR_34 0
  149. #define WM8350_DEV_ADDR_36 1
  150. #define WM8350_DEV_ADDR_3C 2
  151. #define WM8350_DEV_ADDR_3E 3
  152. #define WM8350_CONFIG_DONE_OFF 0
  153. #define WM8350_CONFIG_DONE_DONE 1
  154. #define WM8350_RECONFIG_AT_ON_OFF 0
  155. #define WM8350_RECONFIG_AT_ON_ON 1
  156. #define WM8350_AUTOINC_OFF 0
  157. #define WM8350_AUTOINC_ON 1
  158. #define WM8350_ARA_OFF 0
  159. #define WM8350_ARA_ON 1
  160. #define WM8350_SPI_CFG_CMOS 0
  161. #define WM8350_SPI_CFG_OD 1
  162. #define WM8350_SPI_4WIRE_3WIRE 0
  163. #define WM8350_SPI_4WIRE_4WIRE 1
  164. #define WM8350_SPI_3WIRE_I2C 0
  165. #define WM8350_SPI_3WIRE_SPI 1
  166. /*
  167. * R8 (0x08) - Power mgmt (1)
  168. */
  169. #define WM8350_CODEC_ISEL_MASK 0xC000
  170. #define WM8350_VBUFEN 0x2000
  171. #define WM8350_OUTPUT_DRAIN_EN 0x0400
  172. #define WM8350_MIC_DET_ENA 0x0100
  173. #define WM8350_BIASEN 0x0020
  174. #define WM8350_MICBEN 0x0010
  175. #define WM8350_VMIDEN 0x0004
  176. #define WM8350_VMID_MASK 0x0003
  177. #define WM8350_VMID_SHIFT 0
  178. /*
  179. * R9 (0x09) - Power mgmt (2)
  180. */
  181. #define WM8350_IN3R_ENA 0x0800
  182. #define WM8350_IN3L_ENA 0x0400
  183. #define WM8350_INR_ENA 0x0200
  184. #define WM8350_INL_ENA 0x0100
  185. #define WM8350_MIXINR_ENA 0x0080
  186. #define WM8350_MIXINL_ENA 0x0040
  187. #define WM8350_OUT4_ENA 0x0020
  188. #define WM8350_OUT3_ENA 0x0010
  189. #define WM8350_MIXOUTR_ENA 0x0002
  190. #define WM8350_MIXOUTL_ENA 0x0001
  191. /*
  192. * R10 (0x0A) - Power mgmt (3)
  193. */
  194. #define WM8350_IN3R_TO_OUT2R 0x0080
  195. #define WM8350_OUT2R_ENA 0x0008
  196. #define WM8350_OUT2L_ENA 0x0004
  197. #define WM8350_OUT1R_ENA 0x0002
  198. #define WM8350_OUT1L_ENA 0x0001
  199. /*
  200. * R11 (0x0B) - Power mgmt (4)
  201. */
  202. #define WM8350_SYSCLK_ENA 0x4000
  203. #define WM8350_ADC_HPF_ENA 0x2000
  204. #define WM8350_FLL_ENA 0x0800
  205. #define WM8350_FLL_OSC_ENA 0x0400
  206. #define WM8350_TOCLK_ENA 0x0100
  207. #define WM8350_DACR_ENA 0x0020
  208. #define WM8350_DACL_ENA 0x0010
  209. #define WM8350_ADCR_ENA 0x0008
  210. #define WM8350_ADCL_ENA 0x0004
  211. /*
  212. * R12 (0x0C) - Power mgmt (5)
  213. */
  214. #define WM8350_CODEC_ENA 0x1000
  215. #define WM8350_RTC_TICK_ENA 0x0800
  216. #define WM8350_OSC32K_ENA 0x0400
  217. #define WM8350_CHG_ENA 0x0200
  218. #define WM8350_ACC_DET_ENA 0x0100
  219. #define WM8350_AUXADC_ENA 0x0080
  220. #define WM8350_DCMP4_ENA 0x0008
  221. #define WM8350_DCMP3_ENA 0x0004
  222. #define WM8350_DCMP2_ENA 0x0002
  223. #define WM8350_DCMP1_ENA 0x0001
  224. /*
  225. * R13 (0x0D) - Power mgmt (6)
  226. */
  227. #define WM8350_LS_ENA 0x8000
  228. #define WM8350_LDO4_ENA 0x0800
  229. #define WM8350_LDO3_ENA 0x0400
  230. #define WM8350_LDO2_ENA 0x0200
  231. #define WM8350_LDO1_ENA 0x0100
  232. #define WM8350_DC6_ENA 0x0020
  233. #define WM8350_DC5_ENA 0x0010
  234. #define WM8350_DC4_ENA 0x0008
  235. #define WM8350_DC3_ENA 0x0004
  236. #define WM8350_DC2_ENA 0x0002
  237. #define WM8350_DC1_ENA 0x0001
  238. /*
  239. * R14 (0x0E) - Power mgmt (7)
  240. */
  241. #define WM8350_CS2_ENA 0x0002
  242. #define WM8350_CS1_ENA 0x0001
  243. /*
  244. * R24 (0x18) - System Interrupts
  245. */
  246. #define WM8350_OC_INT 0x2000
  247. #define WM8350_UV_INT 0x1000
  248. #define WM8350_PUTO_INT 0x0800
  249. #define WM8350_CS_INT 0x0200
  250. #define WM8350_EXT_INT 0x0100
  251. #define WM8350_CODEC_INT 0x0080
  252. #define WM8350_GP_INT 0x0040
  253. #define WM8350_AUXADC_INT 0x0020
  254. #define WM8350_RTC_INT 0x0010
  255. #define WM8350_SYS_INT 0x0008
  256. #define WM8350_CHG_INT 0x0004
  257. #define WM8350_USB_INT 0x0002
  258. #define WM8350_WKUP_INT 0x0001
  259. /*
  260. * R25 (0x19) - Interrupt Status 1
  261. */
  262. #define WM8350_CHG_BAT_HOT_EINT 0x8000
  263. #define WM8350_CHG_BAT_COLD_EINT 0x4000
  264. #define WM8350_CHG_BAT_FAIL_EINT 0x2000
  265. #define WM8350_CHG_TO_EINT 0x1000
  266. #define WM8350_CHG_END_EINT 0x0800
  267. #define WM8350_CHG_START_EINT 0x0400
  268. #define WM8350_CHG_FAST_RDY_EINT 0x0200
  269. #define WM8350_RTC_PER_EINT 0x0080
  270. #define WM8350_RTC_SEC_EINT 0x0040
  271. #define WM8350_RTC_ALM_EINT 0x0020
  272. #define WM8350_CHG_VBATT_LT_3P9_EINT 0x0004
  273. #define WM8350_CHG_VBATT_LT_3P1_EINT 0x0002
  274. #define WM8350_CHG_VBATT_LT_2P85_EINT 0x0001
  275. /*
  276. * R26 (0x1A) - Interrupt Status 2
  277. */
  278. #define WM8350_CS1_EINT 0x2000
  279. #define WM8350_CS2_EINT 0x1000
  280. #define WM8350_USB_LIMIT_EINT 0x0400
  281. #define WM8350_AUXADC_DATARDY_EINT 0x0100
  282. #define WM8350_AUXADC_DCOMP4_EINT 0x0080
  283. #define WM8350_AUXADC_DCOMP3_EINT 0x0040
  284. #define WM8350_AUXADC_DCOMP2_EINT 0x0020
  285. #define WM8350_AUXADC_DCOMP1_EINT 0x0010
  286. #define WM8350_SYS_HYST_COMP_FAIL_EINT 0x0008
  287. #define WM8350_SYS_CHIP_GT115_EINT 0x0004
  288. #define WM8350_SYS_CHIP_GT140_EINT 0x0002
  289. #define WM8350_SYS_WDOG_TO_EINT 0x0001
  290. /*
  291. * R27 (0x1B) - Power Up Interrupt Status
  292. */
  293. #define WM8350_PUTO_LDO4_EINT 0x0800
  294. #define WM8350_PUTO_LDO3_EINT 0x0400
  295. #define WM8350_PUTO_LDO2_EINT 0x0200
  296. #define WM8350_PUTO_LDO1_EINT 0x0100
  297. #define WM8350_PUTO_DC6_EINT 0x0020
  298. #define WM8350_PUTO_DC5_EINT 0x0010
  299. #define WM8350_PUTO_DC4_EINT 0x0008
  300. #define WM8350_PUTO_DC3_EINT 0x0004
  301. #define WM8350_PUTO_DC2_EINT 0x0002
  302. #define WM8350_PUTO_DC1_EINT 0x0001
  303. /*
  304. * R28 (0x1C) - Under Voltage Interrupt status
  305. */
  306. #define WM8350_UV_LDO4_EINT 0x0800
  307. #define WM8350_UV_LDO3_EINT 0x0400
  308. #define WM8350_UV_LDO2_EINT 0x0200
  309. #define WM8350_UV_LDO1_EINT 0x0100
  310. #define WM8350_UV_DC6_EINT 0x0020
  311. #define WM8350_UV_DC5_EINT 0x0010
  312. #define WM8350_UV_DC4_EINT 0x0008
  313. #define WM8350_UV_DC3_EINT 0x0004
  314. #define WM8350_UV_DC2_EINT 0x0002
  315. #define WM8350_UV_DC1_EINT 0x0001
  316. /*
  317. * R29 (0x1D) - Over Current Interrupt status
  318. */
  319. #define WM8350_OC_LS_EINT 0x8000
  320. /*
  321. * R30 (0x1E) - GPIO Interrupt Status
  322. */
  323. #define WM8350_GP12_EINT 0x1000
  324. #define WM8350_GP11_EINT 0x0800
  325. #define WM8350_GP10_EINT 0x0400
  326. #define WM8350_GP9_EINT 0x0200
  327. #define WM8350_GP8_EINT 0x0100
  328. #define WM8350_GP7_EINT 0x0080
  329. #define WM8350_GP6_EINT 0x0040
  330. #define WM8350_GP5_EINT 0x0020
  331. #define WM8350_GP4_EINT 0x0010
  332. #define WM8350_GP3_EINT 0x0008
  333. #define WM8350_GP2_EINT 0x0004
  334. #define WM8350_GP1_EINT 0x0002
  335. #define WM8350_GP0_EINT 0x0001
  336. /*
  337. * R31 (0x1F) - Comparator Interrupt Status
  338. */
  339. #define WM8350_EXT_USB_FB_EINT 0x8000
  340. #define WM8350_EXT_WALL_FB_EINT 0x4000
  341. #define WM8350_EXT_BAT_FB_EINT 0x2000
  342. #define WM8350_CODEC_JCK_DET_L_EINT 0x0800
  343. #define WM8350_CODEC_JCK_DET_R_EINT 0x0400
  344. #define WM8350_CODEC_MICSCD_EINT 0x0200
  345. #define WM8350_CODEC_MICD_EINT 0x0100
  346. #define WM8350_WKUP_OFF_STATE_EINT 0x0040
  347. #define WM8350_WKUP_HIB_STATE_EINT 0x0020
  348. #define WM8350_WKUP_CONV_FAULT_EINT 0x0010
  349. #define WM8350_WKUP_WDOG_RST_EINT 0x0008
  350. #define WM8350_WKUP_GP_PWR_ON_EINT 0x0004
  351. #define WM8350_WKUP_ONKEY_EINT 0x0002
  352. #define WM8350_WKUP_GP_WAKEUP_EINT 0x0001
  353. /*
  354. * R32 (0x20) - System Interrupts Mask
  355. */
  356. #define WM8350_IM_OC_INT 0x2000
  357. #define WM8350_IM_UV_INT 0x1000
  358. #define WM8350_IM_PUTO_INT 0x0800
  359. #define WM8350_IM_SPARE_INT 0x0400
  360. #define WM8350_IM_CS_INT 0x0200
  361. #define WM8350_IM_EXT_INT 0x0100
  362. #define WM8350_IM_CODEC_INT 0x0080
  363. #define WM8350_IM_GP_INT 0x0040
  364. #define WM8350_IM_AUXADC_INT 0x0020
  365. #define WM8350_IM_RTC_INT 0x0010
  366. #define WM8350_IM_SYS_INT 0x0008
  367. #define WM8350_IM_CHG_INT 0x0004
  368. #define WM8350_IM_USB_INT 0x0002
  369. #define WM8350_IM_WKUP_INT 0x0001
  370. /*
  371. * R33 (0x21) - Interrupt Status 1 Mask
  372. */
  373. #define WM8350_IM_CHG_BAT_HOT_EINT 0x8000
  374. #define WM8350_IM_CHG_BAT_COLD_EINT 0x4000
  375. #define WM8350_IM_CHG_BAT_FAIL_EINT 0x2000
  376. #define WM8350_IM_CHG_TO_EINT 0x1000
  377. #define WM8350_IM_CHG_END_EINT 0x0800
  378. #define WM8350_IM_CHG_START_EINT 0x0400
  379. #define WM8350_IM_CHG_FAST_RDY_EINT 0x0200
  380. #define WM8350_IM_RTC_PER_EINT 0x0080
  381. #define WM8350_IM_RTC_SEC_EINT 0x0040
  382. #define WM8350_IM_RTC_ALM_EINT 0x0020
  383. #define WM8350_IM_CHG_VBATT_LT_3P9_EINT 0x0004
  384. #define WM8350_IM_CHG_VBATT_LT_3P1_EINT 0x0002
  385. #define WM8350_IM_CHG_VBATT_LT_2P85_EINT 0x0001
  386. /*
  387. * R34 (0x22) - Interrupt Status 2 Mask
  388. */
  389. #define WM8350_IM_SPARE2_EINT 0x8000
  390. #define WM8350_IM_SPARE1_EINT 0x4000
  391. #define WM8350_IM_CS1_EINT 0x2000
  392. #define WM8350_IM_CS2_EINT 0x1000
  393. #define WM8350_IM_USB_LIMIT_EINT 0x0400
  394. #define WM8350_IM_AUXADC_DATARDY_EINT 0x0100
  395. #define WM8350_IM_AUXADC_DCOMP4_EINT 0x0080
  396. #define WM8350_IM_AUXADC_DCOMP3_EINT 0x0040
  397. #define WM8350_IM_AUXADC_DCOMP2_EINT 0x0020
  398. #define WM8350_IM_AUXADC_DCOMP1_EINT 0x0010
  399. #define WM8350_IM_SYS_HYST_COMP_FAIL_EINT 0x0008
  400. #define WM8350_IM_SYS_CHIP_GT115_EINT 0x0004
  401. #define WM8350_IM_SYS_CHIP_GT140_EINT 0x0002
  402. #define WM8350_IM_SYS_WDOG_TO_EINT 0x0001
  403. /*
  404. * R35 (0x23) - Power Up Interrupt Status Mask
  405. */
  406. #define WM8350_IM_PUTO_LDO4_EINT 0x0800
  407. #define WM8350_IM_PUTO_LDO3_EINT 0x0400
  408. #define WM8350_IM_PUTO_LDO2_EINT 0x0200
  409. #define WM8350_IM_PUTO_LDO1_EINT 0x0100
  410. #define WM8350_IM_PUTO_DC6_EINT 0x0020
  411. #define WM8350_IM_PUTO_DC5_EINT 0x0010
  412. #define WM8350_IM_PUTO_DC4_EINT 0x0008
  413. #define WM8350_IM_PUTO_DC3_EINT 0x0004
  414. #define WM8350_IM_PUTO_DC2_EINT 0x0002
  415. #define WM8350_IM_PUTO_DC1_EINT 0x0001
  416. /*
  417. * R36 (0x24) - Under Voltage Interrupt status Mask
  418. */
  419. #define WM8350_IM_UV_LDO4_EINT 0x0800
  420. #define WM8350_IM_UV_LDO3_EINT 0x0400
  421. #define WM8350_IM_UV_LDO2_EINT 0x0200
  422. #define WM8350_IM_UV_LDO1_EINT 0x0100
  423. #define WM8350_IM_UV_DC6_EINT 0x0020
  424. #define WM8350_IM_UV_DC5_EINT 0x0010
  425. #define WM8350_IM_UV_DC4_EINT 0x0008
  426. #define WM8350_IM_UV_DC3_EINT 0x0004
  427. #define WM8350_IM_UV_DC2_EINT 0x0002
  428. #define WM8350_IM_UV_DC1_EINT 0x0001
  429. /*
  430. * R37 (0x25) - Over Current Interrupt status Mask
  431. */
  432. #define WM8350_IM_OC_LS_EINT 0x8000
  433. /*
  434. * R38 (0x26) - GPIO Interrupt Status Mask
  435. */
  436. #define WM8350_IM_GP12_EINT 0x1000
  437. #define WM8350_IM_GP11_EINT 0x0800
  438. #define WM8350_IM_GP10_EINT 0x0400
  439. #define WM8350_IM_GP9_EINT 0x0200
  440. #define WM8350_IM_GP8_EINT 0x0100
  441. #define WM8350_IM_GP7_EINT 0x0080
  442. #define WM8350_IM_GP6_EINT 0x0040
  443. #define WM8350_IM_GP5_EINT 0x0020
  444. #define WM8350_IM_GP4_EINT 0x0010
  445. #define WM8350_IM_GP3_EINT 0x0008
  446. #define WM8350_IM_GP2_EINT 0x0004
  447. #define WM8350_IM_GP1_EINT 0x0002
  448. #define WM8350_IM_GP0_EINT 0x0001
  449. /*
  450. * R39 (0x27) - Comparator Interrupt Status Mask
  451. */
  452. #define WM8350_IM_EXT_USB_FB_EINT 0x8000
  453. #define WM8350_IM_EXT_WALL_FB_EINT 0x4000
  454. #define WM8350_IM_EXT_BAT_FB_EINT 0x2000
  455. #define WM8350_IM_CODEC_JCK_DET_L_EINT 0x0800
  456. #define WM8350_IM_CODEC_JCK_DET_R_EINT 0x0400
  457. #define WM8350_IM_CODEC_MICSCD_EINT 0x0200
  458. #define WM8350_IM_CODEC_MICD_EINT 0x0100
  459. #define WM8350_IM_WKUP_OFF_STATE_EINT 0x0040
  460. #define WM8350_IM_WKUP_HIB_STATE_EINT 0x0020
  461. #define WM8350_IM_WKUP_CONV_FAULT_EINT 0x0010
  462. #define WM8350_IM_WKUP_WDOG_RST_EINT 0x0008
  463. #define WM8350_IM_WKUP_GP_PWR_ON_EINT 0x0004
  464. #define WM8350_IM_WKUP_ONKEY_EINT 0x0002
  465. #define WM8350_IM_WKUP_GP_WAKEUP_EINT 0x0001
  466. /*
  467. * R220 (0xDC) - RAM BIST 1
  468. */
  469. #define WM8350_READ_STATUS 0x0800
  470. #define WM8350_TSTRAM_CLK 0x0100
  471. #define WM8350_TSTRAM_CLK_ENA 0x0080
  472. #define WM8350_STARTSEQ 0x0040
  473. #define WM8350_READ_SRC 0x0020
  474. #define WM8350_COUNT_DIR 0x0010
  475. #define WM8350_TSTRAM_MODE_MASK 0x000E
  476. #define WM8350_TSTRAM_ENA 0x0001
  477. /*
  478. * R225 (0xE1) - DCDC/LDO status
  479. */
  480. #define WM8350_LS_STS 0x8000
  481. #define WM8350_LDO4_STS 0x0800
  482. #define WM8350_LDO3_STS 0x0400
  483. #define WM8350_LDO2_STS 0x0200
  484. #define WM8350_LDO1_STS 0x0100
  485. #define WM8350_DC6_STS 0x0020
  486. #define WM8350_DC5_STS 0x0010
  487. #define WM8350_DC4_STS 0x0008
  488. #define WM8350_DC3_STS 0x0004
  489. #define WM8350_DC2_STS 0x0002
  490. #define WM8350_DC1_STS 0x0001
  491. /*
  492. * R226 (0xE2) - Charger status
  493. */
  494. #define WM8350_CHG_BATT_HOT_OVRDE 0x8000
  495. #define WM8350_CHG_BATT_COLD_OVRDE 0x4000
  496. /*
  497. * R227 (0xE3) - Misc Overrides
  498. */
  499. #define WM8350_USB_LIMIT_OVRDE 0x0400
  500. /*
  501. * R227 (0xE7) - Comparator Overrides
  502. */
  503. #define WM8350_USB_FB_OVRDE 0x8000
  504. #define WM8350_WALL_FB_OVRDE 0x4000
  505. #define WM8350_BATT_FB_OVRDE 0x2000
  506. /*
  507. * R233 (0xE9) - State Machinine Status
  508. */
  509. #define WM8350_USB_SM_MASK 0x0700
  510. #define WM8350_USB_SM_SHIFT 8
  511. #define WM8350_USB_SM_100_SLV 1
  512. #define WM8350_USB_SM_500_SLV 5
  513. #define WM8350_USB_SM_STDBY_SLV 7
  514. /* WM8350 wake up conditions */
  515. #define WM8350_IRQ_WKUP_OFF_STATE 43
  516. #define WM8350_IRQ_WKUP_HIB_STATE 44
  517. #define WM8350_IRQ_WKUP_CONV_FAULT 45
  518. #define WM8350_IRQ_WKUP_WDOG_RST 46
  519. #define WM8350_IRQ_WKUP_GP_PWR_ON 47
  520. #define WM8350_IRQ_WKUP_ONKEY 48
  521. #define WM8350_IRQ_WKUP_GP_WAKEUP 49
  522. /* wm8350 chip revisions */
  523. #define WM8350_REV_E 0x4
  524. #define WM8350_REV_F 0x5
  525. #define WM8350_REV_G 0x6
  526. #define WM8350_REV_H 0x7
  527. #define WM8350_NUM_IRQ 63
  528. #define WM8350_NUM_IRQ_REGS 7
  529. extern const struct regmap_config wm8350_regmap;
  530. struct wm8350;
  531. struct wm8350_hwmon {
  532. struct platform_device *pdev;
  533. struct device *classdev;
  534. };
  535. struct wm8350 {
  536. struct device *dev;
  537. /* device IO */
  538. struct regmap *regmap;
  539. bool unlocked;
  540. struct mutex auxadc_mutex;
  541. struct completion auxadc_done;
  542. /* Interrupt handling */
  543. struct mutex irq_lock;
  544. int chip_irq;
  545. int irq_base;
  546. u16 irq_masks[WM8350_NUM_IRQ_REGS];
  547. /* Client devices */
  548. struct wm8350_codec codec;
  549. struct wm8350_gpio gpio;
  550. struct wm8350_hwmon hwmon;
  551. struct wm8350_pmic pmic;
  552. struct wm8350_power power;
  553. struct wm8350_rtc rtc;
  554. struct wm8350_wdt wdt;
  555. };
  556. /**
  557. * Data to be supplied by the platform to initialise the WM8350.
  558. *
  559. * @init: Function called during driver initialisation. Should be
  560. * used by the platform to configure GPIO functions and similar.
  561. * @irq_high: Set if WM8350 IRQ is active high.
  562. * @irq_base: Base IRQ for genirq (not currently used).
  563. * @gpio_base: Base for gpiolib.
  564. */
  565. struct wm8350_platform_data {
  566. int (*init)(struct wm8350 *wm8350);
  567. int irq_high;
  568. int irq_base;
  569. int gpio_base;
  570. };
  571. /*
  572. * WM8350 device initialisation and exit.
  573. */
  574. int wm8350_device_init(struct wm8350 *wm8350, int irq,
  575. struct wm8350_platform_data *pdata);
  576. void wm8350_device_exit(struct wm8350 *wm8350);
  577. /*
  578. * WM8350 device IO
  579. */
  580. int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
  581. int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
  582. u16 wm8350_reg_read(struct wm8350 *wm8350, int reg);
  583. int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val);
  584. int wm8350_reg_lock(struct wm8350 *wm8350);
  585. int wm8350_reg_unlock(struct wm8350 *wm8350);
  586. int wm8350_block_read(struct wm8350 *wm8350, int reg, int size, u16 *dest);
  587. int wm8350_block_write(struct wm8350 *wm8350, int reg, int size, u16 *src);
  588. /*
  589. * WM8350 internal interrupts
  590. */
  591. static inline int wm8350_register_irq(struct wm8350 *wm8350, int irq,
  592. irq_handler_t handler,
  593. unsigned long flags,
  594. const char *name, void *data)
  595. {
  596. if (!wm8350->irq_base)
  597. return -ENODEV;
  598. return request_threaded_irq(irq + wm8350->irq_base, NULL,
  599. handler, flags, name, data);
  600. }
  601. static inline void wm8350_free_irq(struct wm8350 *wm8350, int irq, void *data)
  602. {
  603. free_irq(irq + wm8350->irq_base, data);
  604. }
  605. static inline void wm8350_mask_irq(struct wm8350 *wm8350, int irq)
  606. {
  607. disable_irq(irq + wm8350->irq_base);
  608. }
  609. static inline void wm8350_unmask_irq(struct wm8350 *wm8350, int irq)
  610. {
  611. enable_irq(irq + wm8350->irq_base);
  612. }
  613. int wm8350_irq_init(struct wm8350 *wm8350, int irq,
  614. struct wm8350_platform_data *pdata);
  615. int wm8350_irq_exit(struct wm8350 *wm8350);
  616. #endif