exynos4412.dtsi 1.5 KB

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  1. /*
  2. * Samsung's Exynos4412 SoC device tree source
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * Samsung's Exynos4412 SoC device nodes are listed in this file. Exynos4412
  8. * based board files can include this file and provide values for board specfic
  9. * bindings.
  10. *
  11. * Note: This file does not include device nodes for all the controllers in
  12. * Exynos4412 SoC. As device tree coverage for Exynos4412 increases, additional
  13. * nodes can be added to this file.
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. /include/ "exynos4x12.dtsi"
  20. / {
  21. compatible = "samsung,exynos4412";
  22. gic:interrupt-controller@10490000 {
  23. cpu-offset = <0x4000>;
  24. };
  25. mct@10050000 {
  26. compatible = "samsung,exynos4412-mct";
  27. reg = <0x10050000 0x800>;
  28. interrupt-controller;
  29. #interrups-cells = <2>;
  30. interrupt-parent = <&mct_map>;
  31. interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
  32. <4 0>, <5 0>, <6 0>, <7 0>;
  33. clocks = <&clock 3>, <&clock 344>;
  34. clock-names = "fin_pll", "mct";
  35. mct_map: mct-map {
  36. #interrupt-cells = <2>;
  37. #address-cells = <0>;
  38. #size-cells = <0>;
  39. interrupt-map = <0x0 0 &gic 0 57 0>,
  40. <0x1 0 &combiner 12 5>,
  41. <0x2 0 &combiner 12 6>,
  42. <0x3 0 &combiner 12 7>,
  43. <0x4 0 &gic 1 12 0>,
  44. <0x5 0 &gic 1 12 0>,
  45. <0x6 0 &gic 1 12 0>,
  46. <0x7 0 &gic 1 12 0>;
  47. };
  48. };
  49. };