intel_dvo.c 14 KB

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  1. /*
  2. * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3. * Copyright © 2006-2007 Intel Corporation
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. */
  27. #include <linux/i2c.h>
  28. #include <linux/slab.h>
  29. #include "drmP.h"
  30. #include "drm.h"
  31. #include "drm_crtc.h"
  32. #include "intel_drv.h"
  33. #include "i915_drm.h"
  34. #include "i915_drv.h"
  35. #include "dvo.h"
  36. #define SIL164_ADDR 0x38
  37. #define CH7xxx_ADDR 0x76
  38. #define TFP410_ADDR 0x38
  39. #define NS2501_ADDR 0x38
  40. static const struct intel_dvo_device intel_dvo_devices[] = {
  41. {
  42. .type = INTEL_DVO_CHIP_TMDS,
  43. .name = "sil164",
  44. .dvo_reg = DVOC,
  45. .slave_addr = SIL164_ADDR,
  46. .dev_ops = &sil164_ops,
  47. },
  48. {
  49. .type = INTEL_DVO_CHIP_TMDS,
  50. .name = "ch7xxx",
  51. .dvo_reg = DVOC,
  52. .slave_addr = CH7xxx_ADDR,
  53. .dev_ops = &ch7xxx_ops,
  54. },
  55. {
  56. .type = INTEL_DVO_CHIP_LVDS,
  57. .name = "ivch",
  58. .dvo_reg = DVOA,
  59. .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
  60. .dev_ops = &ivch_ops,
  61. },
  62. {
  63. .type = INTEL_DVO_CHIP_TMDS,
  64. .name = "tfp410",
  65. .dvo_reg = DVOC,
  66. .slave_addr = TFP410_ADDR,
  67. .dev_ops = &tfp410_ops,
  68. },
  69. {
  70. .type = INTEL_DVO_CHIP_LVDS,
  71. .name = "ch7017",
  72. .dvo_reg = DVOC,
  73. .slave_addr = 0x75,
  74. .gpio = GMBUS_PORT_DPB,
  75. .dev_ops = &ch7017_ops,
  76. },
  77. {
  78. .type = INTEL_DVO_CHIP_TMDS,
  79. .name = "ns2501",
  80. .dvo_reg = DVOC,
  81. .slave_addr = NS2501_ADDR,
  82. .dev_ops = &ns2501_ops,
  83. }
  84. };
  85. struct intel_dvo {
  86. struct intel_encoder base;
  87. struct intel_dvo_device dev;
  88. struct drm_display_mode *panel_fixed_mode;
  89. bool panel_wants_dither;
  90. };
  91. static struct intel_dvo *enc_to_intel_dvo(struct drm_encoder *encoder)
  92. {
  93. return container_of(encoder, struct intel_dvo, base.base);
  94. }
  95. static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
  96. {
  97. return container_of(intel_attached_encoder(connector),
  98. struct intel_dvo, base);
  99. }
  100. static void intel_disable_dvo(struct intel_encoder *encoder)
  101. {
  102. struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  103. struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base);
  104. u32 dvo_reg = intel_dvo->dev.dvo_reg;
  105. u32 temp = I915_READ(dvo_reg);
  106. intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
  107. I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
  108. I915_READ(dvo_reg);
  109. }
  110. static void intel_enable_dvo(struct intel_encoder *encoder)
  111. {
  112. struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  113. struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base);
  114. u32 dvo_reg = intel_dvo->dev.dvo_reg;
  115. u32 temp = I915_READ(dvo_reg);
  116. I915_WRITE(dvo_reg, temp | DVO_ENABLE);
  117. I915_READ(dvo_reg);
  118. intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
  119. }
  120. static void intel_dvo_dpms(struct drm_encoder *encoder, int mode)
  121. {
  122. struct drm_i915_private *dev_priv = encoder->dev->dev_private;
  123. struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
  124. u32 dvo_reg = intel_dvo->dev.dvo_reg;
  125. u32 temp = I915_READ(dvo_reg);
  126. if (mode == DRM_MODE_DPMS_ON) {
  127. I915_WRITE(dvo_reg, temp | DVO_ENABLE);
  128. I915_READ(dvo_reg);
  129. intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
  130. } else {
  131. intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
  132. I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
  133. I915_READ(dvo_reg);
  134. }
  135. }
  136. static int intel_dvo_mode_valid(struct drm_connector *connector,
  137. struct drm_display_mode *mode)
  138. {
  139. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  140. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  141. return MODE_NO_DBLESCAN;
  142. /* XXX: Validate clock range */
  143. if (intel_dvo->panel_fixed_mode) {
  144. if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
  145. return MODE_PANEL;
  146. if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
  147. return MODE_PANEL;
  148. }
  149. return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
  150. }
  151. static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
  152. const struct drm_display_mode *mode,
  153. struct drm_display_mode *adjusted_mode)
  154. {
  155. struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
  156. /* If we have timings from the BIOS for the panel, put them in
  157. * to the adjusted mode. The CRTC will be set up for this mode,
  158. * with the panel scaling set up to source from the H/VDisplay
  159. * of the original mode.
  160. */
  161. if (intel_dvo->panel_fixed_mode != NULL) {
  162. #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
  163. C(hdisplay);
  164. C(hsync_start);
  165. C(hsync_end);
  166. C(htotal);
  167. C(vdisplay);
  168. C(vsync_start);
  169. C(vsync_end);
  170. C(vtotal);
  171. C(clock);
  172. #undef C
  173. }
  174. if (intel_dvo->dev.dev_ops->mode_fixup)
  175. return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev, mode, adjusted_mode);
  176. return true;
  177. }
  178. static void intel_dvo_mode_set(struct drm_encoder *encoder,
  179. struct drm_display_mode *mode,
  180. struct drm_display_mode *adjusted_mode)
  181. {
  182. struct drm_device *dev = encoder->dev;
  183. struct drm_i915_private *dev_priv = dev->dev_private;
  184. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  185. struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
  186. int pipe = intel_crtc->pipe;
  187. u32 dvo_val;
  188. u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
  189. int dpll_reg = DPLL(pipe);
  190. switch (dvo_reg) {
  191. case DVOA:
  192. default:
  193. dvo_srcdim_reg = DVOA_SRCDIM;
  194. break;
  195. case DVOB:
  196. dvo_srcdim_reg = DVOB_SRCDIM;
  197. break;
  198. case DVOC:
  199. dvo_srcdim_reg = DVOC_SRCDIM;
  200. break;
  201. }
  202. intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, mode, adjusted_mode);
  203. /* Save the data order, since I don't know what it should be set to. */
  204. dvo_val = I915_READ(dvo_reg) &
  205. (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
  206. dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
  207. DVO_BLANK_ACTIVE_HIGH;
  208. if (pipe == 1)
  209. dvo_val |= DVO_PIPE_B_SELECT;
  210. dvo_val |= DVO_PIPE_STALL;
  211. if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  212. dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
  213. if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  214. dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
  215. I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED);
  216. /*I915_WRITE(DVOB_SRCDIM,
  217. (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
  218. (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
  219. I915_WRITE(dvo_srcdim_reg,
  220. (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
  221. (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
  222. /*I915_WRITE(DVOB, dvo_val);*/
  223. I915_WRITE(dvo_reg, dvo_val);
  224. }
  225. /**
  226. * Detect the output connection on our DVO device.
  227. *
  228. * Unimplemented.
  229. */
  230. static enum drm_connector_status
  231. intel_dvo_detect(struct drm_connector *connector, bool force)
  232. {
  233. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  234. return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
  235. }
  236. static int intel_dvo_get_modes(struct drm_connector *connector)
  237. {
  238. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  239. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  240. /* We should probably have an i2c driver get_modes function for those
  241. * devices which will have a fixed set of modes determined by the chip
  242. * (TV-out, for example), but for now with just TMDS and LVDS,
  243. * that's not the case.
  244. */
  245. intel_ddc_get_modes(connector,
  246. intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));
  247. if (!list_empty(&connector->probed_modes))
  248. return 1;
  249. if (intel_dvo->panel_fixed_mode != NULL) {
  250. struct drm_display_mode *mode;
  251. mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
  252. if (mode) {
  253. drm_mode_probed_add(connector, mode);
  254. return 1;
  255. }
  256. }
  257. return 0;
  258. }
  259. static void intel_dvo_destroy(struct drm_connector *connector)
  260. {
  261. drm_sysfs_connector_remove(connector);
  262. drm_connector_cleanup(connector);
  263. kfree(connector);
  264. }
  265. static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
  266. .dpms = intel_dvo_dpms,
  267. .mode_fixup = intel_dvo_mode_fixup,
  268. .prepare = intel_encoder_noop,
  269. .mode_set = intel_dvo_mode_set,
  270. .commit = intel_encoder_noop,
  271. .disable = intel_encoder_disable,
  272. };
  273. static const struct drm_connector_funcs intel_dvo_connector_funcs = {
  274. .dpms = drm_helper_connector_dpms,
  275. .detect = intel_dvo_detect,
  276. .destroy = intel_dvo_destroy,
  277. .fill_modes = drm_helper_probe_single_connector_modes,
  278. };
  279. static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
  280. .mode_valid = intel_dvo_mode_valid,
  281. .get_modes = intel_dvo_get_modes,
  282. .best_encoder = intel_best_encoder,
  283. };
  284. static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
  285. {
  286. struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
  287. if (intel_dvo->dev.dev_ops->destroy)
  288. intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
  289. kfree(intel_dvo->panel_fixed_mode);
  290. intel_encoder_destroy(encoder);
  291. }
  292. static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
  293. .destroy = intel_dvo_enc_destroy,
  294. };
  295. /**
  296. * Attempts to get a fixed panel timing for LVDS (currently only the i830).
  297. *
  298. * Other chips with DVO LVDS will need to extend this to deal with the LVDS
  299. * chip being on DVOB/C and having multiple pipes.
  300. */
  301. static struct drm_display_mode *
  302. intel_dvo_get_current_mode(struct drm_connector *connector)
  303. {
  304. struct drm_device *dev = connector->dev;
  305. struct drm_i915_private *dev_priv = dev->dev_private;
  306. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  307. uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
  308. struct drm_display_mode *mode = NULL;
  309. /* If the DVO port is active, that'll be the LVDS, so we can pull out
  310. * its timings to get how the BIOS set up the panel.
  311. */
  312. if (dvo_val & DVO_ENABLE) {
  313. struct drm_crtc *crtc;
  314. int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
  315. crtc = intel_get_crtc_for_pipe(dev, pipe);
  316. if (crtc) {
  317. mode = intel_crtc_mode_get(dev, crtc);
  318. if (mode) {
  319. mode->type |= DRM_MODE_TYPE_PREFERRED;
  320. if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
  321. mode->flags |= DRM_MODE_FLAG_PHSYNC;
  322. if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
  323. mode->flags |= DRM_MODE_FLAG_PVSYNC;
  324. }
  325. }
  326. }
  327. return mode;
  328. }
  329. void intel_dvo_init(struct drm_device *dev)
  330. {
  331. struct drm_i915_private *dev_priv = dev->dev_private;
  332. struct intel_encoder *intel_encoder;
  333. struct intel_dvo *intel_dvo;
  334. struct intel_connector *intel_connector;
  335. int i;
  336. int encoder_type = DRM_MODE_ENCODER_NONE;
  337. intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL);
  338. if (!intel_dvo)
  339. return;
  340. intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
  341. if (!intel_connector) {
  342. kfree(intel_dvo);
  343. return;
  344. }
  345. intel_encoder = &intel_dvo->base;
  346. drm_encoder_init(dev, &intel_encoder->base,
  347. &intel_dvo_enc_funcs, encoder_type);
  348. intel_encoder->disable = intel_disable_dvo;
  349. intel_encoder->enable = intel_enable_dvo;
  350. /* Now, try to find a controller */
  351. for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
  352. struct drm_connector *connector = &intel_connector->base;
  353. const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
  354. struct i2c_adapter *i2c;
  355. int gpio;
  356. /* Allow the I2C driver info to specify the GPIO to be used in
  357. * special cases, but otherwise default to what's defined
  358. * in the spec.
  359. */
  360. if (intel_gmbus_is_port_valid(dvo->gpio))
  361. gpio = dvo->gpio;
  362. else if (dvo->type == INTEL_DVO_CHIP_LVDS)
  363. gpio = GMBUS_PORT_SSC;
  364. else
  365. gpio = GMBUS_PORT_DPB;
  366. /* Set up the I2C bus necessary for the chip we're probing.
  367. * It appears that everything is on GPIOE except for panels
  368. * on i830 laptops, which are on GPIOB (DVOA).
  369. */
  370. i2c = intel_gmbus_get_adapter(dev_priv, gpio);
  371. intel_dvo->dev = *dvo;
  372. if (!dvo->dev_ops->init(&intel_dvo->dev, i2c))
  373. continue;
  374. intel_encoder->type = INTEL_OUTPUT_DVO;
  375. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  376. switch (dvo->type) {
  377. case INTEL_DVO_CHIP_TMDS:
  378. intel_encoder->cloneable = true;
  379. drm_connector_init(dev, connector,
  380. &intel_dvo_connector_funcs,
  381. DRM_MODE_CONNECTOR_DVII);
  382. encoder_type = DRM_MODE_ENCODER_TMDS;
  383. break;
  384. case INTEL_DVO_CHIP_LVDS:
  385. intel_encoder->cloneable = false;
  386. drm_connector_init(dev, connector,
  387. &intel_dvo_connector_funcs,
  388. DRM_MODE_CONNECTOR_LVDS);
  389. encoder_type = DRM_MODE_ENCODER_LVDS;
  390. break;
  391. }
  392. drm_connector_helper_add(connector,
  393. &intel_dvo_connector_helper_funcs);
  394. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  395. connector->interlace_allowed = false;
  396. connector->doublescan_allowed = false;
  397. drm_encoder_helper_add(&intel_encoder->base,
  398. &intel_dvo_helper_funcs);
  399. intel_connector_attach_encoder(intel_connector, intel_encoder);
  400. if (dvo->type == INTEL_DVO_CHIP_LVDS) {
  401. /* For our LVDS chipsets, we should hopefully be able
  402. * to dig the fixed panel mode out of the BIOS data.
  403. * However, it's in a different format from the BIOS
  404. * data on chipsets with integrated LVDS (stored in AIM
  405. * headers, likely), so for now, just get the current
  406. * mode being output through DVO.
  407. */
  408. intel_dvo->panel_fixed_mode =
  409. intel_dvo_get_current_mode(connector);
  410. intel_dvo->panel_wants_dither = true;
  411. }
  412. drm_sysfs_connector_add(connector);
  413. return;
  414. }
  415. drm_encoder_cleanup(&intel_encoder->base);
  416. kfree(intel_dvo);
  417. kfree(intel_connector);
  418. }