nand.txt 1.7 KB

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  1. * Texas Instruments Davinci NAND
  2. This file provides information, what the device node for the
  3. davinci nand interface contain.
  4. Required properties:
  5. - compatible: "ti,davinci-nand";
  6. - reg : contain 2 offset/length values:
  7. - offset and length for the access window
  8. - offset and length for accessing the aemif control registers
  9. - ti,davinci-chipselect: Indicates on the davinci_nand driver which
  10. chipselect is used for accessing the nand.
  11. Recommended properties :
  12. - ti,davinci-mask-ale: mask for ale
  13. - ti,davinci-mask-cle: mask for cle
  14. - ti,davinci-mask-chipsel: mask for chipselect
  15. - ti,davinci-ecc-mode: ECC mode valid values for davinci driver:
  16. - "none"
  17. - "soft"
  18. - "hw"
  19. - ti,davinci-ecc-bits: used ECC bits, currently supported 1 or 4.
  20. - ti,davinci-nand-buswidth: buswidth 8 or 16
  21. - ti,davinci-nand-use-bbt: use flash based bad block table support.
  22. nand device bindings may contain additional sub-nodes describing
  23. partitions of the address space. See partition.txt for more detail.
  24. Example (enbw_cmc board):
  25. aemif@60000000 {
  26. compatible = "ti,davinci-aemif";
  27. #address-cells = <2>;
  28. #size-cells = <1>;
  29. reg = <0x68000000 0x80000>;
  30. ranges = <2 0 0x60000000 0x02000000
  31. 3 0 0x62000000 0x02000000
  32. 4 0 0x64000000 0x02000000
  33. 5 0 0x66000000 0x02000000
  34. 6 0 0x68000000 0x02000000>;
  35. nand@3,0 {
  36. compatible = "ti,davinci-nand";
  37. reg = <3 0x0 0x807ff
  38. 6 0x0 0x8000>;
  39. #address-cells = <1>;
  40. #size-cells = <1>;
  41. ti,davinci-chipselect = <1>;
  42. ti,davinci-mask-ale = <0>;
  43. ti,davinci-mask-cle = <0>;
  44. ti,davinci-mask-chipsel = <0>;
  45. ti,davinci-ecc-mode = "hw";
  46. ti,davinci-ecc-bits = <4>;
  47. ti,davinci-nand-use-bbt;
  48. partition@180000 {
  49. label = "ubifs";
  50. reg = <0x180000 0x7e80000>;
  51. };
  52. };
  53. };