tps65910-regulator.c 33 KB

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  1. /*
  2. * tps65910.c -- TI tps65910
  3. *
  4. * Copyright 2010 Texas Instruments Inc.
  5. *
  6. * Author: Graeme Gregory <gg@slimlogic.co.uk>
  7. * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/err.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/slab.h>
  23. #include <linux/gpio.h>
  24. #include <linux/mfd/tps65910.h>
  25. #include <linux/regulator/of_regulator.h>
  26. #define TPS65910_SUPPLY_STATE_ENABLED 0x1
  27. #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
  28. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
  29. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
  30. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  31. /* supported VIO voltages in microvolts */
  32. static const unsigned int VIO_VSEL_table[] = {
  33. 1500000, 1800000, 2500000, 3300000,
  34. };
  35. /* VSEL tables for TPS65910 specific LDOs and dcdc's */
  36. /* supported VDD3 voltages in microvolts */
  37. static const unsigned int VDD3_VSEL_table[] = {
  38. 5000000,
  39. };
  40. /* supported VDIG1 voltages in microvolts */
  41. static const unsigned int VDIG1_VSEL_table[] = {
  42. 1200000, 1500000, 1800000, 2700000,
  43. };
  44. /* supported VDIG2 voltages in microvolts */
  45. static const unsigned int VDIG2_VSEL_table[] = {
  46. 1000000, 1100000, 1200000, 1800000,
  47. };
  48. /* supported VPLL voltages in microvolts */
  49. static const unsigned int VPLL_VSEL_table[] = {
  50. 1000000, 1100000, 1800000, 2500000,
  51. };
  52. /* supported VDAC voltages in microvolts */
  53. static const unsigned int VDAC_VSEL_table[] = {
  54. 1800000, 2600000, 2800000, 2850000,
  55. };
  56. /* supported VAUX1 voltages in microvolts */
  57. static const unsigned int VAUX1_VSEL_table[] = {
  58. 1800000, 2500000, 2800000, 2850000,
  59. };
  60. /* supported VAUX2 voltages in microvolts */
  61. static const unsigned int VAUX2_VSEL_table[] = {
  62. 1800000, 2800000, 2900000, 3300000,
  63. };
  64. /* supported VAUX33 voltages in microvolts */
  65. static const unsigned int VAUX33_VSEL_table[] = {
  66. 1800000, 2000000, 2800000, 3300000,
  67. };
  68. /* supported VMMC voltages in microvolts */
  69. static const unsigned int VMMC_VSEL_table[] = {
  70. 1800000, 2800000, 3000000, 3300000,
  71. };
  72. struct tps_info {
  73. const char *name;
  74. const char *vin_name;
  75. u8 n_voltages;
  76. const unsigned int *voltage_table;
  77. int enable_time_us;
  78. };
  79. static struct tps_info tps65910_regs[] = {
  80. {
  81. .name = "vrtc",
  82. .vin_name = "vcc7",
  83. .enable_time_us = 2200,
  84. },
  85. {
  86. .name = "vio",
  87. .vin_name = "vccio",
  88. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  89. .voltage_table = VIO_VSEL_table,
  90. .enable_time_us = 350,
  91. },
  92. {
  93. .name = "vdd1",
  94. .vin_name = "vcc1",
  95. .enable_time_us = 350,
  96. },
  97. {
  98. .name = "vdd2",
  99. .vin_name = "vcc2",
  100. .enable_time_us = 350,
  101. },
  102. {
  103. .name = "vdd3",
  104. .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
  105. .voltage_table = VDD3_VSEL_table,
  106. .enable_time_us = 200,
  107. },
  108. {
  109. .name = "vdig1",
  110. .vin_name = "vcc6",
  111. .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
  112. .voltage_table = VDIG1_VSEL_table,
  113. .enable_time_us = 100,
  114. },
  115. {
  116. .name = "vdig2",
  117. .vin_name = "vcc6",
  118. .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
  119. .voltage_table = VDIG2_VSEL_table,
  120. .enable_time_us = 100,
  121. },
  122. {
  123. .name = "vpll",
  124. .vin_name = "vcc5",
  125. .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
  126. .voltage_table = VPLL_VSEL_table,
  127. .enable_time_us = 100,
  128. },
  129. {
  130. .name = "vdac",
  131. .vin_name = "vcc5",
  132. .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
  133. .voltage_table = VDAC_VSEL_table,
  134. .enable_time_us = 100,
  135. },
  136. {
  137. .name = "vaux1",
  138. .vin_name = "vcc4",
  139. .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
  140. .voltage_table = VAUX1_VSEL_table,
  141. .enable_time_us = 100,
  142. },
  143. {
  144. .name = "vaux2",
  145. .vin_name = "vcc4",
  146. .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
  147. .voltage_table = VAUX2_VSEL_table,
  148. .enable_time_us = 100,
  149. },
  150. {
  151. .name = "vaux33",
  152. .vin_name = "vcc3",
  153. .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
  154. .voltage_table = VAUX33_VSEL_table,
  155. .enable_time_us = 100,
  156. },
  157. {
  158. .name = "vmmc",
  159. .vin_name = "vcc3",
  160. .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
  161. .voltage_table = VMMC_VSEL_table,
  162. .enable_time_us = 100,
  163. },
  164. };
  165. static struct tps_info tps65911_regs[] = {
  166. {
  167. .name = "vrtc",
  168. .vin_name = "vcc7",
  169. .enable_time_us = 2200,
  170. },
  171. {
  172. .name = "vio",
  173. .vin_name = "vccio",
  174. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  175. .voltage_table = VIO_VSEL_table,
  176. .enable_time_us = 350,
  177. },
  178. {
  179. .name = "vdd1",
  180. .vin_name = "vcc1",
  181. .n_voltages = 73,
  182. .enable_time_us = 350,
  183. },
  184. {
  185. .name = "vdd2",
  186. .vin_name = "vcc2",
  187. .n_voltages = 73,
  188. .enable_time_us = 350,
  189. },
  190. {
  191. .name = "vddctrl",
  192. .n_voltages = 65,
  193. .enable_time_us = 900,
  194. },
  195. {
  196. .name = "ldo1",
  197. .vin_name = "vcc6",
  198. .n_voltages = 47,
  199. .enable_time_us = 420,
  200. },
  201. {
  202. .name = "ldo2",
  203. .vin_name = "vcc6",
  204. .n_voltages = 47,
  205. .enable_time_us = 420,
  206. },
  207. {
  208. .name = "ldo3",
  209. .vin_name = "vcc5",
  210. .n_voltages = 24,
  211. .enable_time_us = 230,
  212. },
  213. {
  214. .name = "ldo4",
  215. .vin_name = "vcc5",
  216. .n_voltages = 47,
  217. .enable_time_us = 230,
  218. },
  219. {
  220. .name = "ldo5",
  221. .vin_name = "vcc4",
  222. .n_voltages = 24,
  223. .enable_time_us = 230,
  224. },
  225. {
  226. .name = "ldo6",
  227. .vin_name = "vcc3",
  228. .n_voltages = 24,
  229. .enable_time_us = 230,
  230. },
  231. {
  232. .name = "ldo7",
  233. .vin_name = "vcc3",
  234. .n_voltages = 24,
  235. .enable_time_us = 230,
  236. },
  237. {
  238. .name = "ldo8",
  239. .vin_name = "vcc3",
  240. .n_voltages = 24,
  241. .enable_time_us = 230,
  242. },
  243. };
  244. #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
  245. static unsigned int tps65910_ext_sleep_control[] = {
  246. 0,
  247. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  248. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  249. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  250. EXT_CONTROL_REG_BITS(VDD3, 1, 3),
  251. EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
  252. EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
  253. EXT_CONTROL_REG_BITS(VPLL, 0, 6),
  254. EXT_CONTROL_REG_BITS(VDAC, 0, 7),
  255. EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
  256. EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
  257. EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
  258. EXT_CONTROL_REG_BITS(VMMC, 0, 0),
  259. };
  260. static unsigned int tps65911_ext_sleep_control[] = {
  261. 0,
  262. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  263. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  264. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  265. EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
  266. EXT_CONTROL_REG_BITS(LDO1, 0, 1),
  267. EXT_CONTROL_REG_BITS(LDO2, 0, 2),
  268. EXT_CONTROL_REG_BITS(LDO3, 0, 7),
  269. EXT_CONTROL_REG_BITS(LDO4, 0, 6),
  270. EXT_CONTROL_REG_BITS(LDO5, 0, 3),
  271. EXT_CONTROL_REG_BITS(LDO6, 0, 0),
  272. EXT_CONTROL_REG_BITS(LDO7, 0, 5),
  273. EXT_CONTROL_REG_BITS(LDO8, 0, 4),
  274. };
  275. struct tps65910_reg {
  276. struct regulator_desc *desc;
  277. struct tps65910 *mfd;
  278. struct regulator_dev **rdev;
  279. struct tps_info **info;
  280. struct mutex mutex;
  281. int num_regulators;
  282. int mode;
  283. int (*get_ctrl_reg)(int);
  284. unsigned int *ext_sleep_control;
  285. unsigned int board_ext_control[TPS65910_NUM_REGS];
  286. };
  287. static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)
  288. {
  289. unsigned int val;
  290. int err;
  291. err = tps65910_reg_read(pmic->mfd, reg, &val);
  292. if (err)
  293. return err;
  294. return val;
  295. }
  296. static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
  297. u8 set_mask, u8 clear_mask)
  298. {
  299. int err, data;
  300. mutex_lock(&pmic->mutex);
  301. data = tps65910_read(pmic, reg);
  302. if (data < 0) {
  303. dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
  304. err = data;
  305. goto out;
  306. }
  307. data &= ~clear_mask;
  308. data |= set_mask;
  309. err = tps65910_reg_write(pmic->mfd, reg, data);
  310. if (err)
  311. dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
  312. out:
  313. mutex_unlock(&pmic->mutex);
  314. return err;
  315. }
  316. static int tps65910_reg_read_locked(struct tps65910_reg *pmic, u8 reg)
  317. {
  318. int data;
  319. mutex_lock(&pmic->mutex);
  320. data = tps65910_read(pmic, reg);
  321. if (data < 0)
  322. dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
  323. mutex_unlock(&pmic->mutex);
  324. return data;
  325. }
  326. static int tps65910_reg_write_locked(struct tps65910_reg *pmic, u8 reg, u8 val)
  327. {
  328. int err;
  329. mutex_lock(&pmic->mutex);
  330. err = tps65910_reg_write(pmic->mfd, reg, val);
  331. if (err < 0)
  332. dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
  333. mutex_unlock(&pmic->mutex);
  334. return err;
  335. }
  336. static int tps65910_get_ctrl_register(int id)
  337. {
  338. switch (id) {
  339. case TPS65910_REG_VRTC:
  340. return TPS65910_VRTC;
  341. case TPS65910_REG_VIO:
  342. return TPS65910_VIO;
  343. case TPS65910_REG_VDD1:
  344. return TPS65910_VDD1;
  345. case TPS65910_REG_VDD2:
  346. return TPS65910_VDD2;
  347. case TPS65910_REG_VDD3:
  348. return TPS65910_VDD3;
  349. case TPS65910_REG_VDIG1:
  350. return TPS65910_VDIG1;
  351. case TPS65910_REG_VDIG2:
  352. return TPS65910_VDIG2;
  353. case TPS65910_REG_VPLL:
  354. return TPS65910_VPLL;
  355. case TPS65910_REG_VDAC:
  356. return TPS65910_VDAC;
  357. case TPS65910_REG_VAUX1:
  358. return TPS65910_VAUX1;
  359. case TPS65910_REG_VAUX2:
  360. return TPS65910_VAUX2;
  361. case TPS65910_REG_VAUX33:
  362. return TPS65910_VAUX33;
  363. case TPS65910_REG_VMMC:
  364. return TPS65910_VMMC;
  365. default:
  366. return -EINVAL;
  367. }
  368. }
  369. static int tps65911_get_ctrl_register(int id)
  370. {
  371. switch (id) {
  372. case TPS65910_REG_VRTC:
  373. return TPS65910_VRTC;
  374. case TPS65910_REG_VIO:
  375. return TPS65910_VIO;
  376. case TPS65910_REG_VDD1:
  377. return TPS65910_VDD1;
  378. case TPS65910_REG_VDD2:
  379. return TPS65910_VDD2;
  380. case TPS65911_REG_VDDCTRL:
  381. return TPS65911_VDDCTRL;
  382. case TPS65911_REG_LDO1:
  383. return TPS65911_LDO1;
  384. case TPS65911_REG_LDO2:
  385. return TPS65911_LDO2;
  386. case TPS65911_REG_LDO3:
  387. return TPS65911_LDO3;
  388. case TPS65911_REG_LDO4:
  389. return TPS65911_LDO4;
  390. case TPS65911_REG_LDO5:
  391. return TPS65911_LDO5;
  392. case TPS65911_REG_LDO6:
  393. return TPS65911_LDO6;
  394. case TPS65911_REG_LDO7:
  395. return TPS65911_LDO7;
  396. case TPS65911_REG_LDO8:
  397. return TPS65911_LDO8;
  398. default:
  399. return -EINVAL;
  400. }
  401. }
  402. static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
  403. {
  404. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  405. struct tps65910 *mfd = pmic->mfd;
  406. int reg, value, id = rdev_get_id(dev);
  407. reg = pmic->get_ctrl_reg(id);
  408. if (reg < 0)
  409. return reg;
  410. switch (mode) {
  411. case REGULATOR_MODE_NORMAL:
  412. return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT,
  413. LDO_ST_MODE_BIT);
  414. case REGULATOR_MODE_IDLE:
  415. value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
  416. return tps65910_reg_set_bits(mfd, reg, value);
  417. case REGULATOR_MODE_STANDBY:
  418. return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);
  419. }
  420. return -EINVAL;
  421. }
  422. static unsigned int tps65910_get_mode(struct regulator_dev *dev)
  423. {
  424. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  425. int reg, value, id = rdev_get_id(dev);
  426. reg = pmic->get_ctrl_reg(id);
  427. if (reg < 0)
  428. return reg;
  429. value = tps65910_reg_read_locked(pmic, reg);
  430. if (value < 0)
  431. return value;
  432. if (!(value & LDO_ST_ON_BIT))
  433. return REGULATOR_MODE_STANDBY;
  434. else if (value & LDO_ST_MODE_BIT)
  435. return REGULATOR_MODE_IDLE;
  436. else
  437. return REGULATOR_MODE_NORMAL;
  438. }
  439. static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
  440. {
  441. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  442. int id = rdev_get_id(dev);
  443. int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
  444. switch (id) {
  445. case TPS65910_REG_VDD1:
  446. opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_OP);
  447. mult = tps65910_reg_read_locked(pmic, TPS65910_VDD1);
  448. mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
  449. srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_SR);
  450. sr = opvsel & VDD1_OP_CMD_MASK;
  451. opvsel &= VDD1_OP_SEL_MASK;
  452. srvsel &= VDD1_SR_SEL_MASK;
  453. vselmax = 75;
  454. break;
  455. case TPS65910_REG_VDD2:
  456. opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_OP);
  457. mult = tps65910_reg_read_locked(pmic, TPS65910_VDD2);
  458. mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
  459. srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_SR);
  460. sr = opvsel & VDD2_OP_CMD_MASK;
  461. opvsel &= VDD2_OP_SEL_MASK;
  462. srvsel &= VDD2_SR_SEL_MASK;
  463. vselmax = 75;
  464. break;
  465. case TPS65911_REG_VDDCTRL:
  466. opvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_OP);
  467. srvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_SR);
  468. sr = opvsel & VDDCTRL_OP_CMD_MASK;
  469. opvsel &= VDDCTRL_OP_SEL_MASK;
  470. srvsel &= VDDCTRL_SR_SEL_MASK;
  471. vselmax = 64;
  472. break;
  473. }
  474. /* multiplier 0 == 1 but 2,3 normal */
  475. if (!mult)
  476. mult=1;
  477. if (sr) {
  478. /* normalise to valid range */
  479. if (srvsel < 3)
  480. srvsel = 3;
  481. if (srvsel > vselmax)
  482. srvsel = vselmax;
  483. return srvsel - 3;
  484. } else {
  485. /* normalise to valid range*/
  486. if (opvsel < 3)
  487. opvsel = 3;
  488. if (opvsel > vselmax)
  489. opvsel = vselmax;
  490. return opvsel - 3;
  491. }
  492. return -EINVAL;
  493. }
  494. static int tps65910_get_voltage_sel(struct regulator_dev *dev)
  495. {
  496. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  497. int reg, value, id = rdev_get_id(dev);
  498. reg = pmic->get_ctrl_reg(id);
  499. if (reg < 0)
  500. return reg;
  501. value = tps65910_reg_read_locked(pmic, reg);
  502. if (value < 0)
  503. return value;
  504. switch (id) {
  505. case TPS65910_REG_VIO:
  506. case TPS65910_REG_VDIG1:
  507. case TPS65910_REG_VDIG2:
  508. case TPS65910_REG_VPLL:
  509. case TPS65910_REG_VDAC:
  510. case TPS65910_REG_VAUX1:
  511. case TPS65910_REG_VAUX2:
  512. case TPS65910_REG_VAUX33:
  513. case TPS65910_REG_VMMC:
  514. value &= LDO_SEL_MASK;
  515. value >>= LDO_SEL_SHIFT;
  516. break;
  517. default:
  518. return -EINVAL;
  519. }
  520. return value;
  521. }
  522. static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
  523. {
  524. return dev->desc->volt_table[0];
  525. }
  526. static int tps65911_get_voltage_sel(struct regulator_dev *dev)
  527. {
  528. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  529. int id = rdev_get_id(dev);
  530. u8 value, reg;
  531. reg = pmic->get_ctrl_reg(id);
  532. value = tps65910_reg_read_locked(pmic, reg);
  533. switch (id) {
  534. case TPS65911_REG_LDO1:
  535. case TPS65911_REG_LDO2:
  536. case TPS65911_REG_LDO4:
  537. value &= LDO1_SEL_MASK;
  538. value >>= LDO_SEL_SHIFT;
  539. break;
  540. case TPS65911_REG_LDO3:
  541. case TPS65911_REG_LDO5:
  542. case TPS65911_REG_LDO6:
  543. case TPS65911_REG_LDO7:
  544. case TPS65911_REG_LDO8:
  545. value &= LDO3_SEL_MASK;
  546. value >>= LDO_SEL_SHIFT;
  547. break;
  548. case TPS65910_REG_VIO:
  549. value &= LDO_SEL_MASK;
  550. value >>= LDO_SEL_SHIFT;
  551. break;
  552. default:
  553. return -EINVAL;
  554. }
  555. return value;
  556. }
  557. static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
  558. unsigned selector)
  559. {
  560. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  561. int id = rdev_get_id(dev), vsel;
  562. int dcdc_mult = 0;
  563. switch (id) {
  564. case TPS65910_REG_VDD1:
  565. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  566. if (dcdc_mult == 1)
  567. dcdc_mult--;
  568. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  569. tps65910_modify_bits(pmic, TPS65910_VDD1,
  570. (dcdc_mult << VDD1_VGAIN_SEL_SHIFT),
  571. VDD1_VGAIN_SEL_MASK);
  572. tps65910_reg_write_locked(pmic, TPS65910_VDD1_OP, vsel);
  573. break;
  574. case TPS65910_REG_VDD2:
  575. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  576. if (dcdc_mult == 1)
  577. dcdc_mult--;
  578. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  579. tps65910_modify_bits(pmic, TPS65910_VDD2,
  580. (dcdc_mult << VDD2_VGAIN_SEL_SHIFT),
  581. VDD1_VGAIN_SEL_MASK);
  582. tps65910_reg_write_locked(pmic, TPS65910_VDD2_OP, vsel);
  583. break;
  584. case TPS65911_REG_VDDCTRL:
  585. vsel = selector + 3;
  586. tps65910_reg_write_locked(pmic, TPS65911_VDDCTRL_OP, vsel);
  587. }
  588. return 0;
  589. }
  590. static int tps65910_set_voltage_sel(struct regulator_dev *dev,
  591. unsigned selector)
  592. {
  593. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  594. int reg, id = rdev_get_id(dev);
  595. reg = pmic->get_ctrl_reg(id);
  596. if (reg < 0)
  597. return reg;
  598. switch (id) {
  599. case TPS65910_REG_VIO:
  600. case TPS65910_REG_VDIG1:
  601. case TPS65910_REG_VDIG2:
  602. case TPS65910_REG_VPLL:
  603. case TPS65910_REG_VDAC:
  604. case TPS65910_REG_VAUX1:
  605. case TPS65910_REG_VAUX2:
  606. case TPS65910_REG_VAUX33:
  607. case TPS65910_REG_VMMC:
  608. return tps65910_modify_bits(pmic, reg,
  609. (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
  610. }
  611. return -EINVAL;
  612. }
  613. static int tps65911_set_voltage_sel(struct regulator_dev *dev,
  614. unsigned selector)
  615. {
  616. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  617. int reg, id = rdev_get_id(dev);
  618. reg = pmic->get_ctrl_reg(id);
  619. if (reg < 0)
  620. return reg;
  621. switch (id) {
  622. case TPS65911_REG_LDO1:
  623. case TPS65911_REG_LDO2:
  624. case TPS65911_REG_LDO4:
  625. return tps65910_modify_bits(pmic, reg,
  626. (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK);
  627. case TPS65911_REG_LDO3:
  628. case TPS65911_REG_LDO5:
  629. case TPS65911_REG_LDO6:
  630. case TPS65911_REG_LDO7:
  631. case TPS65911_REG_LDO8:
  632. return tps65910_modify_bits(pmic, reg,
  633. (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK);
  634. case TPS65910_REG_VIO:
  635. return tps65910_modify_bits(pmic, reg,
  636. (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
  637. }
  638. return -EINVAL;
  639. }
  640. static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
  641. unsigned selector)
  642. {
  643. int volt, mult = 1, id = rdev_get_id(dev);
  644. switch (id) {
  645. case TPS65910_REG_VDD1:
  646. case TPS65910_REG_VDD2:
  647. mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  648. volt = VDD1_2_MIN_VOLT +
  649. (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
  650. break;
  651. case TPS65911_REG_VDDCTRL:
  652. volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
  653. break;
  654. default:
  655. BUG();
  656. return -EINVAL;
  657. }
  658. return volt * 100 * mult;
  659. }
  660. static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
  661. {
  662. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  663. int step_mv = 0, id = rdev_get_id(dev);
  664. switch(id) {
  665. case TPS65911_REG_LDO1:
  666. case TPS65911_REG_LDO2:
  667. case TPS65911_REG_LDO4:
  668. /* The first 5 values of the selector correspond to 1V */
  669. if (selector < 5)
  670. selector = 0;
  671. else
  672. selector -= 4;
  673. step_mv = 50;
  674. break;
  675. case TPS65911_REG_LDO3:
  676. case TPS65911_REG_LDO5:
  677. case TPS65911_REG_LDO6:
  678. case TPS65911_REG_LDO7:
  679. case TPS65911_REG_LDO8:
  680. /* The first 3 values of the selector correspond to 1V */
  681. if (selector < 3)
  682. selector = 0;
  683. else
  684. selector -= 2;
  685. step_mv = 100;
  686. break;
  687. case TPS65910_REG_VIO:
  688. return pmic->info[id]->voltage_table[selector];
  689. default:
  690. return -EINVAL;
  691. }
  692. return (LDO_MIN_VOLT + selector * step_mv) * 1000;
  693. }
  694. /* Regulator ops (except VRTC) */
  695. static struct regulator_ops tps65910_ops_dcdc = {
  696. .is_enabled = regulator_is_enabled_regmap,
  697. .enable = regulator_enable_regmap,
  698. .disable = regulator_disable_regmap,
  699. .set_mode = tps65910_set_mode,
  700. .get_mode = tps65910_get_mode,
  701. .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
  702. .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
  703. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  704. .list_voltage = tps65910_list_voltage_dcdc,
  705. };
  706. static struct regulator_ops tps65910_ops_vdd3 = {
  707. .is_enabled = regulator_is_enabled_regmap,
  708. .enable = regulator_enable_regmap,
  709. .disable = regulator_disable_regmap,
  710. .set_mode = tps65910_set_mode,
  711. .get_mode = tps65910_get_mode,
  712. .get_voltage = tps65910_get_voltage_vdd3,
  713. .list_voltage = regulator_list_voltage_table,
  714. };
  715. static struct regulator_ops tps65910_ops = {
  716. .is_enabled = regulator_is_enabled_regmap,
  717. .enable = regulator_enable_regmap,
  718. .disable = regulator_disable_regmap,
  719. .set_mode = tps65910_set_mode,
  720. .get_mode = tps65910_get_mode,
  721. .get_voltage_sel = tps65910_get_voltage_sel,
  722. .set_voltage_sel = tps65910_set_voltage_sel,
  723. .list_voltage = regulator_list_voltage_table,
  724. };
  725. static struct regulator_ops tps65911_ops = {
  726. .is_enabled = regulator_is_enabled_regmap,
  727. .enable = regulator_enable_regmap,
  728. .disable = regulator_disable_regmap,
  729. .set_mode = tps65910_set_mode,
  730. .get_mode = tps65910_get_mode,
  731. .get_voltage_sel = tps65911_get_voltage_sel,
  732. .set_voltage_sel = tps65911_set_voltage_sel,
  733. .list_voltage = tps65911_list_voltage,
  734. };
  735. static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
  736. int id, int ext_sleep_config)
  737. {
  738. struct tps65910 *mfd = pmic->mfd;
  739. u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
  740. u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
  741. int ret;
  742. /*
  743. * Regulator can not be control from multiple external input EN1, EN2
  744. * and EN3 together.
  745. */
  746. if (ext_sleep_config & EXT_SLEEP_CONTROL) {
  747. int en_count;
  748. en_count = ((ext_sleep_config &
  749. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
  750. en_count += ((ext_sleep_config &
  751. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
  752. en_count += ((ext_sleep_config &
  753. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
  754. en_count += ((ext_sleep_config &
  755. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
  756. if (en_count > 1) {
  757. dev_err(mfd->dev,
  758. "External sleep control flag is not proper\n");
  759. return -EINVAL;
  760. }
  761. }
  762. pmic->board_ext_control[id] = ext_sleep_config;
  763. /* External EN1 control */
  764. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
  765. ret = tps65910_reg_set_bits(mfd,
  766. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  767. else
  768. ret = tps65910_reg_clear_bits(mfd,
  769. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  770. if (ret < 0) {
  771. dev_err(mfd->dev,
  772. "Error in configuring external control EN1\n");
  773. return ret;
  774. }
  775. /* External EN2 control */
  776. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
  777. ret = tps65910_reg_set_bits(mfd,
  778. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  779. else
  780. ret = tps65910_reg_clear_bits(mfd,
  781. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  782. if (ret < 0) {
  783. dev_err(mfd->dev,
  784. "Error in configuring external control EN2\n");
  785. return ret;
  786. }
  787. /* External EN3 control for TPS65910 LDO only */
  788. if ((tps65910_chip_id(mfd) == TPS65910) &&
  789. (id >= TPS65910_REG_VDIG1)) {
  790. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
  791. ret = tps65910_reg_set_bits(mfd,
  792. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  793. else
  794. ret = tps65910_reg_clear_bits(mfd,
  795. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  796. if (ret < 0) {
  797. dev_err(mfd->dev,
  798. "Error in configuring external control EN3\n");
  799. return ret;
  800. }
  801. }
  802. /* Return if no external control is selected */
  803. if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
  804. /* Clear all sleep controls */
  805. ret = tps65910_reg_clear_bits(mfd,
  806. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  807. if (!ret)
  808. ret = tps65910_reg_clear_bits(mfd,
  809. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  810. if (ret < 0)
  811. dev_err(mfd->dev,
  812. "Error in configuring SLEEP register\n");
  813. return ret;
  814. }
  815. /*
  816. * For regulator that has separate operational and sleep register make
  817. * sure that operational is used and clear sleep register to turn
  818. * regulator off when external control is inactive
  819. */
  820. if ((id == TPS65910_REG_VDD1) ||
  821. (id == TPS65910_REG_VDD2) ||
  822. ((id == TPS65911_REG_VDDCTRL) &&
  823. (tps65910_chip_id(mfd) == TPS65911))) {
  824. int op_reg_add = pmic->get_ctrl_reg(id) + 1;
  825. int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
  826. int opvsel = tps65910_reg_read_locked(pmic, op_reg_add);
  827. int srvsel = tps65910_reg_read_locked(pmic, sr_reg_add);
  828. if (opvsel & VDD1_OP_CMD_MASK) {
  829. u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
  830. ret = tps65910_reg_write_locked(pmic, op_reg_add,
  831. reg_val);
  832. if (ret < 0) {
  833. dev_err(mfd->dev,
  834. "Error in configuring op register\n");
  835. return ret;
  836. }
  837. }
  838. ret = tps65910_reg_write_locked(pmic, sr_reg_add, 0);
  839. if (ret < 0) {
  840. dev_err(mfd->dev, "Error in settting sr register\n");
  841. return ret;
  842. }
  843. }
  844. ret = tps65910_reg_clear_bits(mfd,
  845. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  846. if (!ret) {
  847. if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  848. ret = tps65910_reg_set_bits(mfd,
  849. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  850. else
  851. ret = tps65910_reg_clear_bits(mfd,
  852. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  853. }
  854. if (ret < 0)
  855. dev_err(mfd->dev,
  856. "Error in configuring SLEEP register\n");
  857. return ret;
  858. }
  859. #ifdef CONFIG_OF
  860. static struct of_regulator_match tps65910_matches[] = {
  861. { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] },
  862. { .name = "vio", .driver_data = (void *) &tps65910_regs[1] },
  863. { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] },
  864. { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] },
  865. { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] },
  866. { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] },
  867. { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] },
  868. { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
  869. { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] },
  870. { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] },
  871. { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
  872. { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
  873. { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
  874. };
  875. static struct of_regulator_match tps65911_matches[] = {
  876. { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] },
  877. { .name = "vio", .driver_data = (void *) &tps65911_regs[1] },
  878. { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] },
  879. { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] },
  880. { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] },
  881. { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] },
  882. { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] },
  883. { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] },
  884. { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] },
  885. { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] },
  886. { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] },
  887. { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] },
  888. { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] },
  889. };
  890. static struct tps65910_board *tps65910_parse_dt_reg_data(
  891. struct platform_device *pdev,
  892. struct of_regulator_match **tps65910_reg_matches)
  893. {
  894. struct tps65910_board *pmic_plat_data;
  895. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  896. struct device_node *np = pdev->dev.parent->of_node;
  897. struct device_node *regulators;
  898. struct of_regulator_match *matches;
  899. unsigned int prop;
  900. int idx = 0, ret, count;
  901. pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data),
  902. GFP_KERNEL);
  903. if (!pmic_plat_data) {
  904. dev_err(&pdev->dev, "Failure to alloc pdata for regulators.\n");
  905. return NULL;
  906. }
  907. regulators = of_find_node_by_name(np, "regulators");
  908. if (!regulators) {
  909. dev_err(&pdev->dev, "regulator node not found\n");
  910. return NULL;
  911. }
  912. switch (tps65910_chip_id(tps65910)) {
  913. case TPS65910:
  914. count = ARRAY_SIZE(tps65910_matches);
  915. matches = tps65910_matches;
  916. break;
  917. case TPS65911:
  918. count = ARRAY_SIZE(tps65911_matches);
  919. matches = tps65911_matches;
  920. break;
  921. default:
  922. dev_err(&pdev->dev, "Invalid tps chip version\n");
  923. return NULL;
  924. }
  925. ret = of_regulator_match(pdev->dev.parent, regulators, matches, count);
  926. if (ret < 0) {
  927. dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
  928. ret);
  929. return NULL;
  930. }
  931. *tps65910_reg_matches = matches;
  932. for (idx = 0; idx < count; idx++) {
  933. struct tps_info *info = matches[idx].driver_data;
  934. char in_supply[32]; /* 32 is max size of property name */
  935. if (!matches[idx].init_data || !matches[idx].of_node)
  936. continue;
  937. pmic_plat_data->tps65910_pmic_init_data[idx] =
  938. matches[idx].init_data;
  939. ret = of_property_read_u32(matches[idx].of_node,
  940. "ti,regulator-ext-sleep-control", &prop);
  941. if (!ret)
  942. pmic_plat_data->regulator_ext_sleep_control[idx] = prop;
  943. if (info->vin_name) {
  944. snprintf(in_supply, 32, "%s-supply", info->vin_name);
  945. if (of_find_property(np, in_supply, 0))
  946. pmic_plat_data->input_supply[idx] =
  947. info->vin_name;
  948. }
  949. }
  950. return pmic_plat_data;
  951. }
  952. #else
  953. static inline struct tps65910_board *tps65910_parse_dt_reg_data(
  954. struct platform_device *pdev,
  955. struct of_regulator_match **tps65910_reg_matches)
  956. {
  957. *tps65910_reg_matches = NULL;
  958. return NULL;
  959. }
  960. #endif
  961. static __devinit int tps65910_probe(struct platform_device *pdev)
  962. {
  963. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  964. struct regulator_config config = { };
  965. struct tps_info *info;
  966. struct regulator_init_data *reg_data;
  967. struct regulator_dev *rdev;
  968. struct tps65910_reg *pmic;
  969. struct tps65910_board *pmic_plat_data;
  970. struct of_regulator_match *tps65910_reg_matches = NULL;
  971. int i, err;
  972. pmic_plat_data = dev_get_platdata(tps65910->dev);
  973. if (!pmic_plat_data && tps65910->dev->of_node)
  974. pmic_plat_data = tps65910_parse_dt_reg_data(pdev,
  975. &tps65910_reg_matches);
  976. if (!pmic_plat_data) {
  977. dev_err(&pdev->dev, "Platform data not found\n");
  978. return -EINVAL;
  979. }
  980. pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
  981. if (!pmic) {
  982. dev_err(&pdev->dev, "Memory allocation failed for pmic\n");
  983. return -ENOMEM;
  984. }
  985. mutex_init(&pmic->mutex);
  986. pmic->mfd = tps65910;
  987. platform_set_drvdata(pdev, pmic);
  988. /* Give control of all register to control port */
  989. tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL,
  990. DEVCTRL_SR_CTL_I2C_SEL_MASK);
  991. switch(tps65910_chip_id(tps65910)) {
  992. case TPS65910:
  993. pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
  994. pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
  995. pmic->ext_sleep_control = tps65910_ext_sleep_control;
  996. info = tps65910_regs;
  997. break;
  998. case TPS65911:
  999. pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
  1000. pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
  1001. pmic->ext_sleep_control = tps65911_ext_sleep_control;
  1002. info = tps65911_regs;
  1003. break;
  1004. default:
  1005. dev_err(&pdev->dev, "Invalid tps chip version\n");
  1006. return -ENODEV;
  1007. }
  1008. pmic->desc = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  1009. sizeof(struct regulator_desc), GFP_KERNEL);
  1010. if (!pmic->desc) {
  1011. dev_err(&pdev->dev, "Memory alloc fails for desc\n");
  1012. return -ENOMEM;
  1013. }
  1014. pmic->info = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  1015. sizeof(struct tps_info *), GFP_KERNEL);
  1016. if (!pmic->info) {
  1017. dev_err(&pdev->dev, "Memory alloc fails for info\n");
  1018. return -ENOMEM;
  1019. }
  1020. pmic->rdev = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  1021. sizeof(struct regulator_dev *), GFP_KERNEL);
  1022. if (!pmic->rdev) {
  1023. dev_err(&pdev->dev, "Memory alloc fails for rdev\n");
  1024. return -ENOMEM;
  1025. }
  1026. for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
  1027. i++, info++) {
  1028. reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
  1029. /* Regulator API handles empty constraints but not NULL
  1030. * constraints */
  1031. if (!reg_data)
  1032. continue;
  1033. /* Register the regulators */
  1034. pmic->info[i] = info;
  1035. pmic->desc[i].name = info->name;
  1036. pmic->desc[i].supply_name = pmic_plat_data->input_supply[i];
  1037. pmic->desc[i].id = i;
  1038. pmic->desc[i].n_voltages = info->n_voltages;
  1039. pmic->desc[i].enable_time = info->enable_time_us;
  1040. if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
  1041. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1042. pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
  1043. VDD1_2_NUM_VOLT_COARSE;
  1044. pmic->desc[i].ramp_delay = 12500;
  1045. } else if (i == TPS65910_REG_VDD3) {
  1046. if (tps65910_chip_id(tps65910) == TPS65910) {
  1047. pmic->desc[i].ops = &tps65910_ops_vdd3;
  1048. pmic->desc[i].volt_table = info->voltage_table;
  1049. } else {
  1050. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1051. pmic->desc[i].ramp_delay = 5000;
  1052. }
  1053. } else {
  1054. if (tps65910_chip_id(tps65910) == TPS65910) {
  1055. pmic->desc[i].ops = &tps65910_ops;
  1056. pmic->desc[i].volt_table = info->voltage_table;
  1057. } else {
  1058. pmic->desc[i].ops = &tps65911_ops;
  1059. }
  1060. }
  1061. err = tps65910_set_ext_sleep_config(pmic, i,
  1062. pmic_plat_data->regulator_ext_sleep_control[i]);
  1063. /*
  1064. * Failing on regulator for configuring externally control
  1065. * is not a serious issue, just throw warning.
  1066. */
  1067. if (err < 0)
  1068. dev_warn(tps65910->dev,
  1069. "Failed to initialise ext control config\n");
  1070. pmic->desc[i].type = REGULATOR_VOLTAGE;
  1071. pmic->desc[i].owner = THIS_MODULE;
  1072. pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
  1073. pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
  1074. config.dev = tps65910->dev;
  1075. config.init_data = reg_data;
  1076. config.driver_data = pmic;
  1077. config.regmap = tps65910->regmap;
  1078. if (tps65910_reg_matches)
  1079. config.of_node = tps65910_reg_matches[i].of_node;
  1080. rdev = regulator_register(&pmic->desc[i], &config);
  1081. if (IS_ERR(rdev)) {
  1082. dev_err(tps65910->dev,
  1083. "failed to register %s regulator\n",
  1084. pdev->name);
  1085. err = PTR_ERR(rdev);
  1086. goto err_unregister_regulator;
  1087. }
  1088. /* Save regulator for cleanup */
  1089. pmic->rdev[i] = rdev;
  1090. }
  1091. return 0;
  1092. err_unregister_regulator:
  1093. while (--i >= 0)
  1094. regulator_unregister(pmic->rdev[i]);
  1095. return err;
  1096. }
  1097. static int __devexit tps65910_remove(struct platform_device *pdev)
  1098. {
  1099. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1100. int i;
  1101. for (i = 0; i < pmic->num_regulators; i++)
  1102. regulator_unregister(pmic->rdev[i]);
  1103. return 0;
  1104. }
  1105. static void tps65910_shutdown(struct platform_device *pdev)
  1106. {
  1107. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1108. int i;
  1109. /*
  1110. * Before bootloader jumps to kernel, it makes sure that required
  1111. * external control signals are in desired state so that given rails
  1112. * can be configure accordingly.
  1113. * If rails are configured to be controlled from external control
  1114. * then before shutting down/rebooting the system, the external
  1115. * control configuration need to be remove from the rails so that
  1116. * its output will be available as per register programming even
  1117. * if external controls are removed. This is require when the POR
  1118. * value of the control signals are not in active state and before
  1119. * bootloader initializes it, the system requires the rail output
  1120. * to be active for booting.
  1121. */
  1122. for (i = 0; i < pmic->num_regulators; i++) {
  1123. int err;
  1124. if (!pmic->rdev[i])
  1125. continue;
  1126. err = tps65910_set_ext_sleep_config(pmic, i, 0);
  1127. if (err < 0)
  1128. dev_err(&pdev->dev,
  1129. "Error in clearing external control\n");
  1130. }
  1131. }
  1132. static struct platform_driver tps65910_driver = {
  1133. .driver = {
  1134. .name = "tps65910-pmic",
  1135. .owner = THIS_MODULE,
  1136. },
  1137. .probe = tps65910_probe,
  1138. .remove = __devexit_p(tps65910_remove),
  1139. .shutdown = tps65910_shutdown,
  1140. };
  1141. static int __init tps65910_init(void)
  1142. {
  1143. return platform_driver_register(&tps65910_driver);
  1144. }
  1145. subsys_initcall(tps65910_init);
  1146. static void __exit tps65910_cleanup(void)
  1147. {
  1148. platform_driver_unregister(&tps65910_driver);
  1149. }
  1150. module_exit(tps65910_cleanup);
  1151. MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
  1152. MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
  1153. MODULE_LICENSE("GPL v2");
  1154. MODULE_ALIAS("platform:tps65910-pmic");