ymfpci_main.c 67 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318
  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * Routines for control of YMF724/740/744/754 chips
  4. *
  5. * BUGS:
  6. * --
  7. *
  8. * TODO:
  9. * --
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. *
  25. */
  26. #include <sound/driver.h>
  27. #include <linux/delay.h>
  28. #include <linux/init.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/pci.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <linux/vmalloc.h>
  34. #include <sound/core.h>
  35. #include <sound/control.h>
  36. #include <sound/info.h>
  37. #include <sound/ymfpci.h>
  38. #include <sound/asoundef.h>
  39. #include <sound/mpu401.h>
  40. #include <asm/io.h>
  41. /*
  42. * constants
  43. */
  44. /*
  45. * common I/O routines
  46. */
  47. static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
  48. static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
  49. {
  50. return readb(chip->reg_area_virt + offset);
  51. }
  52. static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
  53. {
  54. writeb(val, chip->reg_area_virt + offset);
  55. }
  56. static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
  57. {
  58. return readw(chip->reg_area_virt + offset);
  59. }
  60. static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
  61. {
  62. writew(val, chip->reg_area_virt + offset);
  63. }
  64. static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
  65. {
  66. return readl(chip->reg_area_virt + offset);
  67. }
  68. static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
  69. {
  70. writel(val, chip->reg_area_virt + offset);
  71. }
  72. static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
  73. {
  74. unsigned long end_time;
  75. u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
  76. end_time = jiffies + msecs_to_jiffies(750);
  77. do {
  78. if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
  79. return 0;
  80. set_current_state(TASK_UNINTERRUPTIBLE);
  81. schedule_timeout_uninterruptible(1);
  82. } while (time_before(jiffies, end_time));
  83. snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
  84. return -EBUSY;
  85. }
  86. static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
  87. {
  88. struct snd_ymfpci *chip = ac97->private_data;
  89. u32 cmd;
  90. snd_ymfpci_codec_ready(chip, 0);
  91. cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
  92. snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
  93. }
  94. static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
  95. {
  96. struct snd_ymfpci *chip = ac97->private_data;
  97. if (snd_ymfpci_codec_ready(chip, 0))
  98. return ~0;
  99. snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
  100. if (snd_ymfpci_codec_ready(chip, 0))
  101. return ~0;
  102. if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
  103. int i;
  104. for (i = 0; i < 600; i++)
  105. snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
  106. }
  107. return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
  108. }
  109. /*
  110. * Misc routines
  111. */
  112. static u32 snd_ymfpci_calc_delta(u32 rate)
  113. {
  114. switch (rate) {
  115. case 8000: return 0x02aaab00;
  116. case 11025: return 0x03accd00;
  117. case 16000: return 0x05555500;
  118. case 22050: return 0x07599a00;
  119. case 32000: return 0x0aaaab00;
  120. case 44100: return 0x0eb33300;
  121. default: return ((rate << 16) / 375) << 5;
  122. }
  123. }
  124. static u32 def_rate[8] = {
  125. 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
  126. };
  127. static u32 snd_ymfpci_calc_lpfK(u32 rate)
  128. {
  129. u32 i;
  130. static u32 val[8] = {
  131. 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
  132. 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
  133. };
  134. if (rate == 44100)
  135. return 0x40000000; /* FIXME: What's the right value? */
  136. for (i = 0; i < 8; i++)
  137. if (rate <= def_rate[i])
  138. return val[i];
  139. return val[0];
  140. }
  141. static u32 snd_ymfpci_calc_lpfQ(u32 rate)
  142. {
  143. u32 i;
  144. static u32 val[8] = {
  145. 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
  146. 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
  147. };
  148. if (rate == 44100)
  149. return 0x370A0000;
  150. for (i = 0; i < 8; i++)
  151. if (rate <= def_rate[i])
  152. return val[i];
  153. return val[0];
  154. }
  155. /*
  156. * Hardware start management
  157. */
  158. static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
  159. {
  160. unsigned long flags;
  161. spin_lock_irqsave(&chip->reg_lock, flags);
  162. if (chip->start_count++ > 0)
  163. goto __end;
  164. snd_ymfpci_writel(chip, YDSXGR_MODE,
  165. snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
  166. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
  167. __end:
  168. spin_unlock_irqrestore(&chip->reg_lock, flags);
  169. }
  170. static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
  171. {
  172. unsigned long flags;
  173. long timeout = 1000;
  174. spin_lock_irqsave(&chip->reg_lock, flags);
  175. if (--chip->start_count > 0)
  176. goto __end;
  177. snd_ymfpci_writel(chip, YDSXGR_MODE,
  178. snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
  179. while (timeout-- > 0) {
  180. if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
  181. break;
  182. }
  183. if (atomic_read(&chip->interrupt_sleep_count)) {
  184. atomic_set(&chip->interrupt_sleep_count, 0);
  185. wake_up(&chip->interrupt_sleep);
  186. }
  187. __end:
  188. spin_unlock_irqrestore(&chip->reg_lock, flags);
  189. }
  190. /*
  191. * Playback voice management
  192. */
  193. static int voice_alloc(struct snd_ymfpci *chip,
  194. enum snd_ymfpci_voice_type type, int pair,
  195. struct snd_ymfpci_voice **rvoice)
  196. {
  197. struct snd_ymfpci_voice *voice, *voice2;
  198. int idx;
  199. *rvoice = NULL;
  200. for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
  201. voice = &chip->voices[idx];
  202. voice2 = pair ? &chip->voices[idx+1] : NULL;
  203. if (voice->use || (voice2 && voice2->use))
  204. continue;
  205. voice->use = 1;
  206. if (voice2)
  207. voice2->use = 1;
  208. switch (type) {
  209. case YMFPCI_PCM:
  210. voice->pcm = 1;
  211. if (voice2)
  212. voice2->pcm = 1;
  213. break;
  214. case YMFPCI_SYNTH:
  215. voice->synth = 1;
  216. break;
  217. case YMFPCI_MIDI:
  218. voice->midi = 1;
  219. break;
  220. }
  221. snd_ymfpci_hw_start(chip);
  222. if (voice2)
  223. snd_ymfpci_hw_start(chip);
  224. *rvoice = voice;
  225. return 0;
  226. }
  227. return -ENOMEM;
  228. }
  229. static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
  230. enum snd_ymfpci_voice_type type, int pair,
  231. struct snd_ymfpci_voice **rvoice)
  232. {
  233. unsigned long flags;
  234. int result;
  235. snd_assert(rvoice != NULL, return -EINVAL);
  236. snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL);
  237. spin_lock_irqsave(&chip->voice_lock, flags);
  238. for (;;) {
  239. result = voice_alloc(chip, type, pair, rvoice);
  240. if (result == 0 || type != YMFPCI_PCM)
  241. break;
  242. /* TODO: synth/midi voice deallocation */
  243. break;
  244. }
  245. spin_unlock_irqrestore(&chip->voice_lock, flags);
  246. return result;
  247. }
  248. static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
  249. {
  250. unsigned long flags;
  251. snd_assert(pvoice != NULL, return -EINVAL);
  252. snd_ymfpci_hw_stop(chip);
  253. spin_lock_irqsave(&chip->voice_lock, flags);
  254. pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
  255. pvoice->ypcm = NULL;
  256. pvoice->interrupt = NULL;
  257. spin_unlock_irqrestore(&chip->voice_lock, flags);
  258. return 0;
  259. }
  260. /*
  261. * PCM part
  262. */
  263. static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
  264. {
  265. struct snd_ymfpci_pcm *ypcm;
  266. u32 pos, delta;
  267. if ((ypcm = voice->ypcm) == NULL)
  268. return;
  269. if (ypcm->substream == NULL)
  270. return;
  271. spin_lock(&chip->reg_lock);
  272. if (ypcm->running) {
  273. pos = le32_to_cpu(voice->bank[chip->active_bank].start);
  274. if (pos < ypcm->last_pos)
  275. delta = pos + (ypcm->buffer_size - ypcm->last_pos);
  276. else
  277. delta = pos - ypcm->last_pos;
  278. ypcm->period_pos += delta;
  279. ypcm->last_pos = pos;
  280. if (ypcm->period_pos >= ypcm->period_size) {
  281. // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
  282. ypcm->period_pos %= ypcm->period_size;
  283. spin_unlock(&chip->reg_lock);
  284. snd_pcm_period_elapsed(ypcm->substream);
  285. spin_lock(&chip->reg_lock);
  286. }
  287. if (unlikely(ypcm->update_pcm_vol)) {
  288. unsigned int subs = ypcm->substream->number;
  289. unsigned int next_bank = 1 - chip->active_bank;
  290. struct snd_ymfpci_playback_bank *bank;
  291. u32 volume;
  292. bank = &voice->bank[next_bank];
  293. volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
  294. bank->left_gain_end = volume;
  295. if (ypcm->output_rear)
  296. bank->eff2_gain_end = volume;
  297. if (ypcm->voices[1])
  298. bank = &ypcm->voices[1]->bank[next_bank];
  299. volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
  300. bank->right_gain_end = volume;
  301. if (ypcm->output_rear)
  302. bank->eff3_gain_end = volume;
  303. ypcm->update_pcm_vol--;
  304. }
  305. }
  306. spin_unlock(&chip->reg_lock);
  307. }
  308. static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
  309. {
  310. struct snd_pcm_runtime *runtime = substream->runtime;
  311. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  312. struct snd_ymfpci *chip = ypcm->chip;
  313. u32 pos, delta;
  314. spin_lock(&chip->reg_lock);
  315. if (ypcm->running) {
  316. pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
  317. if (pos < ypcm->last_pos)
  318. delta = pos + (ypcm->buffer_size - ypcm->last_pos);
  319. else
  320. delta = pos - ypcm->last_pos;
  321. ypcm->period_pos += delta;
  322. ypcm->last_pos = pos;
  323. if (ypcm->period_pos >= ypcm->period_size) {
  324. ypcm->period_pos %= ypcm->period_size;
  325. // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
  326. spin_unlock(&chip->reg_lock);
  327. snd_pcm_period_elapsed(substream);
  328. spin_lock(&chip->reg_lock);
  329. }
  330. }
  331. spin_unlock(&chip->reg_lock);
  332. }
  333. static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
  334. int cmd)
  335. {
  336. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  337. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  338. int result = 0;
  339. spin_lock(&chip->reg_lock);
  340. if (ypcm->voices[0] == NULL) {
  341. result = -EINVAL;
  342. goto __unlock;
  343. }
  344. switch (cmd) {
  345. case SNDRV_PCM_TRIGGER_START:
  346. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  347. case SNDRV_PCM_TRIGGER_RESUME:
  348. chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
  349. if (ypcm->voices[1] != NULL)
  350. chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
  351. ypcm->running = 1;
  352. break;
  353. case SNDRV_PCM_TRIGGER_STOP:
  354. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  355. case SNDRV_PCM_TRIGGER_SUSPEND:
  356. chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
  357. if (ypcm->voices[1] != NULL)
  358. chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
  359. ypcm->running = 0;
  360. break;
  361. default:
  362. result = -EINVAL;
  363. break;
  364. }
  365. __unlock:
  366. spin_unlock(&chip->reg_lock);
  367. return result;
  368. }
  369. static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
  370. int cmd)
  371. {
  372. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  373. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  374. int result = 0;
  375. u32 tmp;
  376. spin_lock(&chip->reg_lock);
  377. switch (cmd) {
  378. case SNDRV_PCM_TRIGGER_START:
  379. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  380. case SNDRV_PCM_TRIGGER_RESUME:
  381. tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
  382. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
  383. ypcm->running = 1;
  384. break;
  385. case SNDRV_PCM_TRIGGER_STOP:
  386. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  387. case SNDRV_PCM_TRIGGER_SUSPEND:
  388. tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
  389. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
  390. ypcm->running = 0;
  391. break;
  392. default:
  393. result = -EINVAL;
  394. break;
  395. }
  396. spin_unlock(&chip->reg_lock);
  397. return result;
  398. }
  399. static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
  400. {
  401. int err;
  402. if (ypcm->voices[1] != NULL && voices < 2) {
  403. snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
  404. ypcm->voices[1] = NULL;
  405. }
  406. if (voices == 1 && ypcm->voices[0] != NULL)
  407. return 0; /* already allocated */
  408. if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
  409. return 0; /* already allocated */
  410. if (voices > 1) {
  411. if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
  412. snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
  413. ypcm->voices[0] = NULL;
  414. }
  415. }
  416. err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
  417. if (err < 0)
  418. return err;
  419. ypcm->voices[0]->ypcm = ypcm;
  420. ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
  421. if (voices > 1) {
  422. ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
  423. ypcm->voices[1]->ypcm = ypcm;
  424. }
  425. return 0;
  426. }
  427. static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
  428. struct snd_pcm_runtime *runtime,
  429. int has_pcm_volume)
  430. {
  431. struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
  432. u32 format;
  433. u32 delta = snd_ymfpci_calc_delta(runtime->rate);
  434. u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
  435. u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
  436. struct snd_ymfpci_playback_bank *bank;
  437. unsigned int nbank;
  438. u32 vol_left, vol_right;
  439. u8 use_left, use_right;
  440. snd_assert(voice != NULL, return);
  441. if (runtime->channels == 1) {
  442. use_left = 1;
  443. use_right = 1;
  444. } else {
  445. use_left = (voiceidx & 1) == 0;
  446. use_right = !use_left;
  447. }
  448. if (has_pcm_volume) {
  449. vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
  450. [ypcm->substream->number].left << 15);
  451. vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
  452. [ypcm->substream->number].right << 15);
  453. } else {
  454. vol_left = cpu_to_le32(0x40000000);
  455. vol_right = cpu_to_le32(0x40000000);
  456. }
  457. format = runtime->channels == 2 ? 0x00010000 : 0;
  458. if (snd_pcm_format_width(runtime->format) == 8)
  459. format |= 0x80000000;
  460. if (runtime->channels == 2 && (voiceidx & 1) != 0)
  461. format |= 1;
  462. for (nbank = 0; nbank < 2; nbank++) {
  463. bank = &voice->bank[nbank];
  464. memset(bank, 0, sizeof(*bank));
  465. bank->format = cpu_to_le32(format);
  466. bank->base = cpu_to_le32(runtime->dma_addr);
  467. bank->loop_end = cpu_to_le32(ypcm->buffer_size);
  468. bank->lpfQ = cpu_to_le32(lpfQ);
  469. bank->delta =
  470. bank->delta_end = cpu_to_le32(delta);
  471. bank->lpfK =
  472. bank->lpfK_end = cpu_to_le32(lpfK);
  473. bank->eg_gain =
  474. bank->eg_gain_end = cpu_to_le32(0x40000000);
  475. if (ypcm->output_front) {
  476. if (use_left) {
  477. bank->left_gain =
  478. bank->left_gain_end = vol_left;
  479. }
  480. if (use_right) {
  481. bank->right_gain =
  482. bank->right_gain_end = vol_right;
  483. }
  484. }
  485. if (ypcm->output_rear) {
  486. if (use_left) {
  487. bank->eff2_gain =
  488. bank->eff2_gain_end = vol_left;
  489. }
  490. if (use_right) {
  491. bank->eff3_gain =
  492. bank->eff3_gain_end = vol_right;
  493. }
  494. }
  495. }
  496. }
  497. static int __devinit snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
  498. {
  499. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
  500. 4096, &chip->ac3_tmp_base) < 0)
  501. return -ENOMEM;
  502. chip->bank_effect[3][0]->base =
  503. chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
  504. chip->bank_effect[3][0]->loop_end =
  505. chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
  506. chip->bank_effect[4][0]->base =
  507. chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
  508. chip->bank_effect[4][0]->loop_end =
  509. chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
  510. spin_lock_irq(&chip->reg_lock);
  511. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
  512. snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
  513. spin_unlock_irq(&chip->reg_lock);
  514. return 0;
  515. }
  516. static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
  517. {
  518. spin_lock_irq(&chip->reg_lock);
  519. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
  520. snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
  521. spin_unlock_irq(&chip->reg_lock);
  522. // snd_ymfpci_irq_wait(chip);
  523. if (chip->ac3_tmp_base.area) {
  524. snd_dma_free_pages(&chip->ac3_tmp_base);
  525. chip->ac3_tmp_base.area = NULL;
  526. }
  527. return 0;
  528. }
  529. static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
  530. struct snd_pcm_hw_params *hw_params)
  531. {
  532. struct snd_pcm_runtime *runtime = substream->runtime;
  533. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  534. int err;
  535. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  536. return err;
  537. if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
  538. return err;
  539. return 0;
  540. }
  541. static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
  542. {
  543. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  544. struct snd_pcm_runtime *runtime = substream->runtime;
  545. struct snd_ymfpci_pcm *ypcm;
  546. if (runtime->private_data == NULL)
  547. return 0;
  548. ypcm = runtime->private_data;
  549. /* wait, until the PCI operations are not finished */
  550. snd_ymfpci_irq_wait(chip);
  551. snd_pcm_lib_free_pages(substream);
  552. if (ypcm->voices[1]) {
  553. snd_ymfpci_voice_free(chip, ypcm->voices[1]);
  554. ypcm->voices[1] = NULL;
  555. }
  556. if (ypcm->voices[0]) {
  557. snd_ymfpci_voice_free(chip, ypcm->voices[0]);
  558. ypcm->voices[0] = NULL;
  559. }
  560. return 0;
  561. }
  562. static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
  563. {
  564. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  565. struct snd_pcm_runtime *runtime = substream->runtime;
  566. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  567. unsigned int nvoice;
  568. ypcm->period_size = runtime->period_size;
  569. ypcm->buffer_size = runtime->buffer_size;
  570. ypcm->period_pos = 0;
  571. ypcm->last_pos = 0;
  572. for (nvoice = 0; nvoice < runtime->channels; nvoice++)
  573. snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
  574. substream->pcm == chip->pcm);
  575. return 0;
  576. }
  577. static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream,
  578. struct snd_pcm_hw_params *hw_params)
  579. {
  580. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  581. }
  582. static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
  583. {
  584. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  585. /* wait, until the PCI operations are not finished */
  586. snd_ymfpci_irq_wait(chip);
  587. return snd_pcm_lib_free_pages(substream);
  588. }
  589. static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
  590. {
  591. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  592. struct snd_pcm_runtime *runtime = substream->runtime;
  593. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  594. struct snd_ymfpci_capture_bank * bank;
  595. int nbank;
  596. u32 rate, format;
  597. ypcm->period_size = runtime->period_size;
  598. ypcm->buffer_size = runtime->buffer_size;
  599. ypcm->period_pos = 0;
  600. ypcm->last_pos = 0;
  601. ypcm->shift = 0;
  602. rate = ((48000 * 4096) / runtime->rate) - 1;
  603. format = 0;
  604. if (runtime->channels == 2) {
  605. format |= 2;
  606. ypcm->shift++;
  607. }
  608. if (snd_pcm_format_width(runtime->format) == 8)
  609. format |= 1;
  610. else
  611. ypcm->shift++;
  612. switch (ypcm->capture_bank_number) {
  613. case 0:
  614. snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
  615. snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
  616. break;
  617. case 1:
  618. snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
  619. snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
  620. break;
  621. }
  622. for (nbank = 0; nbank < 2; nbank++) {
  623. bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
  624. bank->base = cpu_to_le32(runtime->dma_addr);
  625. bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
  626. bank->start = 0;
  627. bank->num_of_loops = 0;
  628. }
  629. return 0;
  630. }
  631. static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
  632. {
  633. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  634. struct snd_pcm_runtime *runtime = substream->runtime;
  635. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  636. struct snd_ymfpci_voice *voice = ypcm->voices[0];
  637. if (!(ypcm->running && voice))
  638. return 0;
  639. return le32_to_cpu(voice->bank[chip->active_bank].start);
  640. }
  641. static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
  642. {
  643. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  644. struct snd_pcm_runtime *runtime = substream->runtime;
  645. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  646. if (!ypcm->running)
  647. return 0;
  648. return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
  649. }
  650. static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
  651. {
  652. wait_queue_t wait;
  653. int loops = 4;
  654. while (loops-- > 0) {
  655. if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
  656. continue;
  657. init_waitqueue_entry(&wait, current);
  658. add_wait_queue(&chip->interrupt_sleep, &wait);
  659. atomic_inc(&chip->interrupt_sleep_count);
  660. schedule_timeout_uninterruptible(msecs_to_jiffies(50));
  661. remove_wait_queue(&chip->interrupt_sleep, &wait);
  662. }
  663. }
  664. static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  665. {
  666. struct snd_ymfpci *chip = dev_id;
  667. u32 status, nvoice, mode;
  668. struct snd_ymfpci_voice *voice;
  669. status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
  670. if (status & 0x80000000) {
  671. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
  672. spin_lock(&chip->voice_lock);
  673. for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
  674. voice = &chip->voices[nvoice];
  675. if (voice->interrupt)
  676. voice->interrupt(chip, voice);
  677. }
  678. for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
  679. if (chip->capture_substream[nvoice])
  680. snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
  681. }
  682. #if 0
  683. for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
  684. if (chip->effect_substream[nvoice])
  685. snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
  686. }
  687. #endif
  688. spin_unlock(&chip->voice_lock);
  689. spin_lock(&chip->reg_lock);
  690. snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
  691. mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
  692. snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
  693. spin_unlock(&chip->reg_lock);
  694. if (atomic_read(&chip->interrupt_sleep_count)) {
  695. atomic_set(&chip->interrupt_sleep_count, 0);
  696. wake_up(&chip->interrupt_sleep);
  697. }
  698. }
  699. status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
  700. if (status & 1) {
  701. if (chip->timer)
  702. snd_timer_interrupt(chip->timer, chip->timer->sticks);
  703. }
  704. snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
  705. if (chip->rawmidi)
  706. snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data, regs);
  707. return IRQ_HANDLED;
  708. }
  709. static struct snd_pcm_hardware snd_ymfpci_playback =
  710. {
  711. .info = (SNDRV_PCM_INFO_MMAP |
  712. SNDRV_PCM_INFO_MMAP_VALID |
  713. SNDRV_PCM_INFO_INTERLEAVED |
  714. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  715. SNDRV_PCM_INFO_PAUSE |
  716. SNDRV_PCM_INFO_RESUME),
  717. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  718. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  719. .rate_min = 8000,
  720. .rate_max = 48000,
  721. .channels_min = 1,
  722. .channels_max = 2,
  723. .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
  724. .period_bytes_min = 64,
  725. .period_bytes_max = 256 * 1024, /* FIXME: enough? */
  726. .periods_min = 3,
  727. .periods_max = 1024,
  728. .fifo_size = 0,
  729. };
  730. static struct snd_pcm_hardware snd_ymfpci_capture =
  731. {
  732. .info = (SNDRV_PCM_INFO_MMAP |
  733. SNDRV_PCM_INFO_MMAP_VALID |
  734. SNDRV_PCM_INFO_INTERLEAVED |
  735. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  736. SNDRV_PCM_INFO_PAUSE |
  737. SNDRV_PCM_INFO_RESUME),
  738. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  739. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  740. .rate_min = 8000,
  741. .rate_max = 48000,
  742. .channels_min = 1,
  743. .channels_max = 2,
  744. .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
  745. .period_bytes_min = 64,
  746. .period_bytes_max = 256 * 1024, /* FIXME: enough? */
  747. .periods_min = 3,
  748. .periods_max = 1024,
  749. .fifo_size = 0,
  750. };
  751. static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
  752. {
  753. kfree(runtime->private_data);
  754. }
  755. static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
  756. {
  757. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  758. struct snd_pcm_runtime *runtime = substream->runtime;
  759. struct snd_ymfpci_pcm *ypcm;
  760. ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
  761. if (ypcm == NULL)
  762. return -ENOMEM;
  763. ypcm->chip = chip;
  764. ypcm->type = PLAYBACK_VOICE;
  765. ypcm->substream = substream;
  766. runtime->hw = snd_ymfpci_playback;
  767. runtime->private_data = ypcm;
  768. runtime->private_free = snd_ymfpci_pcm_free_substream;
  769. /* FIXME? True value is 256/48 = 5.33333 ms */
  770. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
  771. return 0;
  772. }
  773. /* call with spinlock held */
  774. static void ymfpci_open_extension(struct snd_ymfpci *chip)
  775. {
  776. if (! chip->rear_opened) {
  777. if (! chip->spdif_opened) /* set AC3 */
  778. snd_ymfpci_writel(chip, YDSXGR_MODE,
  779. snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
  780. /* enable second codec (4CHEN) */
  781. snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
  782. (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
  783. }
  784. }
  785. /* call with spinlock held */
  786. static void ymfpci_close_extension(struct snd_ymfpci *chip)
  787. {
  788. if (! chip->rear_opened) {
  789. if (! chip->spdif_opened)
  790. snd_ymfpci_writel(chip, YDSXGR_MODE,
  791. snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
  792. snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
  793. (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
  794. }
  795. }
  796. static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
  797. {
  798. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  799. struct snd_pcm_runtime *runtime = substream->runtime;
  800. struct snd_ymfpci_pcm *ypcm;
  801. struct snd_kcontrol *kctl;
  802. int err;
  803. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  804. return err;
  805. ypcm = runtime->private_data;
  806. ypcm->output_front = 1;
  807. ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
  808. spin_lock_irq(&chip->reg_lock);
  809. if (ypcm->output_rear) {
  810. ymfpci_open_extension(chip);
  811. chip->rear_opened++;
  812. }
  813. spin_unlock_irq(&chip->reg_lock);
  814. kctl = chip->pcm_mixer[substream->number].ctl;
  815. kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  816. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
  817. return 0;
  818. }
  819. static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
  820. {
  821. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  822. struct snd_pcm_runtime *runtime = substream->runtime;
  823. struct snd_ymfpci_pcm *ypcm;
  824. int err;
  825. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  826. return err;
  827. ypcm = runtime->private_data;
  828. ypcm->output_front = 0;
  829. ypcm->output_rear = 1;
  830. spin_lock_irq(&chip->reg_lock);
  831. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
  832. snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
  833. ymfpci_open_extension(chip);
  834. chip->spdif_pcm_bits = chip->spdif_bits;
  835. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
  836. chip->spdif_opened++;
  837. spin_unlock_irq(&chip->reg_lock);
  838. chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  839. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
  840. SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
  841. return 0;
  842. }
  843. static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
  844. {
  845. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  846. struct snd_pcm_runtime *runtime = substream->runtime;
  847. struct snd_ymfpci_pcm *ypcm;
  848. int err;
  849. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  850. return err;
  851. ypcm = runtime->private_data;
  852. ypcm->output_front = 0;
  853. ypcm->output_rear = 1;
  854. spin_lock_irq(&chip->reg_lock);
  855. ymfpci_open_extension(chip);
  856. chip->rear_opened++;
  857. spin_unlock_irq(&chip->reg_lock);
  858. return 0;
  859. }
  860. static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
  861. u32 capture_bank_number)
  862. {
  863. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  864. struct snd_pcm_runtime *runtime = substream->runtime;
  865. struct snd_ymfpci_pcm *ypcm;
  866. ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
  867. if (ypcm == NULL)
  868. return -ENOMEM;
  869. ypcm->chip = chip;
  870. ypcm->type = capture_bank_number + CAPTURE_REC;
  871. ypcm->substream = substream;
  872. ypcm->capture_bank_number = capture_bank_number;
  873. chip->capture_substream[capture_bank_number] = substream;
  874. runtime->hw = snd_ymfpci_capture;
  875. /* FIXME? True value is 256/48 = 5.33333 ms */
  876. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
  877. runtime->private_data = ypcm;
  878. runtime->private_free = snd_ymfpci_pcm_free_substream;
  879. snd_ymfpci_hw_start(chip);
  880. return 0;
  881. }
  882. static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
  883. {
  884. return snd_ymfpci_capture_open(substream, 0);
  885. }
  886. static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
  887. {
  888. return snd_ymfpci_capture_open(substream, 1);
  889. }
  890. static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
  891. {
  892. return 0;
  893. }
  894. static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
  895. {
  896. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  897. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  898. struct snd_kcontrol *kctl;
  899. spin_lock_irq(&chip->reg_lock);
  900. if (ypcm->output_rear && chip->rear_opened > 0) {
  901. chip->rear_opened--;
  902. ymfpci_close_extension(chip);
  903. }
  904. spin_unlock_irq(&chip->reg_lock);
  905. kctl = chip->pcm_mixer[substream->number].ctl;
  906. kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  907. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
  908. return snd_ymfpci_playback_close_1(substream);
  909. }
  910. static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
  911. {
  912. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  913. spin_lock_irq(&chip->reg_lock);
  914. chip->spdif_opened = 0;
  915. ymfpci_close_extension(chip);
  916. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
  917. snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
  918. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  919. spin_unlock_irq(&chip->reg_lock);
  920. chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  921. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
  922. SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
  923. return snd_ymfpci_playback_close_1(substream);
  924. }
  925. static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
  926. {
  927. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  928. spin_lock_irq(&chip->reg_lock);
  929. if (chip->rear_opened > 0) {
  930. chip->rear_opened--;
  931. ymfpci_close_extension(chip);
  932. }
  933. spin_unlock_irq(&chip->reg_lock);
  934. return snd_ymfpci_playback_close_1(substream);
  935. }
  936. static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
  937. {
  938. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  939. struct snd_pcm_runtime *runtime = substream->runtime;
  940. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  941. if (ypcm != NULL) {
  942. chip->capture_substream[ypcm->capture_bank_number] = NULL;
  943. snd_ymfpci_hw_stop(chip);
  944. }
  945. return 0;
  946. }
  947. static struct snd_pcm_ops snd_ymfpci_playback_ops = {
  948. .open = snd_ymfpci_playback_open,
  949. .close = snd_ymfpci_playback_close,
  950. .ioctl = snd_pcm_lib_ioctl,
  951. .hw_params = snd_ymfpci_playback_hw_params,
  952. .hw_free = snd_ymfpci_playback_hw_free,
  953. .prepare = snd_ymfpci_playback_prepare,
  954. .trigger = snd_ymfpci_playback_trigger,
  955. .pointer = snd_ymfpci_playback_pointer,
  956. };
  957. static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
  958. .open = snd_ymfpci_capture_rec_open,
  959. .close = snd_ymfpci_capture_close,
  960. .ioctl = snd_pcm_lib_ioctl,
  961. .hw_params = snd_ymfpci_capture_hw_params,
  962. .hw_free = snd_ymfpci_capture_hw_free,
  963. .prepare = snd_ymfpci_capture_prepare,
  964. .trigger = snd_ymfpci_capture_trigger,
  965. .pointer = snd_ymfpci_capture_pointer,
  966. };
  967. int __devinit snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  968. {
  969. struct snd_pcm *pcm;
  970. int err;
  971. if (rpcm)
  972. *rpcm = NULL;
  973. if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
  974. return err;
  975. pcm->private_data = chip;
  976. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
  977. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
  978. /* global setup */
  979. pcm->info_flags = 0;
  980. strcpy(pcm->name, "YMFPCI");
  981. chip->pcm = pcm;
  982. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  983. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  984. if (rpcm)
  985. *rpcm = pcm;
  986. return 0;
  987. }
  988. static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
  989. .open = snd_ymfpci_capture_ac97_open,
  990. .close = snd_ymfpci_capture_close,
  991. .ioctl = snd_pcm_lib_ioctl,
  992. .hw_params = snd_ymfpci_capture_hw_params,
  993. .hw_free = snd_ymfpci_capture_hw_free,
  994. .prepare = snd_ymfpci_capture_prepare,
  995. .trigger = snd_ymfpci_capture_trigger,
  996. .pointer = snd_ymfpci_capture_pointer,
  997. };
  998. int __devinit snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  999. {
  1000. struct snd_pcm *pcm;
  1001. int err;
  1002. if (rpcm)
  1003. *rpcm = NULL;
  1004. if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
  1005. return err;
  1006. pcm->private_data = chip;
  1007. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
  1008. /* global setup */
  1009. pcm->info_flags = 0;
  1010. sprintf(pcm->name, "YMFPCI - %s",
  1011. chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
  1012. chip->pcm2 = pcm;
  1013. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1014. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1015. if (rpcm)
  1016. *rpcm = pcm;
  1017. return 0;
  1018. }
  1019. static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
  1020. .open = snd_ymfpci_playback_spdif_open,
  1021. .close = snd_ymfpci_playback_spdif_close,
  1022. .ioctl = snd_pcm_lib_ioctl,
  1023. .hw_params = snd_ymfpci_playback_hw_params,
  1024. .hw_free = snd_ymfpci_playback_hw_free,
  1025. .prepare = snd_ymfpci_playback_prepare,
  1026. .trigger = snd_ymfpci_playback_trigger,
  1027. .pointer = snd_ymfpci_playback_pointer,
  1028. };
  1029. int __devinit snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1030. {
  1031. struct snd_pcm *pcm;
  1032. int err;
  1033. if (rpcm)
  1034. *rpcm = NULL;
  1035. if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
  1036. return err;
  1037. pcm->private_data = chip;
  1038. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
  1039. /* global setup */
  1040. pcm->info_flags = 0;
  1041. strcpy(pcm->name, "YMFPCI - IEC958");
  1042. chip->pcm_spdif = pcm;
  1043. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1044. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1045. if (rpcm)
  1046. *rpcm = pcm;
  1047. return 0;
  1048. }
  1049. static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
  1050. .open = snd_ymfpci_playback_4ch_open,
  1051. .close = snd_ymfpci_playback_4ch_close,
  1052. .ioctl = snd_pcm_lib_ioctl,
  1053. .hw_params = snd_ymfpci_playback_hw_params,
  1054. .hw_free = snd_ymfpci_playback_hw_free,
  1055. .prepare = snd_ymfpci_playback_prepare,
  1056. .trigger = snd_ymfpci_playback_trigger,
  1057. .pointer = snd_ymfpci_playback_pointer,
  1058. };
  1059. int __devinit snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1060. {
  1061. struct snd_pcm *pcm;
  1062. int err;
  1063. if (rpcm)
  1064. *rpcm = NULL;
  1065. if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
  1066. return err;
  1067. pcm->private_data = chip;
  1068. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
  1069. /* global setup */
  1070. pcm->info_flags = 0;
  1071. strcpy(pcm->name, "YMFPCI - Rear PCM");
  1072. chip->pcm_4ch = pcm;
  1073. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1074. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1075. if (rpcm)
  1076. *rpcm = pcm;
  1077. return 0;
  1078. }
  1079. static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1080. {
  1081. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1082. uinfo->count = 1;
  1083. return 0;
  1084. }
  1085. static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
  1086. struct snd_ctl_elem_value *ucontrol)
  1087. {
  1088. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1089. spin_lock_irq(&chip->reg_lock);
  1090. ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
  1091. ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
  1092. spin_unlock_irq(&chip->reg_lock);
  1093. return 0;
  1094. }
  1095. static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
  1096. struct snd_ctl_elem_value *ucontrol)
  1097. {
  1098. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1099. unsigned int val;
  1100. int change;
  1101. val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
  1102. (ucontrol->value.iec958.status[1] << 8);
  1103. spin_lock_irq(&chip->reg_lock);
  1104. change = chip->spdif_bits != val;
  1105. chip->spdif_bits = val;
  1106. if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
  1107. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  1108. spin_unlock_irq(&chip->reg_lock);
  1109. return change;
  1110. }
  1111. static struct snd_kcontrol_new snd_ymfpci_spdif_default __devinitdata =
  1112. {
  1113. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1114. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1115. .info = snd_ymfpci_spdif_default_info,
  1116. .get = snd_ymfpci_spdif_default_get,
  1117. .put = snd_ymfpci_spdif_default_put
  1118. };
  1119. static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1120. {
  1121. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1122. uinfo->count = 1;
  1123. return 0;
  1124. }
  1125. static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
  1126. struct snd_ctl_elem_value *ucontrol)
  1127. {
  1128. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1129. spin_lock_irq(&chip->reg_lock);
  1130. ucontrol->value.iec958.status[0] = 0x3e;
  1131. ucontrol->value.iec958.status[1] = 0xff;
  1132. spin_unlock_irq(&chip->reg_lock);
  1133. return 0;
  1134. }
  1135. static struct snd_kcontrol_new snd_ymfpci_spdif_mask __devinitdata =
  1136. {
  1137. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1138. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1139. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1140. .info = snd_ymfpci_spdif_mask_info,
  1141. .get = snd_ymfpci_spdif_mask_get,
  1142. };
  1143. static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1144. {
  1145. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1146. uinfo->count = 1;
  1147. return 0;
  1148. }
  1149. static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
  1150. struct snd_ctl_elem_value *ucontrol)
  1151. {
  1152. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1153. spin_lock_irq(&chip->reg_lock);
  1154. ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
  1155. ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
  1156. spin_unlock_irq(&chip->reg_lock);
  1157. return 0;
  1158. }
  1159. static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
  1160. struct snd_ctl_elem_value *ucontrol)
  1161. {
  1162. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1163. unsigned int val;
  1164. int change;
  1165. val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
  1166. (ucontrol->value.iec958.status[1] << 8);
  1167. spin_lock_irq(&chip->reg_lock);
  1168. change = chip->spdif_pcm_bits != val;
  1169. chip->spdif_pcm_bits = val;
  1170. if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
  1171. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
  1172. spin_unlock_irq(&chip->reg_lock);
  1173. return change;
  1174. }
  1175. static struct snd_kcontrol_new snd_ymfpci_spdif_stream __devinitdata =
  1176. {
  1177. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
  1178. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1179. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
  1180. .info = snd_ymfpci_spdif_stream_info,
  1181. .get = snd_ymfpci_spdif_stream_get,
  1182. .put = snd_ymfpci_spdif_stream_put
  1183. };
  1184. static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
  1185. {
  1186. static char *texts[3] = {"AC'97", "IEC958", "ZV Port"};
  1187. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1188. info->count = 1;
  1189. info->value.enumerated.items = 3;
  1190. if (info->value.enumerated.item > 2)
  1191. info->value.enumerated.item = 2;
  1192. strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
  1193. return 0;
  1194. }
  1195. static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
  1196. {
  1197. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1198. u16 reg;
  1199. spin_lock_irq(&chip->reg_lock);
  1200. reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1201. spin_unlock_irq(&chip->reg_lock);
  1202. if (!(reg & 0x100))
  1203. value->value.enumerated.item[0] = 0;
  1204. else
  1205. value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
  1206. return 0;
  1207. }
  1208. static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
  1209. {
  1210. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1211. u16 reg, old_reg;
  1212. spin_lock_irq(&chip->reg_lock);
  1213. old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1214. if (value->value.enumerated.item[0] == 0)
  1215. reg = old_reg & ~0x100;
  1216. else
  1217. reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
  1218. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
  1219. spin_unlock_irq(&chip->reg_lock);
  1220. return reg != old_reg;
  1221. }
  1222. static struct snd_kcontrol_new snd_ymfpci_drec_source __devinitdata = {
  1223. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
  1224. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1225. .name = "Direct Recording Source",
  1226. .info = snd_ymfpci_drec_source_info,
  1227. .get = snd_ymfpci_drec_source_get,
  1228. .put = snd_ymfpci_drec_source_put
  1229. };
  1230. /*
  1231. * Mixer controls
  1232. */
  1233. #define YMFPCI_SINGLE(xname, xindex, reg, shift) \
  1234. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1235. .info = snd_ymfpci_info_single, \
  1236. .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
  1237. .private_value = ((reg) | ((shift) << 16)) }
  1238. static int snd_ymfpci_info_single(struct snd_kcontrol *kcontrol,
  1239. struct snd_ctl_elem_info *uinfo)
  1240. {
  1241. int reg = kcontrol->private_value & 0xffff;
  1242. switch (reg) {
  1243. case YDSXGR_SPDIFOUTCTRL: break;
  1244. case YDSXGR_SPDIFINCTRL: break;
  1245. default: return -EINVAL;
  1246. }
  1247. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1248. uinfo->count = 1;
  1249. uinfo->value.integer.min = 0;
  1250. uinfo->value.integer.max = 1;
  1251. return 0;
  1252. }
  1253. static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
  1254. struct snd_ctl_elem_value *ucontrol)
  1255. {
  1256. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1257. int reg = kcontrol->private_value & 0xffff;
  1258. unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
  1259. unsigned int mask = 1;
  1260. switch (reg) {
  1261. case YDSXGR_SPDIFOUTCTRL: break;
  1262. case YDSXGR_SPDIFINCTRL: break;
  1263. default: return -EINVAL;
  1264. }
  1265. ucontrol->value.integer.value[0] =
  1266. (snd_ymfpci_readl(chip, reg) >> shift) & mask;
  1267. return 0;
  1268. }
  1269. static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
  1270. struct snd_ctl_elem_value *ucontrol)
  1271. {
  1272. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1273. int reg = kcontrol->private_value & 0xffff;
  1274. unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
  1275. unsigned int mask = 1;
  1276. int change;
  1277. unsigned int val, oval;
  1278. switch (reg) {
  1279. case YDSXGR_SPDIFOUTCTRL: break;
  1280. case YDSXGR_SPDIFINCTRL: break;
  1281. default: return -EINVAL;
  1282. }
  1283. val = (ucontrol->value.integer.value[0] & mask);
  1284. val <<= shift;
  1285. spin_lock_irq(&chip->reg_lock);
  1286. oval = snd_ymfpci_readl(chip, reg);
  1287. val = (oval & ~(mask << shift)) | val;
  1288. change = val != oval;
  1289. snd_ymfpci_writel(chip, reg, val);
  1290. spin_unlock_irq(&chip->reg_lock);
  1291. return change;
  1292. }
  1293. #define YMFPCI_DOUBLE(xname, xindex, reg) \
  1294. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1295. .info = snd_ymfpci_info_double, \
  1296. .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
  1297. .private_value = reg }
  1298. static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1299. {
  1300. unsigned int reg = kcontrol->private_value;
  1301. if (reg < 0x80 || reg >= 0xc0)
  1302. return -EINVAL;
  1303. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1304. uinfo->count = 2;
  1305. uinfo->value.integer.min = 0;
  1306. uinfo->value.integer.max = 16383;
  1307. return 0;
  1308. }
  1309. static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1310. {
  1311. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1312. unsigned int reg = kcontrol->private_value;
  1313. unsigned int shift_left = 0, shift_right = 16, mask = 16383;
  1314. unsigned int val;
  1315. if (reg < 0x80 || reg >= 0xc0)
  1316. return -EINVAL;
  1317. spin_lock_irq(&chip->reg_lock);
  1318. val = snd_ymfpci_readl(chip, reg);
  1319. spin_unlock_irq(&chip->reg_lock);
  1320. ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
  1321. ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
  1322. return 0;
  1323. }
  1324. static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1325. {
  1326. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1327. unsigned int reg = kcontrol->private_value;
  1328. unsigned int shift_left = 0, shift_right = 16, mask = 16383;
  1329. int change;
  1330. unsigned int val1, val2, oval;
  1331. if (reg < 0x80 || reg >= 0xc0)
  1332. return -EINVAL;
  1333. val1 = ucontrol->value.integer.value[0] & mask;
  1334. val2 = ucontrol->value.integer.value[1] & mask;
  1335. val1 <<= shift_left;
  1336. val2 <<= shift_right;
  1337. spin_lock_irq(&chip->reg_lock);
  1338. oval = snd_ymfpci_readl(chip, reg);
  1339. val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
  1340. change = val1 != oval;
  1341. snd_ymfpci_writel(chip, reg, val1);
  1342. spin_unlock_irq(&chip->reg_lock);
  1343. return change;
  1344. }
  1345. /*
  1346. * 4ch duplication
  1347. */
  1348. static int snd_ymfpci_info_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1349. {
  1350. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1351. uinfo->count = 1;
  1352. uinfo->value.integer.min = 0;
  1353. uinfo->value.integer.max = 1;
  1354. return 0;
  1355. }
  1356. static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1357. {
  1358. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1359. ucontrol->value.integer.value[0] = chip->mode_dup4ch;
  1360. return 0;
  1361. }
  1362. static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1363. {
  1364. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1365. int change;
  1366. change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
  1367. if (change)
  1368. chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
  1369. return change;
  1370. }
  1371. static struct snd_kcontrol_new snd_ymfpci_controls[] __devinitdata = {
  1372. YMFPCI_DOUBLE("Wave Playback Volume", 0, YDSXGR_NATIVEDACOUTVOL),
  1373. YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
  1374. YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
  1375. YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
  1376. YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
  1377. YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
  1378. YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
  1379. YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
  1380. YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL),
  1381. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
  1382. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
  1383. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
  1384. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
  1385. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
  1386. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
  1387. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
  1388. {
  1389. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1390. .name = "4ch Duplication",
  1391. .info = snd_ymfpci_info_dup4ch,
  1392. .get = snd_ymfpci_get_dup4ch,
  1393. .put = snd_ymfpci_put_dup4ch,
  1394. },
  1395. };
  1396. /*
  1397. * GPIO
  1398. */
  1399. static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
  1400. {
  1401. u16 reg, mode;
  1402. unsigned long flags;
  1403. spin_lock_irqsave(&chip->reg_lock, flags);
  1404. reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
  1405. reg &= ~(1 << (pin + 8));
  1406. reg |= (1 << pin);
  1407. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
  1408. /* set the level mode for input line */
  1409. mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
  1410. mode &= ~(3 << (pin * 2));
  1411. snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
  1412. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
  1413. mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
  1414. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1415. return (mode >> pin) & 1;
  1416. }
  1417. static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
  1418. {
  1419. u16 reg;
  1420. unsigned long flags;
  1421. spin_lock_irqsave(&chip->reg_lock, flags);
  1422. reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
  1423. reg &= ~(1 << pin);
  1424. reg &= ~(1 << (pin + 8));
  1425. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
  1426. snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
  1427. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
  1428. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1429. return 0;
  1430. }
  1431. static int snd_ymfpci_gpio_sw_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1432. {
  1433. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1434. uinfo->count = 1;
  1435. uinfo->value.integer.min = 0;
  1436. uinfo->value.integer.max = 1;
  1437. return 0;
  1438. }
  1439. static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1440. {
  1441. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1442. int pin = (int)kcontrol->private_value;
  1443. ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
  1444. return 0;
  1445. }
  1446. static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1447. {
  1448. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1449. int pin = (int)kcontrol->private_value;
  1450. if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
  1451. snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
  1452. ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
  1453. return 1;
  1454. }
  1455. return 0;
  1456. }
  1457. static struct snd_kcontrol_new snd_ymfpci_rear_shared __devinitdata = {
  1458. .name = "Shared Rear/Line-In Switch",
  1459. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1460. .info = snd_ymfpci_gpio_sw_info,
  1461. .get = snd_ymfpci_gpio_sw_get,
  1462. .put = snd_ymfpci_gpio_sw_put,
  1463. .private_value = 2,
  1464. };
  1465. /*
  1466. * PCM voice volume
  1467. */
  1468. static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
  1469. struct snd_ctl_elem_info *uinfo)
  1470. {
  1471. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1472. uinfo->count = 2;
  1473. uinfo->value.integer.min = 0;
  1474. uinfo->value.integer.max = 0x8000;
  1475. return 0;
  1476. }
  1477. static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
  1478. struct snd_ctl_elem_value *ucontrol)
  1479. {
  1480. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1481. unsigned int subs = kcontrol->id.subdevice;
  1482. ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
  1483. ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
  1484. return 0;
  1485. }
  1486. static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
  1487. struct snd_ctl_elem_value *ucontrol)
  1488. {
  1489. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1490. unsigned int subs = kcontrol->id.subdevice;
  1491. struct snd_pcm_substream *substream;
  1492. unsigned long flags;
  1493. if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
  1494. ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
  1495. chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
  1496. chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
  1497. substream = (struct snd_pcm_substream *)kcontrol->private_value;
  1498. spin_lock_irqsave(&chip->voice_lock, flags);
  1499. if (substream->runtime && substream->runtime->private_data) {
  1500. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  1501. ypcm->update_pcm_vol = 2;
  1502. }
  1503. spin_unlock_irqrestore(&chip->voice_lock, flags);
  1504. return 1;
  1505. }
  1506. return 0;
  1507. }
  1508. static struct snd_kcontrol_new snd_ymfpci_pcm_volume __devinitdata = {
  1509. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1510. .name = "PCM Playback Volume",
  1511. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1512. SNDRV_CTL_ELEM_ACCESS_INACTIVE,
  1513. .info = snd_ymfpci_pcm_vol_info,
  1514. .get = snd_ymfpci_pcm_vol_get,
  1515. .put = snd_ymfpci_pcm_vol_put,
  1516. };
  1517. /*
  1518. * Mixer routines
  1519. */
  1520. static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
  1521. {
  1522. struct snd_ymfpci *chip = bus->private_data;
  1523. chip->ac97_bus = NULL;
  1524. }
  1525. static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
  1526. {
  1527. struct snd_ymfpci *chip = ac97->private_data;
  1528. chip->ac97 = NULL;
  1529. }
  1530. int __devinit snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
  1531. {
  1532. struct snd_ac97_template ac97;
  1533. struct snd_kcontrol *kctl;
  1534. struct snd_pcm_substream *substream;
  1535. unsigned int idx;
  1536. int err;
  1537. static struct snd_ac97_bus_ops ops = {
  1538. .write = snd_ymfpci_codec_write,
  1539. .read = snd_ymfpci_codec_read,
  1540. };
  1541. if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
  1542. return err;
  1543. chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
  1544. chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
  1545. memset(&ac97, 0, sizeof(ac97));
  1546. ac97.private_data = chip;
  1547. ac97.private_free = snd_ymfpci_mixer_free_ac97;
  1548. if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
  1549. return err;
  1550. /* to be sure */
  1551. snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
  1552. AC97_EA_VRA|AC97_EA_VRM, 0);
  1553. for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
  1554. if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
  1555. return err;
  1556. }
  1557. /* add S/PDIF control */
  1558. snd_assert(chip->pcm_spdif != NULL, return -EIO);
  1559. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
  1560. return err;
  1561. kctl->id.device = chip->pcm_spdif->device;
  1562. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
  1563. return err;
  1564. kctl->id.device = chip->pcm_spdif->device;
  1565. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
  1566. return err;
  1567. kctl->id.device = chip->pcm_spdif->device;
  1568. chip->spdif_pcm_ctl = kctl;
  1569. /* direct recording source */
  1570. if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
  1571. (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
  1572. return err;
  1573. /*
  1574. * shared rear/line-in
  1575. */
  1576. if (rear_switch) {
  1577. if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
  1578. return err;
  1579. }
  1580. /* per-voice volume */
  1581. substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
  1582. for (idx = 0; idx < 32; ++idx) {
  1583. kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
  1584. if (!kctl)
  1585. return -ENOMEM;
  1586. kctl->id.device = chip->pcm->device;
  1587. kctl->id.subdevice = idx;
  1588. kctl->private_value = (unsigned long)substream;
  1589. if ((err = snd_ctl_add(chip->card, kctl)) < 0)
  1590. return err;
  1591. chip->pcm_mixer[idx].left = 0x8000;
  1592. chip->pcm_mixer[idx].right = 0x8000;
  1593. chip->pcm_mixer[idx].ctl = kctl;
  1594. substream = substream->next;
  1595. }
  1596. return 0;
  1597. }
  1598. /*
  1599. * timer
  1600. */
  1601. static int snd_ymfpci_timer_start(struct snd_timer *timer)
  1602. {
  1603. struct snd_ymfpci *chip;
  1604. unsigned long flags;
  1605. unsigned int count;
  1606. chip = snd_timer_chip(timer);
  1607. count = (timer->sticks << 1) - 1;
  1608. spin_lock_irqsave(&chip->reg_lock, flags);
  1609. snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
  1610. snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
  1611. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1612. return 0;
  1613. }
  1614. static int snd_ymfpci_timer_stop(struct snd_timer *timer)
  1615. {
  1616. struct snd_ymfpci *chip;
  1617. unsigned long flags;
  1618. chip = snd_timer_chip(timer);
  1619. spin_lock_irqsave(&chip->reg_lock, flags);
  1620. snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
  1621. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1622. return 0;
  1623. }
  1624. static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
  1625. unsigned long *num, unsigned long *den)
  1626. {
  1627. *num = 1;
  1628. *den = 48000;
  1629. return 0;
  1630. }
  1631. static struct snd_timer_hardware snd_ymfpci_timer_hw = {
  1632. .flags = SNDRV_TIMER_HW_AUTO,
  1633. .resolution = 20833, /* 1/fs = 20.8333...us */
  1634. .ticks = 0x8000,
  1635. .start = snd_ymfpci_timer_start,
  1636. .stop = snd_ymfpci_timer_stop,
  1637. .precise_resolution = snd_ymfpci_timer_precise_resolution,
  1638. };
  1639. int __devinit snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
  1640. {
  1641. struct snd_timer *timer = NULL;
  1642. struct snd_timer_id tid;
  1643. int err;
  1644. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  1645. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  1646. tid.card = chip->card->number;
  1647. tid.device = device;
  1648. tid.subdevice = 0;
  1649. if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
  1650. strcpy(timer->name, "YMFPCI timer");
  1651. timer->private_data = chip;
  1652. timer->hw = snd_ymfpci_timer_hw;
  1653. }
  1654. chip->timer = timer;
  1655. return err;
  1656. }
  1657. /*
  1658. * proc interface
  1659. */
  1660. static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
  1661. struct snd_info_buffer *buffer)
  1662. {
  1663. struct snd_ymfpci *chip = entry->private_data;
  1664. int i;
  1665. snd_iprintf(buffer, "YMFPCI\n\n");
  1666. for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
  1667. snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
  1668. }
  1669. static int __devinit snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
  1670. {
  1671. struct snd_info_entry *entry;
  1672. if (! snd_card_proc_new(card, "ymfpci", &entry))
  1673. snd_info_set_text_ops(entry, chip, 1024, snd_ymfpci_proc_read);
  1674. return 0;
  1675. }
  1676. /*
  1677. * initialization routines
  1678. */
  1679. static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
  1680. {
  1681. u8 cmd;
  1682. pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
  1683. #if 0 // force to reset
  1684. if (cmd & 0x03) {
  1685. #endif
  1686. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
  1687. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
  1688. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
  1689. pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
  1690. pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
  1691. #if 0
  1692. }
  1693. #endif
  1694. }
  1695. static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
  1696. {
  1697. snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
  1698. }
  1699. static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
  1700. {
  1701. u32 val;
  1702. int timeout = 1000;
  1703. val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
  1704. if (val)
  1705. snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
  1706. while (timeout-- > 0) {
  1707. val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
  1708. if ((val & 0x00000002) == 0)
  1709. break;
  1710. }
  1711. }
  1712. #include "ymfpci_image.h"
  1713. static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
  1714. {
  1715. int i;
  1716. u16 ctrl;
  1717. unsigned long *inst;
  1718. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
  1719. snd_ymfpci_disable_dsp(chip);
  1720. snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
  1721. snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
  1722. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
  1723. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
  1724. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
  1725. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
  1726. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
  1727. ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1728. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
  1729. /* setup DSP instruction code */
  1730. for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
  1731. snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), DspInst[i]);
  1732. /* setup control instruction code */
  1733. switch (chip->device_id) {
  1734. case PCI_DEVICE_ID_YAMAHA_724F:
  1735. case PCI_DEVICE_ID_YAMAHA_740C:
  1736. case PCI_DEVICE_ID_YAMAHA_744:
  1737. case PCI_DEVICE_ID_YAMAHA_754:
  1738. inst = CntrlInst1E;
  1739. break;
  1740. default:
  1741. inst = CntrlInst;
  1742. break;
  1743. }
  1744. for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
  1745. snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]);
  1746. snd_ymfpci_enable_dsp(chip);
  1747. }
  1748. static int __devinit snd_ymfpci_memalloc(struct snd_ymfpci *chip)
  1749. {
  1750. long size, playback_ctrl_size;
  1751. int voice, bank, reg;
  1752. u8 *ptr;
  1753. dma_addr_t ptr_addr;
  1754. playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
  1755. chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
  1756. chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
  1757. chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
  1758. chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
  1759. size = ((playback_ctrl_size + 0x00ff) & ~0x00ff) +
  1760. ((chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES + 0x00ff) & ~0x00ff) +
  1761. ((chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES + 0x00ff) & ~0x00ff) +
  1762. ((chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES + 0x00ff) & ~0x00ff) +
  1763. chip->work_size;
  1764. /* work_ptr must be aligned to 256 bytes, but it's already
  1765. covered with the kernel page allocation mechanism */
  1766. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
  1767. size, &chip->work_ptr) < 0)
  1768. return -ENOMEM;
  1769. ptr = chip->work_ptr.area;
  1770. ptr_addr = chip->work_ptr.addr;
  1771. memset(ptr, 0, size); /* for sure */
  1772. chip->bank_base_playback = ptr;
  1773. chip->bank_base_playback_addr = ptr_addr;
  1774. chip->ctrl_playback = (u32 *)ptr;
  1775. chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
  1776. ptr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
  1777. ptr_addr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
  1778. for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
  1779. chip->voices[voice].number = voice;
  1780. chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
  1781. chip->voices[voice].bank_addr = ptr_addr;
  1782. for (bank = 0; bank < 2; bank++) {
  1783. chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
  1784. ptr += chip->bank_size_playback;
  1785. ptr_addr += chip->bank_size_playback;
  1786. }
  1787. }
  1788. ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
  1789. ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
  1790. chip->bank_base_capture = ptr;
  1791. chip->bank_base_capture_addr = ptr_addr;
  1792. for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
  1793. for (bank = 0; bank < 2; bank++) {
  1794. chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
  1795. ptr += chip->bank_size_capture;
  1796. ptr_addr += chip->bank_size_capture;
  1797. }
  1798. ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
  1799. ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
  1800. chip->bank_base_effect = ptr;
  1801. chip->bank_base_effect_addr = ptr_addr;
  1802. for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
  1803. for (bank = 0; bank < 2; bank++) {
  1804. chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
  1805. ptr += chip->bank_size_effect;
  1806. ptr_addr += chip->bank_size_effect;
  1807. }
  1808. ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
  1809. ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
  1810. chip->work_base = ptr;
  1811. chip->work_base_addr = ptr_addr;
  1812. snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, );
  1813. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
  1814. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
  1815. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
  1816. snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
  1817. snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
  1818. /* S/PDIF output initialization */
  1819. chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
  1820. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
  1821. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  1822. /* S/PDIF input initialization */
  1823. snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
  1824. /* digital mixer setup */
  1825. for (reg = 0x80; reg < 0xc0; reg += 4)
  1826. snd_ymfpci_writel(chip, reg, 0);
  1827. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
  1828. snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
  1829. snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
  1830. snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
  1831. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
  1832. snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
  1833. snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
  1834. return 0;
  1835. }
  1836. static int snd_ymfpci_free(struct snd_ymfpci *chip)
  1837. {
  1838. u16 ctrl;
  1839. snd_assert(chip != NULL, return -EINVAL);
  1840. if (chip->res_reg_area) { /* don't touch busy hardware */
  1841. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
  1842. snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
  1843. snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
  1844. snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
  1845. snd_ymfpci_disable_dsp(chip);
  1846. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
  1847. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
  1848. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
  1849. snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
  1850. snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
  1851. ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1852. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
  1853. }
  1854. snd_ymfpci_ac3_done(chip);
  1855. /* Set PCI device to D3 state */
  1856. #if 0
  1857. /* FIXME: temporarily disabled, otherwise we cannot fire up
  1858. * the chip again unless reboot. ACPI bug?
  1859. */
  1860. pci_set_power_state(chip->pci, 3);
  1861. #endif
  1862. #ifdef CONFIG_PM
  1863. vfree(chip->saved_regs);
  1864. #endif
  1865. release_and_free_resource(chip->mpu_res);
  1866. release_and_free_resource(chip->fm_res);
  1867. snd_ymfpci_free_gameport(chip);
  1868. if (chip->reg_area_virt)
  1869. iounmap(chip->reg_area_virt);
  1870. if (chip->work_ptr.area)
  1871. snd_dma_free_pages(&chip->work_ptr);
  1872. if (chip->irq >= 0)
  1873. free_irq(chip->irq, (void *)chip);
  1874. release_and_free_resource(chip->res_reg_area);
  1875. pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
  1876. pci_disable_device(chip->pci);
  1877. kfree(chip);
  1878. return 0;
  1879. }
  1880. static int snd_ymfpci_dev_free(struct snd_device *device)
  1881. {
  1882. struct snd_ymfpci *chip = device->device_data;
  1883. return snd_ymfpci_free(chip);
  1884. }
  1885. #ifdef CONFIG_PM
  1886. static int saved_regs_index[] = {
  1887. /* spdif */
  1888. YDSXGR_SPDIFOUTCTRL,
  1889. YDSXGR_SPDIFOUTSTATUS,
  1890. YDSXGR_SPDIFINCTRL,
  1891. /* volumes */
  1892. YDSXGR_PRIADCLOOPVOL,
  1893. YDSXGR_NATIVEDACINVOL,
  1894. YDSXGR_NATIVEDACOUTVOL,
  1895. // YDSXGR_BUF441OUTVOL,
  1896. YDSXGR_NATIVEADCINVOL,
  1897. YDSXGR_SPDIFLOOPVOL,
  1898. YDSXGR_SPDIFOUTVOL,
  1899. YDSXGR_ZVOUTVOL,
  1900. YDSXGR_LEGACYOUTVOL,
  1901. /* address bases */
  1902. YDSXGR_PLAYCTRLBASE,
  1903. YDSXGR_RECCTRLBASE,
  1904. YDSXGR_EFFCTRLBASE,
  1905. YDSXGR_WORKBASE,
  1906. /* capture set up */
  1907. YDSXGR_MAPOFREC,
  1908. YDSXGR_RECFORMAT,
  1909. YDSXGR_RECSLOTSR,
  1910. YDSXGR_ADCFORMAT,
  1911. YDSXGR_ADCSLOTSR,
  1912. };
  1913. #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
  1914. int snd_ymfpci_suspend(struct pci_dev *pci, pm_message_t state)
  1915. {
  1916. struct snd_card *card = pci_get_drvdata(pci);
  1917. struct snd_ymfpci *chip = card->private_data;
  1918. unsigned int i;
  1919. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  1920. snd_pcm_suspend_all(chip->pcm);
  1921. snd_pcm_suspend_all(chip->pcm2);
  1922. snd_pcm_suspend_all(chip->pcm_spdif);
  1923. snd_pcm_suspend_all(chip->pcm_4ch);
  1924. snd_ac97_suspend(chip->ac97);
  1925. for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
  1926. chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
  1927. chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
  1928. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
  1929. snd_ymfpci_disable_dsp(chip);
  1930. pci_disable_device(pci);
  1931. pci_save_state(pci);
  1932. return 0;
  1933. }
  1934. int snd_ymfpci_resume(struct pci_dev *pci)
  1935. {
  1936. struct snd_card *card = pci_get_drvdata(pci);
  1937. struct snd_ymfpci *chip = card->private_data;
  1938. unsigned int i;
  1939. pci_restore_state(pci);
  1940. pci_enable_device(pci);
  1941. pci_set_master(pci);
  1942. snd_ymfpci_aclink_reset(pci);
  1943. snd_ymfpci_codec_ready(chip, 0);
  1944. snd_ymfpci_download_image(chip);
  1945. udelay(100);
  1946. for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
  1947. snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
  1948. snd_ac97_resume(chip->ac97);
  1949. /* start hw again */
  1950. if (chip->start_count > 0) {
  1951. spin_lock_irq(&chip->reg_lock);
  1952. snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
  1953. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
  1954. spin_unlock_irq(&chip->reg_lock);
  1955. }
  1956. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  1957. return 0;
  1958. }
  1959. #endif /* CONFIG_PM */
  1960. int __devinit snd_ymfpci_create(struct snd_card *card,
  1961. struct pci_dev * pci,
  1962. unsigned short old_legacy_ctrl,
  1963. struct snd_ymfpci ** rchip)
  1964. {
  1965. struct snd_ymfpci *chip;
  1966. int err;
  1967. static struct snd_device_ops ops = {
  1968. .dev_free = snd_ymfpci_dev_free,
  1969. };
  1970. *rchip = NULL;
  1971. /* enable PCI device */
  1972. if ((err = pci_enable_device(pci)) < 0)
  1973. return err;
  1974. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  1975. if (chip == NULL) {
  1976. pci_disable_device(pci);
  1977. return -ENOMEM;
  1978. }
  1979. chip->old_legacy_ctrl = old_legacy_ctrl;
  1980. spin_lock_init(&chip->reg_lock);
  1981. spin_lock_init(&chip->voice_lock);
  1982. init_waitqueue_head(&chip->interrupt_sleep);
  1983. atomic_set(&chip->interrupt_sleep_count, 0);
  1984. chip->card = card;
  1985. chip->pci = pci;
  1986. chip->irq = -1;
  1987. chip->device_id = pci->device;
  1988. pci_read_config_byte(pci, PCI_REVISION_ID, (u8 *)&chip->rev);
  1989. chip->reg_area_phys = pci_resource_start(pci, 0);
  1990. chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
  1991. pci_set_master(pci);
  1992. if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
  1993. snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
  1994. snd_ymfpci_free(chip);
  1995. return -EBUSY;
  1996. }
  1997. if (request_irq(pci->irq, snd_ymfpci_interrupt, SA_INTERRUPT|SA_SHIRQ, "YMFPCI", (void *) chip)) {
  1998. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  1999. snd_ymfpci_free(chip);
  2000. return -EBUSY;
  2001. }
  2002. chip->irq = pci->irq;
  2003. snd_ymfpci_aclink_reset(pci);
  2004. if (snd_ymfpci_codec_ready(chip, 0) < 0) {
  2005. snd_ymfpci_free(chip);
  2006. return -EIO;
  2007. }
  2008. snd_ymfpci_download_image(chip);
  2009. udelay(100); /* seems we need a delay after downloading image.. */
  2010. if (snd_ymfpci_memalloc(chip) < 0) {
  2011. snd_ymfpci_free(chip);
  2012. return -EIO;
  2013. }
  2014. if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
  2015. snd_ymfpci_free(chip);
  2016. return err;
  2017. }
  2018. #ifdef CONFIG_PM
  2019. chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
  2020. if (chip->saved_regs == NULL) {
  2021. snd_ymfpci_free(chip);
  2022. return -ENOMEM;
  2023. }
  2024. #endif
  2025. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  2026. snd_ymfpci_free(chip);
  2027. return err;
  2028. }
  2029. snd_ymfpci_proc_init(card, chip);
  2030. snd_card_set_dev(card, &pci->dev);
  2031. *rchip = chip;
  2032. return 0;
  2033. }