ixgb_main.c 56 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "ixgb.h"
  21. /* Change Log
  22. * 1.0.96 04/19/05
  23. * - Make needlessly global code static -- bunk@stusta.de
  24. * - ethtool cleanup -- shemminger@osdl.org
  25. * - Support for MODULE_VERSION -- linville@tuxdriver.com
  26. * - add skb_header_cloned check to the tso path -- herbert@apana.org.au
  27. * 1.0.88 01/05/05
  28. * - include fix to the condition that determines when to quit NAPI - Robert Olsson
  29. * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down
  30. * 1.0.84 10/26/04
  31. * - reset buffer_info->dma in Tx resource cleanup logic
  32. * 1.0.83 10/12/04
  33. * - sparse cleanup - shemminger@osdl.org
  34. * - fix tx resource cleanup logic
  35. */
  36. char ixgb_driver_name[] = "ixgb";
  37. static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
  38. #ifndef CONFIG_IXGB_NAPI
  39. #define DRIVERNAPI
  40. #else
  41. #define DRIVERNAPI "-NAPI"
  42. #endif
  43. #define DRV_VERSION "1.0.100-k2"DRIVERNAPI
  44. char ixgb_driver_version[] = DRV_VERSION;
  45. static char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  46. /* ixgb_pci_tbl - PCI Device ID Table
  47. *
  48. * Wildcard entries (PCI_ANY_ID) should come last
  49. * Last entry must be all 0s
  50. *
  51. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  52. * Class, Class Mask, private data (not used) }
  53. */
  54. static struct pci_device_id ixgb_pci_tbl[] = {
  55. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
  56. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  57. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
  58. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  59. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
  60. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  61. /* required last entry */
  62. {0,}
  63. };
  64. MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
  65. /* Local Function Prototypes */
  66. int ixgb_up(struct ixgb_adapter *adapter);
  67. void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
  68. void ixgb_reset(struct ixgb_adapter *adapter);
  69. int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
  70. int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
  71. void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
  72. void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
  73. void ixgb_update_stats(struct ixgb_adapter *adapter);
  74. static int ixgb_init_module(void);
  75. static void ixgb_exit_module(void);
  76. static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  77. static void __devexit ixgb_remove(struct pci_dev *pdev);
  78. static int ixgb_sw_init(struct ixgb_adapter *adapter);
  79. static int ixgb_open(struct net_device *netdev);
  80. static int ixgb_close(struct net_device *netdev);
  81. static void ixgb_configure_tx(struct ixgb_adapter *adapter);
  82. static void ixgb_configure_rx(struct ixgb_adapter *adapter);
  83. static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
  84. static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
  85. static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
  86. static void ixgb_set_multi(struct net_device *netdev);
  87. static void ixgb_watchdog(unsigned long data);
  88. static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  89. static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
  90. static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
  91. static int ixgb_set_mac(struct net_device *netdev, void *p);
  92. static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
  93. static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
  94. #ifdef CONFIG_IXGB_NAPI
  95. static int ixgb_clean(struct net_device *netdev, int *budget);
  96. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
  97. int *work_done, int work_to_do);
  98. #else
  99. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
  100. #endif
  101. static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
  102. void ixgb_set_ethtool_ops(struct net_device *netdev);
  103. static void ixgb_tx_timeout(struct net_device *dev);
  104. static void ixgb_tx_timeout_task(struct net_device *dev);
  105. static void ixgb_vlan_rx_register(struct net_device *netdev,
  106. struct vlan_group *grp);
  107. static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  108. static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  109. static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
  110. #ifdef CONFIG_NET_POLL_CONTROLLER
  111. /* for netdump / net console */
  112. static void ixgb_netpoll(struct net_device *dev);
  113. #endif
  114. /* Exported from other modules */
  115. extern void ixgb_check_options(struct ixgb_adapter *adapter);
  116. static struct pci_driver ixgb_driver = {
  117. .name = ixgb_driver_name,
  118. .id_table = ixgb_pci_tbl,
  119. .probe = ixgb_probe,
  120. .remove = __devexit_p(ixgb_remove),
  121. };
  122. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  123. MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
  124. MODULE_LICENSE("GPL");
  125. MODULE_VERSION(DRV_VERSION);
  126. /* some defines for controlling descriptor fetches in h/w */
  127. #define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */
  128. #define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
  129. * this */
  130. #define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
  131. * is pushed this many descriptors
  132. * from head */
  133. /**
  134. * ixgb_init_module - Driver Registration Routine
  135. *
  136. * ixgb_init_module is the first routine called when the driver is
  137. * loaded. All it does is register with the PCI subsystem.
  138. **/
  139. static int __init
  140. ixgb_init_module(void)
  141. {
  142. printk(KERN_INFO "%s - version %s\n",
  143. ixgb_driver_string, ixgb_driver_version);
  144. printk(KERN_INFO "%s\n", ixgb_copyright);
  145. return pci_module_init(&ixgb_driver);
  146. }
  147. module_init(ixgb_init_module);
  148. /**
  149. * ixgb_exit_module - Driver Exit Cleanup Routine
  150. *
  151. * ixgb_exit_module is called just before the driver is removed
  152. * from memory.
  153. **/
  154. static void __exit
  155. ixgb_exit_module(void)
  156. {
  157. pci_unregister_driver(&ixgb_driver);
  158. }
  159. module_exit(ixgb_exit_module);
  160. /**
  161. * ixgb_irq_disable - Mask off interrupt generation on the NIC
  162. * @adapter: board private structure
  163. **/
  164. static inline void
  165. ixgb_irq_disable(struct ixgb_adapter *adapter)
  166. {
  167. atomic_inc(&adapter->irq_sem);
  168. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  169. IXGB_WRITE_FLUSH(&adapter->hw);
  170. synchronize_irq(adapter->pdev->irq);
  171. }
  172. /**
  173. * ixgb_irq_enable - Enable default interrupt generation settings
  174. * @adapter: board private structure
  175. **/
  176. static inline void
  177. ixgb_irq_enable(struct ixgb_adapter *adapter)
  178. {
  179. if(atomic_dec_and_test(&adapter->irq_sem)) {
  180. IXGB_WRITE_REG(&adapter->hw, IMS,
  181. IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
  182. IXGB_INT_LSC);
  183. IXGB_WRITE_FLUSH(&adapter->hw);
  184. }
  185. }
  186. int
  187. ixgb_up(struct ixgb_adapter *adapter)
  188. {
  189. struct net_device *netdev = adapter->netdev;
  190. int err;
  191. int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  192. struct ixgb_hw *hw = &adapter->hw;
  193. /* hardware has been reset, we need to reload some things */
  194. ixgb_set_multi(netdev);
  195. ixgb_restore_vlan(adapter);
  196. ixgb_configure_tx(adapter);
  197. ixgb_setup_rctl(adapter);
  198. ixgb_configure_rx(adapter);
  199. ixgb_alloc_rx_buffers(adapter);
  200. #ifdef CONFIG_PCI_MSI
  201. {
  202. boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
  203. IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
  204. adapter->have_msi = TRUE;
  205. if (!pcix)
  206. adapter->have_msi = FALSE;
  207. else if((err = pci_enable_msi(adapter->pdev))) {
  208. printk (KERN_ERR
  209. "Unable to allocate MSI interrupt Error: %d\n", err);
  210. adapter->have_msi = FALSE;
  211. /* proceed to try to request regular interrupt */
  212. }
  213. }
  214. #endif
  215. if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
  216. SA_SHIRQ | SA_SAMPLE_RANDOM,
  217. netdev->name, netdev)))
  218. return err;
  219. /* disable interrupts and get the hardware into a known state */
  220. IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
  221. if((hw->max_frame_size != max_frame) ||
  222. (hw->max_frame_size !=
  223. (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
  224. hw->max_frame_size = max_frame;
  225. IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
  226. if(hw->max_frame_size >
  227. IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
  228. uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
  229. if(!(ctrl0 & IXGB_CTRL0_JFE)) {
  230. ctrl0 |= IXGB_CTRL0_JFE;
  231. IXGB_WRITE_REG(hw, CTRL0, ctrl0);
  232. }
  233. }
  234. }
  235. mod_timer(&adapter->watchdog_timer, jiffies);
  236. ixgb_irq_enable(adapter);
  237. #ifdef CONFIG_IXGB_NAPI
  238. netif_poll_enable(netdev);
  239. #endif
  240. return 0;
  241. }
  242. void
  243. ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
  244. {
  245. struct net_device *netdev = adapter->netdev;
  246. ixgb_irq_disable(adapter);
  247. free_irq(adapter->pdev->irq, netdev);
  248. #ifdef CONFIG_PCI_MSI
  249. if(adapter->have_msi == TRUE)
  250. pci_disable_msi(adapter->pdev);
  251. #endif
  252. if(kill_watchdog)
  253. del_timer_sync(&adapter->watchdog_timer);
  254. #ifdef CONFIG_IXGB_NAPI
  255. netif_poll_disable(netdev);
  256. #endif
  257. adapter->link_speed = 0;
  258. adapter->link_duplex = 0;
  259. netif_carrier_off(netdev);
  260. netif_stop_queue(netdev);
  261. ixgb_reset(adapter);
  262. ixgb_clean_tx_ring(adapter);
  263. ixgb_clean_rx_ring(adapter);
  264. }
  265. void
  266. ixgb_reset(struct ixgb_adapter *adapter)
  267. {
  268. ixgb_adapter_stop(&adapter->hw);
  269. if(!ixgb_init_hw(&adapter->hw))
  270. IXGB_DBG("ixgb_init_hw failed.\n");
  271. }
  272. /**
  273. * ixgb_probe - Device Initialization Routine
  274. * @pdev: PCI device information struct
  275. * @ent: entry in ixgb_pci_tbl
  276. *
  277. * Returns 0 on success, negative on failure
  278. *
  279. * ixgb_probe initializes an adapter identified by a pci_dev structure.
  280. * The OS initialization, configuring of the adapter private structure,
  281. * and a hardware reset occur.
  282. **/
  283. static int __devinit
  284. ixgb_probe(struct pci_dev *pdev,
  285. const struct pci_device_id *ent)
  286. {
  287. struct net_device *netdev = NULL;
  288. struct ixgb_adapter *adapter;
  289. static int cards_found = 0;
  290. unsigned long mmio_start;
  291. int mmio_len;
  292. int pci_using_dac;
  293. int i;
  294. int err;
  295. if((err = pci_enable_device(pdev)))
  296. return err;
  297. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  298. pci_using_dac = 1;
  299. } else {
  300. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  301. IXGB_ERR("No usable DMA configuration, aborting\n");
  302. return err;
  303. }
  304. pci_using_dac = 0;
  305. }
  306. if((err = pci_request_regions(pdev, ixgb_driver_name)))
  307. return err;
  308. pci_set_master(pdev);
  309. netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
  310. if(!netdev) {
  311. err = -ENOMEM;
  312. goto err_alloc_etherdev;
  313. }
  314. SET_MODULE_OWNER(netdev);
  315. SET_NETDEV_DEV(netdev, &pdev->dev);
  316. pci_set_drvdata(pdev, netdev);
  317. adapter = netdev_priv(netdev);
  318. adapter->netdev = netdev;
  319. adapter->pdev = pdev;
  320. adapter->hw.back = adapter;
  321. mmio_start = pci_resource_start(pdev, BAR_0);
  322. mmio_len = pci_resource_len(pdev, BAR_0);
  323. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  324. if(!adapter->hw.hw_addr) {
  325. err = -EIO;
  326. goto err_ioremap;
  327. }
  328. for(i = BAR_1; i <= BAR_5; i++) {
  329. if(pci_resource_len(pdev, i) == 0)
  330. continue;
  331. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  332. adapter->hw.io_base = pci_resource_start(pdev, i);
  333. break;
  334. }
  335. }
  336. netdev->open = &ixgb_open;
  337. netdev->stop = &ixgb_close;
  338. netdev->hard_start_xmit = &ixgb_xmit_frame;
  339. netdev->get_stats = &ixgb_get_stats;
  340. netdev->set_multicast_list = &ixgb_set_multi;
  341. netdev->set_mac_address = &ixgb_set_mac;
  342. netdev->change_mtu = &ixgb_change_mtu;
  343. ixgb_set_ethtool_ops(netdev);
  344. netdev->tx_timeout = &ixgb_tx_timeout;
  345. netdev->watchdog_timeo = HZ;
  346. #ifdef CONFIG_IXGB_NAPI
  347. netdev->poll = &ixgb_clean;
  348. netdev->weight = 64;
  349. #endif
  350. netdev->vlan_rx_register = ixgb_vlan_rx_register;
  351. netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
  352. netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
  353. #ifdef CONFIG_NET_POLL_CONTROLLER
  354. netdev->poll_controller = ixgb_netpoll;
  355. #endif
  356. netdev->mem_start = mmio_start;
  357. netdev->mem_end = mmio_start + mmio_len;
  358. netdev->base_addr = adapter->hw.io_base;
  359. adapter->bd_number = cards_found;
  360. adapter->link_speed = 0;
  361. adapter->link_duplex = 0;
  362. /* setup the private structure */
  363. if((err = ixgb_sw_init(adapter)))
  364. goto err_sw_init;
  365. netdev->features = NETIF_F_SG |
  366. NETIF_F_HW_CSUM |
  367. NETIF_F_HW_VLAN_TX |
  368. NETIF_F_HW_VLAN_RX |
  369. NETIF_F_HW_VLAN_FILTER;
  370. #ifdef NETIF_F_TSO
  371. netdev->features |= NETIF_F_TSO;
  372. #endif
  373. if(pci_using_dac)
  374. netdev->features |= NETIF_F_HIGHDMA;
  375. /* make sure the EEPROM is good */
  376. if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
  377. printk(KERN_ERR "The EEPROM Checksum Is Not Valid\n");
  378. err = -EIO;
  379. goto err_eeprom;
  380. }
  381. ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
  382. memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
  383. if(!is_valid_ether_addr(netdev->perm_addr)) {
  384. err = -EIO;
  385. goto err_eeprom;
  386. }
  387. adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
  388. init_timer(&adapter->watchdog_timer);
  389. adapter->watchdog_timer.function = &ixgb_watchdog;
  390. adapter->watchdog_timer.data = (unsigned long)adapter;
  391. INIT_WORK(&adapter->tx_timeout_task,
  392. (void (*)(void *))ixgb_tx_timeout_task, netdev);
  393. if((err = register_netdev(netdev)))
  394. goto err_register;
  395. /* we're going to reset, so assume we have no link for now */
  396. netif_carrier_off(netdev);
  397. netif_stop_queue(netdev);
  398. printk(KERN_INFO "%s: Intel(R) PRO/10GbE Network Connection\n",
  399. netdev->name);
  400. ixgb_check_options(adapter);
  401. /* reset the hardware with the new settings */
  402. ixgb_reset(adapter);
  403. cards_found++;
  404. return 0;
  405. err_register:
  406. err_sw_init:
  407. err_eeprom:
  408. iounmap(adapter->hw.hw_addr);
  409. err_ioremap:
  410. free_netdev(netdev);
  411. err_alloc_etherdev:
  412. pci_release_regions(pdev);
  413. return err;
  414. }
  415. /**
  416. * ixgb_remove - Device Removal Routine
  417. * @pdev: PCI device information struct
  418. *
  419. * ixgb_remove is called by the PCI subsystem to alert the driver
  420. * that it should release a PCI device. The could be caused by a
  421. * Hot-Plug event, or because the driver is going to be removed from
  422. * memory.
  423. **/
  424. static void __devexit
  425. ixgb_remove(struct pci_dev *pdev)
  426. {
  427. struct net_device *netdev = pci_get_drvdata(pdev);
  428. struct ixgb_adapter *adapter = netdev_priv(netdev);
  429. unregister_netdev(netdev);
  430. iounmap(adapter->hw.hw_addr);
  431. pci_release_regions(pdev);
  432. free_netdev(netdev);
  433. }
  434. /**
  435. * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
  436. * @adapter: board private structure to initialize
  437. *
  438. * ixgb_sw_init initializes the Adapter private data structure.
  439. * Fields are initialized based on PCI device information and
  440. * OS network device settings (MTU size).
  441. **/
  442. static int __devinit
  443. ixgb_sw_init(struct ixgb_adapter *adapter)
  444. {
  445. struct ixgb_hw *hw = &adapter->hw;
  446. struct net_device *netdev = adapter->netdev;
  447. struct pci_dev *pdev = adapter->pdev;
  448. /* PCI config space info */
  449. hw->vendor_id = pdev->vendor;
  450. hw->device_id = pdev->device;
  451. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  452. hw->subsystem_id = pdev->subsystem_device;
  453. adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
  454. hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  455. if((hw->device_id == IXGB_DEVICE_ID_82597EX)
  456. ||(hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
  457. ||(hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
  458. hw->mac_type = ixgb_82597;
  459. else {
  460. /* should never have loaded on this device */
  461. printk(KERN_ERR "ixgb: unsupported device id\n");
  462. }
  463. /* enable flow control to be programmed */
  464. hw->fc.send_xon = 1;
  465. atomic_set(&adapter->irq_sem, 1);
  466. spin_lock_init(&adapter->tx_lock);
  467. return 0;
  468. }
  469. /**
  470. * ixgb_open - Called when a network interface is made active
  471. * @netdev: network interface device structure
  472. *
  473. * Returns 0 on success, negative value on failure
  474. *
  475. * The open entry point is called when a network interface is made
  476. * active by the system (IFF_UP). At this point all resources needed
  477. * for transmit and receive operations are allocated, the interrupt
  478. * handler is registered with the OS, the watchdog timer is started,
  479. * and the stack is notified that the interface is ready.
  480. **/
  481. static int
  482. ixgb_open(struct net_device *netdev)
  483. {
  484. struct ixgb_adapter *adapter = netdev_priv(netdev);
  485. int err;
  486. /* allocate transmit descriptors */
  487. if((err = ixgb_setup_tx_resources(adapter)))
  488. goto err_setup_tx;
  489. /* allocate receive descriptors */
  490. if((err = ixgb_setup_rx_resources(adapter)))
  491. goto err_setup_rx;
  492. if((err = ixgb_up(adapter)))
  493. goto err_up;
  494. return 0;
  495. err_up:
  496. ixgb_free_rx_resources(adapter);
  497. err_setup_rx:
  498. ixgb_free_tx_resources(adapter);
  499. err_setup_tx:
  500. ixgb_reset(adapter);
  501. return err;
  502. }
  503. /**
  504. * ixgb_close - Disables a network interface
  505. * @netdev: network interface device structure
  506. *
  507. * Returns 0, this is not allowed to fail
  508. *
  509. * The close entry point is called when an interface is de-activated
  510. * by the OS. The hardware is still under the drivers control, but
  511. * needs to be disabled. A global MAC reset is issued to stop the
  512. * hardware, and all transmit and receive resources are freed.
  513. **/
  514. static int
  515. ixgb_close(struct net_device *netdev)
  516. {
  517. struct ixgb_adapter *adapter = netdev_priv(netdev);
  518. ixgb_down(adapter, TRUE);
  519. ixgb_free_tx_resources(adapter);
  520. ixgb_free_rx_resources(adapter);
  521. return 0;
  522. }
  523. /**
  524. * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
  525. * @adapter: board private structure
  526. *
  527. * Return 0 on success, negative on failure
  528. **/
  529. int
  530. ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
  531. {
  532. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  533. struct pci_dev *pdev = adapter->pdev;
  534. int size;
  535. size = sizeof(struct ixgb_buffer) * txdr->count;
  536. txdr->buffer_info = vmalloc(size);
  537. if(!txdr->buffer_info) {
  538. return -ENOMEM;
  539. }
  540. memset(txdr->buffer_info, 0, size);
  541. /* round up to nearest 4K */
  542. txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
  543. IXGB_ROUNDUP(txdr->size, 4096);
  544. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  545. if(!txdr->desc) {
  546. vfree(txdr->buffer_info);
  547. return -ENOMEM;
  548. }
  549. memset(txdr->desc, 0, txdr->size);
  550. txdr->next_to_use = 0;
  551. txdr->next_to_clean = 0;
  552. return 0;
  553. }
  554. /**
  555. * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
  556. * @adapter: board private structure
  557. *
  558. * Configure the Tx unit of the MAC after a reset.
  559. **/
  560. static void
  561. ixgb_configure_tx(struct ixgb_adapter *adapter)
  562. {
  563. uint64_t tdba = adapter->tx_ring.dma;
  564. uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
  565. uint32_t tctl;
  566. struct ixgb_hw *hw = &adapter->hw;
  567. /* Setup the Base and Length of the Tx Descriptor Ring
  568. * tx_ring.dma can be either a 32 or 64 bit value
  569. */
  570. IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  571. IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
  572. IXGB_WRITE_REG(hw, TDLEN, tdlen);
  573. /* Setup the HW Tx Head and Tail descriptor pointers */
  574. IXGB_WRITE_REG(hw, TDH, 0);
  575. IXGB_WRITE_REG(hw, TDT, 0);
  576. /* don't set up txdctl, it induces performance problems if configured
  577. * incorrectly */
  578. /* Set the Tx Interrupt Delay register */
  579. IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  580. /* Program the Transmit Control Register */
  581. tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
  582. IXGB_WRITE_REG(hw, TCTL, tctl);
  583. /* Setup Transmit Descriptor Settings for this adapter */
  584. adapter->tx_cmd_type =
  585. IXGB_TX_DESC_TYPE
  586. | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
  587. }
  588. /**
  589. * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
  590. * @adapter: board private structure
  591. *
  592. * Returns 0 on success, negative on failure
  593. **/
  594. int
  595. ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
  596. {
  597. struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
  598. struct pci_dev *pdev = adapter->pdev;
  599. int size;
  600. size = sizeof(struct ixgb_buffer) * rxdr->count;
  601. rxdr->buffer_info = vmalloc(size);
  602. if(!rxdr->buffer_info) {
  603. return -ENOMEM;
  604. }
  605. memset(rxdr->buffer_info, 0, size);
  606. /* Round up to nearest 4K */
  607. rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
  608. IXGB_ROUNDUP(rxdr->size, 4096);
  609. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  610. if(!rxdr->desc) {
  611. vfree(rxdr->buffer_info);
  612. return -ENOMEM;
  613. }
  614. memset(rxdr->desc, 0, rxdr->size);
  615. rxdr->next_to_clean = 0;
  616. rxdr->next_to_use = 0;
  617. return 0;
  618. }
  619. /**
  620. * ixgb_setup_rctl - configure the receive control register
  621. * @adapter: Board private structure
  622. **/
  623. static void
  624. ixgb_setup_rctl(struct ixgb_adapter *adapter)
  625. {
  626. uint32_t rctl;
  627. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  628. rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
  629. rctl |=
  630. IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
  631. IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
  632. (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
  633. rctl |= IXGB_RCTL_SECRC;
  634. switch (adapter->rx_buffer_len) {
  635. case IXGB_RXBUFFER_2048:
  636. default:
  637. rctl |= IXGB_RCTL_BSIZE_2048;
  638. break;
  639. case IXGB_RXBUFFER_4096:
  640. rctl |= IXGB_RCTL_BSIZE_4096;
  641. break;
  642. case IXGB_RXBUFFER_8192:
  643. rctl |= IXGB_RCTL_BSIZE_8192;
  644. break;
  645. case IXGB_RXBUFFER_16384:
  646. rctl |= IXGB_RCTL_BSIZE_16384;
  647. break;
  648. }
  649. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  650. }
  651. /**
  652. * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
  653. * @adapter: board private structure
  654. *
  655. * Configure the Rx unit of the MAC after a reset.
  656. **/
  657. static void
  658. ixgb_configure_rx(struct ixgb_adapter *adapter)
  659. {
  660. uint64_t rdba = adapter->rx_ring.dma;
  661. uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
  662. struct ixgb_hw *hw = &adapter->hw;
  663. uint32_t rctl;
  664. uint32_t rxcsum;
  665. uint32_t rxdctl;
  666. /* make sure receives are disabled while setting up the descriptors */
  667. rctl = IXGB_READ_REG(hw, RCTL);
  668. IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
  669. /* set the Receive Delay Timer Register */
  670. IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  671. /* Setup the Base and Length of the Rx Descriptor Ring */
  672. IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  673. IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
  674. IXGB_WRITE_REG(hw, RDLEN, rdlen);
  675. /* Setup the HW Rx Head and Tail Descriptor Pointers */
  676. IXGB_WRITE_REG(hw, RDH, 0);
  677. IXGB_WRITE_REG(hw, RDT, 0);
  678. /* set up pre-fetching of receive buffers so we get some before we
  679. * run out (default hardware behavior is to run out before fetching
  680. * more). This sets up to fetch if HTHRESH rx descriptors are avail
  681. * and the descriptors in hw cache are below PTHRESH. This avoids
  682. * the hardware behavior of fetching <=512 descriptors in a single
  683. * burst that pre-empts all other activity, usually causing fifo
  684. * overflows. */
  685. /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
  686. rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
  687. RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
  688. RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
  689. IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
  690. /* Enable Receive Checksum Offload for TCP and UDP */
  691. if(adapter->rx_csum == TRUE) {
  692. rxcsum = IXGB_READ_REG(hw, RXCSUM);
  693. rxcsum |= IXGB_RXCSUM_TUOFL;
  694. IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
  695. }
  696. /* Enable Receives */
  697. IXGB_WRITE_REG(hw, RCTL, rctl);
  698. }
  699. /**
  700. * ixgb_free_tx_resources - Free Tx Resources
  701. * @adapter: board private structure
  702. *
  703. * Free all transmit software resources
  704. **/
  705. void
  706. ixgb_free_tx_resources(struct ixgb_adapter *adapter)
  707. {
  708. struct pci_dev *pdev = adapter->pdev;
  709. ixgb_clean_tx_ring(adapter);
  710. vfree(adapter->tx_ring.buffer_info);
  711. adapter->tx_ring.buffer_info = NULL;
  712. pci_free_consistent(pdev, adapter->tx_ring.size,
  713. adapter->tx_ring.desc, adapter->tx_ring.dma);
  714. adapter->tx_ring.desc = NULL;
  715. }
  716. static inline void
  717. ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
  718. struct ixgb_buffer *buffer_info)
  719. {
  720. struct pci_dev *pdev = adapter->pdev;
  721. if(buffer_info->dma) {
  722. pci_unmap_page(pdev,
  723. buffer_info->dma,
  724. buffer_info->length,
  725. PCI_DMA_TODEVICE);
  726. buffer_info->dma = 0;
  727. }
  728. if(buffer_info->skb) {
  729. dev_kfree_skb_any(buffer_info->skb);
  730. buffer_info->skb = NULL;
  731. }
  732. }
  733. /**
  734. * ixgb_clean_tx_ring - Free Tx Buffers
  735. * @adapter: board private structure
  736. **/
  737. static void
  738. ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
  739. {
  740. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  741. struct ixgb_buffer *buffer_info;
  742. unsigned long size;
  743. unsigned int i;
  744. /* Free all the Tx ring sk_buffs */
  745. for(i = 0; i < tx_ring->count; i++) {
  746. buffer_info = &tx_ring->buffer_info[i];
  747. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  748. }
  749. size = sizeof(struct ixgb_buffer) * tx_ring->count;
  750. memset(tx_ring->buffer_info, 0, size);
  751. /* Zero out the descriptor ring */
  752. memset(tx_ring->desc, 0, tx_ring->size);
  753. tx_ring->next_to_use = 0;
  754. tx_ring->next_to_clean = 0;
  755. IXGB_WRITE_REG(&adapter->hw, TDH, 0);
  756. IXGB_WRITE_REG(&adapter->hw, TDT, 0);
  757. }
  758. /**
  759. * ixgb_free_rx_resources - Free Rx Resources
  760. * @adapter: board private structure
  761. *
  762. * Free all receive software resources
  763. **/
  764. void
  765. ixgb_free_rx_resources(struct ixgb_adapter *adapter)
  766. {
  767. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  768. struct pci_dev *pdev = adapter->pdev;
  769. ixgb_clean_rx_ring(adapter);
  770. vfree(rx_ring->buffer_info);
  771. rx_ring->buffer_info = NULL;
  772. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  773. rx_ring->desc = NULL;
  774. }
  775. /**
  776. * ixgb_clean_rx_ring - Free Rx Buffers
  777. * @adapter: board private structure
  778. **/
  779. static void
  780. ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
  781. {
  782. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  783. struct ixgb_buffer *buffer_info;
  784. struct pci_dev *pdev = adapter->pdev;
  785. unsigned long size;
  786. unsigned int i;
  787. /* Free all the Rx ring sk_buffs */
  788. for(i = 0; i < rx_ring->count; i++) {
  789. buffer_info = &rx_ring->buffer_info[i];
  790. if(buffer_info->skb) {
  791. pci_unmap_single(pdev,
  792. buffer_info->dma,
  793. buffer_info->length,
  794. PCI_DMA_FROMDEVICE);
  795. dev_kfree_skb(buffer_info->skb);
  796. buffer_info->skb = NULL;
  797. }
  798. }
  799. size = sizeof(struct ixgb_buffer) * rx_ring->count;
  800. memset(rx_ring->buffer_info, 0, size);
  801. /* Zero out the descriptor ring */
  802. memset(rx_ring->desc, 0, rx_ring->size);
  803. rx_ring->next_to_clean = 0;
  804. rx_ring->next_to_use = 0;
  805. IXGB_WRITE_REG(&adapter->hw, RDH, 0);
  806. IXGB_WRITE_REG(&adapter->hw, RDT, 0);
  807. }
  808. /**
  809. * ixgb_set_mac - Change the Ethernet Address of the NIC
  810. * @netdev: network interface device structure
  811. * @p: pointer to an address structure
  812. *
  813. * Returns 0 on success, negative on failure
  814. **/
  815. static int
  816. ixgb_set_mac(struct net_device *netdev, void *p)
  817. {
  818. struct ixgb_adapter *adapter = netdev_priv(netdev);
  819. struct sockaddr *addr = p;
  820. if(!is_valid_ether_addr(addr->sa_data))
  821. return -EADDRNOTAVAIL;
  822. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  823. ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
  824. return 0;
  825. }
  826. /**
  827. * ixgb_set_multi - Multicast and Promiscuous mode set
  828. * @netdev: network interface device structure
  829. *
  830. * The set_multi entry point is called whenever the multicast address
  831. * list or the network interface flags are updated. This routine is
  832. * responsible for configuring the hardware for proper multicast,
  833. * promiscuous mode, and all-multi behavior.
  834. **/
  835. static void
  836. ixgb_set_multi(struct net_device *netdev)
  837. {
  838. struct ixgb_adapter *adapter = netdev_priv(netdev);
  839. struct ixgb_hw *hw = &adapter->hw;
  840. struct dev_mc_list *mc_ptr;
  841. uint32_t rctl;
  842. int i;
  843. /* Check for Promiscuous and All Multicast modes */
  844. rctl = IXGB_READ_REG(hw, RCTL);
  845. if(netdev->flags & IFF_PROMISC) {
  846. rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  847. } else if(netdev->flags & IFF_ALLMULTI) {
  848. rctl |= IXGB_RCTL_MPE;
  849. rctl &= ~IXGB_RCTL_UPE;
  850. } else {
  851. rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  852. }
  853. if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
  854. rctl |= IXGB_RCTL_MPE;
  855. IXGB_WRITE_REG(hw, RCTL, rctl);
  856. } else {
  857. uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
  858. IXGB_WRITE_REG(hw, RCTL, rctl);
  859. for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
  860. i++, mc_ptr = mc_ptr->next)
  861. memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
  862. mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
  863. ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
  864. }
  865. }
  866. /**
  867. * ixgb_watchdog - Timer Call-back
  868. * @data: pointer to netdev cast into an unsigned long
  869. **/
  870. static void
  871. ixgb_watchdog(unsigned long data)
  872. {
  873. struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
  874. struct net_device *netdev = adapter->netdev;
  875. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  876. ixgb_check_for_link(&adapter->hw);
  877. if (ixgb_check_for_bad_link(&adapter->hw)) {
  878. /* force the reset path */
  879. netif_stop_queue(netdev);
  880. }
  881. if(adapter->hw.link_up) {
  882. if(!netif_carrier_ok(netdev)) {
  883. printk(KERN_INFO "ixgb: %s NIC Link is Up %d Mbps %s\n",
  884. netdev->name, 10000, "Full Duplex");
  885. adapter->link_speed = 10000;
  886. adapter->link_duplex = FULL_DUPLEX;
  887. netif_carrier_on(netdev);
  888. netif_wake_queue(netdev);
  889. }
  890. } else {
  891. if(netif_carrier_ok(netdev)) {
  892. adapter->link_speed = 0;
  893. adapter->link_duplex = 0;
  894. printk(KERN_INFO
  895. "ixgb: %s NIC Link is Down\n",
  896. netdev->name);
  897. netif_carrier_off(netdev);
  898. netif_stop_queue(netdev);
  899. }
  900. }
  901. ixgb_update_stats(adapter);
  902. if(!netif_carrier_ok(netdev)) {
  903. if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
  904. /* We've lost link, so the controller stops DMA,
  905. * but we've got queued Tx work that's never going
  906. * to get done, so reset controller to flush Tx.
  907. * (Do the reset outside of interrupt context). */
  908. schedule_work(&adapter->tx_timeout_task);
  909. }
  910. }
  911. /* Force detection of hung controller every watchdog period */
  912. adapter->detect_tx_hung = TRUE;
  913. /* generate an interrupt to force clean up of any stragglers */
  914. IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
  915. /* Reset the timer */
  916. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  917. }
  918. #define IXGB_TX_FLAGS_CSUM 0x00000001
  919. #define IXGB_TX_FLAGS_VLAN 0x00000002
  920. #define IXGB_TX_FLAGS_TSO 0x00000004
  921. static inline int
  922. ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
  923. {
  924. #ifdef NETIF_F_TSO
  925. struct ixgb_context_desc *context_desc;
  926. unsigned int i;
  927. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  928. uint16_t ipcse, tucse, mss;
  929. int err;
  930. if(likely(skb_shinfo(skb)->tso_size)) {
  931. if (skb_header_cloned(skb)) {
  932. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  933. if (err)
  934. return err;
  935. }
  936. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  937. mss = skb_shinfo(skb)->tso_size;
  938. skb->nh.iph->tot_len = 0;
  939. skb->nh.iph->check = 0;
  940. skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
  941. skb->nh.iph->daddr,
  942. 0, IPPROTO_TCP, 0);
  943. ipcss = skb->nh.raw - skb->data;
  944. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  945. ipcse = skb->h.raw - skb->data - 1;
  946. tucss = skb->h.raw - skb->data;
  947. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  948. tucse = 0;
  949. i = adapter->tx_ring.next_to_use;
  950. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  951. context_desc->ipcss = ipcss;
  952. context_desc->ipcso = ipcso;
  953. context_desc->ipcse = cpu_to_le16(ipcse);
  954. context_desc->tucss = tucss;
  955. context_desc->tucso = tucso;
  956. context_desc->tucse = cpu_to_le16(tucse);
  957. context_desc->mss = cpu_to_le16(mss);
  958. context_desc->hdr_len = hdr_len;
  959. context_desc->status = 0;
  960. context_desc->cmd_type_len = cpu_to_le32(
  961. IXGB_CONTEXT_DESC_TYPE
  962. | IXGB_CONTEXT_DESC_CMD_TSE
  963. | IXGB_CONTEXT_DESC_CMD_IP
  964. | IXGB_CONTEXT_DESC_CMD_TCP
  965. | IXGB_CONTEXT_DESC_CMD_IDE
  966. | (skb->len - (hdr_len)));
  967. if(++i == adapter->tx_ring.count) i = 0;
  968. adapter->tx_ring.next_to_use = i;
  969. return 1;
  970. }
  971. #endif
  972. return 0;
  973. }
  974. static inline boolean_t
  975. ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
  976. {
  977. struct ixgb_context_desc *context_desc;
  978. unsigned int i;
  979. uint8_t css, cso;
  980. if(likely(skb->ip_summed == CHECKSUM_HW)) {
  981. css = skb->h.raw - skb->data;
  982. cso = (skb->h.raw + skb->csum) - skb->data;
  983. i = adapter->tx_ring.next_to_use;
  984. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  985. context_desc->tucss = css;
  986. context_desc->tucso = cso;
  987. context_desc->tucse = 0;
  988. /* zero out any previously existing data in one instruction */
  989. *(uint32_t *)&(context_desc->ipcss) = 0;
  990. context_desc->status = 0;
  991. context_desc->hdr_len = 0;
  992. context_desc->mss = 0;
  993. context_desc->cmd_type_len =
  994. cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
  995. | IXGB_TX_DESC_CMD_IDE);
  996. if(++i == adapter->tx_ring.count) i = 0;
  997. adapter->tx_ring.next_to_use = i;
  998. return TRUE;
  999. }
  1000. return FALSE;
  1001. }
  1002. #define IXGB_MAX_TXD_PWR 14
  1003. #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
  1004. static inline int
  1005. ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
  1006. unsigned int first)
  1007. {
  1008. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1009. struct ixgb_buffer *buffer_info;
  1010. int len = skb->len;
  1011. unsigned int offset = 0, size, count = 0, i;
  1012. unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
  1013. unsigned int f;
  1014. len -= skb->data_len;
  1015. i = tx_ring->next_to_use;
  1016. while(len) {
  1017. buffer_info = &tx_ring->buffer_info[i];
  1018. size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
  1019. buffer_info->length = size;
  1020. buffer_info->dma =
  1021. pci_map_single(adapter->pdev,
  1022. skb->data + offset,
  1023. size,
  1024. PCI_DMA_TODEVICE);
  1025. buffer_info->time_stamp = jiffies;
  1026. len -= size;
  1027. offset += size;
  1028. count++;
  1029. if(++i == tx_ring->count) i = 0;
  1030. }
  1031. for(f = 0; f < nr_frags; f++) {
  1032. struct skb_frag_struct *frag;
  1033. frag = &skb_shinfo(skb)->frags[f];
  1034. len = frag->size;
  1035. offset = 0;
  1036. while(len) {
  1037. buffer_info = &tx_ring->buffer_info[i];
  1038. size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
  1039. buffer_info->length = size;
  1040. buffer_info->dma =
  1041. pci_map_page(adapter->pdev,
  1042. frag->page,
  1043. frag->page_offset + offset,
  1044. size,
  1045. PCI_DMA_TODEVICE);
  1046. buffer_info->time_stamp = jiffies;
  1047. len -= size;
  1048. offset += size;
  1049. count++;
  1050. if(++i == tx_ring->count) i = 0;
  1051. }
  1052. }
  1053. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  1054. tx_ring->buffer_info[i].skb = skb;
  1055. tx_ring->buffer_info[first].next_to_watch = i;
  1056. return count;
  1057. }
  1058. static inline void
  1059. ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
  1060. {
  1061. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1062. struct ixgb_tx_desc *tx_desc = NULL;
  1063. struct ixgb_buffer *buffer_info;
  1064. uint32_t cmd_type_len = adapter->tx_cmd_type;
  1065. uint8_t status = 0;
  1066. uint8_t popts = 0;
  1067. unsigned int i;
  1068. if(tx_flags & IXGB_TX_FLAGS_TSO) {
  1069. cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
  1070. popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
  1071. }
  1072. if(tx_flags & IXGB_TX_FLAGS_CSUM)
  1073. popts |= IXGB_TX_DESC_POPTS_TXSM;
  1074. if(tx_flags & IXGB_TX_FLAGS_VLAN) {
  1075. cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
  1076. }
  1077. i = tx_ring->next_to_use;
  1078. while(count--) {
  1079. buffer_info = &tx_ring->buffer_info[i];
  1080. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1081. tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1082. tx_desc->cmd_type_len =
  1083. cpu_to_le32(cmd_type_len | buffer_info->length);
  1084. tx_desc->status = status;
  1085. tx_desc->popts = popts;
  1086. tx_desc->vlan = cpu_to_le16(vlan_id);
  1087. if(++i == tx_ring->count) i = 0;
  1088. }
  1089. tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
  1090. | IXGB_TX_DESC_CMD_RS );
  1091. /* Force memory writes to complete before letting h/w
  1092. * know there are new descriptors to fetch. (Only
  1093. * applicable for weak-ordered memory model archs,
  1094. * such as IA-64). */
  1095. wmb();
  1096. tx_ring->next_to_use = i;
  1097. IXGB_WRITE_REG(&adapter->hw, TDT, i);
  1098. }
  1099. /* Tx Descriptors needed, worst case */
  1100. #define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
  1101. (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
  1102. #define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
  1103. MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1
  1104. static int
  1105. ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1106. {
  1107. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1108. unsigned int first;
  1109. unsigned int tx_flags = 0;
  1110. unsigned long flags;
  1111. int vlan_id = 0;
  1112. int tso;
  1113. if(skb->len <= 0) {
  1114. dev_kfree_skb_any(skb);
  1115. return 0;
  1116. }
  1117. spin_lock_irqsave(&adapter->tx_lock, flags);
  1118. if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
  1119. netif_stop_queue(netdev);
  1120. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1121. return 1;
  1122. }
  1123. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1124. if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
  1125. tx_flags |= IXGB_TX_FLAGS_VLAN;
  1126. vlan_id = vlan_tx_tag_get(skb);
  1127. }
  1128. first = adapter->tx_ring.next_to_use;
  1129. tso = ixgb_tso(adapter, skb);
  1130. if (tso < 0) {
  1131. dev_kfree_skb_any(skb);
  1132. return NETDEV_TX_OK;
  1133. }
  1134. if (tso)
  1135. tx_flags |= IXGB_TX_FLAGS_TSO;
  1136. else if(ixgb_tx_csum(adapter, skb))
  1137. tx_flags |= IXGB_TX_FLAGS_CSUM;
  1138. ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
  1139. tx_flags);
  1140. netdev->trans_start = jiffies;
  1141. return 0;
  1142. }
  1143. /**
  1144. * ixgb_tx_timeout - Respond to a Tx Hang
  1145. * @netdev: network interface device structure
  1146. **/
  1147. static void
  1148. ixgb_tx_timeout(struct net_device *netdev)
  1149. {
  1150. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1151. /* Do the reset outside of interrupt context */
  1152. schedule_work(&adapter->tx_timeout_task);
  1153. }
  1154. static void
  1155. ixgb_tx_timeout_task(struct net_device *netdev)
  1156. {
  1157. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1158. ixgb_down(adapter, TRUE);
  1159. ixgb_up(adapter);
  1160. }
  1161. /**
  1162. * ixgb_get_stats - Get System Network Statistics
  1163. * @netdev: network interface device structure
  1164. *
  1165. * Returns the address of the device statistics structure.
  1166. * The statistics are actually updated from the timer callback.
  1167. **/
  1168. static struct net_device_stats *
  1169. ixgb_get_stats(struct net_device *netdev)
  1170. {
  1171. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1172. return &adapter->net_stats;
  1173. }
  1174. /**
  1175. * ixgb_change_mtu - Change the Maximum Transfer Unit
  1176. * @netdev: network interface device structure
  1177. * @new_mtu: new value for maximum frame size
  1178. *
  1179. * Returns 0 on success, negative on failure
  1180. **/
  1181. static int
  1182. ixgb_change_mtu(struct net_device *netdev, int new_mtu)
  1183. {
  1184. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1185. int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1186. int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1187. if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
  1188. || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
  1189. IXGB_ERR("Invalid MTU setting\n");
  1190. return -EINVAL;
  1191. }
  1192. if((max_frame <= IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
  1193. || (max_frame <= IXGB_RXBUFFER_2048)) {
  1194. adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
  1195. } else if(max_frame <= IXGB_RXBUFFER_4096) {
  1196. adapter->rx_buffer_len = IXGB_RXBUFFER_4096;
  1197. } else if(max_frame <= IXGB_RXBUFFER_8192) {
  1198. adapter->rx_buffer_len = IXGB_RXBUFFER_8192;
  1199. } else {
  1200. adapter->rx_buffer_len = IXGB_RXBUFFER_16384;
  1201. }
  1202. netdev->mtu = new_mtu;
  1203. if(old_max_frame != max_frame && netif_running(netdev)) {
  1204. ixgb_down(adapter, TRUE);
  1205. ixgb_up(adapter);
  1206. }
  1207. return 0;
  1208. }
  1209. /**
  1210. * ixgb_update_stats - Update the board statistics counters.
  1211. * @adapter: board private structure
  1212. **/
  1213. void
  1214. ixgb_update_stats(struct ixgb_adapter *adapter)
  1215. {
  1216. struct net_device *netdev = adapter->netdev;
  1217. if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
  1218. (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
  1219. u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
  1220. u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
  1221. u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
  1222. u64 bcast = ((u64)bcast_h << 32) | bcast_l;
  1223. multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
  1224. /* fix up multicast stats by removing broadcasts */
  1225. if(multi >= bcast)
  1226. multi -= bcast;
  1227. adapter->stats.mprcl += (multi & 0xFFFFFFFF);
  1228. adapter->stats.mprch += (multi >> 32);
  1229. adapter->stats.bprcl += bcast_l;
  1230. adapter->stats.bprch += bcast_h;
  1231. } else {
  1232. adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
  1233. adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
  1234. adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
  1235. adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
  1236. }
  1237. adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
  1238. adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
  1239. adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
  1240. adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
  1241. adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
  1242. adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
  1243. adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
  1244. adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
  1245. adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
  1246. adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
  1247. adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
  1248. adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
  1249. adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
  1250. adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
  1251. adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
  1252. adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
  1253. adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
  1254. adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
  1255. adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
  1256. adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
  1257. adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
  1258. adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
  1259. adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
  1260. adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
  1261. adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
  1262. adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
  1263. adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
  1264. adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
  1265. adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
  1266. adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
  1267. adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
  1268. adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
  1269. adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
  1270. adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
  1271. adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
  1272. adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
  1273. adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
  1274. adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
  1275. adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
  1276. adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
  1277. adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
  1278. adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
  1279. adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
  1280. adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
  1281. adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
  1282. adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
  1283. adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
  1284. adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
  1285. adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
  1286. adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
  1287. adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
  1288. adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
  1289. adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
  1290. adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
  1291. adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
  1292. adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
  1293. /* Fill out the OS statistics structure */
  1294. adapter->net_stats.rx_packets = adapter->stats.gprcl;
  1295. adapter->net_stats.tx_packets = adapter->stats.gptcl;
  1296. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  1297. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  1298. adapter->net_stats.multicast = adapter->stats.mprcl;
  1299. adapter->net_stats.collisions = 0;
  1300. /* ignore RLEC as it reports errors for padded (<64bytes) frames
  1301. * with a length in the type/len field */
  1302. adapter->net_stats.rx_errors =
  1303. /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
  1304. adapter->stats.ruc +
  1305. adapter->stats.roc /*+ adapter->stats.rlec */ +
  1306. adapter->stats.icbc +
  1307. adapter->stats.ecbc + adapter->stats.mpc;
  1308. /* see above
  1309. * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  1310. */
  1311. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  1312. adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
  1313. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  1314. adapter->net_stats.rx_over_errors = adapter->stats.mpc;
  1315. adapter->net_stats.tx_errors = 0;
  1316. adapter->net_stats.rx_frame_errors = 0;
  1317. adapter->net_stats.tx_aborted_errors = 0;
  1318. adapter->net_stats.tx_carrier_errors = 0;
  1319. adapter->net_stats.tx_fifo_errors = 0;
  1320. adapter->net_stats.tx_heartbeat_errors = 0;
  1321. adapter->net_stats.tx_window_errors = 0;
  1322. }
  1323. #define IXGB_MAX_INTR 10
  1324. /**
  1325. * ixgb_intr - Interrupt Handler
  1326. * @irq: interrupt number
  1327. * @data: pointer to a network interface device structure
  1328. * @pt_regs: CPU registers structure
  1329. **/
  1330. static irqreturn_t
  1331. ixgb_intr(int irq, void *data, struct pt_regs *regs)
  1332. {
  1333. struct net_device *netdev = data;
  1334. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1335. struct ixgb_hw *hw = &adapter->hw;
  1336. uint32_t icr = IXGB_READ_REG(hw, ICR);
  1337. #ifndef CONFIG_IXGB_NAPI
  1338. unsigned int i;
  1339. #endif
  1340. if(unlikely(!icr))
  1341. return IRQ_NONE; /* Not our interrupt */
  1342. if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
  1343. mod_timer(&adapter->watchdog_timer, jiffies);
  1344. }
  1345. #ifdef CONFIG_IXGB_NAPI
  1346. if(netif_rx_schedule_prep(netdev)) {
  1347. /* Disable interrupts and register for poll. The flush
  1348. of the posted write is intentionally left out.
  1349. */
  1350. atomic_inc(&adapter->irq_sem);
  1351. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  1352. __netif_rx_schedule(netdev);
  1353. }
  1354. #else
  1355. /* yes, that is actually a & and it is meant to make sure that
  1356. * every pass through this for loop checks both receive and
  1357. * transmit queues for completed descriptors, intended to
  1358. * avoid starvation issues and assist tx/rx fairness. */
  1359. for(i = 0; i < IXGB_MAX_INTR; i++)
  1360. if(!ixgb_clean_rx_irq(adapter) &
  1361. !ixgb_clean_tx_irq(adapter))
  1362. break;
  1363. #endif
  1364. return IRQ_HANDLED;
  1365. }
  1366. #ifdef CONFIG_IXGB_NAPI
  1367. /**
  1368. * ixgb_clean - NAPI Rx polling callback
  1369. * @adapter: board private structure
  1370. **/
  1371. static int
  1372. ixgb_clean(struct net_device *netdev, int *budget)
  1373. {
  1374. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1375. int work_to_do = min(*budget, netdev->quota);
  1376. int tx_cleaned;
  1377. int work_done = 0;
  1378. tx_cleaned = ixgb_clean_tx_irq(adapter);
  1379. ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
  1380. *budget -= work_done;
  1381. netdev->quota -= work_done;
  1382. /* if no Tx and not enough Rx work done, exit the polling mode */
  1383. if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
  1384. netif_rx_complete(netdev);
  1385. ixgb_irq_enable(adapter);
  1386. return 0;
  1387. }
  1388. return 1;
  1389. }
  1390. #endif
  1391. /**
  1392. * ixgb_clean_tx_irq - Reclaim resources after transmit completes
  1393. * @adapter: board private structure
  1394. **/
  1395. static boolean_t
  1396. ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
  1397. {
  1398. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1399. struct net_device *netdev = adapter->netdev;
  1400. struct ixgb_tx_desc *tx_desc, *eop_desc;
  1401. struct ixgb_buffer *buffer_info;
  1402. unsigned int i, eop;
  1403. boolean_t cleaned = FALSE;
  1404. i = tx_ring->next_to_clean;
  1405. eop = tx_ring->buffer_info[i].next_to_watch;
  1406. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1407. while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
  1408. for(cleaned = FALSE; !cleaned; ) {
  1409. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1410. buffer_info = &tx_ring->buffer_info[i];
  1411. if (tx_desc->popts
  1412. & (IXGB_TX_DESC_POPTS_TXSM |
  1413. IXGB_TX_DESC_POPTS_IXSM))
  1414. adapter->hw_csum_tx_good++;
  1415. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  1416. *(uint32_t *)&(tx_desc->status) = 0;
  1417. cleaned = (i == eop);
  1418. if(++i == tx_ring->count) i = 0;
  1419. }
  1420. eop = tx_ring->buffer_info[i].next_to_watch;
  1421. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1422. }
  1423. tx_ring->next_to_clean = i;
  1424. spin_lock(&adapter->tx_lock);
  1425. if(cleaned && netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
  1426. (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE)) {
  1427. netif_wake_queue(netdev);
  1428. }
  1429. spin_unlock(&adapter->tx_lock);
  1430. if(adapter->detect_tx_hung) {
  1431. /* detect a transmit hang in hardware, this serializes the
  1432. * check with the clearing of time_stamp and movement of i */
  1433. adapter->detect_tx_hung = FALSE;
  1434. if(tx_ring->buffer_info[i].dma &&
  1435. time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
  1436. && !(IXGB_READ_REG(&adapter->hw, STATUS) &
  1437. IXGB_STATUS_TXOFF))
  1438. netif_stop_queue(netdev);
  1439. }
  1440. return cleaned;
  1441. }
  1442. /**
  1443. * ixgb_rx_checksum - Receive Checksum Offload for 82597.
  1444. * @adapter: board private structure
  1445. * @rx_desc: receive descriptor
  1446. * @sk_buff: socket buffer with received data
  1447. **/
  1448. static inline void
  1449. ixgb_rx_checksum(struct ixgb_adapter *adapter,
  1450. struct ixgb_rx_desc *rx_desc,
  1451. struct sk_buff *skb)
  1452. {
  1453. /* Ignore Checksum bit is set OR
  1454. * TCP Checksum has not been calculated
  1455. */
  1456. if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
  1457. (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
  1458. skb->ip_summed = CHECKSUM_NONE;
  1459. return;
  1460. }
  1461. /* At this point we know the hardware did the TCP checksum */
  1462. /* now look at the TCP checksum error bit */
  1463. if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
  1464. /* let the stack verify checksum errors */
  1465. skb->ip_summed = CHECKSUM_NONE;
  1466. adapter->hw_csum_rx_error++;
  1467. } else {
  1468. /* TCP checksum is good */
  1469. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1470. adapter->hw_csum_rx_good++;
  1471. }
  1472. }
  1473. /**
  1474. * ixgb_clean_rx_irq - Send received data up the network stack,
  1475. * @adapter: board private structure
  1476. **/
  1477. static boolean_t
  1478. #ifdef CONFIG_IXGB_NAPI
  1479. ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
  1480. #else
  1481. ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
  1482. #endif
  1483. {
  1484. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1485. struct net_device *netdev = adapter->netdev;
  1486. struct pci_dev *pdev = adapter->pdev;
  1487. struct ixgb_rx_desc *rx_desc, *next_rxd;
  1488. struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
  1489. uint32_t length;
  1490. unsigned int i, j;
  1491. boolean_t cleaned = FALSE;
  1492. i = rx_ring->next_to_clean;
  1493. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1494. buffer_info = &rx_ring->buffer_info[i];
  1495. while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
  1496. struct sk_buff *skb, *next_skb;
  1497. u8 status;
  1498. #ifdef CONFIG_IXGB_NAPI
  1499. if(*work_done >= work_to_do)
  1500. break;
  1501. (*work_done)++;
  1502. #endif
  1503. status = rx_desc->status;
  1504. skb = buffer_info->skb;
  1505. prefetch(skb->data);
  1506. if(++i == rx_ring->count) i = 0;
  1507. next_rxd = IXGB_RX_DESC(*rx_ring, i);
  1508. prefetch(next_rxd);
  1509. if((j = i + 1) == rx_ring->count) j = 0;
  1510. next2_buffer = &rx_ring->buffer_info[j];
  1511. prefetch(next2_buffer);
  1512. next_buffer = &rx_ring->buffer_info[i];
  1513. next_skb = next_buffer->skb;
  1514. prefetch(next_skb);
  1515. cleaned = TRUE;
  1516. pci_unmap_single(pdev,
  1517. buffer_info->dma,
  1518. buffer_info->length,
  1519. PCI_DMA_FROMDEVICE);
  1520. length = le16_to_cpu(rx_desc->length);
  1521. if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
  1522. /* All receives must fit into a single buffer */
  1523. IXGB_DBG("Receive packet consumed multiple buffers "
  1524. "length<%x>\n", length);
  1525. dev_kfree_skb_irq(skb);
  1526. goto rxdesc_done;
  1527. }
  1528. if (unlikely(rx_desc->errors
  1529. & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
  1530. | IXGB_RX_DESC_ERRORS_P |
  1531. IXGB_RX_DESC_ERRORS_RXE))) {
  1532. dev_kfree_skb_irq(skb);
  1533. goto rxdesc_done;
  1534. }
  1535. /* Good Receive */
  1536. skb_put(skb, length);
  1537. /* Receive Checksum Offload */
  1538. ixgb_rx_checksum(adapter, rx_desc, skb);
  1539. skb->protocol = eth_type_trans(skb, netdev);
  1540. #ifdef CONFIG_IXGB_NAPI
  1541. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1542. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  1543. le16_to_cpu(rx_desc->special) &
  1544. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1545. } else {
  1546. netif_receive_skb(skb);
  1547. }
  1548. #else /* CONFIG_IXGB_NAPI */
  1549. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1550. vlan_hwaccel_rx(skb, adapter->vlgrp,
  1551. le16_to_cpu(rx_desc->special) &
  1552. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1553. } else {
  1554. netif_rx(skb);
  1555. }
  1556. #endif /* CONFIG_IXGB_NAPI */
  1557. netdev->last_rx = jiffies;
  1558. rxdesc_done:
  1559. /* clean up descriptor, might be written over by hw */
  1560. rx_desc->status = 0;
  1561. buffer_info->skb = NULL;
  1562. /* use prefetched values */
  1563. rx_desc = next_rxd;
  1564. buffer_info = next_buffer;
  1565. }
  1566. rx_ring->next_to_clean = i;
  1567. ixgb_alloc_rx_buffers(adapter);
  1568. return cleaned;
  1569. }
  1570. /**
  1571. * ixgb_alloc_rx_buffers - Replace used receive buffers
  1572. * @adapter: address of board private structure
  1573. **/
  1574. static void
  1575. ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
  1576. {
  1577. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1578. struct net_device *netdev = adapter->netdev;
  1579. struct pci_dev *pdev = adapter->pdev;
  1580. struct ixgb_rx_desc *rx_desc;
  1581. struct ixgb_buffer *buffer_info;
  1582. struct sk_buff *skb;
  1583. unsigned int i;
  1584. int num_group_tail_writes;
  1585. long cleancount;
  1586. i = rx_ring->next_to_use;
  1587. buffer_info = &rx_ring->buffer_info[i];
  1588. cleancount = IXGB_DESC_UNUSED(rx_ring);
  1589. num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
  1590. /* leave three descriptors unused */
  1591. while(--cleancount > 2) {
  1592. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1593. skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
  1594. if(unlikely(!skb)) {
  1595. /* Better luck next round */
  1596. break;
  1597. }
  1598. /* Make buffer alignment 2 beyond a 16 byte boundary
  1599. * this will result in a 16 byte aligned IP header after
  1600. * the 14 byte MAC header is removed
  1601. */
  1602. skb_reserve(skb, NET_IP_ALIGN);
  1603. skb->dev = netdev;
  1604. buffer_info->skb = skb;
  1605. buffer_info->length = adapter->rx_buffer_len;
  1606. buffer_info->dma =
  1607. pci_map_single(pdev,
  1608. skb->data,
  1609. adapter->rx_buffer_len,
  1610. PCI_DMA_FROMDEVICE);
  1611. rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1612. /* guarantee DD bit not set now before h/w gets descriptor
  1613. * this is the rest of the workaround for h/w double
  1614. * writeback. */
  1615. rx_desc->status = 0;
  1616. if((i & ~(num_group_tail_writes- 1)) == i) {
  1617. /* Force memory writes to complete before letting h/w
  1618. * know there are new descriptors to fetch. (Only
  1619. * applicable for weak-ordered memory model archs,
  1620. * such as IA-64). */
  1621. wmb();
  1622. IXGB_WRITE_REG(&adapter->hw, RDT, i);
  1623. }
  1624. if(++i == rx_ring->count) i = 0;
  1625. buffer_info = &rx_ring->buffer_info[i];
  1626. }
  1627. rx_ring->next_to_use = i;
  1628. }
  1629. /**
  1630. * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
  1631. *
  1632. * @param netdev network interface device structure
  1633. * @param grp indicates to enable or disable tagging/stripping
  1634. **/
  1635. static void
  1636. ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  1637. {
  1638. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1639. uint32_t ctrl, rctl;
  1640. ixgb_irq_disable(adapter);
  1641. adapter->vlgrp = grp;
  1642. if(grp) {
  1643. /* enable VLAN tag insert/strip */
  1644. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1645. ctrl |= IXGB_CTRL0_VME;
  1646. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1647. /* enable VLAN receive filtering */
  1648. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1649. rctl |= IXGB_RCTL_VFE;
  1650. rctl &= ~IXGB_RCTL_CFIEN;
  1651. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1652. } else {
  1653. /* disable VLAN tag insert/strip */
  1654. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1655. ctrl &= ~IXGB_CTRL0_VME;
  1656. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1657. /* disable VLAN filtering */
  1658. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1659. rctl &= ~IXGB_RCTL_VFE;
  1660. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1661. }
  1662. ixgb_irq_enable(adapter);
  1663. }
  1664. static void
  1665. ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  1666. {
  1667. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1668. uint32_t vfta, index;
  1669. /* add VID to filter table */
  1670. index = (vid >> 5) & 0x7F;
  1671. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1672. vfta |= (1 << (vid & 0x1F));
  1673. ixgb_write_vfta(&adapter->hw, index, vfta);
  1674. }
  1675. static void
  1676. ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  1677. {
  1678. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1679. uint32_t vfta, index;
  1680. ixgb_irq_disable(adapter);
  1681. if(adapter->vlgrp)
  1682. adapter->vlgrp->vlan_devices[vid] = NULL;
  1683. ixgb_irq_enable(adapter);
  1684. /* remove VID from filter table*/
  1685. index = (vid >> 5) & 0x7F;
  1686. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1687. vfta &= ~(1 << (vid & 0x1F));
  1688. ixgb_write_vfta(&adapter->hw, index, vfta);
  1689. }
  1690. static void
  1691. ixgb_restore_vlan(struct ixgb_adapter *adapter)
  1692. {
  1693. ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  1694. if(adapter->vlgrp) {
  1695. uint16_t vid;
  1696. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  1697. if(!adapter->vlgrp->vlan_devices[vid])
  1698. continue;
  1699. ixgb_vlan_rx_add_vid(adapter->netdev, vid);
  1700. }
  1701. }
  1702. }
  1703. #ifdef CONFIG_NET_POLL_CONTROLLER
  1704. /*
  1705. * Polling 'interrupt' - used by things like netconsole to send skbs
  1706. * without having to re-enable interrupts. It's not called while
  1707. * the interrupt routine is executing.
  1708. */
  1709. static void ixgb_netpoll(struct net_device *dev)
  1710. {
  1711. struct ixgb_adapter *adapter = dev->priv;
  1712. disable_irq(adapter->pdev->irq);
  1713. ixgb_intr(adapter->pdev->irq, dev, NULL);
  1714. enable_irq(adapter->pdev->irq);
  1715. }
  1716. #endif
  1717. /* ixgb_main.c */