e1000_main.c 134 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742
  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "e1000.h"
  21. /* Change Log
  22. * 6.3.9 12/16/2005
  23. * o incorporate fix for recycled skbs from IBM LTC
  24. * 6.3.7 11/18/2005
  25. * o Honor eeprom setting for enabling/disabling Wake On Lan
  26. * 6.3.5 11/17/2005
  27. * o Fix memory leak in rx ring handling for PCI Express adapters
  28. * 6.3.4 11/8/05
  29. * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
  30. * 6.3.2 9/20/05
  31. * o Render logic that sets/resets DRV_LOAD as inline functions to
  32. * avoid code replication. If f/w is AMT then set DRV_LOAD only when
  33. * network interface is open.
  34. * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
  35. * o Adjust PBA partioning for Jumbo frames using MTU size and not
  36. * rx_buffer_len
  37. * 6.3.1 9/19/05
  38. * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
  39. (e1000_clean_tx_irq)
  40. * o Support for 8086:10B5 device (Quad Port)
  41. * 6.2.14 9/15/05
  42. * o In AMT enabled configurations, set/reset DRV_LOAD bit on interface
  43. * open/close
  44. * 6.2.13 9/14/05
  45. * o Invoke e1000_check_mng_mode only for 8257x controllers since it
  46. * accesses the FWSM that is not supported in other controllers
  47. * 6.2.12 9/9/05
  48. * o Add support for device id E1000_DEV_ID_82546GB_QUAD_COPPER
  49. * o set RCTL:SECRC only for controllers newer than 82543.
  50. * o When the n/w interface comes down reset DRV_LOAD bit to notify f/w.
  51. * This code was moved from e1000_remove to e1000_close
  52. * 6.2.10 9/6/05
  53. * o Fix error in updating RDT in el1000_alloc_rx_buffers[_ps] -- one off.
  54. * o Enable fc by default on 82573 controllers (do not read eeprom)
  55. * o Fix rx_errors statistic not to include missed_packet_count
  56. * o Fix rx_dropped statistic not to include missed_packet_count
  57. (Padraig Brady)
  58. * 6.2.9 8/30/05
  59. * o Remove call to update statistics from the controller ib e1000_get_stats
  60. * 6.2.8 8/30/05
  61. * o Improved algorithm for rx buffer allocation/rdt update
  62. * o Flow control watermarks relative to rx PBA size
  63. * o Simplified 'Tx Hung' detect logic
  64. * 6.2.7 8/17/05
  65. * o Report rx buffer allocation failures and tx timeout counts in stats
  66. * 6.2.6 8/16/05
  67. * o Implement workaround for controller erratum -- linear non-tso packet
  68. * following a TSO gets written back prematurely
  69. * 6.2.5 8/15/05
  70. * o Set netdev->tx_queue_len based on link speed/duplex settings.
  71. * o Fix net_stats.rx_fifo_errors <p@draigBrady.com>
  72. * o Do not power off PHY if SoL/IDER session is active
  73. * 6.2.4 8/10/05
  74. * o Fix loopback test setup/cleanup for 82571/3 controllers
  75. * o Fix parsing of outgoing packets (e1000_transfer_dhcp_info) to treat
  76. * all packets as raw
  77. * o Prevent operations that will cause the PHY to be reset if SoL/IDER
  78. * sessions are active and log a message
  79. * 6.2.2 7/21/05
  80. * o used fixed size descriptors for all MTU sizes, reduces memory load
  81. * 6.1.2 4/13/05
  82. * o Fixed ethtool diagnostics
  83. * o Enabled flow control to take default eeprom settings
  84. * o Added stats_lock around e1000_read_phy_reg commands to avoid concurrent
  85. * calls, one from mii_ioctl and other from within update_stats while
  86. * processing MIIREG ioctl.
  87. */
  88. char e1000_driver_name[] = "e1000";
  89. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  90. #ifndef CONFIG_E1000_NAPI
  91. #define DRIVERNAPI
  92. #else
  93. #define DRIVERNAPI "-NAPI"
  94. #endif
  95. #define DRV_VERSION "6.3.9-k2"DRIVERNAPI
  96. char e1000_driver_version[] = DRV_VERSION;
  97. static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  98. /* e1000_pci_tbl - PCI Device ID Table
  99. *
  100. * Last entry must be all 0s
  101. *
  102. * Macro expands to...
  103. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  104. */
  105. static struct pci_device_id e1000_pci_tbl[] = {
  106. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  107. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  108. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  109. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  110. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  111. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  112. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  113. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  114. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  115. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  116. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  117. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  118. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  119. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  120. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  121. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  122. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  123. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  124. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  125. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  126. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  127. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  128. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  129. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  130. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  131. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  132. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  133. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  134. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  135. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  136. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  137. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  138. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  139. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  140. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  141. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  142. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  143. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  144. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  145. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  146. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  147. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  148. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  149. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  150. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  151. /* required last entry */
  152. {0,}
  153. };
  154. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  155. int e1000_up(struct e1000_adapter *adapter);
  156. void e1000_down(struct e1000_adapter *adapter);
  157. void e1000_reset(struct e1000_adapter *adapter);
  158. int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  159. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  160. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  161. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  162. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  163. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  164. struct e1000_tx_ring *txdr);
  165. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  166. struct e1000_rx_ring *rxdr);
  167. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  168. struct e1000_tx_ring *tx_ring);
  169. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  170. struct e1000_rx_ring *rx_ring);
  171. void e1000_update_stats(struct e1000_adapter *adapter);
  172. /* Local Function Prototypes */
  173. static int e1000_init_module(void);
  174. static void e1000_exit_module(void);
  175. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  176. static void __devexit e1000_remove(struct pci_dev *pdev);
  177. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  178. #ifdef CONFIG_E1000_MQ
  179. static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
  180. #endif
  181. static int e1000_sw_init(struct e1000_adapter *adapter);
  182. static int e1000_open(struct net_device *netdev);
  183. static int e1000_close(struct net_device *netdev);
  184. static void e1000_configure_tx(struct e1000_adapter *adapter);
  185. static void e1000_configure_rx(struct e1000_adapter *adapter);
  186. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  187. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  188. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  189. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  190. struct e1000_tx_ring *tx_ring);
  191. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  192. struct e1000_rx_ring *rx_ring);
  193. static void e1000_set_multi(struct net_device *netdev);
  194. static void e1000_update_phy_info(unsigned long data);
  195. static void e1000_watchdog(unsigned long data);
  196. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  197. static void e1000_82547_tx_fifo_stall(unsigned long data);
  198. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  199. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  200. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  201. static int e1000_set_mac(struct net_device *netdev, void *p);
  202. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  203. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  204. struct e1000_tx_ring *tx_ring);
  205. #ifdef CONFIG_E1000_NAPI
  206. static int e1000_clean(struct net_device *poll_dev, int *budget);
  207. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  208. struct e1000_rx_ring *rx_ring,
  209. int *work_done, int work_to_do);
  210. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  211. struct e1000_rx_ring *rx_ring,
  212. int *work_done, int work_to_do);
  213. #else
  214. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  215. struct e1000_rx_ring *rx_ring);
  216. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  217. struct e1000_rx_ring *rx_ring);
  218. #endif
  219. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  220. struct e1000_rx_ring *rx_ring,
  221. int cleaned_count);
  222. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  223. struct e1000_rx_ring *rx_ring,
  224. int cleaned_count);
  225. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  226. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  227. int cmd);
  228. void e1000_set_ethtool_ops(struct net_device *netdev);
  229. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  230. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  231. static void e1000_tx_timeout(struct net_device *dev);
  232. static void e1000_tx_timeout_task(struct net_device *dev);
  233. static void e1000_smartspeed(struct e1000_adapter *adapter);
  234. static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  235. struct sk_buff *skb);
  236. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  237. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  238. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  239. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  240. #ifdef CONFIG_PM
  241. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  242. static int e1000_resume(struct pci_dev *pdev);
  243. #endif
  244. #ifdef CONFIG_NET_POLL_CONTROLLER
  245. /* for netdump / net console */
  246. static void e1000_netpoll (struct net_device *netdev);
  247. #endif
  248. #ifdef CONFIG_E1000_MQ
  249. /* for multiple Rx queues */
  250. void e1000_rx_schedule(void *data);
  251. #endif
  252. /* Exported from other modules */
  253. extern void e1000_check_options(struct e1000_adapter *adapter);
  254. static struct pci_driver e1000_driver = {
  255. .name = e1000_driver_name,
  256. .id_table = e1000_pci_tbl,
  257. .probe = e1000_probe,
  258. .remove = __devexit_p(e1000_remove),
  259. /* Power Managment Hooks */
  260. #ifdef CONFIG_PM
  261. .suspend = e1000_suspend,
  262. .resume = e1000_resume
  263. #endif
  264. };
  265. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  266. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  267. MODULE_LICENSE("GPL");
  268. MODULE_VERSION(DRV_VERSION);
  269. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  270. module_param(debug, int, 0);
  271. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  272. /**
  273. * e1000_init_module - Driver Registration Routine
  274. *
  275. * e1000_init_module is the first routine called when the driver is
  276. * loaded. All it does is register with the PCI subsystem.
  277. **/
  278. static int __init
  279. e1000_init_module(void)
  280. {
  281. int ret;
  282. printk(KERN_INFO "%s - version %s\n",
  283. e1000_driver_string, e1000_driver_version);
  284. printk(KERN_INFO "%s\n", e1000_copyright);
  285. ret = pci_module_init(&e1000_driver);
  286. return ret;
  287. }
  288. module_init(e1000_init_module);
  289. /**
  290. * e1000_exit_module - Driver Exit Cleanup Routine
  291. *
  292. * e1000_exit_module is called just before the driver is removed
  293. * from memory.
  294. **/
  295. static void __exit
  296. e1000_exit_module(void)
  297. {
  298. pci_unregister_driver(&e1000_driver);
  299. }
  300. module_exit(e1000_exit_module);
  301. /**
  302. * e1000_irq_disable - Mask off interrupt generation on the NIC
  303. * @adapter: board private structure
  304. **/
  305. static inline void
  306. e1000_irq_disable(struct e1000_adapter *adapter)
  307. {
  308. atomic_inc(&adapter->irq_sem);
  309. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  310. E1000_WRITE_FLUSH(&adapter->hw);
  311. synchronize_irq(adapter->pdev->irq);
  312. }
  313. /**
  314. * e1000_irq_enable - Enable default interrupt generation settings
  315. * @adapter: board private structure
  316. **/
  317. static inline void
  318. e1000_irq_enable(struct e1000_adapter *adapter)
  319. {
  320. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  321. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  322. E1000_WRITE_FLUSH(&adapter->hw);
  323. }
  324. }
  325. static void
  326. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  327. {
  328. struct net_device *netdev = adapter->netdev;
  329. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  330. uint16_t old_vid = adapter->mng_vlan_id;
  331. if (adapter->vlgrp) {
  332. if (!adapter->vlgrp->vlan_devices[vid]) {
  333. if (adapter->hw.mng_cookie.status &
  334. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  335. e1000_vlan_rx_add_vid(netdev, vid);
  336. adapter->mng_vlan_id = vid;
  337. } else
  338. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  339. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  340. (vid != old_vid) &&
  341. !adapter->vlgrp->vlan_devices[old_vid])
  342. e1000_vlan_rx_kill_vid(netdev, old_vid);
  343. }
  344. }
  345. }
  346. /**
  347. * e1000_release_hw_control - release control of the h/w to f/w
  348. * @adapter: address of board private structure
  349. *
  350. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  351. * For ASF and Pass Through versions of f/w this means that the
  352. * driver is no longer loaded. For AMT version (only with 82573) i
  353. * of the f/w this means that the netowrk i/f is closed.
  354. *
  355. **/
  356. static inline void
  357. e1000_release_hw_control(struct e1000_adapter *adapter)
  358. {
  359. uint32_t ctrl_ext;
  360. uint32_t swsm;
  361. /* Let firmware taken over control of h/w */
  362. switch (adapter->hw.mac_type) {
  363. case e1000_82571:
  364. case e1000_82572:
  365. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  366. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  367. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  368. break;
  369. case e1000_82573:
  370. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  371. E1000_WRITE_REG(&adapter->hw, SWSM,
  372. swsm & ~E1000_SWSM_DRV_LOAD);
  373. default:
  374. break;
  375. }
  376. }
  377. /**
  378. * e1000_get_hw_control - get control of the h/w from f/w
  379. * @adapter: address of board private structure
  380. *
  381. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  382. * For ASF and Pass Through versions of f/w this means that
  383. * the driver is loaded. For AMT version (only with 82573)
  384. * of the f/w this means that the netowrk i/f is open.
  385. *
  386. **/
  387. static inline void
  388. e1000_get_hw_control(struct e1000_adapter *adapter)
  389. {
  390. uint32_t ctrl_ext;
  391. uint32_t swsm;
  392. /* Let firmware know the driver has taken over */
  393. switch (adapter->hw.mac_type) {
  394. case e1000_82571:
  395. case e1000_82572:
  396. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  397. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  398. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  399. break;
  400. case e1000_82573:
  401. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  402. E1000_WRITE_REG(&adapter->hw, SWSM,
  403. swsm | E1000_SWSM_DRV_LOAD);
  404. break;
  405. default:
  406. break;
  407. }
  408. }
  409. int
  410. e1000_up(struct e1000_adapter *adapter)
  411. {
  412. struct net_device *netdev = adapter->netdev;
  413. int i, err;
  414. /* hardware has been reset, we need to reload some things */
  415. /* Reset the PHY if it was previously powered down */
  416. if (adapter->hw.media_type == e1000_media_type_copper) {
  417. uint16_t mii_reg;
  418. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  419. if (mii_reg & MII_CR_POWER_DOWN)
  420. e1000_phy_reset(&adapter->hw);
  421. }
  422. e1000_set_multi(netdev);
  423. e1000_restore_vlan(adapter);
  424. e1000_configure_tx(adapter);
  425. e1000_setup_rctl(adapter);
  426. e1000_configure_rx(adapter);
  427. /* call E1000_DESC_UNUSED which always leaves
  428. * at least 1 descriptor unused to make sure
  429. * next_to_use != next_to_clean */
  430. for (i = 0; i < adapter->num_rx_queues; i++) {
  431. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  432. adapter->alloc_rx_buf(adapter, ring,
  433. E1000_DESC_UNUSED(ring));
  434. }
  435. #ifdef CONFIG_PCI_MSI
  436. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  437. adapter->have_msi = TRUE;
  438. if ((err = pci_enable_msi(adapter->pdev))) {
  439. DPRINTK(PROBE, ERR,
  440. "Unable to allocate MSI interrupt Error: %d\n", err);
  441. adapter->have_msi = FALSE;
  442. }
  443. }
  444. #endif
  445. if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
  446. SA_SHIRQ | SA_SAMPLE_RANDOM,
  447. netdev->name, netdev))) {
  448. DPRINTK(PROBE, ERR,
  449. "Unable to allocate interrupt Error: %d\n", err);
  450. return err;
  451. }
  452. #ifdef CONFIG_E1000_MQ
  453. e1000_setup_queue_mapping(adapter);
  454. #endif
  455. adapter->tx_queue_len = netdev->tx_queue_len;
  456. mod_timer(&adapter->watchdog_timer, jiffies);
  457. #ifdef CONFIG_E1000_NAPI
  458. netif_poll_enable(netdev);
  459. #endif
  460. e1000_irq_enable(adapter);
  461. return 0;
  462. }
  463. void
  464. e1000_down(struct e1000_adapter *adapter)
  465. {
  466. struct net_device *netdev = adapter->netdev;
  467. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  468. e1000_check_mng_mode(&adapter->hw);
  469. e1000_irq_disable(adapter);
  470. #ifdef CONFIG_E1000_MQ
  471. while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
  472. #endif
  473. free_irq(adapter->pdev->irq, netdev);
  474. #ifdef CONFIG_PCI_MSI
  475. if (adapter->hw.mac_type > e1000_82547_rev_2 &&
  476. adapter->have_msi == TRUE)
  477. pci_disable_msi(adapter->pdev);
  478. #endif
  479. del_timer_sync(&adapter->tx_fifo_stall_timer);
  480. del_timer_sync(&adapter->watchdog_timer);
  481. del_timer_sync(&adapter->phy_info_timer);
  482. #ifdef CONFIG_E1000_NAPI
  483. netif_poll_disable(netdev);
  484. #endif
  485. netdev->tx_queue_len = adapter->tx_queue_len;
  486. adapter->link_speed = 0;
  487. adapter->link_duplex = 0;
  488. netif_carrier_off(netdev);
  489. netif_stop_queue(netdev);
  490. e1000_reset(adapter);
  491. e1000_clean_all_tx_rings(adapter);
  492. e1000_clean_all_rx_rings(adapter);
  493. /* Power down the PHY so no link is implied when interface is down *
  494. * The PHY cannot be powered down if any of the following is TRUE *
  495. * (a) WoL is enabled
  496. * (b) AMT is active
  497. * (c) SoL/IDER session is active */
  498. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  499. adapter->hw.media_type == e1000_media_type_copper &&
  500. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  501. !mng_mode_enabled &&
  502. !e1000_check_phy_reset_block(&adapter->hw)) {
  503. uint16_t mii_reg;
  504. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  505. mii_reg |= MII_CR_POWER_DOWN;
  506. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  507. mdelay(1);
  508. }
  509. }
  510. void
  511. e1000_reset(struct e1000_adapter *adapter)
  512. {
  513. uint32_t pba, manc;
  514. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  515. /* Repartition Pba for greater than 9k mtu
  516. * To take effect CTRL.RST is required.
  517. */
  518. switch (adapter->hw.mac_type) {
  519. case e1000_82547:
  520. case e1000_82547_rev_2:
  521. pba = E1000_PBA_30K;
  522. break;
  523. case e1000_82571:
  524. case e1000_82572:
  525. pba = E1000_PBA_38K;
  526. break;
  527. case e1000_82573:
  528. pba = E1000_PBA_12K;
  529. break;
  530. default:
  531. pba = E1000_PBA_48K;
  532. break;
  533. }
  534. if ((adapter->hw.mac_type != e1000_82573) &&
  535. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  536. pba -= 8; /* allocate more FIFO for Tx */
  537. if (adapter->hw.mac_type == e1000_82547) {
  538. adapter->tx_fifo_head = 0;
  539. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  540. adapter->tx_fifo_size =
  541. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  542. atomic_set(&adapter->tx_fifo_stall, 0);
  543. }
  544. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  545. /* flow control settings */
  546. /* Set the FC high water mark to 90% of the FIFO size.
  547. * Required to clear last 3 LSB */
  548. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  549. adapter->hw.fc_high_water = fc_high_water_mark;
  550. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  551. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  552. adapter->hw.fc_send_xon = 1;
  553. adapter->hw.fc = adapter->hw.original_fc;
  554. /* Allow time for pending master requests to run */
  555. e1000_reset_hw(&adapter->hw);
  556. if (adapter->hw.mac_type >= e1000_82544)
  557. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  558. if (e1000_init_hw(&adapter->hw))
  559. DPRINTK(PROBE, ERR, "Hardware Error\n");
  560. e1000_update_mng_vlan(adapter);
  561. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  562. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  563. e1000_reset_adaptive(&adapter->hw);
  564. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  565. if (adapter->en_mng_pt) {
  566. manc = E1000_READ_REG(&adapter->hw, MANC);
  567. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  568. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  569. }
  570. }
  571. /**
  572. * e1000_probe - Device Initialization Routine
  573. * @pdev: PCI device information struct
  574. * @ent: entry in e1000_pci_tbl
  575. *
  576. * Returns 0 on success, negative on failure
  577. *
  578. * e1000_probe initializes an adapter identified by a pci_dev structure.
  579. * The OS initialization, configuring of the adapter private structure,
  580. * and a hardware reset occur.
  581. **/
  582. static int __devinit
  583. e1000_probe(struct pci_dev *pdev,
  584. const struct pci_device_id *ent)
  585. {
  586. struct net_device *netdev;
  587. struct e1000_adapter *adapter;
  588. unsigned long mmio_start, mmio_len;
  589. static int cards_found = 0;
  590. int i, err, pci_using_dac;
  591. uint16_t eeprom_data;
  592. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  593. if ((err = pci_enable_device(pdev)))
  594. return err;
  595. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  596. pci_using_dac = 1;
  597. } else {
  598. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  599. E1000_ERR("No usable DMA configuration, aborting\n");
  600. return err;
  601. }
  602. pci_using_dac = 0;
  603. }
  604. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  605. return err;
  606. pci_set_master(pdev);
  607. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  608. if (!netdev) {
  609. err = -ENOMEM;
  610. goto err_alloc_etherdev;
  611. }
  612. SET_MODULE_OWNER(netdev);
  613. SET_NETDEV_DEV(netdev, &pdev->dev);
  614. pci_set_drvdata(pdev, netdev);
  615. adapter = netdev_priv(netdev);
  616. adapter->netdev = netdev;
  617. adapter->pdev = pdev;
  618. adapter->hw.back = adapter;
  619. adapter->msg_enable = (1 << debug) - 1;
  620. mmio_start = pci_resource_start(pdev, BAR_0);
  621. mmio_len = pci_resource_len(pdev, BAR_0);
  622. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  623. if (!adapter->hw.hw_addr) {
  624. err = -EIO;
  625. goto err_ioremap;
  626. }
  627. for (i = BAR_1; i <= BAR_5; i++) {
  628. if (pci_resource_len(pdev, i) == 0)
  629. continue;
  630. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  631. adapter->hw.io_base = pci_resource_start(pdev, i);
  632. break;
  633. }
  634. }
  635. netdev->open = &e1000_open;
  636. netdev->stop = &e1000_close;
  637. netdev->hard_start_xmit = &e1000_xmit_frame;
  638. netdev->get_stats = &e1000_get_stats;
  639. netdev->set_multicast_list = &e1000_set_multi;
  640. netdev->set_mac_address = &e1000_set_mac;
  641. netdev->change_mtu = &e1000_change_mtu;
  642. netdev->do_ioctl = &e1000_ioctl;
  643. e1000_set_ethtool_ops(netdev);
  644. netdev->tx_timeout = &e1000_tx_timeout;
  645. netdev->watchdog_timeo = 5 * HZ;
  646. #ifdef CONFIG_E1000_NAPI
  647. netdev->poll = &e1000_clean;
  648. netdev->weight = 64;
  649. #endif
  650. netdev->vlan_rx_register = e1000_vlan_rx_register;
  651. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  652. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  653. #ifdef CONFIG_NET_POLL_CONTROLLER
  654. netdev->poll_controller = e1000_netpoll;
  655. #endif
  656. strcpy(netdev->name, pci_name(pdev));
  657. netdev->mem_start = mmio_start;
  658. netdev->mem_end = mmio_start + mmio_len;
  659. netdev->base_addr = adapter->hw.io_base;
  660. adapter->bd_number = cards_found;
  661. /* setup the private structure */
  662. if ((err = e1000_sw_init(adapter)))
  663. goto err_sw_init;
  664. if ((err = e1000_check_phy_reset_block(&adapter->hw)))
  665. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  666. if (adapter->hw.mac_type >= e1000_82543) {
  667. netdev->features = NETIF_F_SG |
  668. NETIF_F_HW_CSUM |
  669. NETIF_F_HW_VLAN_TX |
  670. NETIF_F_HW_VLAN_RX |
  671. NETIF_F_HW_VLAN_FILTER;
  672. }
  673. #ifdef NETIF_F_TSO
  674. if ((adapter->hw.mac_type >= e1000_82544) &&
  675. (adapter->hw.mac_type != e1000_82547))
  676. netdev->features |= NETIF_F_TSO;
  677. #ifdef NETIF_F_TSO_IPV6
  678. if (adapter->hw.mac_type > e1000_82547_rev_2)
  679. netdev->features |= NETIF_F_TSO_IPV6;
  680. #endif
  681. #endif
  682. if (pci_using_dac)
  683. netdev->features |= NETIF_F_HIGHDMA;
  684. /* hard_start_xmit is safe against parallel locking */
  685. netdev->features |= NETIF_F_LLTX;
  686. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  687. /* before reading the EEPROM, reset the controller to
  688. * put the device in a known good starting state */
  689. e1000_reset_hw(&adapter->hw);
  690. /* make sure the EEPROM is good */
  691. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  692. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  693. err = -EIO;
  694. goto err_eeprom;
  695. }
  696. /* copy the MAC address out of the EEPROM */
  697. if (e1000_read_mac_addr(&adapter->hw))
  698. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  699. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  700. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  701. if (!is_valid_ether_addr(netdev->perm_addr)) {
  702. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  703. err = -EIO;
  704. goto err_eeprom;
  705. }
  706. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  707. e1000_get_bus_info(&adapter->hw);
  708. init_timer(&adapter->tx_fifo_stall_timer);
  709. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  710. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  711. init_timer(&adapter->watchdog_timer);
  712. adapter->watchdog_timer.function = &e1000_watchdog;
  713. adapter->watchdog_timer.data = (unsigned long) adapter;
  714. INIT_WORK(&adapter->watchdog_task,
  715. (void (*)(void *))e1000_watchdog_task, adapter);
  716. init_timer(&adapter->phy_info_timer);
  717. adapter->phy_info_timer.function = &e1000_update_phy_info;
  718. adapter->phy_info_timer.data = (unsigned long) adapter;
  719. INIT_WORK(&adapter->tx_timeout_task,
  720. (void (*)(void *))e1000_tx_timeout_task, netdev);
  721. /* we're going to reset, so assume we have no link for now */
  722. netif_carrier_off(netdev);
  723. netif_stop_queue(netdev);
  724. e1000_check_options(adapter);
  725. /* Initial Wake on LAN setting
  726. * If APM wake is enabled in the EEPROM,
  727. * enable the ACPI Magic Packet filter
  728. */
  729. switch (adapter->hw.mac_type) {
  730. case e1000_82542_rev2_0:
  731. case e1000_82542_rev2_1:
  732. case e1000_82543:
  733. break;
  734. case e1000_82544:
  735. e1000_read_eeprom(&adapter->hw,
  736. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  737. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  738. break;
  739. case e1000_82546:
  740. case e1000_82546_rev_3:
  741. case e1000_82571:
  742. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  743. e1000_read_eeprom(&adapter->hw,
  744. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  745. break;
  746. }
  747. /* Fall Through */
  748. default:
  749. e1000_read_eeprom(&adapter->hw,
  750. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  751. break;
  752. }
  753. if (eeprom_data & eeprom_apme_mask)
  754. adapter->wol |= E1000_WUFC_MAG;
  755. /* print bus type/speed/width info */
  756. {
  757. struct e1000_hw *hw = &adapter->hw;
  758. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  759. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  760. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  761. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  762. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  763. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  764. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  765. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  766. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  767. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  768. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  769. "32-bit"));
  770. }
  771. for (i = 0; i < 6; i++)
  772. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  773. /* reset the hardware with the new settings */
  774. e1000_reset(adapter);
  775. /* If the controller is 82573 and f/w is AMT, do not set
  776. * DRV_LOAD until the interface is up. For all other cases,
  777. * let the f/w know that the h/w is now under the control
  778. * of the driver. */
  779. if (adapter->hw.mac_type != e1000_82573 ||
  780. !e1000_check_mng_mode(&adapter->hw))
  781. e1000_get_hw_control(adapter);
  782. strcpy(netdev->name, "eth%d");
  783. if ((err = register_netdev(netdev)))
  784. goto err_register;
  785. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  786. cards_found++;
  787. return 0;
  788. err_register:
  789. err_sw_init:
  790. err_eeprom:
  791. iounmap(adapter->hw.hw_addr);
  792. err_ioremap:
  793. free_netdev(netdev);
  794. err_alloc_etherdev:
  795. pci_release_regions(pdev);
  796. return err;
  797. }
  798. /**
  799. * e1000_remove - Device Removal Routine
  800. * @pdev: PCI device information struct
  801. *
  802. * e1000_remove is called by the PCI subsystem to alert the driver
  803. * that it should release a PCI device. The could be caused by a
  804. * Hot-Plug event, or because the driver is going to be removed from
  805. * memory.
  806. **/
  807. static void __devexit
  808. e1000_remove(struct pci_dev *pdev)
  809. {
  810. struct net_device *netdev = pci_get_drvdata(pdev);
  811. struct e1000_adapter *adapter = netdev_priv(netdev);
  812. uint32_t manc;
  813. #ifdef CONFIG_E1000_NAPI
  814. int i;
  815. #endif
  816. flush_scheduled_work();
  817. if (adapter->hw.mac_type >= e1000_82540 &&
  818. adapter->hw.media_type == e1000_media_type_copper) {
  819. manc = E1000_READ_REG(&adapter->hw, MANC);
  820. if (manc & E1000_MANC_SMBUS_EN) {
  821. manc |= E1000_MANC_ARP_EN;
  822. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  823. }
  824. }
  825. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  826. * would have already happened in close and is redundant. */
  827. e1000_release_hw_control(adapter);
  828. unregister_netdev(netdev);
  829. #ifdef CONFIG_E1000_NAPI
  830. for (i = 0; i < adapter->num_rx_queues; i++)
  831. __dev_put(&adapter->polling_netdev[i]);
  832. #endif
  833. if (!e1000_check_phy_reset_block(&adapter->hw))
  834. e1000_phy_hw_reset(&adapter->hw);
  835. kfree(adapter->tx_ring);
  836. kfree(adapter->rx_ring);
  837. #ifdef CONFIG_E1000_NAPI
  838. kfree(adapter->polling_netdev);
  839. #endif
  840. iounmap(adapter->hw.hw_addr);
  841. pci_release_regions(pdev);
  842. #ifdef CONFIG_E1000_MQ
  843. free_percpu(adapter->cpu_netdev);
  844. free_percpu(adapter->cpu_tx_ring);
  845. #endif
  846. free_netdev(netdev);
  847. pci_disable_device(pdev);
  848. }
  849. /**
  850. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  851. * @adapter: board private structure to initialize
  852. *
  853. * e1000_sw_init initializes the Adapter private data structure.
  854. * Fields are initialized based on PCI device information and
  855. * OS network device settings (MTU size).
  856. **/
  857. static int __devinit
  858. e1000_sw_init(struct e1000_adapter *adapter)
  859. {
  860. struct e1000_hw *hw = &adapter->hw;
  861. struct net_device *netdev = adapter->netdev;
  862. struct pci_dev *pdev = adapter->pdev;
  863. #ifdef CONFIG_E1000_NAPI
  864. int i;
  865. #endif
  866. /* PCI config space info */
  867. hw->vendor_id = pdev->vendor;
  868. hw->device_id = pdev->device;
  869. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  870. hw->subsystem_id = pdev->subsystem_device;
  871. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  872. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  873. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  874. adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
  875. hw->max_frame_size = netdev->mtu +
  876. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  877. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  878. /* identify the MAC */
  879. if (e1000_set_mac_type(hw)) {
  880. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  881. return -EIO;
  882. }
  883. /* initialize eeprom parameters */
  884. if (e1000_init_eeprom_params(hw)) {
  885. E1000_ERR("EEPROM initialization failed\n");
  886. return -EIO;
  887. }
  888. switch (hw->mac_type) {
  889. default:
  890. break;
  891. case e1000_82541:
  892. case e1000_82547:
  893. case e1000_82541_rev_2:
  894. case e1000_82547_rev_2:
  895. hw->phy_init_script = 1;
  896. break;
  897. }
  898. e1000_set_media_type(hw);
  899. hw->wait_autoneg_complete = FALSE;
  900. hw->tbi_compatibility_en = TRUE;
  901. hw->adaptive_ifs = TRUE;
  902. /* Copper options */
  903. if (hw->media_type == e1000_media_type_copper) {
  904. hw->mdix = AUTO_ALL_MODES;
  905. hw->disable_polarity_correction = FALSE;
  906. hw->master_slave = E1000_MASTER_SLAVE;
  907. }
  908. #ifdef CONFIG_E1000_MQ
  909. /* Number of supported queues */
  910. switch (hw->mac_type) {
  911. case e1000_82571:
  912. case e1000_82572:
  913. /* These controllers support 2 tx queues, but with a single
  914. * qdisc implementation, multiple tx queues aren't quite as
  915. * interesting. If we can find a logical way of mapping
  916. * flows to a queue, then perhaps we can up the num_tx_queue
  917. * count back to its default. Until then, we run the risk of
  918. * terrible performance due to SACK overload. */
  919. adapter->num_tx_queues = 1;
  920. adapter->num_rx_queues = 2;
  921. break;
  922. default:
  923. adapter->num_tx_queues = 1;
  924. adapter->num_rx_queues = 1;
  925. break;
  926. }
  927. adapter->num_rx_queues = min(adapter->num_rx_queues, num_online_cpus());
  928. adapter->num_tx_queues = min(adapter->num_tx_queues, num_online_cpus());
  929. DPRINTK(DRV, INFO, "Multiqueue Enabled: Rx Queue count = %u %s\n",
  930. adapter->num_rx_queues,
  931. ((adapter->num_rx_queues == 1)
  932. ? ((num_online_cpus() > 1)
  933. ? "(due to unsupported feature in current adapter)"
  934. : "(due to unsupported system configuration)")
  935. : ""));
  936. DPRINTK(DRV, INFO, "Multiqueue Enabled: Tx Queue count = %u\n",
  937. adapter->num_tx_queues);
  938. #else
  939. adapter->num_tx_queues = 1;
  940. adapter->num_rx_queues = 1;
  941. #endif
  942. if (e1000_alloc_queues(adapter)) {
  943. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  944. return -ENOMEM;
  945. }
  946. #ifdef CONFIG_E1000_NAPI
  947. for (i = 0; i < adapter->num_rx_queues; i++) {
  948. adapter->polling_netdev[i].priv = adapter;
  949. adapter->polling_netdev[i].poll = &e1000_clean;
  950. adapter->polling_netdev[i].weight = 64;
  951. dev_hold(&adapter->polling_netdev[i]);
  952. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  953. }
  954. spin_lock_init(&adapter->tx_queue_lock);
  955. #endif
  956. atomic_set(&adapter->irq_sem, 1);
  957. spin_lock_init(&adapter->stats_lock);
  958. return 0;
  959. }
  960. /**
  961. * e1000_alloc_queues - Allocate memory for all rings
  962. * @adapter: board private structure to initialize
  963. *
  964. * We allocate one ring per queue at run-time since we don't know the
  965. * number of queues at compile-time. The polling_netdev array is
  966. * intended for Multiqueue, but should work fine with a single queue.
  967. **/
  968. static int __devinit
  969. e1000_alloc_queues(struct e1000_adapter *adapter)
  970. {
  971. int size;
  972. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  973. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  974. if (!adapter->tx_ring)
  975. return -ENOMEM;
  976. memset(adapter->tx_ring, 0, size);
  977. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  978. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  979. if (!adapter->rx_ring) {
  980. kfree(adapter->tx_ring);
  981. return -ENOMEM;
  982. }
  983. memset(adapter->rx_ring, 0, size);
  984. #ifdef CONFIG_E1000_NAPI
  985. size = sizeof(struct net_device) * adapter->num_rx_queues;
  986. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  987. if (!adapter->polling_netdev) {
  988. kfree(adapter->tx_ring);
  989. kfree(adapter->rx_ring);
  990. return -ENOMEM;
  991. }
  992. memset(adapter->polling_netdev, 0, size);
  993. #endif
  994. #ifdef CONFIG_E1000_MQ
  995. adapter->rx_sched_call_data.func = e1000_rx_schedule;
  996. adapter->rx_sched_call_data.info = adapter->netdev;
  997. adapter->cpu_netdev = alloc_percpu(struct net_device *);
  998. adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
  999. #endif
  1000. return E1000_SUCCESS;
  1001. }
  1002. #ifdef CONFIG_E1000_MQ
  1003. static void __devinit
  1004. e1000_setup_queue_mapping(struct e1000_adapter *adapter)
  1005. {
  1006. int i, cpu;
  1007. adapter->rx_sched_call_data.func = e1000_rx_schedule;
  1008. adapter->rx_sched_call_data.info = adapter->netdev;
  1009. cpus_clear(adapter->rx_sched_call_data.cpumask);
  1010. adapter->cpu_netdev = alloc_percpu(struct net_device *);
  1011. adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
  1012. lock_cpu_hotplug();
  1013. i = 0;
  1014. for_each_online_cpu(cpu) {
  1015. *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_tx_queues];
  1016. /* This is incomplete because we'd like to assign separate
  1017. * physical cpus to these netdev polling structures and
  1018. * avoid saturating a subset of cpus.
  1019. */
  1020. if (i < adapter->num_rx_queues) {
  1021. *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
  1022. adapter->rx_ring[i].cpu = cpu;
  1023. cpu_set(cpu, adapter->cpumask);
  1024. } else
  1025. *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
  1026. i++;
  1027. }
  1028. unlock_cpu_hotplug();
  1029. }
  1030. #endif
  1031. /**
  1032. * e1000_open - Called when a network interface is made active
  1033. * @netdev: network interface device structure
  1034. *
  1035. * Returns 0 on success, negative value on failure
  1036. *
  1037. * The open entry point is called when a network interface is made
  1038. * active by the system (IFF_UP). At this point all resources needed
  1039. * for transmit and receive operations are allocated, the interrupt
  1040. * handler is registered with the OS, the watchdog timer is started,
  1041. * and the stack is notified that the interface is ready.
  1042. **/
  1043. static int
  1044. e1000_open(struct net_device *netdev)
  1045. {
  1046. struct e1000_adapter *adapter = netdev_priv(netdev);
  1047. int err;
  1048. /* allocate transmit descriptors */
  1049. if ((err = e1000_setup_all_tx_resources(adapter)))
  1050. goto err_setup_tx;
  1051. /* allocate receive descriptors */
  1052. if ((err = e1000_setup_all_rx_resources(adapter)))
  1053. goto err_setup_rx;
  1054. if ((err = e1000_up(adapter)))
  1055. goto err_up;
  1056. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  1057. if ((adapter->hw.mng_cookie.status &
  1058. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1059. e1000_update_mng_vlan(adapter);
  1060. }
  1061. /* If AMT is enabled, let the firmware know that the network
  1062. * interface is now open */
  1063. if (adapter->hw.mac_type == e1000_82573 &&
  1064. e1000_check_mng_mode(&adapter->hw))
  1065. e1000_get_hw_control(adapter);
  1066. return E1000_SUCCESS;
  1067. err_up:
  1068. e1000_free_all_rx_resources(adapter);
  1069. err_setup_rx:
  1070. e1000_free_all_tx_resources(adapter);
  1071. err_setup_tx:
  1072. e1000_reset(adapter);
  1073. return err;
  1074. }
  1075. /**
  1076. * e1000_close - Disables a network interface
  1077. * @netdev: network interface device structure
  1078. *
  1079. * Returns 0, this is not allowed to fail
  1080. *
  1081. * The close entry point is called when an interface is de-activated
  1082. * by the OS. The hardware is still under the drivers control, but
  1083. * needs to be disabled. A global MAC reset is issued to stop the
  1084. * hardware, and all transmit and receive resources are freed.
  1085. **/
  1086. static int
  1087. e1000_close(struct net_device *netdev)
  1088. {
  1089. struct e1000_adapter *adapter = netdev_priv(netdev);
  1090. e1000_down(adapter);
  1091. e1000_free_all_tx_resources(adapter);
  1092. e1000_free_all_rx_resources(adapter);
  1093. if ((adapter->hw.mng_cookie.status &
  1094. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1095. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1096. }
  1097. /* If AMT is enabled, let the firmware know that the network
  1098. * interface is now closed */
  1099. if (adapter->hw.mac_type == e1000_82573 &&
  1100. e1000_check_mng_mode(&adapter->hw))
  1101. e1000_release_hw_control(adapter);
  1102. return 0;
  1103. }
  1104. /**
  1105. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1106. * @adapter: address of board private structure
  1107. * @start: address of beginning of memory
  1108. * @len: length of memory
  1109. **/
  1110. static inline boolean_t
  1111. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1112. void *start, unsigned long len)
  1113. {
  1114. unsigned long begin = (unsigned long) start;
  1115. unsigned long end = begin + len;
  1116. /* First rev 82545 and 82546 need to not allow any memory
  1117. * write location to cross 64k boundary due to errata 23 */
  1118. if (adapter->hw.mac_type == e1000_82545 ||
  1119. adapter->hw.mac_type == e1000_82546) {
  1120. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1121. }
  1122. return TRUE;
  1123. }
  1124. /**
  1125. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1126. * @adapter: board private structure
  1127. * @txdr: tx descriptor ring (for a specific queue) to setup
  1128. *
  1129. * Return 0 on success, negative on failure
  1130. **/
  1131. static int
  1132. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1133. struct e1000_tx_ring *txdr)
  1134. {
  1135. struct pci_dev *pdev = adapter->pdev;
  1136. int size;
  1137. size = sizeof(struct e1000_buffer) * txdr->count;
  1138. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1139. if (!txdr->buffer_info) {
  1140. DPRINTK(PROBE, ERR,
  1141. "Unable to allocate memory for the transmit descriptor ring\n");
  1142. return -ENOMEM;
  1143. }
  1144. memset(txdr->buffer_info, 0, size);
  1145. /* round up to nearest 4K */
  1146. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1147. E1000_ROUNDUP(txdr->size, 4096);
  1148. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1149. if (!txdr->desc) {
  1150. setup_tx_desc_die:
  1151. vfree(txdr->buffer_info);
  1152. DPRINTK(PROBE, ERR,
  1153. "Unable to allocate memory for the transmit descriptor ring\n");
  1154. return -ENOMEM;
  1155. }
  1156. /* Fix for errata 23, can't cross 64kB boundary */
  1157. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1158. void *olddesc = txdr->desc;
  1159. dma_addr_t olddma = txdr->dma;
  1160. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1161. "at %p\n", txdr->size, txdr->desc);
  1162. /* Try again, without freeing the previous */
  1163. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1164. /* Failed allocation, critical failure */
  1165. if (!txdr->desc) {
  1166. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1167. goto setup_tx_desc_die;
  1168. }
  1169. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1170. /* give up */
  1171. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1172. txdr->dma);
  1173. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1174. DPRINTK(PROBE, ERR,
  1175. "Unable to allocate aligned memory "
  1176. "for the transmit descriptor ring\n");
  1177. vfree(txdr->buffer_info);
  1178. return -ENOMEM;
  1179. } else {
  1180. /* Free old allocation, new allocation was successful */
  1181. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1182. }
  1183. }
  1184. memset(txdr->desc, 0, txdr->size);
  1185. txdr->next_to_use = 0;
  1186. txdr->next_to_clean = 0;
  1187. spin_lock_init(&txdr->tx_lock);
  1188. return 0;
  1189. }
  1190. /**
  1191. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1192. * (Descriptors) for all queues
  1193. * @adapter: board private structure
  1194. *
  1195. * If this function returns with an error, then it's possible one or
  1196. * more of the rings is populated (while the rest are not). It is the
  1197. * callers duty to clean those orphaned rings.
  1198. *
  1199. * Return 0 on success, negative on failure
  1200. **/
  1201. int
  1202. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1203. {
  1204. int i, err = 0;
  1205. for (i = 0; i < adapter->num_tx_queues; i++) {
  1206. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1207. if (err) {
  1208. DPRINTK(PROBE, ERR,
  1209. "Allocation for Tx Queue %u failed\n", i);
  1210. break;
  1211. }
  1212. }
  1213. return err;
  1214. }
  1215. /**
  1216. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1217. * @adapter: board private structure
  1218. *
  1219. * Configure the Tx unit of the MAC after a reset.
  1220. **/
  1221. static void
  1222. e1000_configure_tx(struct e1000_adapter *adapter)
  1223. {
  1224. uint64_t tdba;
  1225. struct e1000_hw *hw = &adapter->hw;
  1226. uint32_t tdlen, tctl, tipg, tarc;
  1227. uint32_t ipgr1, ipgr2;
  1228. /* Setup the HW Tx Head and Tail descriptor pointers */
  1229. switch (adapter->num_tx_queues) {
  1230. case 2:
  1231. tdba = adapter->tx_ring[1].dma;
  1232. tdlen = adapter->tx_ring[1].count *
  1233. sizeof(struct e1000_tx_desc);
  1234. E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
  1235. E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
  1236. E1000_WRITE_REG(hw, TDLEN1, tdlen);
  1237. E1000_WRITE_REG(hw, TDH1, 0);
  1238. E1000_WRITE_REG(hw, TDT1, 0);
  1239. adapter->tx_ring[1].tdh = E1000_TDH1;
  1240. adapter->tx_ring[1].tdt = E1000_TDT1;
  1241. /* Fall Through */
  1242. case 1:
  1243. default:
  1244. tdba = adapter->tx_ring[0].dma;
  1245. tdlen = adapter->tx_ring[0].count *
  1246. sizeof(struct e1000_tx_desc);
  1247. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1248. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1249. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1250. E1000_WRITE_REG(hw, TDH, 0);
  1251. E1000_WRITE_REG(hw, TDT, 0);
  1252. adapter->tx_ring[0].tdh = E1000_TDH;
  1253. adapter->tx_ring[0].tdt = E1000_TDT;
  1254. break;
  1255. }
  1256. /* Set the default values for the Tx Inter Packet Gap timer */
  1257. if (hw->media_type == e1000_media_type_fiber ||
  1258. hw->media_type == e1000_media_type_internal_serdes)
  1259. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1260. else
  1261. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1262. switch (hw->mac_type) {
  1263. case e1000_82542_rev2_0:
  1264. case e1000_82542_rev2_1:
  1265. tipg = DEFAULT_82542_TIPG_IPGT;
  1266. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1267. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1268. break;
  1269. default:
  1270. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1271. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1272. break;
  1273. }
  1274. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1275. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1276. E1000_WRITE_REG(hw, TIPG, tipg);
  1277. /* Set the Tx Interrupt Delay register */
  1278. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1279. if (hw->mac_type >= e1000_82540)
  1280. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1281. /* Program the Transmit Control Register */
  1282. tctl = E1000_READ_REG(hw, TCTL);
  1283. tctl &= ~E1000_TCTL_CT;
  1284. tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1285. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1286. E1000_WRITE_REG(hw, TCTL, tctl);
  1287. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1288. tarc = E1000_READ_REG(hw, TARC0);
  1289. tarc |= ((1 << 25) | (1 << 21));
  1290. E1000_WRITE_REG(hw, TARC0, tarc);
  1291. tarc = E1000_READ_REG(hw, TARC1);
  1292. tarc |= (1 << 25);
  1293. if (tctl & E1000_TCTL_MULR)
  1294. tarc &= ~(1 << 28);
  1295. else
  1296. tarc |= (1 << 28);
  1297. E1000_WRITE_REG(hw, TARC1, tarc);
  1298. }
  1299. e1000_config_collision_dist(hw);
  1300. /* Setup Transmit Descriptor Settings for eop descriptor */
  1301. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1302. E1000_TXD_CMD_IFCS;
  1303. if (hw->mac_type < e1000_82543)
  1304. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1305. else
  1306. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1307. /* Cache if we're 82544 running in PCI-X because we'll
  1308. * need this to apply a workaround later in the send path. */
  1309. if (hw->mac_type == e1000_82544 &&
  1310. hw->bus_type == e1000_bus_type_pcix)
  1311. adapter->pcix_82544 = 1;
  1312. }
  1313. /**
  1314. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1315. * @adapter: board private structure
  1316. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1317. *
  1318. * Returns 0 on success, negative on failure
  1319. **/
  1320. static int
  1321. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1322. struct e1000_rx_ring *rxdr)
  1323. {
  1324. struct pci_dev *pdev = adapter->pdev;
  1325. int size, desc_len;
  1326. size = sizeof(struct e1000_buffer) * rxdr->count;
  1327. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1328. if (!rxdr->buffer_info) {
  1329. DPRINTK(PROBE, ERR,
  1330. "Unable to allocate memory for the receive descriptor ring\n");
  1331. return -ENOMEM;
  1332. }
  1333. memset(rxdr->buffer_info, 0, size);
  1334. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1335. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1336. if (!rxdr->ps_page) {
  1337. vfree(rxdr->buffer_info);
  1338. DPRINTK(PROBE, ERR,
  1339. "Unable to allocate memory for the receive descriptor ring\n");
  1340. return -ENOMEM;
  1341. }
  1342. memset(rxdr->ps_page, 0, size);
  1343. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1344. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1345. if (!rxdr->ps_page_dma) {
  1346. vfree(rxdr->buffer_info);
  1347. kfree(rxdr->ps_page);
  1348. DPRINTK(PROBE, ERR,
  1349. "Unable to allocate memory for the receive descriptor ring\n");
  1350. return -ENOMEM;
  1351. }
  1352. memset(rxdr->ps_page_dma, 0, size);
  1353. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1354. desc_len = sizeof(struct e1000_rx_desc);
  1355. else
  1356. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1357. /* Round up to nearest 4K */
  1358. rxdr->size = rxdr->count * desc_len;
  1359. E1000_ROUNDUP(rxdr->size, 4096);
  1360. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1361. if (!rxdr->desc) {
  1362. DPRINTK(PROBE, ERR,
  1363. "Unable to allocate memory for the receive descriptor ring\n");
  1364. setup_rx_desc_die:
  1365. vfree(rxdr->buffer_info);
  1366. kfree(rxdr->ps_page);
  1367. kfree(rxdr->ps_page_dma);
  1368. return -ENOMEM;
  1369. }
  1370. /* Fix for errata 23, can't cross 64kB boundary */
  1371. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1372. void *olddesc = rxdr->desc;
  1373. dma_addr_t olddma = rxdr->dma;
  1374. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1375. "at %p\n", rxdr->size, rxdr->desc);
  1376. /* Try again, without freeing the previous */
  1377. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1378. /* Failed allocation, critical failure */
  1379. if (!rxdr->desc) {
  1380. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1381. DPRINTK(PROBE, ERR,
  1382. "Unable to allocate memory "
  1383. "for the receive descriptor ring\n");
  1384. goto setup_rx_desc_die;
  1385. }
  1386. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1387. /* give up */
  1388. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1389. rxdr->dma);
  1390. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1391. DPRINTK(PROBE, ERR,
  1392. "Unable to allocate aligned memory "
  1393. "for the receive descriptor ring\n");
  1394. goto setup_rx_desc_die;
  1395. } else {
  1396. /* Free old allocation, new allocation was successful */
  1397. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1398. }
  1399. }
  1400. memset(rxdr->desc, 0, rxdr->size);
  1401. rxdr->next_to_clean = 0;
  1402. rxdr->next_to_use = 0;
  1403. rxdr->rx_skb_top = NULL;
  1404. rxdr->rx_skb_prev = NULL;
  1405. return 0;
  1406. }
  1407. /**
  1408. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1409. * (Descriptors) for all queues
  1410. * @adapter: board private structure
  1411. *
  1412. * If this function returns with an error, then it's possible one or
  1413. * more of the rings is populated (while the rest are not). It is the
  1414. * callers duty to clean those orphaned rings.
  1415. *
  1416. * Return 0 on success, negative on failure
  1417. **/
  1418. int
  1419. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1420. {
  1421. int i, err = 0;
  1422. for (i = 0; i < adapter->num_rx_queues; i++) {
  1423. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1424. if (err) {
  1425. DPRINTK(PROBE, ERR,
  1426. "Allocation for Rx Queue %u failed\n", i);
  1427. break;
  1428. }
  1429. }
  1430. return err;
  1431. }
  1432. /**
  1433. * e1000_setup_rctl - configure the receive control registers
  1434. * @adapter: Board private structure
  1435. **/
  1436. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1437. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1438. static void
  1439. e1000_setup_rctl(struct e1000_adapter *adapter)
  1440. {
  1441. uint32_t rctl, rfctl;
  1442. uint32_t psrctl = 0;
  1443. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1444. uint32_t pages = 0;
  1445. #endif
  1446. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1447. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1448. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1449. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1450. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1451. if (adapter->hw.mac_type > e1000_82543)
  1452. rctl |= E1000_RCTL_SECRC;
  1453. if (adapter->hw.tbi_compatibility_on == 1)
  1454. rctl |= E1000_RCTL_SBP;
  1455. else
  1456. rctl &= ~E1000_RCTL_SBP;
  1457. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1458. rctl &= ~E1000_RCTL_LPE;
  1459. else
  1460. rctl |= E1000_RCTL_LPE;
  1461. /* Setup buffer sizes */
  1462. if (adapter->hw.mac_type >= e1000_82571) {
  1463. /* We can now specify buffers in 1K increments.
  1464. * BSIZE and BSEX are ignored in this case. */
  1465. rctl |= adapter->rx_buffer_len << 0x11;
  1466. } else {
  1467. rctl &= ~E1000_RCTL_SZ_4096;
  1468. rctl &= ~E1000_RCTL_BSEX;
  1469. rctl |= E1000_RCTL_SZ_2048;
  1470. }
  1471. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1472. /* 82571 and greater support packet-split where the protocol
  1473. * header is placed in skb->data and the packet data is
  1474. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1475. * In the case of a non-split, skb->data is linearly filled,
  1476. * followed by the page buffers. Therefore, skb->data is
  1477. * sized to hold the largest protocol header.
  1478. */
  1479. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1480. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1481. PAGE_SIZE <= 16384)
  1482. adapter->rx_ps_pages = pages;
  1483. else
  1484. adapter->rx_ps_pages = 0;
  1485. #endif
  1486. if (adapter->rx_ps_pages) {
  1487. /* Configure extra packet-split registers */
  1488. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1489. rfctl |= E1000_RFCTL_EXTEN;
  1490. /* disable IPv6 packet split support */
  1491. rfctl |= E1000_RFCTL_IPV6_DIS;
  1492. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1493. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1494. psrctl |= adapter->rx_ps_bsize0 >>
  1495. E1000_PSRCTL_BSIZE0_SHIFT;
  1496. switch (adapter->rx_ps_pages) {
  1497. case 3:
  1498. psrctl |= PAGE_SIZE <<
  1499. E1000_PSRCTL_BSIZE3_SHIFT;
  1500. case 2:
  1501. psrctl |= PAGE_SIZE <<
  1502. E1000_PSRCTL_BSIZE2_SHIFT;
  1503. case 1:
  1504. psrctl |= PAGE_SIZE >>
  1505. E1000_PSRCTL_BSIZE1_SHIFT;
  1506. break;
  1507. }
  1508. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1509. }
  1510. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1511. }
  1512. /**
  1513. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1514. * @adapter: board private structure
  1515. *
  1516. * Configure the Rx unit of the MAC after a reset.
  1517. **/
  1518. static void
  1519. e1000_configure_rx(struct e1000_adapter *adapter)
  1520. {
  1521. uint64_t rdba;
  1522. struct e1000_hw *hw = &adapter->hw;
  1523. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1524. #ifdef CONFIG_E1000_MQ
  1525. uint32_t reta, mrqc;
  1526. int i;
  1527. #endif
  1528. if (adapter->rx_ps_pages) {
  1529. rdlen = adapter->rx_ring[0].count *
  1530. sizeof(union e1000_rx_desc_packet_split);
  1531. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1532. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1533. } else {
  1534. rdlen = adapter->rx_ring[0].count *
  1535. sizeof(struct e1000_rx_desc);
  1536. adapter->clean_rx = e1000_clean_rx_irq;
  1537. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1538. }
  1539. /* disable receives while setting up the descriptors */
  1540. rctl = E1000_READ_REG(hw, RCTL);
  1541. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1542. /* set the Receive Delay Timer Register */
  1543. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1544. if (hw->mac_type >= e1000_82540) {
  1545. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1546. if (adapter->itr > 1)
  1547. E1000_WRITE_REG(hw, ITR,
  1548. 1000000000 / (adapter->itr * 256));
  1549. }
  1550. if (hw->mac_type >= e1000_82571) {
  1551. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1552. /* Reset delay timers after every interrupt */
  1553. ctrl_ext |= E1000_CTRL_EXT_CANC;
  1554. #ifdef CONFIG_E1000_NAPI
  1555. /* Auto-Mask interrupts upon ICR read. */
  1556. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1557. #endif
  1558. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1559. E1000_WRITE_REG(hw, IAM, ~0);
  1560. E1000_WRITE_FLUSH(hw);
  1561. }
  1562. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1563. * the Base and Length of the Rx Descriptor Ring */
  1564. switch (adapter->num_rx_queues) {
  1565. #ifdef CONFIG_E1000_MQ
  1566. case 2:
  1567. rdba = adapter->rx_ring[1].dma;
  1568. E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
  1569. E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
  1570. E1000_WRITE_REG(hw, RDLEN1, rdlen);
  1571. E1000_WRITE_REG(hw, RDH1, 0);
  1572. E1000_WRITE_REG(hw, RDT1, 0);
  1573. adapter->rx_ring[1].rdh = E1000_RDH1;
  1574. adapter->rx_ring[1].rdt = E1000_RDT1;
  1575. /* Fall Through */
  1576. #endif
  1577. case 1:
  1578. default:
  1579. rdba = adapter->rx_ring[0].dma;
  1580. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1581. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1582. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1583. E1000_WRITE_REG(hw, RDH, 0);
  1584. E1000_WRITE_REG(hw, RDT, 0);
  1585. adapter->rx_ring[0].rdh = E1000_RDH;
  1586. adapter->rx_ring[0].rdt = E1000_RDT;
  1587. break;
  1588. }
  1589. #ifdef CONFIG_E1000_MQ
  1590. if (adapter->num_rx_queues > 1) {
  1591. uint32_t random[10];
  1592. get_random_bytes(&random[0], 40);
  1593. if (hw->mac_type <= e1000_82572) {
  1594. E1000_WRITE_REG(hw, RSSIR, 0);
  1595. E1000_WRITE_REG(hw, RSSIM, 0);
  1596. }
  1597. switch (adapter->num_rx_queues) {
  1598. case 2:
  1599. default:
  1600. reta = 0x00800080;
  1601. mrqc = E1000_MRQC_ENABLE_RSS_2Q;
  1602. break;
  1603. }
  1604. /* Fill out redirection table */
  1605. for (i = 0; i < 32; i++)
  1606. E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
  1607. /* Fill out hash function seeds */
  1608. for (i = 0; i < 10; i++)
  1609. E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
  1610. mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
  1611. E1000_MRQC_RSS_FIELD_IPV4_TCP);
  1612. E1000_WRITE_REG(hw, MRQC, mrqc);
  1613. }
  1614. /* Multiqueue and packet checksumming are mutually exclusive. */
  1615. if (hw->mac_type >= e1000_82571) {
  1616. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1617. rxcsum |= E1000_RXCSUM_PCSD;
  1618. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1619. }
  1620. #else
  1621. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1622. if (hw->mac_type >= e1000_82543) {
  1623. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1624. if (adapter->rx_csum == TRUE) {
  1625. rxcsum |= E1000_RXCSUM_TUOFL;
  1626. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1627. * Must be used in conjunction with packet-split. */
  1628. if ((hw->mac_type >= e1000_82571) &&
  1629. (adapter->rx_ps_pages)) {
  1630. rxcsum |= E1000_RXCSUM_IPPCSE;
  1631. }
  1632. } else {
  1633. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1634. /* don't need to clear IPPCSE as it defaults to 0 */
  1635. }
  1636. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1637. }
  1638. #endif /* CONFIG_E1000_MQ */
  1639. if (hw->mac_type == e1000_82573)
  1640. E1000_WRITE_REG(hw, ERT, 0x0100);
  1641. /* Enable Receives */
  1642. E1000_WRITE_REG(hw, RCTL, rctl);
  1643. }
  1644. /**
  1645. * e1000_free_tx_resources - Free Tx Resources per Queue
  1646. * @adapter: board private structure
  1647. * @tx_ring: Tx descriptor ring for a specific queue
  1648. *
  1649. * Free all transmit software resources
  1650. **/
  1651. static void
  1652. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1653. struct e1000_tx_ring *tx_ring)
  1654. {
  1655. struct pci_dev *pdev = adapter->pdev;
  1656. e1000_clean_tx_ring(adapter, tx_ring);
  1657. vfree(tx_ring->buffer_info);
  1658. tx_ring->buffer_info = NULL;
  1659. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1660. tx_ring->desc = NULL;
  1661. }
  1662. /**
  1663. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1664. * @adapter: board private structure
  1665. *
  1666. * Free all transmit software resources
  1667. **/
  1668. void
  1669. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1670. {
  1671. int i;
  1672. for (i = 0; i < adapter->num_tx_queues; i++)
  1673. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1674. }
  1675. static inline void
  1676. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1677. struct e1000_buffer *buffer_info)
  1678. {
  1679. if (buffer_info->dma) {
  1680. pci_unmap_page(adapter->pdev,
  1681. buffer_info->dma,
  1682. buffer_info->length,
  1683. PCI_DMA_TODEVICE);
  1684. }
  1685. if (buffer_info->skb)
  1686. dev_kfree_skb_any(buffer_info->skb);
  1687. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1688. }
  1689. /**
  1690. * e1000_clean_tx_ring - Free Tx Buffers
  1691. * @adapter: board private structure
  1692. * @tx_ring: ring to be cleaned
  1693. **/
  1694. static void
  1695. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1696. struct e1000_tx_ring *tx_ring)
  1697. {
  1698. struct e1000_buffer *buffer_info;
  1699. unsigned long size;
  1700. unsigned int i;
  1701. /* Free all the Tx ring sk_buffs */
  1702. for (i = 0; i < tx_ring->count; i++) {
  1703. buffer_info = &tx_ring->buffer_info[i];
  1704. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1705. }
  1706. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1707. memset(tx_ring->buffer_info, 0, size);
  1708. /* Zero out the descriptor ring */
  1709. memset(tx_ring->desc, 0, tx_ring->size);
  1710. tx_ring->next_to_use = 0;
  1711. tx_ring->next_to_clean = 0;
  1712. tx_ring->last_tx_tso = 0;
  1713. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1714. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1715. }
  1716. /**
  1717. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1718. * @adapter: board private structure
  1719. **/
  1720. static void
  1721. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1722. {
  1723. int i;
  1724. for (i = 0; i < adapter->num_tx_queues; i++)
  1725. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1726. }
  1727. /**
  1728. * e1000_free_rx_resources - Free Rx Resources
  1729. * @adapter: board private structure
  1730. * @rx_ring: ring to clean the resources from
  1731. *
  1732. * Free all receive software resources
  1733. **/
  1734. static void
  1735. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1736. struct e1000_rx_ring *rx_ring)
  1737. {
  1738. struct pci_dev *pdev = adapter->pdev;
  1739. e1000_clean_rx_ring(adapter, rx_ring);
  1740. vfree(rx_ring->buffer_info);
  1741. rx_ring->buffer_info = NULL;
  1742. kfree(rx_ring->ps_page);
  1743. rx_ring->ps_page = NULL;
  1744. kfree(rx_ring->ps_page_dma);
  1745. rx_ring->ps_page_dma = NULL;
  1746. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1747. rx_ring->desc = NULL;
  1748. }
  1749. /**
  1750. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1751. * @adapter: board private structure
  1752. *
  1753. * Free all receive software resources
  1754. **/
  1755. void
  1756. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1757. {
  1758. int i;
  1759. for (i = 0; i < adapter->num_rx_queues; i++)
  1760. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1761. }
  1762. /**
  1763. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1764. * @adapter: board private structure
  1765. * @rx_ring: ring to free buffers from
  1766. **/
  1767. static void
  1768. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1769. struct e1000_rx_ring *rx_ring)
  1770. {
  1771. struct e1000_buffer *buffer_info;
  1772. struct e1000_ps_page *ps_page;
  1773. struct e1000_ps_page_dma *ps_page_dma;
  1774. struct pci_dev *pdev = adapter->pdev;
  1775. unsigned long size;
  1776. unsigned int i, j;
  1777. /* Free all the Rx ring sk_buffs */
  1778. for (i = 0; i < rx_ring->count; i++) {
  1779. buffer_info = &rx_ring->buffer_info[i];
  1780. if (buffer_info->skb) {
  1781. pci_unmap_single(pdev,
  1782. buffer_info->dma,
  1783. buffer_info->length,
  1784. PCI_DMA_FROMDEVICE);
  1785. dev_kfree_skb(buffer_info->skb);
  1786. buffer_info->skb = NULL;
  1787. }
  1788. ps_page = &rx_ring->ps_page[i];
  1789. ps_page_dma = &rx_ring->ps_page_dma[i];
  1790. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1791. if (!ps_page->ps_page[j]) break;
  1792. pci_unmap_page(pdev,
  1793. ps_page_dma->ps_page_dma[j],
  1794. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1795. ps_page_dma->ps_page_dma[j] = 0;
  1796. put_page(ps_page->ps_page[j]);
  1797. ps_page->ps_page[j] = NULL;
  1798. }
  1799. }
  1800. /* there also may be some cached data in our adapter */
  1801. if (rx_ring->rx_skb_top) {
  1802. dev_kfree_skb(rx_ring->rx_skb_top);
  1803. /* rx_skb_prev will be wiped out by rx_skb_top */
  1804. rx_ring->rx_skb_top = NULL;
  1805. rx_ring->rx_skb_prev = NULL;
  1806. }
  1807. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1808. memset(rx_ring->buffer_info, 0, size);
  1809. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1810. memset(rx_ring->ps_page, 0, size);
  1811. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1812. memset(rx_ring->ps_page_dma, 0, size);
  1813. /* Zero out the descriptor ring */
  1814. memset(rx_ring->desc, 0, rx_ring->size);
  1815. rx_ring->next_to_clean = 0;
  1816. rx_ring->next_to_use = 0;
  1817. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1818. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1819. }
  1820. /**
  1821. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1822. * @adapter: board private structure
  1823. **/
  1824. static void
  1825. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1826. {
  1827. int i;
  1828. for (i = 0; i < adapter->num_rx_queues; i++)
  1829. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1830. }
  1831. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1832. * and memory write and invalidate disabled for certain operations
  1833. */
  1834. static void
  1835. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1836. {
  1837. struct net_device *netdev = adapter->netdev;
  1838. uint32_t rctl;
  1839. e1000_pci_clear_mwi(&adapter->hw);
  1840. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1841. rctl |= E1000_RCTL_RST;
  1842. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1843. E1000_WRITE_FLUSH(&adapter->hw);
  1844. mdelay(5);
  1845. if (netif_running(netdev))
  1846. e1000_clean_all_rx_rings(adapter);
  1847. }
  1848. static void
  1849. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1850. {
  1851. struct net_device *netdev = adapter->netdev;
  1852. uint32_t rctl;
  1853. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1854. rctl &= ~E1000_RCTL_RST;
  1855. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1856. E1000_WRITE_FLUSH(&adapter->hw);
  1857. mdelay(5);
  1858. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1859. e1000_pci_set_mwi(&adapter->hw);
  1860. if (netif_running(netdev)) {
  1861. /* No need to loop, because 82542 supports only 1 queue */
  1862. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1863. e1000_configure_rx(adapter);
  1864. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1865. }
  1866. }
  1867. /**
  1868. * e1000_set_mac - Change the Ethernet Address of the NIC
  1869. * @netdev: network interface device structure
  1870. * @p: pointer to an address structure
  1871. *
  1872. * Returns 0 on success, negative on failure
  1873. **/
  1874. static int
  1875. e1000_set_mac(struct net_device *netdev, void *p)
  1876. {
  1877. struct e1000_adapter *adapter = netdev_priv(netdev);
  1878. struct sockaddr *addr = p;
  1879. if (!is_valid_ether_addr(addr->sa_data))
  1880. return -EADDRNOTAVAIL;
  1881. /* 82542 2.0 needs to be in reset to write receive address registers */
  1882. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1883. e1000_enter_82542_rst(adapter);
  1884. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1885. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1886. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1887. /* With 82571 controllers, LAA may be overwritten (with the default)
  1888. * due to controller reset from the other port. */
  1889. if (adapter->hw.mac_type == e1000_82571) {
  1890. /* activate the work around */
  1891. adapter->hw.laa_is_present = 1;
  1892. /* Hold a copy of the LAA in RAR[14] This is done so that
  1893. * between the time RAR[0] gets clobbered and the time it
  1894. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1895. * of the RARs and no incoming packets directed to this port
  1896. * are dropped. Eventaully the LAA will be in RAR[0] and
  1897. * RAR[14] */
  1898. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1899. E1000_RAR_ENTRIES - 1);
  1900. }
  1901. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1902. e1000_leave_82542_rst(adapter);
  1903. return 0;
  1904. }
  1905. /**
  1906. * e1000_set_multi - Multicast and Promiscuous mode set
  1907. * @netdev: network interface device structure
  1908. *
  1909. * The set_multi entry point is called whenever the multicast address
  1910. * list or the network interface flags are updated. This routine is
  1911. * responsible for configuring the hardware for proper multicast,
  1912. * promiscuous mode, and all-multi behavior.
  1913. **/
  1914. static void
  1915. e1000_set_multi(struct net_device *netdev)
  1916. {
  1917. struct e1000_adapter *adapter = netdev_priv(netdev);
  1918. struct e1000_hw *hw = &adapter->hw;
  1919. struct dev_mc_list *mc_ptr;
  1920. uint32_t rctl;
  1921. uint32_t hash_value;
  1922. int i, rar_entries = E1000_RAR_ENTRIES;
  1923. /* reserve RAR[14] for LAA over-write work-around */
  1924. if (adapter->hw.mac_type == e1000_82571)
  1925. rar_entries--;
  1926. /* Check for Promiscuous and All Multicast modes */
  1927. rctl = E1000_READ_REG(hw, RCTL);
  1928. if (netdev->flags & IFF_PROMISC) {
  1929. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1930. } else if (netdev->flags & IFF_ALLMULTI) {
  1931. rctl |= E1000_RCTL_MPE;
  1932. rctl &= ~E1000_RCTL_UPE;
  1933. } else {
  1934. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1935. }
  1936. E1000_WRITE_REG(hw, RCTL, rctl);
  1937. /* 82542 2.0 needs to be in reset to write receive address registers */
  1938. if (hw->mac_type == e1000_82542_rev2_0)
  1939. e1000_enter_82542_rst(adapter);
  1940. /* load the first 14 multicast address into the exact filters 1-14
  1941. * RAR 0 is used for the station MAC adddress
  1942. * if there are not 14 addresses, go ahead and clear the filters
  1943. * -- with 82571 controllers only 0-13 entries are filled here
  1944. */
  1945. mc_ptr = netdev->mc_list;
  1946. for (i = 1; i < rar_entries; i++) {
  1947. if (mc_ptr) {
  1948. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1949. mc_ptr = mc_ptr->next;
  1950. } else {
  1951. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1952. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1953. }
  1954. }
  1955. /* clear the old settings from the multicast hash table */
  1956. for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1957. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1958. /* load any remaining addresses into the hash table */
  1959. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1960. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1961. e1000_mta_set(hw, hash_value);
  1962. }
  1963. if (hw->mac_type == e1000_82542_rev2_0)
  1964. e1000_leave_82542_rst(adapter);
  1965. }
  1966. /* Need to wait a few seconds after link up to get diagnostic information from
  1967. * the phy */
  1968. static void
  1969. e1000_update_phy_info(unsigned long data)
  1970. {
  1971. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1972. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1973. }
  1974. /**
  1975. * e1000_82547_tx_fifo_stall - Timer Call-back
  1976. * @data: pointer to adapter cast into an unsigned long
  1977. **/
  1978. static void
  1979. e1000_82547_tx_fifo_stall(unsigned long data)
  1980. {
  1981. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1982. struct net_device *netdev = adapter->netdev;
  1983. uint32_t tctl;
  1984. if (atomic_read(&adapter->tx_fifo_stall)) {
  1985. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1986. E1000_READ_REG(&adapter->hw, TDH)) &&
  1987. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1988. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1989. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1990. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1991. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1992. E1000_WRITE_REG(&adapter->hw, TCTL,
  1993. tctl & ~E1000_TCTL_EN);
  1994. E1000_WRITE_REG(&adapter->hw, TDFT,
  1995. adapter->tx_head_addr);
  1996. E1000_WRITE_REG(&adapter->hw, TDFH,
  1997. adapter->tx_head_addr);
  1998. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1999. adapter->tx_head_addr);
  2000. E1000_WRITE_REG(&adapter->hw, TDFHS,
  2001. adapter->tx_head_addr);
  2002. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  2003. E1000_WRITE_FLUSH(&adapter->hw);
  2004. adapter->tx_fifo_head = 0;
  2005. atomic_set(&adapter->tx_fifo_stall, 0);
  2006. netif_wake_queue(netdev);
  2007. } else {
  2008. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  2009. }
  2010. }
  2011. }
  2012. /**
  2013. * e1000_watchdog - Timer Call-back
  2014. * @data: pointer to adapter cast into an unsigned long
  2015. **/
  2016. static void
  2017. e1000_watchdog(unsigned long data)
  2018. {
  2019. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  2020. /* Do the rest outside of interrupt context */
  2021. schedule_work(&adapter->watchdog_task);
  2022. }
  2023. static void
  2024. e1000_watchdog_task(struct e1000_adapter *adapter)
  2025. {
  2026. struct net_device *netdev = adapter->netdev;
  2027. struct e1000_tx_ring *txdr = adapter->tx_ring;
  2028. uint32_t link;
  2029. e1000_check_for_link(&adapter->hw);
  2030. if (adapter->hw.mac_type == e1000_82573) {
  2031. e1000_enable_tx_pkt_filtering(&adapter->hw);
  2032. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  2033. e1000_update_mng_vlan(adapter);
  2034. }
  2035. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  2036. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  2037. link = !adapter->hw.serdes_link_down;
  2038. else
  2039. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  2040. if (link) {
  2041. if (!netif_carrier_ok(netdev)) {
  2042. e1000_get_speed_and_duplex(&adapter->hw,
  2043. &adapter->link_speed,
  2044. &adapter->link_duplex);
  2045. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  2046. adapter->link_speed,
  2047. adapter->link_duplex == FULL_DUPLEX ?
  2048. "Full Duplex" : "Half Duplex");
  2049. /* tweak tx_queue_len according to speed/duplex */
  2050. netdev->tx_queue_len = adapter->tx_queue_len;
  2051. adapter->tx_timeout_factor = 1;
  2052. if (adapter->link_duplex == HALF_DUPLEX) {
  2053. switch (adapter->link_speed) {
  2054. case SPEED_10:
  2055. netdev->tx_queue_len = 10;
  2056. adapter->tx_timeout_factor = 8;
  2057. break;
  2058. case SPEED_100:
  2059. netdev->tx_queue_len = 100;
  2060. break;
  2061. }
  2062. }
  2063. netif_carrier_on(netdev);
  2064. netif_wake_queue(netdev);
  2065. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2066. adapter->smartspeed = 0;
  2067. }
  2068. } else {
  2069. if (netif_carrier_ok(netdev)) {
  2070. adapter->link_speed = 0;
  2071. adapter->link_duplex = 0;
  2072. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  2073. netif_carrier_off(netdev);
  2074. netif_stop_queue(netdev);
  2075. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2076. }
  2077. e1000_smartspeed(adapter);
  2078. }
  2079. e1000_update_stats(adapter);
  2080. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2081. adapter->tpt_old = adapter->stats.tpt;
  2082. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2083. adapter->colc_old = adapter->stats.colc;
  2084. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2085. adapter->gorcl_old = adapter->stats.gorcl;
  2086. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2087. adapter->gotcl_old = adapter->stats.gotcl;
  2088. e1000_update_adaptive(&adapter->hw);
  2089. #ifdef CONFIG_E1000_MQ
  2090. txdr = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
  2091. #endif
  2092. if (!netif_carrier_ok(netdev)) {
  2093. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2094. /* We've lost link, so the controller stops DMA,
  2095. * but we've got queued Tx work that's never going
  2096. * to get done, so reset controller to flush Tx.
  2097. * (Do the reset outside of interrupt context). */
  2098. schedule_work(&adapter->tx_timeout_task);
  2099. }
  2100. }
  2101. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2102. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2103. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2104. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2105. * else is between 2000-8000. */
  2106. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2107. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2108. adapter->gotcl - adapter->gorcl :
  2109. adapter->gorcl - adapter->gotcl) / 10000;
  2110. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2111. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2112. }
  2113. /* Cause software interrupt to ensure rx ring is cleaned */
  2114. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2115. /* Force detection of hung controller every watchdog period */
  2116. adapter->detect_tx_hung = TRUE;
  2117. /* With 82571 controllers, LAA may be overwritten due to controller
  2118. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2119. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2120. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2121. /* Reset the timer */
  2122. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2123. }
  2124. #define E1000_TX_FLAGS_CSUM 0x00000001
  2125. #define E1000_TX_FLAGS_VLAN 0x00000002
  2126. #define E1000_TX_FLAGS_TSO 0x00000004
  2127. #define E1000_TX_FLAGS_IPV4 0x00000008
  2128. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2129. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2130. static inline int
  2131. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2132. struct sk_buff *skb)
  2133. {
  2134. #ifdef NETIF_F_TSO
  2135. struct e1000_context_desc *context_desc;
  2136. struct e1000_buffer *buffer_info;
  2137. unsigned int i;
  2138. uint32_t cmd_length = 0;
  2139. uint16_t ipcse = 0, tucse, mss;
  2140. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2141. int err;
  2142. if (skb_shinfo(skb)->tso_size) {
  2143. if (skb_header_cloned(skb)) {
  2144. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2145. if (err)
  2146. return err;
  2147. }
  2148. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2149. mss = skb_shinfo(skb)->tso_size;
  2150. if (skb->protocol == ntohs(ETH_P_IP)) {
  2151. skb->nh.iph->tot_len = 0;
  2152. skb->nh.iph->check = 0;
  2153. skb->h.th->check =
  2154. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2155. skb->nh.iph->daddr,
  2156. 0,
  2157. IPPROTO_TCP,
  2158. 0);
  2159. cmd_length = E1000_TXD_CMD_IP;
  2160. ipcse = skb->h.raw - skb->data - 1;
  2161. #ifdef NETIF_F_TSO_IPV6
  2162. } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
  2163. skb->nh.ipv6h->payload_len = 0;
  2164. skb->h.th->check =
  2165. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2166. &skb->nh.ipv6h->daddr,
  2167. 0,
  2168. IPPROTO_TCP,
  2169. 0);
  2170. ipcse = 0;
  2171. #endif
  2172. }
  2173. ipcss = skb->nh.raw - skb->data;
  2174. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2175. tucss = skb->h.raw - skb->data;
  2176. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2177. tucse = 0;
  2178. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2179. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2180. i = tx_ring->next_to_use;
  2181. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2182. buffer_info = &tx_ring->buffer_info[i];
  2183. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2184. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2185. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2186. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2187. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2188. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2189. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2190. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2191. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2192. buffer_info->time_stamp = jiffies;
  2193. if (++i == tx_ring->count) i = 0;
  2194. tx_ring->next_to_use = i;
  2195. return TRUE;
  2196. }
  2197. #endif
  2198. return FALSE;
  2199. }
  2200. static inline boolean_t
  2201. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2202. struct sk_buff *skb)
  2203. {
  2204. struct e1000_context_desc *context_desc;
  2205. struct e1000_buffer *buffer_info;
  2206. unsigned int i;
  2207. uint8_t css;
  2208. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2209. css = skb->h.raw - skb->data;
  2210. i = tx_ring->next_to_use;
  2211. buffer_info = &tx_ring->buffer_info[i];
  2212. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2213. context_desc->upper_setup.tcp_fields.tucss = css;
  2214. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2215. context_desc->upper_setup.tcp_fields.tucse = 0;
  2216. context_desc->tcp_seg_setup.data = 0;
  2217. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2218. buffer_info->time_stamp = jiffies;
  2219. if (unlikely(++i == tx_ring->count)) i = 0;
  2220. tx_ring->next_to_use = i;
  2221. return TRUE;
  2222. }
  2223. return FALSE;
  2224. }
  2225. #define E1000_MAX_TXD_PWR 12
  2226. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2227. static inline int
  2228. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2229. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2230. unsigned int nr_frags, unsigned int mss)
  2231. {
  2232. struct e1000_buffer *buffer_info;
  2233. unsigned int len = skb->len;
  2234. unsigned int offset = 0, size, count = 0, i;
  2235. unsigned int f;
  2236. len -= skb->data_len;
  2237. i = tx_ring->next_to_use;
  2238. while (len) {
  2239. buffer_info = &tx_ring->buffer_info[i];
  2240. size = min(len, max_per_txd);
  2241. #ifdef NETIF_F_TSO
  2242. /* Workaround for Controller erratum --
  2243. * descriptor for non-tso packet in a linear SKB that follows a
  2244. * tso gets written back prematurely before the data is fully
  2245. * DMAd to the controller */
  2246. if (!skb->data_len && tx_ring->last_tx_tso &&
  2247. !skb_shinfo(skb)->tso_size) {
  2248. tx_ring->last_tx_tso = 0;
  2249. size -= 4;
  2250. }
  2251. /* Workaround for premature desc write-backs
  2252. * in TSO mode. Append 4-byte sentinel desc */
  2253. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2254. size -= 4;
  2255. #endif
  2256. /* work-around for errata 10 and it applies
  2257. * to all controllers in PCI-X mode
  2258. * The fix is to make sure that the first descriptor of a
  2259. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2260. */
  2261. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2262. (size > 2015) && count == 0))
  2263. size = 2015;
  2264. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2265. * terminating buffers within evenly-aligned dwords. */
  2266. if (unlikely(adapter->pcix_82544 &&
  2267. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2268. size > 4))
  2269. size -= 4;
  2270. buffer_info->length = size;
  2271. buffer_info->dma =
  2272. pci_map_single(adapter->pdev,
  2273. skb->data + offset,
  2274. size,
  2275. PCI_DMA_TODEVICE);
  2276. buffer_info->time_stamp = jiffies;
  2277. len -= size;
  2278. offset += size;
  2279. count++;
  2280. if (unlikely(++i == tx_ring->count)) i = 0;
  2281. }
  2282. for (f = 0; f < nr_frags; f++) {
  2283. struct skb_frag_struct *frag;
  2284. frag = &skb_shinfo(skb)->frags[f];
  2285. len = frag->size;
  2286. offset = frag->page_offset;
  2287. while (len) {
  2288. buffer_info = &tx_ring->buffer_info[i];
  2289. size = min(len, max_per_txd);
  2290. #ifdef NETIF_F_TSO
  2291. /* Workaround for premature desc write-backs
  2292. * in TSO mode. Append 4-byte sentinel desc */
  2293. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2294. size -= 4;
  2295. #endif
  2296. /* Workaround for potential 82544 hang in PCI-X.
  2297. * Avoid terminating buffers within evenly-aligned
  2298. * dwords. */
  2299. if (unlikely(adapter->pcix_82544 &&
  2300. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2301. size > 4))
  2302. size -= 4;
  2303. buffer_info->length = size;
  2304. buffer_info->dma =
  2305. pci_map_page(adapter->pdev,
  2306. frag->page,
  2307. offset,
  2308. size,
  2309. PCI_DMA_TODEVICE);
  2310. buffer_info->time_stamp = jiffies;
  2311. len -= size;
  2312. offset += size;
  2313. count++;
  2314. if (unlikely(++i == tx_ring->count)) i = 0;
  2315. }
  2316. }
  2317. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2318. tx_ring->buffer_info[i].skb = skb;
  2319. tx_ring->buffer_info[first].next_to_watch = i;
  2320. return count;
  2321. }
  2322. static inline void
  2323. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2324. int tx_flags, int count)
  2325. {
  2326. struct e1000_tx_desc *tx_desc = NULL;
  2327. struct e1000_buffer *buffer_info;
  2328. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2329. unsigned int i;
  2330. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2331. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2332. E1000_TXD_CMD_TSE;
  2333. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2334. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2335. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2336. }
  2337. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2338. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2339. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2340. }
  2341. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2342. txd_lower |= E1000_TXD_CMD_VLE;
  2343. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2344. }
  2345. i = tx_ring->next_to_use;
  2346. while (count--) {
  2347. buffer_info = &tx_ring->buffer_info[i];
  2348. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2349. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2350. tx_desc->lower.data =
  2351. cpu_to_le32(txd_lower | buffer_info->length);
  2352. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2353. if (unlikely(++i == tx_ring->count)) i = 0;
  2354. }
  2355. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2356. /* Force memory writes to complete before letting h/w
  2357. * know there are new descriptors to fetch. (Only
  2358. * applicable for weak-ordered memory model archs,
  2359. * such as IA-64). */
  2360. wmb();
  2361. tx_ring->next_to_use = i;
  2362. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2363. }
  2364. /**
  2365. * 82547 workaround to avoid controller hang in half-duplex environment.
  2366. * The workaround is to avoid queuing a large packet that would span
  2367. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2368. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2369. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2370. * to the beginning of the Tx FIFO.
  2371. **/
  2372. #define E1000_FIFO_HDR 0x10
  2373. #define E1000_82547_PAD_LEN 0x3E0
  2374. static inline int
  2375. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2376. {
  2377. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2378. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2379. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2380. if (adapter->link_duplex != HALF_DUPLEX)
  2381. goto no_fifo_stall_required;
  2382. if (atomic_read(&adapter->tx_fifo_stall))
  2383. return 1;
  2384. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2385. atomic_set(&adapter->tx_fifo_stall, 1);
  2386. return 1;
  2387. }
  2388. no_fifo_stall_required:
  2389. adapter->tx_fifo_head += skb_fifo_len;
  2390. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2391. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2392. return 0;
  2393. }
  2394. #define MINIMUM_DHCP_PACKET_SIZE 282
  2395. static inline int
  2396. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2397. {
  2398. struct e1000_hw *hw = &adapter->hw;
  2399. uint16_t length, offset;
  2400. if (vlan_tx_tag_present(skb)) {
  2401. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2402. ( adapter->hw.mng_cookie.status &
  2403. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2404. return 0;
  2405. }
  2406. if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
  2407. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2408. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2409. const struct iphdr *ip =
  2410. (struct iphdr *)((uint8_t *)skb->data+14);
  2411. if (IPPROTO_UDP == ip->protocol) {
  2412. struct udphdr *udp =
  2413. (struct udphdr *)((uint8_t *)ip +
  2414. (ip->ihl << 2));
  2415. if (ntohs(udp->dest) == 67) {
  2416. offset = (uint8_t *)udp + 8 - skb->data;
  2417. length = skb->len - offset;
  2418. return e1000_mng_write_dhcp_info(hw,
  2419. (uint8_t *)udp + 8,
  2420. length);
  2421. }
  2422. }
  2423. }
  2424. }
  2425. return 0;
  2426. }
  2427. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2428. static int
  2429. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2430. {
  2431. struct e1000_adapter *adapter = netdev_priv(netdev);
  2432. struct e1000_tx_ring *tx_ring;
  2433. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2434. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2435. unsigned int tx_flags = 0;
  2436. unsigned int len = skb->len;
  2437. unsigned long flags;
  2438. unsigned int nr_frags = 0;
  2439. unsigned int mss = 0;
  2440. int count = 0;
  2441. int tso;
  2442. unsigned int f;
  2443. len -= skb->data_len;
  2444. #ifdef CONFIG_E1000_MQ
  2445. tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
  2446. #else
  2447. tx_ring = adapter->tx_ring;
  2448. #endif
  2449. if (unlikely(skb->len <= 0)) {
  2450. dev_kfree_skb_any(skb);
  2451. return NETDEV_TX_OK;
  2452. }
  2453. #ifdef NETIF_F_TSO
  2454. mss = skb_shinfo(skb)->tso_size;
  2455. /* The controller does a simple calculation to
  2456. * make sure there is enough room in the FIFO before
  2457. * initiating the DMA for each buffer. The calc is:
  2458. * 4 = ceil(buffer len/mss). To make sure we don't
  2459. * overrun the FIFO, adjust the max buffer len if mss
  2460. * drops. */
  2461. if (mss) {
  2462. uint8_t hdr_len;
  2463. max_per_txd = min(mss << 2, max_per_txd);
  2464. max_txd_pwr = fls(max_per_txd) - 1;
  2465. /* TSO Workaround for 82571/2 Controllers -- if skb->data
  2466. * points to just header, pull a few bytes of payload from
  2467. * frags into skb->data */
  2468. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2469. if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
  2470. (adapter->hw.mac_type == e1000_82571 ||
  2471. adapter->hw.mac_type == e1000_82572)) {
  2472. unsigned int pull_size;
  2473. pull_size = min((unsigned int)4, skb->data_len);
  2474. if (!__pskb_pull_tail(skb, pull_size)) {
  2475. printk(KERN_ERR "__pskb_pull_tail failed.\n");
  2476. dev_kfree_skb_any(skb);
  2477. return -EFAULT;
  2478. }
  2479. len = skb->len - skb->data_len;
  2480. }
  2481. }
  2482. /* reserve a descriptor for the offload context */
  2483. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2484. count++;
  2485. count++;
  2486. #else
  2487. if (skb->ip_summed == CHECKSUM_HW)
  2488. count++;
  2489. #endif
  2490. #ifdef NETIF_F_TSO
  2491. /* Controller Erratum workaround */
  2492. if (!skb->data_len && tx_ring->last_tx_tso &&
  2493. !skb_shinfo(skb)->tso_size)
  2494. count++;
  2495. #endif
  2496. count += TXD_USE_COUNT(len, max_txd_pwr);
  2497. if (adapter->pcix_82544)
  2498. count++;
  2499. /* work-around for errata 10 and it applies to all controllers
  2500. * in PCI-X mode, so add one more descriptor to the count
  2501. */
  2502. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2503. (len > 2015)))
  2504. count++;
  2505. nr_frags = skb_shinfo(skb)->nr_frags;
  2506. for (f = 0; f < nr_frags; f++)
  2507. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2508. max_txd_pwr);
  2509. if (adapter->pcix_82544)
  2510. count += nr_frags;
  2511. if (adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
  2512. e1000_transfer_dhcp_info(adapter, skb);
  2513. local_irq_save(flags);
  2514. if (!spin_trylock(&tx_ring->tx_lock)) {
  2515. /* Collision - tell upper layer to requeue */
  2516. local_irq_restore(flags);
  2517. return NETDEV_TX_LOCKED;
  2518. }
  2519. /* need: count + 2 desc gap to keep tail from touching
  2520. * head, otherwise try next time */
  2521. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2522. netif_stop_queue(netdev);
  2523. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2524. return NETDEV_TX_BUSY;
  2525. }
  2526. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2527. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2528. netif_stop_queue(netdev);
  2529. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2530. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2531. return NETDEV_TX_BUSY;
  2532. }
  2533. }
  2534. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2535. tx_flags |= E1000_TX_FLAGS_VLAN;
  2536. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2537. }
  2538. first = tx_ring->next_to_use;
  2539. tso = e1000_tso(adapter, tx_ring, skb);
  2540. if (tso < 0) {
  2541. dev_kfree_skb_any(skb);
  2542. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2543. return NETDEV_TX_OK;
  2544. }
  2545. if (likely(tso)) {
  2546. tx_ring->last_tx_tso = 1;
  2547. tx_flags |= E1000_TX_FLAGS_TSO;
  2548. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2549. tx_flags |= E1000_TX_FLAGS_CSUM;
  2550. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2551. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2552. * no longer assume, we must. */
  2553. if (likely(skb->protocol == ntohs(ETH_P_IP)))
  2554. tx_flags |= E1000_TX_FLAGS_IPV4;
  2555. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2556. e1000_tx_map(adapter, tx_ring, skb, first,
  2557. max_per_txd, nr_frags, mss));
  2558. netdev->trans_start = jiffies;
  2559. /* Make sure there is space in the ring for the next send. */
  2560. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2561. netif_stop_queue(netdev);
  2562. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2563. return NETDEV_TX_OK;
  2564. }
  2565. /**
  2566. * e1000_tx_timeout - Respond to a Tx Hang
  2567. * @netdev: network interface device structure
  2568. **/
  2569. static void
  2570. e1000_tx_timeout(struct net_device *netdev)
  2571. {
  2572. struct e1000_adapter *adapter = netdev_priv(netdev);
  2573. /* Do the reset outside of interrupt context */
  2574. schedule_work(&adapter->tx_timeout_task);
  2575. }
  2576. static void
  2577. e1000_tx_timeout_task(struct net_device *netdev)
  2578. {
  2579. struct e1000_adapter *adapter = netdev_priv(netdev);
  2580. adapter->tx_timeout_count++;
  2581. e1000_down(adapter);
  2582. e1000_up(adapter);
  2583. }
  2584. /**
  2585. * e1000_get_stats - Get System Network Statistics
  2586. * @netdev: network interface device structure
  2587. *
  2588. * Returns the address of the device statistics structure.
  2589. * The statistics are actually updated from the timer callback.
  2590. **/
  2591. static struct net_device_stats *
  2592. e1000_get_stats(struct net_device *netdev)
  2593. {
  2594. struct e1000_adapter *adapter = netdev_priv(netdev);
  2595. /* only return the current stats */
  2596. return &adapter->net_stats;
  2597. }
  2598. /**
  2599. * e1000_change_mtu - Change the Maximum Transfer Unit
  2600. * @netdev: network interface device structure
  2601. * @new_mtu: new value for maximum frame size
  2602. *
  2603. * Returns 0 on success, negative on failure
  2604. **/
  2605. static int
  2606. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2607. {
  2608. struct e1000_adapter *adapter = netdev_priv(netdev);
  2609. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2610. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2611. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2612. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2613. return -EINVAL;
  2614. }
  2615. /* Adapter-specific max frame size limits. */
  2616. switch (adapter->hw.mac_type) {
  2617. case e1000_82542_rev2_0:
  2618. case e1000_82542_rev2_1:
  2619. case e1000_82573:
  2620. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2621. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2622. return -EINVAL;
  2623. }
  2624. break;
  2625. case e1000_82571:
  2626. case e1000_82572:
  2627. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2628. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2629. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2630. return -EINVAL;
  2631. }
  2632. break;
  2633. default:
  2634. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2635. break;
  2636. }
  2637. /* since the driver code now supports splitting a packet across
  2638. * multiple descriptors, most of the fifo related limitations on
  2639. * jumbo frame traffic have gone away.
  2640. * simply use 2k descriptors for everything.
  2641. *
  2642. * NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  2643. * means we reserve 2 more, this pushes us to allocate from the next
  2644. * larger slab size
  2645. * i.e. RXBUFFER_2048 --> size-4096 slab */
  2646. /* recent hardware supports 1KB granularity */
  2647. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2648. adapter->rx_buffer_len =
  2649. ((max_frame < E1000_RXBUFFER_2048) ?
  2650. max_frame : E1000_RXBUFFER_2048);
  2651. E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
  2652. } else
  2653. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2654. netdev->mtu = new_mtu;
  2655. if (netif_running(netdev)) {
  2656. e1000_down(adapter);
  2657. e1000_up(adapter);
  2658. }
  2659. adapter->hw.max_frame_size = max_frame;
  2660. return 0;
  2661. }
  2662. /**
  2663. * e1000_update_stats - Update the board statistics counters
  2664. * @adapter: board private structure
  2665. **/
  2666. void
  2667. e1000_update_stats(struct e1000_adapter *adapter)
  2668. {
  2669. struct e1000_hw *hw = &adapter->hw;
  2670. unsigned long flags;
  2671. uint16_t phy_tmp;
  2672. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2673. spin_lock_irqsave(&adapter->stats_lock, flags);
  2674. /* these counters are modified from e1000_adjust_tbi_stats,
  2675. * called from the interrupt context, so they must only
  2676. * be written while holding adapter->stats_lock
  2677. */
  2678. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2679. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2680. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2681. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2682. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2683. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2684. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2685. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2686. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2687. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2688. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2689. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2690. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2691. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2692. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2693. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2694. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2695. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2696. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2697. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2698. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2699. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2700. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2701. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2702. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2703. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2704. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2705. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2706. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2707. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2708. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2709. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2710. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2711. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2712. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2713. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2714. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2715. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2716. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2717. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2718. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2719. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2720. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2721. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2722. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2723. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2724. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2725. /* used for adaptive IFS */
  2726. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2727. adapter->stats.tpt += hw->tx_packet_delta;
  2728. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2729. adapter->stats.colc += hw->collision_delta;
  2730. if (hw->mac_type >= e1000_82543) {
  2731. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2732. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2733. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2734. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2735. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2736. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2737. }
  2738. if (hw->mac_type > e1000_82547_rev_2) {
  2739. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2740. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2741. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2742. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2743. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2744. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2745. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2746. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2747. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2748. }
  2749. /* Fill out the OS statistics structure */
  2750. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2751. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2752. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2753. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2754. adapter->net_stats.multicast = adapter->stats.mprc;
  2755. adapter->net_stats.collisions = adapter->stats.colc;
  2756. /* Rx Errors */
  2757. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2758. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2759. adapter->stats.rlec + adapter->stats.cexterr;
  2760. adapter->net_stats.rx_dropped = 0;
  2761. adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  2762. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2763. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2764. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2765. /* Tx Errors */
  2766. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2767. adapter->stats.latecol;
  2768. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2769. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2770. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2771. /* Tx Dropped needs to be maintained elsewhere */
  2772. /* Phy Stats */
  2773. if (hw->media_type == e1000_media_type_copper) {
  2774. if ((adapter->link_speed == SPEED_1000) &&
  2775. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2776. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2777. adapter->phy_stats.idle_errors += phy_tmp;
  2778. }
  2779. if ((hw->mac_type <= e1000_82546) &&
  2780. (hw->phy_type == e1000_phy_m88) &&
  2781. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2782. adapter->phy_stats.receive_errors += phy_tmp;
  2783. }
  2784. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2785. }
  2786. #ifdef CONFIG_E1000_MQ
  2787. void
  2788. e1000_rx_schedule(void *data)
  2789. {
  2790. struct net_device *poll_dev, *netdev = data;
  2791. struct e1000_adapter *adapter = netdev->priv;
  2792. int this_cpu = get_cpu();
  2793. poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
  2794. if (poll_dev == NULL) {
  2795. put_cpu();
  2796. return;
  2797. }
  2798. if (likely(netif_rx_schedule_prep(poll_dev)))
  2799. __netif_rx_schedule(poll_dev);
  2800. else
  2801. e1000_irq_enable(adapter);
  2802. put_cpu();
  2803. }
  2804. #endif
  2805. /**
  2806. * e1000_intr - Interrupt Handler
  2807. * @irq: interrupt number
  2808. * @data: pointer to a network interface device structure
  2809. * @pt_regs: CPU registers structure
  2810. **/
  2811. static irqreturn_t
  2812. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2813. {
  2814. struct net_device *netdev = data;
  2815. struct e1000_adapter *adapter = netdev_priv(netdev);
  2816. struct e1000_hw *hw = &adapter->hw;
  2817. uint32_t icr = E1000_READ_REG(hw, ICR);
  2818. #ifndef CONFIG_E1000_NAPI
  2819. int i;
  2820. #else
  2821. /* Interrupt Auto-Mask...upon reading ICR,
  2822. * interrupts are masked. No need for the
  2823. * IMC write, but it does mean we should
  2824. * account for it ASAP. */
  2825. if (likely(hw->mac_type >= e1000_82571))
  2826. atomic_inc(&adapter->irq_sem);
  2827. #endif
  2828. if (unlikely(!icr)) {
  2829. #ifdef CONFIG_E1000_NAPI
  2830. if (hw->mac_type >= e1000_82571)
  2831. e1000_irq_enable(adapter);
  2832. #endif
  2833. return IRQ_NONE; /* Not our interrupt */
  2834. }
  2835. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2836. hw->get_link_status = 1;
  2837. mod_timer(&adapter->watchdog_timer, jiffies);
  2838. }
  2839. #ifdef CONFIG_E1000_NAPI
  2840. if (unlikely(hw->mac_type < e1000_82571)) {
  2841. atomic_inc(&adapter->irq_sem);
  2842. E1000_WRITE_REG(hw, IMC, ~0);
  2843. E1000_WRITE_FLUSH(hw);
  2844. }
  2845. #ifdef CONFIG_E1000_MQ
  2846. if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
  2847. /* We must setup the cpumask once count == 0 since
  2848. * each cpu bit is cleared when the work is done. */
  2849. adapter->rx_sched_call_data.cpumask = adapter->cpumask;
  2850. atomic_add(adapter->num_rx_queues - 1, &adapter->irq_sem);
  2851. atomic_set(&adapter->rx_sched_call_data.count,
  2852. adapter->num_rx_queues);
  2853. smp_call_async_mask(&adapter->rx_sched_call_data);
  2854. } else {
  2855. printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
  2856. }
  2857. #else /* if !CONFIG_E1000_MQ */
  2858. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2859. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2860. else
  2861. e1000_irq_enable(adapter);
  2862. #endif /* CONFIG_E1000_MQ */
  2863. #else /* if !CONFIG_E1000_NAPI */
  2864. /* Writing IMC and IMS is needed for 82547.
  2865. * Due to Hub Link bus being occupied, an interrupt
  2866. * de-assertion message is not able to be sent.
  2867. * When an interrupt assertion message is generated later,
  2868. * two messages are re-ordered and sent out.
  2869. * That causes APIC to think 82547 is in de-assertion
  2870. * state, while 82547 is in assertion state, resulting
  2871. * in dead lock. Writing IMC forces 82547 into
  2872. * de-assertion state.
  2873. */
  2874. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2875. atomic_inc(&adapter->irq_sem);
  2876. E1000_WRITE_REG(hw, IMC, ~0);
  2877. }
  2878. for (i = 0; i < E1000_MAX_INTR; i++)
  2879. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2880. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2881. break;
  2882. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2883. e1000_irq_enable(adapter);
  2884. #endif /* CONFIG_E1000_NAPI */
  2885. return IRQ_HANDLED;
  2886. }
  2887. #ifdef CONFIG_E1000_NAPI
  2888. /**
  2889. * e1000_clean - NAPI Rx polling callback
  2890. * @adapter: board private structure
  2891. **/
  2892. static int
  2893. e1000_clean(struct net_device *poll_dev, int *budget)
  2894. {
  2895. struct e1000_adapter *adapter;
  2896. int work_to_do = min(*budget, poll_dev->quota);
  2897. int tx_cleaned = 0, i = 0, work_done = 0;
  2898. /* Must NOT use netdev_priv macro here. */
  2899. adapter = poll_dev->priv;
  2900. /* Keep link state information with original netdev */
  2901. if (!netif_carrier_ok(adapter->netdev))
  2902. goto quit_polling;
  2903. while (poll_dev != &adapter->polling_netdev[i]) {
  2904. i++;
  2905. if (unlikely(i == adapter->num_rx_queues))
  2906. BUG();
  2907. }
  2908. if (likely(adapter->num_tx_queues == 1)) {
  2909. /* e1000_clean is called per-cpu. This lock protects
  2910. * tx_ring[0] from being cleaned by multiple cpus
  2911. * simultaneously. A failure obtaining the lock means
  2912. * tx_ring[0] is currently being cleaned anyway. */
  2913. if (spin_trylock(&adapter->tx_queue_lock)) {
  2914. tx_cleaned = e1000_clean_tx_irq(adapter,
  2915. &adapter->tx_ring[0]);
  2916. spin_unlock(&adapter->tx_queue_lock);
  2917. }
  2918. } else
  2919. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2920. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2921. &work_done, work_to_do);
  2922. *budget -= work_done;
  2923. poll_dev->quota -= work_done;
  2924. /* If no Tx and not enough Rx work done, exit the polling mode */
  2925. if ((!tx_cleaned && (work_done == 0)) ||
  2926. !netif_running(adapter->netdev)) {
  2927. quit_polling:
  2928. netif_rx_complete(poll_dev);
  2929. e1000_irq_enable(adapter);
  2930. return 0;
  2931. }
  2932. return 1;
  2933. }
  2934. #endif
  2935. /**
  2936. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2937. * @adapter: board private structure
  2938. **/
  2939. static boolean_t
  2940. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2941. struct e1000_tx_ring *tx_ring)
  2942. {
  2943. struct net_device *netdev = adapter->netdev;
  2944. struct e1000_tx_desc *tx_desc, *eop_desc;
  2945. struct e1000_buffer *buffer_info;
  2946. unsigned int i, eop;
  2947. boolean_t cleaned = FALSE;
  2948. i = tx_ring->next_to_clean;
  2949. eop = tx_ring->buffer_info[i].next_to_watch;
  2950. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2951. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2952. for (cleaned = FALSE; !cleaned; ) {
  2953. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2954. buffer_info = &tx_ring->buffer_info[i];
  2955. cleaned = (i == eop);
  2956. #ifdef CONFIG_E1000_MQ
  2957. tx_ring->tx_stats.bytes += buffer_info->length;
  2958. #endif
  2959. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2960. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2961. if (unlikely(++i == tx_ring->count)) i = 0;
  2962. }
  2963. #ifdef CONFIG_E1000_MQ
  2964. tx_ring->tx_stats.packets++;
  2965. #endif
  2966. eop = tx_ring->buffer_info[i].next_to_watch;
  2967. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2968. }
  2969. tx_ring->next_to_clean = i;
  2970. spin_lock(&tx_ring->tx_lock);
  2971. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2972. netif_carrier_ok(netdev)))
  2973. netif_wake_queue(netdev);
  2974. spin_unlock(&tx_ring->tx_lock);
  2975. if (adapter->detect_tx_hung) {
  2976. /* Detect a transmit hang in hardware, this serializes the
  2977. * check with the clearing of time_stamp and movement of i */
  2978. adapter->detect_tx_hung = FALSE;
  2979. if (tx_ring->buffer_info[eop].dma &&
  2980. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  2981. adapter->tx_timeout_factor * HZ)
  2982. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2983. E1000_STATUS_TXOFF)) {
  2984. /* detected Tx unit hang */
  2985. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2986. " Tx Queue <%lu>\n"
  2987. " TDH <%x>\n"
  2988. " TDT <%x>\n"
  2989. " next_to_use <%x>\n"
  2990. " next_to_clean <%x>\n"
  2991. "buffer_info[next_to_clean]\n"
  2992. " time_stamp <%lx>\n"
  2993. " next_to_watch <%x>\n"
  2994. " jiffies <%lx>\n"
  2995. " next_to_watch.status <%x>\n",
  2996. (unsigned long)((tx_ring - adapter->tx_ring) /
  2997. sizeof(struct e1000_tx_ring)),
  2998. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2999. readl(adapter->hw.hw_addr + tx_ring->tdt),
  3000. tx_ring->next_to_use,
  3001. tx_ring->next_to_clean,
  3002. tx_ring->buffer_info[eop].time_stamp,
  3003. eop,
  3004. jiffies,
  3005. eop_desc->upper.fields.status);
  3006. netif_stop_queue(netdev);
  3007. }
  3008. }
  3009. return cleaned;
  3010. }
  3011. /**
  3012. * e1000_rx_checksum - Receive Checksum Offload for 82543
  3013. * @adapter: board private structure
  3014. * @status_err: receive descriptor status and error fields
  3015. * @csum: receive descriptor csum field
  3016. * @sk_buff: socket buffer with received data
  3017. **/
  3018. static inline void
  3019. e1000_rx_checksum(struct e1000_adapter *adapter,
  3020. uint32_t status_err, uint32_t csum,
  3021. struct sk_buff *skb)
  3022. {
  3023. uint16_t status = (uint16_t)status_err;
  3024. uint8_t errors = (uint8_t)(status_err >> 24);
  3025. skb->ip_summed = CHECKSUM_NONE;
  3026. /* 82543 or newer only */
  3027. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  3028. /* Ignore Checksum bit is set */
  3029. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  3030. /* TCP/UDP checksum error bit is set */
  3031. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  3032. /* let the stack verify checksum errors */
  3033. adapter->hw_csum_err++;
  3034. return;
  3035. }
  3036. /* TCP/UDP Checksum has not been calculated */
  3037. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  3038. if (!(status & E1000_RXD_STAT_TCPCS))
  3039. return;
  3040. } else {
  3041. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  3042. return;
  3043. }
  3044. /* It must be a TCP or UDP packet with a valid checksum */
  3045. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  3046. /* TCP checksum is good */
  3047. skb->ip_summed = CHECKSUM_UNNECESSARY;
  3048. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  3049. /* IP fragment with UDP payload */
  3050. /* Hardware complements the payload checksum, so we undo it
  3051. * and then put the value in host order for further stack use.
  3052. */
  3053. csum = ntohl(csum ^ 0xFFFF);
  3054. skb->csum = csum;
  3055. skb->ip_summed = CHECKSUM_HW;
  3056. }
  3057. adapter->hw_csum_good++;
  3058. }
  3059. /**
  3060. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3061. * @adapter: board private structure
  3062. **/
  3063. static boolean_t
  3064. #ifdef CONFIG_E1000_NAPI
  3065. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3066. struct e1000_rx_ring *rx_ring,
  3067. int *work_done, int work_to_do)
  3068. #else
  3069. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3070. struct e1000_rx_ring *rx_ring)
  3071. #endif
  3072. {
  3073. struct net_device *netdev = adapter->netdev;
  3074. struct pci_dev *pdev = adapter->pdev;
  3075. struct e1000_rx_desc *rx_desc, *next_rxd;
  3076. struct e1000_buffer *buffer_info, *next_buffer;
  3077. unsigned long flags;
  3078. uint32_t length;
  3079. uint8_t last_byte;
  3080. unsigned int i;
  3081. int cleaned_count = 0;
  3082. boolean_t cleaned = FALSE, multi_descriptor = FALSE;
  3083. i = rx_ring->next_to_clean;
  3084. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3085. buffer_info = &rx_ring->buffer_info[i];
  3086. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3087. struct sk_buff *skb, *next_skb;
  3088. u8 status;
  3089. #ifdef CONFIG_E1000_NAPI
  3090. if (*work_done >= work_to_do)
  3091. break;
  3092. (*work_done)++;
  3093. #endif
  3094. status = rx_desc->status;
  3095. skb = buffer_info->skb;
  3096. buffer_info->skb = NULL;
  3097. if (++i == rx_ring->count) i = 0;
  3098. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3099. next_buffer = &rx_ring->buffer_info[i];
  3100. next_skb = next_buffer->skb;
  3101. cleaned = TRUE;
  3102. cleaned_count++;
  3103. pci_unmap_single(pdev,
  3104. buffer_info->dma,
  3105. buffer_info->length,
  3106. PCI_DMA_FROMDEVICE);
  3107. length = le16_to_cpu(rx_desc->length);
  3108. skb_put(skb, length);
  3109. if (!(status & E1000_RXD_STAT_EOP)) {
  3110. if (!rx_ring->rx_skb_top) {
  3111. rx_ring->rx_skb_top = skb;
  3112. rx_ring->rx_skb_top->len = length;
  3113. rx_ring->rx_skb_prev = skb;
  3114. } else {
  3115. if (skb_shinfo(rx_ring->rx_skb_top)->frag_list) {
  3116. rx_ring->rx_skb_prev->next = skb;
  3117. skb->prev = rx_ring->rx_skb_prev;
  3118. } else {
  3119. skb_shinfo(rx_ring->rx_skb_top)->frag_list = skb;
  3120. }
  3121. rx_ring->rx_skb_prev = skb;
  3122. rx_ring->rx_skb_top->data_len += length;
  3123. }
  3124. goto next_desc;
  3125. } else {
  3126. if (rx_ring->rx_skb_top) {
  3127. if (skb_shinfo(rx_ring->rx_skb_top)
  3128. ->frag_list) {
  3129. rx_ring->rx_skb_prev->next = skb;
  3130. skb->prev = rx_ring->rx_skb_prev;
  3131. } else
  3132. skb_shinfo(rx_ring->rx_skb_top)
  3133. ->frag_list = skb;
  3134. rx_ring->rx_skb_top->data_len += length;
  3135. rx_ring->rx_skb_top->len +=
  3136. rx_ring->rx_skb_top->data_len;
  3137. skb = rx_ring->rx_skb_top;
  3138. multi_descriptor = TRUE;
  3139. rx_ring->rx_skb_top = NULL;
  3140. rx_ring->rx_skb_prev = NULL;
  3141. }
  3142. }
  3143. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3144. last_byte = *(skb->data + length - 1);
  3145. if (TBI_ACCEPT(&adapter->hw, status,
  3146. rx_desc->errors, length, last_byte)) {
  3147. spin_lock_irqsave(&adapter->stats_lock, flags);
  3148. e1000_tbi_adjust_stats(&adapter->hw,
  3149. &adapter->stats,
  3150. length, skb->data);
  3151. spin_unlock_irqrestore(&adapter->stats_lock,
  3152. flags);
  3153. length--;
  3154. } else {
  3155. dev_kfree_skb_irq(skb);
  3156. goto next_desc;
  3157. }
  3158. }
  3159. /* code added for copybreak, this should improve
  3160. * performance for small packets with large amounts
  3161. * of reassembly being done in the stack */
  3162. #define E1000_CB_LENGTH 256
  3163. if ((length < E1000_CB_LENGTH) &&
  3164. !rx_ring->rx_skb_top &&
  3165. /* or maybe (status & E1000_RXD_STAT_EOP) && */
  3166. !multi_descriptor) {
  3167. struct sk_buff *new_skb =
  3168. dev_alloc_skb(length + NET_IP_ALIGN);
  3169. if (new_skb) {
  3170. skb_reserve(new_skb, NET_IP_ALIGN);
  3171. new_skb->dev = netdev;
  3172. memcpy(new_skb->data - NET_IP_ALIGN,
  3173. skb->data - NET_IP_ALIGN,
  3174. length + NET_IP_ALIGN);
  3175. /* save the skb in buffer_info as good */
  3176. buffer_info->skb = skb;
  3177. skb = new_skb;
  3178. skb_put(skb, length);
  3179. }
  3180. }
  3181. /* end copybreak code */
  3182. /* Receive Checksum Offload */
  3183. e1000_rx_checksum(adapter,
  3184. (uint32_t)(status) |
  3185. ((uint32_t)(rx_desc->errors) << 24),
  3186. rx_desc->csum, skb);
  3187. skb->protocol = eth_type_trans(skb, netdev);
  3188. #ifdef CONFIG_E1000_NAPI
  3189. if (unlikely(adapter->vlgrp &&
  3190. (status & E1000_RXD_STAT_VP))) {
  3191. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3192. le16_to_cpu(rx_desc->special) &
  3193. E1000_RXD_SPC_VLAN_MASK);
  3194. } else {
  3195. netif_receive_skb(skb);
  3196. }
  3197. #else /* CONFIG_E1000_NAPI */
  3198. if (unlikely(adapter->vlgrp &&
  3199. (status & E1000_RXD_STAT_VP))) {
  3200. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3201. le16_to_cpu(rx_desc->special) &
  3202. E1000_RXD_SPC_VLAN_MASK);
  3203. } else {
  3204. netif_rx(skb);
  3205. }
  3206. #endif /* CONFIG_E1000_NAPI */
  3207. netdev->last_rx = jiffies;
  3208. #ifdef CONFIG_E1000_MQ
  3209. rx_ring->rx_stats.packets++;
  3210. rx_ring->rx_stats.bytes += length;
  3211. #endif
  3212. next_desc:
  3213. rx_desc->status = 0;
  3214. /* return some buffers to hardware, one at a time is too slow */
  3215. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3216. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3217. cleaned_count = 0;
  3218. }
  3219. rx_desc = next_rxd;
  3220. buffer_info = next_buffer;
  3221. }
  3222. rx_ring->next_to_clean = i;
  3223. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3224. if (cleaned_count)
  3225. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3226. return cleaned;
  3227. }
  3228. /**
  3229. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3230. * @adapter: board private structure
  3231. **/
  3232. static boolean_t
  3233. #ifdef CONFIG_E1000_NAPI
  3234. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3235. struct e1000_rx_ring *rx_ring,
  3236. int *work_done, int work_to_do)
  3237. #else
  3238. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3239. struct e1000_rx_ring *rx_ring)
  3240. #endif
  3241. {
  3242. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3243. struct net_device *netdev = adapter->netdev;
  3244. struct pci_dev *pdev = adapter->pdev;
  3245. struct e1000_buffer *buffer_info, *next_buffer;
  3246. struct e1000_ps_page *ps_page;
  3247. struct e1000_ps_page_dma *ps_page_dma;
  3248. struct sk_buff *skb, *next_skb;
  3249. unsigned int i, j;
  3250. uint32_t length, staterr;
  3251. int cleaned_count = 0;
  3252. boolean_t cleaned = FALSE;
  3253. i = rx_ring->next_to_clean;
  3254. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3255. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3256. buffer_info = &rx_ring->buffer_info[i];
  3257. while (staterr & E1000_RXD_STAT_DD) {
  3258. ps_page = &rx_ring->ps_page[i];
  3259. ps_page_dma = &rx_ring->ps_page_dma[i];
  3260. #ifdef CONFIG_E1000_NAPI
  3261. if (unlikely(*work_done >= work_to_do))
  3262. break;
  3263. (*work_done)++;
  3264. #endif
  3265. skb = buffer_info->skb;
  3266. if (++i == rx_ring->count) i = 0;
  3267. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3268. next_buffer = &rx_ring->buffer_info[i];
  3269. next_skb = next_buffer->skb;
  3270. cleaned = TRUE;
  3271. cleaned_count++;
  3272. pci_unmap_single(pdev, buffer_info->dma,
  3273. buffer_info->length,
  3274. PCI_DMA_FROMDEVICE);
  3275. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3276. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3277. " the full packet\n", netdev->name);
  3278. dev_kfree_skb_irq(skb);
  3279. goto next_desc;
  3280. }
  3281. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3282. dev_kfree_skb_irq(skb);
  3283. goto next_desc;
  3284. }
  3285. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3286. if (unlikely(!length)) {
  3287. E1000_DBG("%s: Last part of the packet spanning"
  3288. " multiple descriptors\n", netdev->name);
  3289. dev_kfree_skb_irq(skb);
  3290. goto next_desc;
  3291. }
  3292. /* Good Receive */
  3293. skb_put(skb, length);
  3294. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3295. if (!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
  3296. break;
  3297. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3298. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3299. ps_page_dma->ps_page_dma[j] = 0;
  3300. skb_shinfo(skb)->frags[j].page =
  3301. ps_page->ps_page[j];
  3302. ps_page->ps_page[j] = NULL;
  3303. skb_shinfo(skb)->frags[j].page_offset = 0;
  3304. skb_shinfo(skb)->frags[j].size = length;
  3305. skb_shinfo(skb)->nr_frags++;
  3306. skb->len += length;
  3307. skb->data_len += length;
  3308. }
  3309. e1000_rx_checksum(adapter, staterr,
  3310. rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
  3311. skb->protocol = eth_type_trans(skb, netdev);
  3312. if (likely(rx_desc->wb.upper.header_status &
  3313. E1000_RXDPS_HDRSTAT_HDRSP))
  3314. adapter->rx_hdr_split++;
  3315. #ifdef CONFIG_E1000_NAPI
  3316. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3317. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3318. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3319. E1000_RXD_SPC_VLAN_MASK);
  3320. } else {
  3321. netif_receive_skb(skb);
  3322. }
  3323. #else /* CONFIG_E1000_NAPI */
  3324. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3325. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3326. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3327. E1000_RXD_SPC_VLAN_MASK);
  3328. } else {
  3329. netif_rx(skb);
  3330. }
  3331. #endif /* CONFIG_E1000_NAPI */
  3332. netdev->last_rx = jiffies;
  3333. #ifdef CONFIG_E1000_MQ
  3334. rx_ring->rx_stats.packets++;
  3335. rx_ring->rx_stats.bytes += length;
  3336. #endif
  3337. next_desc:
  3338. rx_desc->wb.middle.status_error &= ~0xFF;
  3339. buffer_info->skb = NULL;
  3340. /* return some buffers to hardware, one at a time is too slow */
  3341. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3342. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3343. cleaned_count = 0;
  3344. }
  3345. rx_desc = next_rxd;
  3346. buffer_info = next_buffer;
  3347. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3348. }
  3349. rx_ring->next_to_clean = i;
  3350. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3351. if (cleaned_count)
  3352. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3353. return cleaned;
  3354. }
  3355. /**
  3356. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3357. * @adapter: address of board private structure
  3358. **/
  3359. static void
  3360. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3361. struct e1000_rx_ring *rx_ring,
  3362. int cleaned_count)
  3363. {
  3364. struct net_device *netdev = adapter->netdev;
  3365. struct pci_dev *pdev = adapter->pdev;
  3366. struct e1000_rx_desc *rx_desc;
  3367. struct e1000_buffer *buffer_info;
  3368. struct sk_buff *skb;
  3369. unsigned int i;
  3370. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3371. i = rx_ring->next_to_use;
  3372. buffer_info = &rx_ring->buffer_info[i];
  3373. while (cleaned_count--) {
  3374. if (!(skb = buffer_info->skb))
  3375. skb = dev_alloc_skb(bufsz);
  3376. else {
  3377. skb_trim(skb, 0);
  3378. goto map_skb;
  3379. }
  3380. if (unlikely(!skb)) {
  3381. /* Better luck next round */
  3382. adapter->alloc_rx_buff_failed++;
  3383. break;
  3384. }
  3385. /* Fix for errata 23, can't cross 64kB boundary */
  3386. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3387. struct sk_buff *oldskb = skb;
  3388. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3389. "at %p\n", bufsz, skb->data);
  3390. /* Try again, without freeing the previous */
  3391. skb = dev_alloc_skb(bufsz);
  3392. /* Failed allocation, critical failure */
  3393. if (!skb) {
  3394. dev_kfree_skb(oldskb);
  3395. break;
  3396. }
  3397. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3398. /* give up */
  3399. dev_kfree_skb(skb);
  3400. dev_kfree_skb(oldskb);
  3401. break; /* while !buffer_info->skb */
  3402. } else {
  3403. /* Use new allocation */
  3404. dev_kfree_skb(oldskb);
  3405. }
  3406. }
  3407. /* Make buffer alignment 2 beyond a 16 byte boundary
  3408. * this will result in a 16 byte aligned IP header after
  3409. * the 14 byte MAC header is removed
  3410. */
  3411. skb_reserve(skb, NET_IP_ALIGN);
  3412. skb->dev = netdev;
  3413. buffer_info->skb = skb;
  3414. buffer_info->length = adapter->rx_buffer_len;
  3415. map_skb:
  3416. buffer_info->dma = pci_map_single(pdev,
  3417. skb->data,
  3418. adapter->rx_buffer_len,
  3419. PCI_DMA_FROMDEVICE);
  3420. /* Fix for errata 23, can't cross 64kB boundary */
  3421. if (!e1000_check_64k_bound(adapter,
  3422. (void *)(unsigned long)buffer_info->dma,
  3423. adapter->rx_buffer_len)) {
  3424. DPRINTK(RX_ERR, ERR,
  3425. "dma align check failed: %u bytes at %p\n",
  3426. adapter->rx_buffer_len,
  3427. (void *)(unsigned long)buffer_info->dma);
  3428. dev_kfree_skb(skb);
  3429. buffer_info->skb = NULL;
  3430. pci_unmap_single(pdev, buffer_info->dma,
  3431. adapter->rx_buffer_len,
  3432. PCI_DMA_FROMDEVICE);
  3433. break; /* while !buffer_info->skb */
  3434. }
  3435. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3436. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3437. if (unlikely(++i == rx_ring->count))
  3438. i = 0;
  3439. buffer_info = &rx_ring->buffer_info[i];
  3440. }
  3441. if (likely(rx_ring->next_to_use != i)) {
  3442. rx_ring->next_to_use = i;
  3443. if (unlikely(i-- == 0))
  3444. i = (rx_ring->count - 1);
  3445. /* Force memory writes to complete before letting h/w
  3446. * know there are new descriptors to fetch. (Only
  3447. * applicable for weak-ordered memory model archs,
  3448. * such as IA-64). */
  3449. wmb();
  3450. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3451. }
  3452. }
  3453. /**
  3454. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3455. * @adapter: address of board private structure
  3456. **/
  3457. static void
  3458. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3459. struct e1000_rx_ring *rx_ring,
  3460. int cleaned_count)
  3461. {
  3462. struct net_device *netdev = adapter->netdev;
  3463. struct pci_dev *pdev = adapter->pdev;
  3464. union e1000_rx_desc_packet_split *rx_desc;
  3465. struct e1000_buffer *buffer_info;
  3466. struct e1000_ps_page *ps_page;
  3467. struct e1000_ps_page_dma *ps_page_dma;
  3468. struct sk_buff *skb;
  3469. unsigned int i, j;
  3470. i = rx_ring->next_to_use;
  3471. buffer_info = &rx_ring->buffer_info[i];
  3472. ps_page = &rx_ring->ps_page[i];
  3473. ps_page_dma = &rx_ring->ps_page_dma[i];
  3474. while (cleaned_count--) {
  3475. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3476. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3477. if (j < adapter->rx_ps_pages) {
  3478. if (likely(!ps_page->ps_page[j])) {
  3479. ps_page->ps_page[j] =
  3480. alloc_page(GFP_ATOMIC);
  3481. if (unlikely(!ps_page->ps_page[j])) {
  3482. adapter->alloc_rx_buff_failed++;
  3483. goto no_buffers;
  3484. }
  3485. ps_page_dma->ps_page_dma[j] =
  3486. pci_map_page(pdev,
  3487. ps_page->ps_page[j],
  3488. 0, PAGE_SIZE,
  3489. PCI_DMA_FROMDEVICE);
  3490. }
  3491. /* Refresh the desc even if buffer_addrs didn't
  3492. * change because each write-back erases
  3493. * this info.
  3494. */
  3495. rx_desc->read.buffer_addr[j+1] =
  3496. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3497. } else
  3498. rx_desc->read.buffer_addr[j+1] = ~0;
  3499. }
  3500. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3501. if (unlikely(!skb)) {
  3502. adapter->alloc_rx_buff_failed++;
  3503. break;
  3504. }
  3505. /* Make buffer alignment 2 beyond a 16 byte boundary
  3506. * this will result in a 16 byte aligned IP header after
  3507. * the 14 byte MAC header is removed
  3508. */
  3509. skb_reserve(skb, NET_IP_ALIGN);
  3510. skb->dev = netdev;
  3511. buffer_info->skb = skb;
  3512. buffer_info->length = adapter->rx_ps_bsize0;
  3513. buffer_info->dma = pci_map_single(pdev, skb->data,
  3514. adapter->rx_ps_bsize0,
  3515. PCI_DMA_FROMDEVICE);
  3516. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3517. if (unlikely(++i == rx_ring->count)) i = 0;
  3518. buffer_info = &rx_ring->buffer_info[i];
  3519. ps_page = &rx_ring->ps_page[i];
  3520. ps_page_dma = &rx_ring->ps_page_dma[i];
  3521. }
  3522. no_buffers:
  3523. if (likely(rx_ring->next_to_use != i)) {
  3524. rx_ring->next_to_use = i;
  3525. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3526. /* Force memory writes to complete before letting h/w
  3527. * know there are new descriptors to fetch. (Only
  3528. * applicable for weak-ordered memory model archs,
  3529. * such as IA-64). */
  3530. wmb();
  3531. /* Hardware increments by 16 bytes, but packet split
  3532. * descriptors are 32 bytes...so we increment tail
  3533. * twice as much.
  3534. */
  3535. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3536. }
  3537. }
  3538. /**
  3539. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3540. * @adapter:
  3541. **/
  3542. static void
  3543. e1000_smartspeed(struct e1000_adapter *adapter)
  3544. {
  3545. uint16_t phy_status;
  3546. uint16_t phy_ctrl;
  3547. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3548. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3549. return;
  3550. if (adapter->smartspeed == 0) {
  3551. /* If Master/Slave config fault is asserted twice,
  3552. * we assume back-to-back */
  3553. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3554. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3555. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3556. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3557. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3558. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3559. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3560. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3561. phy_ctrl);
  3562. adapter->smartspeed++;
  3563. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3564. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3565. &phy_ctrl)) {
  3566. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3567. MII_CR_RESTART_AUTO_NEG);
  3568. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3569. phy_ctrl);
  3570. }
  3571. }
  3572. return;
  3573. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3574. /* If still no link, perhaps using 2/3 pair cable */
  3575. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3576. phy_ctrl |= CR_1000T_MS_ENABLE;
  3577. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3578. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3579. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3580. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3581. MII_CR_RESTART_AUTO_NEG);
  3582. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3583. }
  3584. }
  3585. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3586. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3587. adapter->smartspeed = 0;
  3588. }
  3589. /**
  3590. * e1000_ioctl -
  3591. * @netdev:
  3592. * @ifreq:
  3593. * @cmd:
  3594. **/
  3595. static int
  3596. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3597. {
  3598. switch (cmd) {
  3599. case SIOCGMIIPHY:
  3600. case SIOCGMIIREG:
  3601. case SIOCSMIIREG:
  3602. return e1000_mii_ioctl(netdev, ifr, cmd);
  3603. default:
  3604. return -EOPNOTSUPP;
  3605. }
  3606. }
  3607. /**
  3608. * e1000_mii_ioctl -
  3609. * @netdev:
  3610. * @ifreq:
  3611. * @cmd:
  3612. **/
  3613. static int
  3614. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3615. {
  3616. struct e1000_adapter *adapter = netdev_priv(netdev);
  3617. struct mii_ioctl_data *data = if_mii(ifr);
  3618. int retval;
  3619. uint16_t mii_reg;
  3620. uint16_t spddplx;
  3621. unsigned long flags;
  3622. if (adapter->hw.media_type != e1000_media_type_copper)
  3623. return -EOPNOTSUPP;
  3624. switch (cmd) {
  3625. case SIOCGMIIPHY:
  3626. data->phy_id = adapter->hw.phy_addr;
  3627. break;
  3628. case SIOCGMIIREG:
  3629. if (!capable(CAP_NET_ADMIN))
  3630. return -EPERM;
  3631. spin_lock_irqsave(&adapter->stats_lock, flags);
  3632. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3633. &data->val_out)) {
  3634. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3635. return -EIO;
  3636. }
  3637. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3638. break;
  3639. case SIOCSMIIREG:
  3640. if (!capable(CAP_NET_ADMIN))
  3641. return -EPERM;
  3642. if (data->reg_num & ~(0x1F))
  3643. return -EFAULT;
  3644. mii_reg = data->val_in;
  3645. spin_lock_irqsave(&adapter->stats_lock, flags);
  3646. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3647. mii_reg)) {
  3648. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3649. return -EIO;
  3650. }
  3651. if (adapter->hw.phy_type == e1000_phy_m88) {
  3652. switch (data->reg_num) {
  3653. case PHY_CTRL:
  3654. if (mii_reg & MII_CR_POWER_DOWN)
  3655. break;
  3656. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3657. adapter->hw.autoneg = 1;
  3658. adapter->hw.autoneg_advertised = 0x2F;
  3659. } else {
  3660. if (mii_reg & 0x40)
  3661. spddplx = SPEED_1000;
  3662. else if (mii_reg & 0x2000)
  3663. spddplx = SPEED_100;
  3664. else
  3665. spddplx = SPEED_10;
  3666. spddplx += (mii_reg & 0x100)
  3667. ? FULL_DUPLEX :
  3668. HALF_DUPLEX;
  3669. retval = e1000_set_spd_dplx(adapter,
  3670. spddplx);
  3671. if (retval) {
  3672. spin_unlock_irqrestore(
  3673. &adapter->stats_lock,
  3674. flags);
  3675. return retval;
  3676. }
  3677. }
  3678. if (netif_running(adapter->netdev)) {
  3679. e1000_down(adapter);
  3680. e1000_up(adapter);
  3681. } else
  3682. e1000_reset(adapter);
  3683. break;
  3684. case M88E1000_PHY_SPEC_CTRL:
  3685. case M88E1000_EXT_PHY_SPEC_CTRL:
  3686. if (e1000_phy_reset(&adapter->hw)) {
  3687. spin_unlock_irqrestore(
  3688. &adapter->stats_lock, flags);
  3689. return -EIO;
  3690. }
  3691. break;
  3692. }
  3693. } else {
  3694. switch (data->reg_num) {
  3695. case PHY_CTRL:
  3696. if (mii_reg & MII_CR_POWER_DOWN)
  3697. break;
  3698. if (netif_running(adapter->netdev)) {
  3699. e1000_down(adapter);
  3700. e1000_up(adapter);
  3701. } else
  3702. e1000_reset(adapter);
  3703. break;
  3704. }
  3705. }
  3706. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3707. break;
  3708. default:
  3709. return -EOPNOTSUPP;
  3710. }
  3711. return E1000_SUCCESS;
  3712. }
  3713. void
  3714. e1000_pci_set_mwi(struct e1000_hw *hw)
  3715. {
  3716. struct e1000_adapter *adapter = hw->back;
  3717. int ret_val = pci_set_mwi(adapter->pdev);
  3718. if (ret_val)
  3719. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3720. }
  3721. void
  3722. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3723. {
  3724. struct e1000_adapter *adapter = hw->back;
  3725. pci_clear_mwi(adapter->pdev);
  3726. }
  3727. void
  3728. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3729. {
  3730. struct e1000_adapter *adapter = hw->back;
  3731. pci_read_config_word(adapter->pdev, reg, value);
  3732. }
  3733. void
  3734. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3735. {
  3736. struct e1000_adapter *adapter = hw->back;
  3737. pci_write_config_word(adapter->pdev, reg, *value);
  3738. }
  3739. uint32_t
  3740. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3741. {
  3742. return inl(port);
  3743. }
  3744. void
  3745. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3746. {
  3747. outl(value, port);
  3748. }
  3749. static void
  3750. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3751. {
  3752. struct e1000_adapter *adapter = netdev_priv(netdev);
  3753. uint32_t ctrl, rctl;
  3754. e1000_irq_disable(adapter);
  3755. adapter->vlgrp = grp;
  3756. if (grp) {
  3757. /* enable VLAN tag insert/strip */
  3758. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3759. ctrl |= E1000_CTRL_VME;
  3760. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3761. /* enable VLAN receive filtering */
  3762. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3763. rctl |= E1000_RCTL_VFE;
  3764. rctl &= ~E1000_RCTL_CFIEN;
  3765. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3766. e1000_update_mng_vlan(adapter);
  3767. } else {
  3768. /* disable VLAN tag insert/strip */
  3769. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3770. ctrl &= ~E1000_CTRL_VME;
  3771. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3772. /* disable VLAN filtering */
  3773. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3774. rctl &= ~E1000_RCTL_VFE;
  3775. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3776. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3777. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3778. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3779. }
  3780. }
  3781. e1000_irq_enable(adapter);
  3782. }
  3783. static void
  3784. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3785. {
  3786. struct e1000_adapter *adapter = netdev_priv(netdev);
  3787. uint32_t vfta, index;
  3788. if ((adapter->hw.mng_cookie.status &
  3789. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3790. (vid == adapter->mng_vlan_id))
  3791. return;
  3792. /* add VID to filter table */
  3793. index = (vid >> 5) & 0x7F;
  3794. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3795. vfta |= (1 << (vid & 0x1F));
  3796. e1000_write_vfta(&adapter->hw, index, vfta);
  3797. }
  3798. static void
  3799. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3800. {
  3801. struct e1000_adapter *adapter = netdev_priv(netdev);
  3802. uint32_t vfta, index;
  3803. e1000_irq_disable(adapter);
  3804. if (adapter->vlgrp)
  3805. adapter->vlgrp->vlan_devices[vid] = NULL;
  3806. e1000_irq_enable(adapter);
  3807. if ((adapter->hw.mng_cookie.status &
  3808. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3809. (vid == adapter->mng_vlan_id)) {
  3810. /* release control to f/w */
  3811. e1000_release_hw_control(adapter);
  3812. return;
  3813. }
  3814. /* remove VID from filter table */
  3815. index = (vid >> 5) & 0x7F;
  3816. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3817. vfta &= ~(1 << (vid & 0x1F));
  3818. e1000_write_vfta(&adapter->hw, index, vfta);
  3819. }
  3820. static void
  3821. e1000_restore_vlan(struct e1000_adapter *adapter)
  3822. {
  3823. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3824. if (adapter->vlgrp) {
  3825. uint16_t vid;
  3826. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3827. if (!adapter->vlgrp->vlan_devices[vid])
  3828. continue;
  3829. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3830. }
  3831. }
  3832. }
  3833. int
  3834. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3835. {
  3836. adapter->hw.autoneg = 0;
  3837. /* Fiber NICs only allow 1000 gbps Full duplex */
  3838. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3839. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3840. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3841. return -EINVAL;
  3842. }
  3843. switch (spddplx) {
  3844. case SPEED_10 + DUPLEX_HALF:
  3845. adapter->hw.forced_speed_duplex = e1000_10_half;
  3846. break;
  3847. case SPEED_10 + DUPLEX_FULL:
  3848. adapter->hw.forced_speed_duplex = e1000_10_full;
  3849. break;
  3850. case SPEED_100 + DUPLEX_HALF:
  3851. adapter->hw.forced_speed_duplex = e1000_100_half;
  3852. break;
  3853. case SPEED_100 + DUPLEX_FULL:
  3854. adapter->hw.forced_speed_duplex = e1000_100_full;
  3855. break;
  3856. case SPEED_1000 + DUPLEX_FULL:
  3857. adapter->hw.autoneg = 1;
  3858. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3859. break;
  3860. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3861. default:
  3862. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3863. return -EINVAL;
  3864. }
  3865. return 0;
  3866. }
  3867. #ifdef CONFIG_PM
  3868. /* these functions save and restore 16 or 64 dwords (64-256 bytes) of config
  3869. * space versus the 64 bytes that pci_[save|restore]_state handle
  3870. */
  3871. #define PCIE_CONFIG_SPACE_LEN 256
  3872. #define PCI_CONFIG_SPACE_LEN 64
  3873. static int
  3874. e1000_pci_save_state(struct e1000_adapter *adapter)
  3875. {
  3876. struct pci_dev *dev = adapter->pdev;
  3877. int size;
  3878. int i;
  3879. if (adapter->hw.mac_type >= e1000_82571)
  3880. size = PCIE_CONFIG_SPACE_LEN;
  3881. else
  3882. size = PCI_CONFIG_SPACE_LEN;
  3883. WARN_ON(adapter->config_space != NULL);
  3884. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3885. if (!adapter->config_space) {
  3886. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3887. return -ENOMEM;
  3888. }
  3889. for (i = 0; i < (size / 4); i++)
  3890. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3891. return 0;
  3892. }
  3893. static void
  3894. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3895. {
  3896. struct pci_dev *dev = adapter->pdev;
  3897. int size;
  3898. int i;
  3899. if (adapter->config_space == NULL)
  3900. return;
  3901. if (adapter->hw.mac_type >= e1000_82571)
  3902. size = PCIE_CONFIG_SPACE_LEN;
  3903. else
  3904. size = PCI_CONFIG_SPACE_LEN;
  3905. for (i = 0; i < (size / 4); i++)
  3906. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3907. kfree(adapter->config_space);
  3908. adapter->config_space = NULL;
  3909. return;
  3910. }
  3911. #endif /* CONFIG_PM */
  3912. static int
  3913. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3914. {
  3915. struct net_device *netdev = pci_get_drvdata(pdev);
  3916. struct e1000_adapter *adapter = netdev_priv(netdev);
  3917. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3918. uint32_t wufc = adapter->wol;
  3919. int retval = 0;
  3920. netif_device_detach(netdev);
  3921. if (netif_running(netdev))
  3922. e1000_down(adapter);
  3923. #ifdef CONFIG_PM
  3924. /* implement our own version of pci_save_state(pdev) because pci
  3925. * express adapters have larger 256 byte config spaces */
  3926. retval = e1000_pci_save_state(adapter);
  3927. if (retval)
  3928. return retval;
  3929. #endif
  3930. status = E1000_READ_REG(&adapter->hw, STATUS);
  3931. if (status & E1000_STATUS_LU)
  3932. wufc &= ~E1000_WUFC_LNKC;
  3933. if (wufc) {
  3934. e1000_setup_rctl(adapter);
  3935. e1000_set_multi(netdev);
  3936. /* turn on all-multi mode if wake on multicast is enabled */
  3937. if (adapter->wol & E1000_WUFC_MC) {
  3938. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3939. rctl |= E1000_RCTL_MPE;
  3940. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3941. }
  3942. if (adapter->hw.mac_type >= e1000_82540) {
  3943. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3944. /* advertise wake from D3Cold */
  3945. #define E1000_CTRL_ADVD3WUC 0x00100000
  3946. /* phy power management enable */
  3947. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3948. ctrl |= E1000_CTRL_ADVD3WUC |
  3949. E1000_CTRL_EN_PHY_PWR_MGMT;
  3950. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3951. }
  3952. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3953. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3954. /* keep the laser running in D3 */
  3955. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3956. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3957. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3958. }
  3959. /* Allow time for pending master requests to run */
  3960. e1000_disable_pciex_master(&adapter->hw);
  3961. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3962. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3963. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3964. if (retval)
  3965. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3966. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3967. if (retval)
  3968. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3969. } else {
  3970. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3971. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3972. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  3973. if (retval)
  3974. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3975. retval = pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
  3976. if (retval)
  3977. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3978. }
  3979. if (adapter->hw.mac_type >= e1000_82540 &&
  3980. adapter->hw.media_type == e1000_media_type_copper) {
  3981. manc = E1000_READ_REG(&adapter->hw, MANC);
  3982. if (manc & E1000_MANC_SMBUS_EN) {
  3983. manc |= E1000_MANC_ARP_EN;
  3984. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3985. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3986. if (retval)
  3987. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3988. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3989. if (retval)
  3990. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3991. }
  3992. }
  3993. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  3994. * would have already happened in close and is redundant. */
  3995. e1000_release_hw_control(adapter);
  3996. pci_disable_device(pdev);
  3997. retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3998. if (retval)
  3999. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  4000. return 0;
  4001. }
  4002. #ifdef CONFIG_PM
  4003. static int
  4004. e1000_resume(struct pci_dev *pdev)
  4005. {
  4006. struct net_device *netdev = pci_get_drvdata(pdev);
  4007. struct e1000_adapter *adapter = netdev_priv(netdev);
  4008. int retval;
  4009. uint32_t manc, ret_val;
  4010. retval = pci_set_power_state(pdev, PCI_D0);
  4011. if (retval)
  4012. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  4013. e1000_pci_restore_state(adapter);
  4014. ret_val = pci_enable_device(pdev);
  4015. pci_set_master(pdev);
  4016. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  4017. if (retval)
  4018. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  4019. retval = pci_enable_wake(pdev, PCI_D3cold, 0);
  4020. if (retval)
  4021. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  4022. e1000_reset(adapter);
  4023. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4024. if (netif_running(netdev))
  4025. e1000_up(adapter);
  4026. netif_device_attach(netdev);
  4027. if (adapter->hw.mac_type >= e1000_82540 &&
  4028. adapter->hw.media_type == e1000_media_type_copper) {
  4029. manc = E1000_READ_REG(&adapter->hw, MANC);
  4030. manc &= ~(E1000_MANC_ARP_EN);
  4031. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4032. }
  4033. /* If the controller is 82573 and f/w is AMT, do not set
  4034. * DRV_LOAD until the interface is up. For all other cases,
  4035. * let the f/w know that the h/w is now under the control
  4036. * of the driver. */
  4037. if (adapter->hw.mac_type != e1000_82573 ||
  4038. !e1000_check_mng_mode(&adapter->hw))
  4039. e1000_get_hw_control(adapter);
  4040. return 0;
  4041. }
  4042. #endif
  4043. #ifdef CONFIG_NET_POLL_CONTROLLER
  4044. /*
  4045. * Polling 'interrupt' - used by things like netconsole to send skbs
  4046. * without having to re-enable interrupts. It's not called while
  4047. * the interrupt routine is executing.
  4048. */
  4049. static void
  4050. e1000_netpoll(struct net_device *netdev)
  4051. {
  4052. struct e1000_adapter *adapter = netdev_priv(netdev);
  4053. disable_irq(adapter->pdev->irq);
  4054. e1000_intr(adapter->pdev->irq, netdev, NULL);
  4055. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  4056. #ifndef CONFIG_E1000_NAPI
  4057. adapter->clean_rx(adapter, adapter->rx_ring);
  4058. #endif
  4059. enable_irq(adapter->pdev->irq);
  4060. }
  4061. #endif
  4062. /* e1000_main.c */