ati-agp.c 14 KB

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  1. /*
  2. * ATi AGPGART routines.
  3. */
  4. #include <linux/types.h>
  5. #include <linux/module.h>
  6. #include <linux/pci.h>
  7. #include <linux/init.h>
  8. #include <linux/string.h>
  9. #include <linux/slab.h>
  10. #include <linux/agp_backend.h>
  11. #include <asm/agp.h>
  12. #include "agp.h"
  13. #define ATI_GART_MMBASE_ADDR 0x14
  14. #define ATI_RS100_APSIZE 0xac
  15. #define ATI_RS100_IG_AGPMODE 0xb0
  16. #define ATI_RS300_APSIZE 0xf8
  17. #define ATI_RS300_IG_AGPMODE 0xfc
  18. #define ATI_GART_FEATURE_ID 0x00
  19. #define ATI_GART_BASE 0x04
  20. #define ATI_GART_CACHE_SZBASE 0x08
  21. #define ATI_GART_CACHE_CNTRL 0x0c
  22. #define ATI_GART_CACHE_ENTRY_CNTRL 0x10
  23. static struct aper_size_info_lvl2 ati_generic_sizes[7] =
  24. {
  25. {2048, 524288, 0x0000000c},
  26. {1024, 262144, 0x0000000a},
  27. {512, 131072, 0x00000008},
  28. {256, 65536, 0x00000006},
  29. {128, 32768, 0x00000004},
  30. {64, 16384, 0x00000002},
  31. {32, 8192, 0x00000000}
  32. };
  33. static struct gatt_mask ati_generic_masks[] =
  34. {
  35. { .mask = 1, .type = 0}
  36. };
  37. typedef struct _ati_page_map {
  38. unsigned long *real;
  39. unsigned long __iomem *remapped;
  40. } ati_page_map;
  41. static struct _ati_generic_private {
  42. volatile u8 __iomem *registers;
  43. ati_page_map **gatt_pages;
  44. int num_tables;
  45. } ati_generic_private;
  46. static int ati_create_page_map(ati_page_map *page_map)
  47. {
  48. int i, err = 0;
  49. page_map->real = (unsigned long *) __get_free_page(GFP_KERNEL);
  50. if (page_map->real == NULL)
  51. return -ENOMEM;
  52. SetPageReserved(virt_to_page(page_map->real));
  53. err = map_page_into_agp(virt_to_page(page_map->real));
  54. page_map->remapped = ioremap_nocache(virt_to_gart(page_map->real),
  55. PAGE_SIZE);
  56. if (page_map->remapped == NULL || err) {
  57. ClearPageReserved(virt_to_page(page_map->real));
  58. free_page((unsigned long) page_map->real);
  59. page_map->real = NULL;
  60. return -ENOMEM;
  61. }
  62. /*CACHE_FLUSH();*/
  63. global_cache_flush();
  64. for(i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) {
  65. writel(agp_bridge->scratch_page, page_map->remapped+i);
  66. readl(page_map->remapped+i); /* PCI Posting. */
  67. }
  68. return 0;
  69. }
  70. static void ati_free_page_map(ati_page_map *page_map)
  71. {
  72. unmap_page_from_agp(virt_to_page(page_map->real));
  73. iounmap(page_map->remapped);
  74. ClearPageReserved(virt_to_page(page_map->real));
  75. free_page((unsigned long) page_map->real);
  76. }
  77. static void ati_free_gatt_pages(void)
  78. {
  79. int i;
  80. ati_page_map **tables;
  81. ati_page_map *entry;
  82. tables = ati_generic_private.gatt_pages;
  83. for(i = 0; i < ati_generic_private.num_tables; i++) {
  84. entry = tables[i];
  85. if (entry != NULL) {
  86. if (entry->real != NULL)
  87. ati_free_page_map(entry);
  88. kfree(entry);
  89. }
  90. }
  91. kfree(tables);
  92. }
  93. static int ati_create_gatt_pages(int nr_tables)
  94. {
  95. ati_page_map **tables;
  96. ati_page_map *entry;
  97. int retval = 0;
  98. int i;
  99. tables = kzalloc((nr_tables + 1) * sizeof(ati_page_map *),GFP_KERNEL);
  100. if (tables == NULL)
  101. return -ENOMEM;
  102. for (i = 0; i < nr_tables; i++) {
  103. entry = kzalloc(sizeof(ati_page_map), GFP_KERNEL);
  104. if (entry == NULL) {
  105. while (i>0) {
  106. kfree (tables[i-1]);
  107. i--;
  108. }
  109. kfree (tables);
  110. tables = NULL;
  111. retval = -ENOMEM;
  112. break;
  113. }
  114. tables[i] = entry;
  115. retval = ati_create_page_map(entry);
  116. if (retval != 0) break;
  117. }
  118. ati_generic_private.num_tables = nr_tables;
  119. ati_generic_private.gatt_pages = tables;
  120. if (retval != 0) ati_free_gatt_pages();
  121. return retval;
  122. }
  123. static int is_r200(void)
  124. {
  125. if ((agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS100) ||
  126. (agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS200) ||
  127. (agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS200_B) ||
  128. (agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS250))
  129. return 1;
  130. return 0;
  131. }
  132. static int ati_fetch_size(void)
  133. {
  134. int i;
  135. u32 temp;
  136. struct aper_size_info_lvl2 *values;
  137. if (is_r200())
  138. pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
  139. else
  140. pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
  141. temp = (temp & 0x0000000e);
  142. values = A_SIZE_LVL2(agp_bridge->driver->aperture_sizes);
  143. for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
  144. if (temp == values[i].size_value) {
  145. agp_bridge->previous_size =
  146. agp_bridge->current_size = (void *) (values + i);
  147. agp_bridge->aperture_size_idx = i;
  148. return values[i].size;
  149. }
  150. }
  151. return 0;
  152. }
  153. static void ati_tlbflush(struct agp_memory * mem)
  154. {
  155. writel(1, ati_generic_private.registers+ATI_GART_CACHE_CNTRL);
  156. readl(ati_generic_private.registers+ATI_GART_CACHE_CNTRL); /* PCI Posting. */
  157. }
  158. static void ati_cleanup(void)
  159. {
  160. struct aper_size_info_lvl2 *previous_size;
  161. u32 temp;
  162. previous_size = A_SIZE_LVL2(agp_bridge->previous_size);
  163. /* Write back the previous size and disable gart translation */
  164. if (is_r200()) {
  165. pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
  166. temp = ((temp & ~(0x0000000f)) | previous_size->size_value);
  167. pci_write_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, temp);
  168. } else {
  169. pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
  170. temp = ((temp & ~(0x0000000f)) | previous_size->size_value);
  171. pci_write_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, temp);
  172. }
  173. iounmap((volatile u8 __iomem *)ati_generic_private.registers);
  174. }
  175. static int ati_configure(void)
  176. {
  177. u32 temp;
  178. /* Get the memory mapped registers */
  179. pci_read_config_dword(agp_bridge->dev, ATI_GART_MMBASE_ADDR, &temp);
  180. temp = (temp & 0xfffff000);
  181. ati_generic_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096);
  182. if (is_r200())
  183. pci_write_config_dword(agp_bridge->dev, ATI_RS100_IG_AGPMODE, 0x20000);
  184. else
  185. pci_write_config_dword(agp_bridge->dev, ATI_RS300_IG_AGPMODE, 0x20000);
  186. /* address to map too */
  187. /*
  188. pci_read_config_dword(agp_bridge.dev, AGP_APBASE, &temp);
  189. agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
  190. printk(KERN_INFO PFX "IGP320 gart_bus_addr: %x\n", agp_bridge.gart_bus_addr);
  191. */
  192. writel(0x60000, ati_generic_private.registers+ATI_GART_FEATURE_ID);
  193. readl(ati_generic_private.registers+ATI_GART_FEATURE_ID); /* PCI Posting.*/
  194. /* SIGNALED_SYSTEM_ERROR @ NB_STATUS */
  195. pci_read_config_dword(agp_bridge->dev, 4, &temp);
  196. pci_write_config_dword(agp_bridge->dev, 4, temp | (1<<14));
  197. /* Write out the address of the gatt table */
  198. writel(agp_bridge->gatt_bus_addr, ati_generic_private.registers+ATI_GART_BASE);
  199. readl(ati_generic_private.registers+ATI_GART_BASE); /* PCI Posting. */
  200. return 0;
  201. }
  202. /*
  203. *Since we don't need contigious memory we just try
  204. * to get the gatt table once
  205. */
  206. #define GET_PAGE_DIR_OFF(addr) (addr >> 22)
  207. #define GET_PAGE_DIR_IDX(addr) (GET_PAGE_DIR_OFF(addr) - \
  208. GET_PAGE_DIR_OFF(agp_bridge->gart_bus_addr))
  209. #define GET_GATT_OFF(addr) ((addr & 0x003ff000) >> 12)
  210. #undef GET_GATT
  211. #define GET_GATT(addr) (ati_generic_private.gatt_pages[\
  212. GET_PAGE_DIR_IDX(addr)]->remapped)
  213. static int ati_insert_memory(struct agp_memory * mem,
  214. off_t pg_start, int type)
  215. {
  216. int i, j, num_entries;
  217. unsigned long __iomem *cur_gatt;
  218. unsigned long addr;
  219. num_entries = A_SIZE_LVL2(agp_bridge->current_size)->num_entries;
  220. if (type != 0 || mem->type != 0)
  221. return -EINVAL;
  222. if ((pg_start + mem->page_count) > num_entries)
  223. return -EINVAL;
  224. j = pg_start;
  225. while (j < (pg_start + mem->page_count)) {
  226. addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
  227. cur_gatt = GET_GATT(addr);
  228. if (!PGE_EMPTY(agp_bridge,readl(cur_gatt+GET_GATT_OFF(addr))))
  229. return -EBUSY;
  230. j++;
  231. }
  232. if (mem->is_flushed == FALSE) {
  233. /*CACHE_FLUSH(); */
  234. global_cache_flush();
  235. mem->is_flushed = TRUE;
  236. }
  237. for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
  238. addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
  239. cur_gatt = GET_GATT(addr);
  240. writel(agp_bridge->driver->mask_memory(agp_bridge,
  241. mem->memory[i], mem->type), cur_gatt+GET_GATT_OFF(addr));
  242. readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */
  243. }
  244. agp_bridge->driver->tlb_flush(mem);
  245. return 0;
  246. }
  247. static int ati_remove_memory(struct agp_memory * mem, off_t pg_start,
  248. int type)
  249. {
  250. int i;
  251. unsigned long __iomem *cur_gatt;
  252. unsigned long addr;
  253. if (type != 0 || mem->type != 0) {
  254. return -EINVAL;
  255. }
  256. for (i = pg_start; i < (mem->page_count + pg_start); i++) {
  257. addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr;
  258. cur_gatt = GET_GATT(addr);
  259. writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
  260. readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */
  261. }
  262. agp_bridge->driver->tlb_flush(mem);
  263. return 0;
  264. }
  265. static int ati_create_gatt_table(struct agp_bridge_data *bridge)
  266. {
  267. struct aper_size_info_lvl2 *value;
  268. ati_page_map page_dir;
  269. unsigned long addr;
  270. int retval;
  271. u32 temp;
  272. int i;
  273. struct aper_size_info_lvl2 *current_size;
  274. value = A_SIZE_LVL2(agp_bridge->current_size);
  275. retval = ati_create_page_map(&page_dir);
  276. if (retval != 0)
  277. return retval;
  278. retval = ati_create_gatt_pages(value->num_entries / 1024);
  279. if (retval != 0) {
  280. ati_free_page_map(&page_dir);
  281. return retval;
  282. }
  283. agp_bridge->gatt_table_real = (u32 *)page_dir.real;
  284. agp_bridge->gatt_table = (u32 __iomem *) page_dir.remapped;
  285. agp_bridge->gatt_bus_addr = virt_to_gart(page_dir.real);
  286. /* Write out the size register */
  287. current_size = A_SIZE_LVL2(agp_bridge->current_size);
  288. if (is_r200()) {
  289. pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
  290. temp = (((temp & ~(0x0000000e)) | current_size->size_value)
  291. | 0x00000001);
  292. pci_write_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, temp);
  293. pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
  294. } else {
  295. pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
  296. temp = (((temp & ~(0x0000000e)) | current_size->size_value)
  297. | 0x00000001);
  298. pci_write_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, temp);
  299. pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
  300. }
  301. /*
  302. * Get the address for the gart region.
  303. * This is a bus address even on the alpha, b/c its
  304. * used to program the agp master not the cpu
  305. */
  306. pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
  307. addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
  308. agp_bridge->gart_bus_addr = addr;
  309. /* Calculate the agp offset */
  310. for(i = 0; i < value->num_entries / 1024; i++, addr += 0x00400000) {
  311. writel(virt_to_gart(ati_generic_private.gatt_pages[i]->real) | 1,
  312. page_dir.remapped+GET_PAGE_DIR_OFF(addr));
  313. readl(page_dir.remapped+GET_PAGE_DIR_OFF(addr)); /* PCI Posting. */
  314. }
  315. return 0;
  316. }
  317. static int ati_free_gatt_table(struct agp_bridge_data *bridge)
  318. {
  319. ati_page_map page_dir;
  320. page_dir.real = (unsigned long *)agp_bridge->gatt_table_real;
  321. page_dir.remapped = (unsigned long __iomem *)agp_bridge->gatt_table;
  322. ati_free_gatt_pages();
  323. ati_free_page_map(&page_dir);
  324. return 0;
  325. }
  326. static struct agp_bridge_driver ati_generic_bridge = {
  327. .owner = THIS_MODULE,
  328. .aperture_sizes = ati_generic_sizes,
  329. .size_type = LVL2_APER_SIZE,
  330. .num_aperture_sizes = 7,
  331. .configure = ati_configure,
  332. .fetch_size = ati_fetch_size,
  333. .cleanup = ati_cleanup,
  334. .tlb_flush = ati_tlbflush,
  335. .mask_memory = agp_generic_mask_memory,
  336. .masks = ati_generic_masks,
  337. .agp_enable = agp_generic_enable,
  338. .cache_flush = global_cache_flush,
  339. .create_gatt_table = ati_create_gatt_table,
  340. .free_gatt_table = ati_free_gatt_table,
  341. .insert_memory = ati_insert_memory,
  342. .remove_memory = ati_remove_memory,
  343. .alloc_by_type = agp_generic_alloc_by_type,
  344. .free_by_type = agp_generic_free_by_type,
  345. .agp_alloc_page = agp_generic_alloc_page,
  346. .agp_destroy_page = agp_generic_destroy_page,
  347. };
  348. static struct agp_device_ids ati_agp_device_ids[] __devinitdata =
  349. {
  350. {
  351. .device_id = PCI_DEVICE_ID_ATI_RS100,
  352. .chipset_name = "IGP320/M",
  353. },
  354. {
  355. .device_id = PCI_DEVICE_ID_ATI_RS200,
  356. .chipset_name = "IGP330/340/345/350/M",
  357. },
  358. {
  359. .device_id = PCI_DEVICE_ID_ATI_RS200_B,
  360. .chipset_name = "IGP345M",
  361. },
  362. {
  363. .device_id = PCI_DEVICE_ID_ATI_RS250,
  364. .chipset_name = "IGP7000/M",
  365. },
  366. {
  367. .device_id = PCI_DEVICE_ID_ATI_RS300_100,
  368. .chipset_name = "IGP9100/M",
  369. },
  370. {
  371. .device_id = PCI_DEVICE_ID_ATI_RS300_133,
  372. .chipset_name = "IGP9100/M",
  373. },
  374. {
  375. .device_id = PCI_DEVICE_ID_ATI_RS300_166,
  376. .chipset_name = "IGP9100/M",
  377. },
  378. {
  379. .device_id = PCI_DEVICE_ID_ATI_RS300_200,
  380. .chipset_name = "IGP9100/M",
  381. },
  382. { }, /* dummy final entry, always present */
  383. };
  384. static int __devinit agp_ati_probe(struct pci_dev *pdev,
  385. const struct pci_device_id *ent)
  386. {
  387. struct agp_device_ids *devs = ati_agp_device_ids;
  388. struct agp_bridge_data *bridge;
  389. u8 cap_ptr;
  390. int j;
  391. cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
  392. if (!cap_ptr)
  393. return -ENODEV;
  394. /* probe for known chipsets */
  395. for (j = 0; devs[j].chipset_name; j++) {
  396. if (pdev->device == devs[j].device_id)
  397. goto found;
  398. }
  399. printk(KERN_ERR PFX
  400. "Unsupported Ati chipset (device id: %04x)\n", pdev->device);
  401. return -ENODEV;
  402. found:
  403. bridge = agp_alloc_bridge();
  404. if (!bridge)
  405. return -ENOMEM;
  406. bridge->dev = pdev;
  407. bridge->capndx = cap_ptr;
  408. bridge->driver = &ati_generic_bridge;
  409. printk(KERN_INFO PFX "Detected Ati %s chipset\n",
  410. devs[j].chipset_name);
  411. /* Fill in the mode register */
  412. pci_read_config_dword(pdev,
  413. bridge->capndx+PCI_AGP_STATUS,
  414. &bridge->mode);
  415. pci_set_drvdata(pdev, bridge);
  416. return agp_add_bridge(bridge);
  417. }
  418. static void __devexit agp_ati_remove(struct pci_dev *pdev)
  419. {
  420. struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
  421. agp_remove_bridge(bridge);
  422. agp_put_bridge(bridge);
  423. }
  424. static struct pci_device_id agp_ati_pci_table[] = {
  425. {
  426. .class = (PCI_CLASS_BRIDGE_HOST << 8),
  427. .class_mask = ~0,
  428. .vendor = PCI_VENDOR_ID_ATI,
  429. .device = PCI_ANY_ID,
  430. .subvendor = PCI_ANY_ID,
  431. .subdevice = PCI_ANY_ID,
  432. },
  433. { }
  434. };
  435. MODULE_DEVICE_TABLE(pci, agp_ati_pci_table);
  436. static struct pci_driver agp_ati_pci_driver = {
  437. .name = "agpgart-ati",
  438. .id_table = agp_ati_pci_table,
  439. .probe = agp_ati_probe,
  440. .remove = agp_ati_remove,
  441. };
  442. static int __init agp_ati_init(void)
  443. {
  444. if (agp_off)
  445. return -EINVAL;
  446. return pci_register_driver(&agp_ati_pci_driver);
  447. }
  448. static void __exit agp_ati_cleanup(void)
  449. {
  450. pci_unregister_driver(&agp_ati_pci_driver);
  451. }
  452. module_init(agp_ati_init);
  453. module_exit(agp_ati_cleanup);
  454. MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>");
  455. MODULE_LICENSE("GPL and additional rights");