time.c 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633
  1. /* $Id: time.c,v 1.60 2002/01/23 14:33:55 davem Exp $
  2. * linux/arch/sparc/kernel/time.c
  3. *
  4. * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  5. * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
  6. *
  7. * Chris Davis (cdavis@cois.on.ca) 03/27/1998
  8. * Added support for the intersil on the sun4/4200
  9. *
  10. * Gleb Raiko (rajko@mech.math.msu.su) 08/18/1998
  11. * Support for MicroSPARC-IIep, PCI CPU.
  12. *
  13. * This file handles the Sparc specific time handling details.
  14. *
  15. * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
  16. * "A Kernel Model for Precision Timekeeping" by Dave Mills
  17. */
  18. #include <linux/config.h>
  19. #include <linux/errno.h>
  20. #include <linux/module.h>
  21. #include <linux/sched.h>
  22. #include <linux/kernel.h>
  23. #include <linux/param.h>
  24. #include <linux/string.h>
  25. #include <linux/mm.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/time.h>
  28. #include <linux/timex.h>
  29. #include <linux/init.h>
  30. #include <linux/pci.h>
  31. #include <linux/ioport.h>
  32. #include <linux/profile.h>
  33. #include <asm/oplib.h>
  34. #include <asm/timer.h>
  35. #include <asm/mostek.h>
  36. #include <asm/system.h>
  37. #include <asm/irq.h>
  38. #include <asm/io.h>
  39. #include <asm/idprom.h>
  40. #include <asm/machines.h>
  41. #include <asm/sun4paddr.h>
  42. #include <asm/page.h>
  43. #include <asm/pcic.h>
  44. extern unsigned long wall_jiffies;
  45. DEFINE_SPINLOCK(rtc_lock);
  46. enum sparc_clock_type sp_clock_typ;
  47. DEFINE_SPINLOCK(mostek_lock);
  48. void __iomem *mstk48t02_regs = NULL;
  49. static struct mostek48t08 __iomem *mstk48t08_regs = NULL;
  50. static int set_rtc_mmss(unsigned long);
  51. static int sbus_do_settimeofday(struct timespec *tv);
  52. #ifdef CONFIG_SUN4
  53. struct intersil *intersil_clock;
  54. #define intersil_cmd(intersil_reg, intsil_cmd) intersil_reg->int_cmd_reg = \
  55. (intsil_cmd)
  56. #define intersil_intr(intersil_reg, intsil_cmd) intersil_reg->int_intr_reg = \
  57. (intsil_cmd)
  58. #define intersil_start(intersil_reg) intersil_cmd(intersil_reg, \
  59. ( INTERSIL_START | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
  60. INTERSIL_INTR_ENABLE))
  61. #define intersil_stop(intersil_reg) intersil_cmd(intersil_reg, \
  62. ( INTERSIL_STOP | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
  63. INTERSIL_INTR_ENABLE))
  64. #define intersil_read_intr(intersil_reg, towhere) towhere = \
  65. intersil_reg->int_intr_reg
  66. #endif
  67. unsigned long profile_pc(struct pt_regs *regs)
  68. {
  69. extern char __copy_user_begin[], __copy_user_end[];
  70. extern char __atomic_begin[], __atomic_end[];
  71. extern char __bzero_begin[], __bzero_end[];
  72. extern char __bitops_begin[], __bitops_end[];
  73. unsigned long pc = regs->pc;
  74. if (in_lock_functions(pc) ||
  75. (pc >= (unsigned long) __copy_user_begin &&
  76. pc < (unsigned long) __copy_user_end) ||
  77. (pc >= (unsigned long) __atomic_begin &&
  78. pc < (unsigned long) __atomic_end) ||
  79. (pc >= (unsigned long) __bzero_begin &&
  80. pc < (unsigned long) __bzero_end) ||
  81. (pc >= (unsigned long) __bitops_begin &&
  82. pc < (unsigned long) __bitops_end))
  83. pc = regs->u_regs[UREG_RETPC];
  84. return pc;
  85. }
  86. __volatile__ unsigned int *master_l10_counter;
  87. __volatile__ unsigned int *master_l10_limit;
  88. /*
  89. * timer_interrupt() needs to keep up the real-time clock,
  90. * as well as call the "do_timer()" routine every clocktick
  91. */
  92. #define TICK_SIZE (tick_nsec / 1000)
  93. irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
  94. {
  95. /* last time the cmos clock got updated */
  96. static long last_rtc_update;
  97. #ifndef CONFIG_SMP
  98. profile_tick(CPU_PROFILING, regs);
  99. #endif
  100. /* Protect counter clear so that do_gettimeoffset works */
  101. write_seqlock(&xtime_lock);
  102. #ifdef CONFIG_SUN4
  103. if((idprom->id_machtype == (SM_SUN4 | SM_4_260)) ||
  104. (idprom->id_machtype == (SM_SUN4 | SM_4_110))) {
  105. int temp;
  106. intersil_read_intr(intersil_clock, temp);
  107. /* re-enable the irq */
  108. enable_pil_irq(10);
  109. }
  110. #endif
  111. clear_clock_irq();
  112. do_timer(regs);
  113. #ifndef CONFIG_SMP
  114. update_process_times(user_mode(regs));
  115. #endif
  116. /* Determine when to update the Mostek clock. */
  117. if (ntp_synced() &&
  118. xtime.tv_sec > last_rtc_update + 660 &&
  119. (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
  120. (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
  121. if (set_rtc_mmss(xtime.tv_sec) == 0)
  122. last_rtc_update = xtime.tv_sec;
  123. else
  124. last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
  125. }
  126. write_sequnlock(&xtime_lock);
  127. return IRQ_HANDLED;
  128. }
  129. /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
  130. static void __init kick_start_clock(void)
  131. {
  132. struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
  133. unsigned char sec;
  134. int i, count;
  135. prom_printf("CLOCK: Clock was stopped. Kick start ");
  136. spin_lock_irq(&mostek_lock);
  137. /* Turn on the kick start bit to start the oscillator. */
  138. regs->creg |= MSTK_CREG_WRITE;
  139. regs->sec &= ~MSTK_STOP;
  140. regs->hour |= MSTK_KICK_START;
  141. regs->creg &= ~MSTK_CREG_WRITE;
  142. spin_unlock_irq(&mostek_lock);
  143. /* Delay to allow the clock oscillator to start. */
  144. sec = MSTK_REG_SEC(regs);
  145. for (i = 0; i < 3; i++) {
  146. while (sec == MSTK_REG_SEC(regs))
  147. for (count = 0; count < 100000; count++)
  148. /* nothing */ ;
  149. prom_printf(".");
  150. sec = regs->sec;
  151. }
  152. prom_printf("\n");
  153. spin_lock_irq(&mostek_lock);
  154. /* Turn off kick start and set a "valid" time and date. */
  155. regs->creg |= MSTK_CREG_WRITE;
  156. regs->hour &= ~MSTK_KICK_START;
  157. MSTK_SET_REG_SEC(regs,0);
  158. MSTK_SET_REG_MIN(regs,0);
  159. MSTK_SET_REG_HOUR(regs,0);
  160. MSTK_SET_REG_DOW(regs,5);
  161. MSTK_SET_REG_DOM(regs,1);
  162. MSTK_SET_REG_MONTH(regs,8);
  163. MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
  164. regs->creg &= ~MSTK_CREG_WRITE;
  165. spin_unlock_irq(&mostek_lock);
  166. /* Ensure the kick start bit is off. If it isn't, turn it off. */
  167. while (regs->hour & MSTK_KICK_START) {
  168. prom_printf("CLOCK: Kick start still on!\n");
  169. spin_lock_irq(&mostek_lock);
  170. regs->creg |= MSTK_CREG_WRITE;
  171. regs->hour &= ~MSTK_KICK_START;
  172. regs->creg &= ~MSTK_CREG_WRITE;
  173. spin_unlock_irq(&mostek_lock);
  174. }
  175. prom_printf("CLOCK: Kick start procedure successful.\n");
  176. }
  177. /* Return nonzero if the clock chip battery is low. */
  178. static __inline__ int has_low_battery(void)
  179. {
  180. struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
  181. unsigned char data1, data2;
  182. spin_lock_irq(&mostek_lock);
  183. data1 = regs->eeprom[0]; /* Read some data. */
  184. regs->eeprom[0] = ~data1; /* Write back the complement. */
  185. data2 = regs->eeprom[0]; /* Read back the complement. */
  186. regs->eeprom[0] = data1; /* Restore the original value. */
  187. spin_unlock_irq(&mostek_lock);
  188. return (data1 == data2); /* Was the write blocked? */
  189. }
  190. /* Probe for the real time clock chip on Sun4 */
  191. static __inline__ void sun4_clock_probe(void)
  192. {
  193. #ifdef CONFIG_SUN4
  194. int temp;
  195. struct resource r;
  196. memset(&r, 0, sizeof(r));
  197. if( idprom->id_machtype == (SM_SUN4 | SM_4_330) ) {
  198. sp_clock_typ = MSTK48T02;
  199. r.start = sun4_clock_physaddr;
  200. mstk48t02_regs = sbus_ioremap(&r, 0,
  201. sizeof(struct mostek48t02), NULL);
  202. mstk48t08_regs = NULL; /* To catch weirdness */
  203. intersil_clock = NULL; /* just in case */
  204. /* Kick start the clock if it is completely stopped. */
  205. if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
  206. kick_start_clock();
  207. } else if( idprom->id_machtype == (SM_SUN4 | SM_4_260)) {
  208. /* intersil setup code */
  209. printk("Clock: INTERSIL at %8x ",sun4_clock_physaddr);
  210. sp_clock_typ = INTERSIL;
  211. r.start = sun4_clock_physaddr;
  212. intersil_clock = (struct intersil *)
  213. sbus_ioremap(&r, 0, sizeof(*intersil_clock), "intersil");
  214. mstk48t02_regs = 0; /* just be sure */
  215. mstk48t08_regs = NULL; /* ditto */
  216. /* initialise the clock */
  217. intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
  218. intersil_start(intersil_clock);
  219. intersil_read_intr(intersil_clock, temp);
  220. while (!(temp & 0x80))
  221. intersil_read_intr(intersil_clock, temp);
  222. intersil_read_intr(intersil_clock, temp);
  223. while (!(temp & 0x80))
  224. intersil_read_intr(intersil_clock, temp);
  225. intersil_stop(intersil_clock);
  226. }
  227. #endif
  228. }
  229. /* Probe for the mostek real time clock chip. */
  230. static __inline__ void clock_probe(void)
  231. {
  232. struct linux_prom_registers clk_reg[2];
  233. char model[128];
  234. register int node, cpuunit, bootbus;
  235. struct resource r;
  236. cpuunit = bootbus = 0;
  237. memset(&r, 0, sizeof(r));
  238. /* Determine the correct starting PROM node for the probe. */
  239. node = prom_getchild(prom_root_node);
  240. switch (sparc_cpu_model) {
  241. case sun4c:
  242. break;
  243. case sun4m:
  244. node = prom_getchild(prom_searchsiblings(node, "obio"));
  245. break;
  246. case sun4d:
  247. node = prom_getchild(bootbus = prom_searchsiblings(prom_getchild(cpuunit = prom_searchsiblings(node, "cpu-unit")), "bootbus"));
  248. break;
  249. default:
  250. prom_printf("CLOCK: Unsupported architecture!\n");
  251. prom_halt();
  252. }
  253. /* Find the PROM node describing the real time clock. */
  254. sp_clock_typ = MSTK_INVALID;
  255. node = prom_searchsiblings(node,"eeprom");
  256. if (!node) {
  257. prom_printf("CLOCK: No clock found!\n");
  258. prom_halt();
  259. }
  260. /* Get the model name and setup everything up. */
  261. model[0] = '\0';
  262. prom_getstring(node, "model", model, sizeof(model));
  263. if (strcmp(model, "mk48t02") == 0) {
  264. sp_clock_typ = MSTK48T02;
  265. if (prom_getproperty(node, "reg", (char *) clk_reg, sizeof(clk_reg)) == -1) {
  266. prom_printf("clock_probe: FAILED!\n");
  267. prom_halt();
  268. }
  269. if (sparc_cpu_model == sun4d)
  270. prom_apply_generic_ranges (bootbus, cpuunit, clk_reg, 1);
  271. else
  272. prom_apply_obio_ranges(clk_reg, 1);
  273. /* Map the clock register io area read-only */
  274. r.flags = clk_reg[0].which_io;
  275. r.start = clk_reg[0].phys_addr;
  276. mstk48t02_regs = sbus_ioremap(&r, 0,
  277. sizeof(struct mostek48t02), "mk48t02");
  278. mstk48t08_regs = NULL; /* To catch weirdness */
  279. } else if (strcmp(model, "mk48t08") == 0) {
  280. sp_clock_typ = MSTK48T08;
  281. if(prom_getproperty(node, "reg", (char *) clk_reg,
  282. sizeof(clk_reg)) == -1) {
  283. prom_printf("clock_probe: FAILED!\n");
  284. prom_halt();
  285. }
  286. if (sparc_cpu_model == sun4d)
  287. prom_apply_generic_ranges (bootbus, cpuunit, clk_reg, 1);
  288. else
  289. prom_apply_obio_ranges(clk_reg, 1);
  290. /* Map the clock register io area read-only */
  291. /* XXX r/o attribute is somewhere in r.flags */
  292. r.flags = clk_reg[0].which_io;
  293. r.start = clk_reg[0].phys_addr;
  294. mstk48t08_regs = sbus_ioremap(&r, 0,
  295. sizeof(struct mostek48t08), "mk48t08");
  296. mstk48t02_regs = &mstk48t08_regs->regs;
  297. } else {
  298. prom_printf("CLOCK: Unknown model name '%s'\n",model);
  299. prom_halt();
  300. }
  301. /* Report a low battery voltage condition. */
  302. if (has_low_battery())
  303. printk(KERN_CRIT "NVRAM: Low battery voltage!\n");
  304. /* Kick start the clock if it is completely stopped. */
  305. if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
  306. kick_start_clock();
  307. }
  308. void __init sbus_time_init(void)
  309. {
  310. unsigned int year, mon, day, hour, min, sec;
  311. struct mostek48t02 *mregs;
  312. #ifdef CONFIG_SUN4
  313. int temp;
  314. struct intersil *iregs;
  315. #endif
  316. BTFIXUPSET_CALL(bus_do_settimeofday, sbus_do_settimeofday, BTFIXUPCALL_NORM);
  317. btfixup();
  318. if (ARCH_SUN4)
  319. sun4_clock_probe();
  320. else
  321. clock_probe();
  322. sparc_init_timers(timer_interrupt);
  323. #ifdef CONFIG_SUN4
  324. if(idprom->id_machtype == (SM_SUN4 | SM_4_330)) {
  325. #endif
  326. mregs = (struct mostek48t02 *)mstk48t02_regs;
  327. if(!mregs) {
  328. prom_printf("Something wrong, clock regs not mapped yet.\n");
  329. prom_halt();
  330. }
  331. spin_lock_irq(&mostek_lock);
  332. mregs->creg |= MSTK_CREG_READ;
  333. sec = MSTK_REG_SEC(mregs);
  334. min = MSTK_REG_MIN(mregs);
  335. hour = MSTK_REG_HOUR(mregs);
  336. day = MSTK_REG_DOM(mregs);
  337. mon = MSTK_REG_MONTH(mregs);
  338. year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
  339. xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
  340. xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
  341. set_normalized_timespec(&wall_to_monotonic,
  342. -xtime.tv_sec, -xtime.tv_nsec);
  343. mregs->creg &= ~MSTK_CREG_READ;
  344. spin_unlock_irq(&mostek_lock);
  345. #ifdef CONFIG_SUN4
  346. } else if(idprom->id_machtype == (SM_SUN4 | SM_4_260) ) {
  347. /* initialise the intersil on sun4 */
  348. iregs=intersil_clock;
  349. if(!iregs) {
  350. prom_printf("Something wrong, clock regs not mapped yet.\n");
  351. prom_halt();
  352. }
  353. intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
  354. disable_pil_irq(10);
  355. intersil_stop(iregs);
  356. intersil_read_intr(intersil_clock, temp);
  357. temp = iregs->clk.int_csec;
  358. sec = iregs->clk.int_sec;
  359. min = iregs->clk.int_min;
  360. hour = iregs->clk.int_hour;
  361. day = iregs->clk.int_day;
  362. mon = iregs->clk.int_month;
  363. year = MSTK_CVT_YEAR(iregs->clk.int_year);
  364. enable_pil_irq(10);
  365. intersil_start(iregs);
  366. xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
  367. xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
  368. set_normalized_timespec(&wall_to_monotonic,
  369. -xtime.tv_sec, -xtime.tv_nsec);
  370. printk("%u/%u/%u %u:%u:%u\n",day,mon,year,hour,min,sec);
  371. }
  372. #endif
  373. /* Now that OBP ticker has been silenced, it is safe to enable IRQ. */
  374. local_irq_enable();
  375. }
  376. void __init time_init(void)
  377. {
  378. #ifdef CONFIG_PCI
  379. extern void pci_time_init(void);
  380. if (pcic_present()) {
  381. pci_time_init();
  382. return;
  383. }
  384. #endif
  385. sbus_time_init();
  386. }
  387. static inline unsigned long do_gettimeoffset(void)
  388. {
  389. return (*master_l10_counter >> 10) & 0x1fffff;
  390. }
  391. /*
  392. * Returns nanoseconds
  393. * XXX This is a suboptimal implementation.
  394. */
  395. unsigned long long sched_clock(void)
  396. {
  397. return (unsigned long long)jiffies * (1000000000 / HZ);
  398. }
  399. /* Ok, my cute asm atomicity trick doesn't work anymore.
  400. * There are just too many variables that need to be protected
  401. * now (both members of xtime, wall_jiffies, et al.)
  402. */
  403. void do_gettimeofday(struct timeval *tv)
  404. {
  405. unsigned long flags;
  406. unsigned long seq;
  407. unsigned long usec, sec;
  408. unsigned long max_ntp_tick = tick_usec - tickadj;
  409. do {
  410. unsigned long lost;
  411. seq = read_seqbegin_irqsave(&xtime_lock, flags);
  412. usec = do_gettimeoffset();
  413. lost = jiffies - wall_jiffies;
  414. /*
  415. * If time_adjust is negative then NTP is slowing the clock
  416. * so make sure not to go into next possible interval.
  417. * Better to lose some accuracy than have time go backwards..
  418. */
  419. if (unlikely(time_adjust < 0)) {
  420. usec = min(usec, max_ntp_tick);
  421. if (lost)
  422. usec += lost * max_ntp_tick;
  423. }
  424. else if (unlikely(lost))
  425. usec += lost * tick_usec;
  426. sec = xtime.tv_sec;
  427. usec += (xtime.tv_nsec / 1000);
  428. } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
  429. while (usec >= 1000000) {
  430. usec -= 1000000;
  431. sec++;
  432. }
  433. tv->tv_sec = sec;
  434. tv->tv_usec = usec;
  435. }
  436. EXPORT_SYMBOL(do_gettimeofday);
  437. int do_settimeofday(struct timespec *tv)
  438. {
  439. int ret;
  440. write_seqlock_irq(&xtime_lock);
  441. ret = bus_do_settimeofday(tv);
  442. write_sequnlock_irq(&xtime_lock);
  443. clock_was_set();
  444. return ret;
  445. }
  446. EXPORT_SYMBOL(do_settimeofday);
  447. static int sbus_do_settimeofday(struct timespec *tv)
  448. {
  449. time_t wtm_sec, sec = tv->tv_sec;
  450. long wtm_nsec, nsec = tv->tv_nsec;
  451. if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
  452. return -EINVAL;
  453. /*
  454. * This is revolting. We need to set "xtime" correctly. However, the
  455. * value in this location is the value at the most recent update of
  456. * wall time. Discover what correction gettimeofday() would have
  457. * made, and then undo it!
  458. */
  459. nsec -= 1000 * (do_gettimeoffset() +
  460. (jiffies - wall_jiffies) * (USEC_PER_SEC / HZ));
  461. wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
  462. wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
  463. set_normalized_timespec(&xtime, sec, nsec);
  464. set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
  465. ntp_clear();
  466. return 0;
  467. }
  468. /*
  469. * BUG: This routine does not handle hour overflow properly; it just
  470. * sets the minutes. Usually you won't notice until after reboot!
  471. */
  472. static int set_rtc_mmss(unsigned long nowtime)
  473. {
  474. int real_seconds, real_minutes, mostek_minutes;
  475. struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
  476. unsigned long flags;
  477. #ifdef CONFIG_SUN4
  478. struct intersil *iregs = intersil_clock;
  479. int temp;
  480. #endif
  481. /* Not having a register set can lead to trouble. */
  482. if (!regs) {
  483. #ifdef CONFIG_SUN4
  484. if(!iregs)
  485. return -1;
  486. else {
  487. temp = iregs->clk.int_csec;
  488. mostek_minutes = iregs->clk.int_min;
  489. real_seconds = nowtime % 60;
  490. real_minutes = nowtime / 60;
  491. if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
  492. real_minutes += 30; /* correct for half hour time zone */
  493. real_minutes %= 60;
  494. if (abs(real_minutes - mostek_minutes) < 30) {
  495. intersil_stop(iregs);
  496. iregs->clk.int_sec=real_seconds;
  497. iregs->clk.int_min=real_minutes;
  498. intersil_start(iregs);
  499. } else {
  500. printk(KERN_WARNING
  501. "set_rtc_mmss: can't update from %d to %d\n",
  502. mostek_minutes, real_minutes);
  503. return -1;
  504. }
  505. return 0;
  506. }
  507. #endif
  508. }
  509. spin_lock_irqsave(&mostek_lock, flags);
  510. /* Read the current RTC minutes. */
  511. regs->creg |= MSTK_CREG_READ;
  512. mostek_minutes = MSTK_REG_MIN(regs);
  513. regs->creg &= ~MSTK_CREG_READ;
  514. /*
  515. * since we're only adjusting minutes and seconds,
  516. * don't interfere with hour overflow. This avoids
  517. * messing with unknown time zones but requires your
  518. * RTC not to be off by more than 15 minutes
  519. */
  520. real_seconds = nowtime % 60;
  521. real_minutes = nowtime / 60;
  522. if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
  523. real_minutes += 30; /* correct for half hour time zone */
  524. real_minutes %= 60;
  525. if (abs(real_minutes - mostek_minutes) < 30) {
  526. regs->creg |= MSTK_CREG_WRITE;
  527. MSTK_SET_REG_SEC(regs,real_seconds);
  528. MSTK_SET_REG_MIN(regs,real_minutes);
  529. regs->creg &= ~MSTK_CREG_WRITE;
  530. spin_unlock_irqrestore(&mostek_lock, flags);
  531. return 0;
  532. } else {
  533. spin_unlock_irqrestore(&mostek_lock, flags);
  534. return -1;
  535. }
  536. }