cpufreq_32.c 18 KB

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  1. /*
  2. * arch/ppc/platforms/pmac_cpufreq.c
  3. *
  4. * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
  5. * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * TODO: Need a big cleanup here. Basically, we need to have different
  12. * cpufreq_driver structures for the different type of HW instead of the
  13. * current mess. We also need to better deal with the detection of the
  14. * type of machine.
  15. *
  16. */
  17. #include <linux/config.h>
  18. #include <linux/module.h>
  19. #include <linux/types.h>
  20. #include <linux/errno.h>
  21. #include <linux/kernel.h>
  22. #include <linux/delay.h>
  23. #include <linux/sched.h>
  24. #include <linux/adb.h>
  25. #include <linux/pmu.h>
  26. #include <linux/slab.h>
  27. #include <linux/cpufreq.h>
  28. #include <linux/init.h>
  29. #include <linux/sysdev.h>
  30. #include <linux/i2c.h>
  31. #include <linux/hardirq.h>
  32. #include <asm/prom.h>
  33. #include <asm/machdep.h>
  34. #include <asm/irq.h>
  35. #include <asm/pmac_feature.h>
  36. #include <asm/mmu_context.h>
  37. #include <asm/sections.h>
  38. #include <asm/cputable.h>
  39. #include <asm/time.h>
  40. #include <asm/system.h>
  41. #include <asm/mpic.h>
  42. #include <asm/keylargo.h>
  43. /* WARNING !!! This will cause calibrate_delay() to be called,
  44. * but this is an __init function ! So you MUST go edit
  45. * init/main.c to make it non-init before enabling DEBUG_FREQ
  46. */
  47. #undef DEBUG_FREQ
  48. /*
  49. * There is a problem with the core cpufreq code on SMP kernels,
  50. * it won't recalculate the Bogomips properly
  51. */
  52. #ifdef CONFIG_SMP
  53. #warning "WARNING, CPUFREQ not recommended on SMP kernels"
  54. #endif
  55. extern void low_choose_7447a_dfs(int dfs);
  56. extern void low_choose_750fx_pll(int pll);
  57. extern void low_sleep_handler(void);
  58. /*
  59. * Currently, PowerMac cpufreq supports only high & low frequencies
  60. * that are set by the firmware
  61. */
  62. static unsigned int low_freq;
  63. static unsigned int hi_freq;
  64. static unsigned int cur_freq;
  65. static unsigned int sleep_freq;
  66. /*
  67. * Different models uses different mecanisms to switch the frequency
  68. */
  69. static int (*set_speed_proc)(int low_speed);
  70. static unsigned int (*get_speed_proc)(void);
  71. /*
  72. * Some definitions used by the various speedprocs
  73. */
  74. static u32 voltage_gpio;
  75. static u32 frequency_gpio;
  76. static u32 slew_done_gpio;
  77. static int no_schedule;
  78. static int has_cpu_l2lve;
  79. static int is_pmu_based;
  80. /* There are only two frequency states for each processor. Values
  81. * are in kHz for the time being.
  82. */
  83. #define CPUFREQ_HIGH 0
  84. #define CPUFREQ_LOW 1
  85. static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
  86. {CPUFREQ_HIGH, 0},
  87. {CPUFREQ_LOW, 0},
  88. {0, CPUFREQ_TABLE_END},
  89. };
  90. static struct freq_attr* pmac_cpu_freqs_attr[] = {
  91. &cpufreq_freq_attr_scaling_available_freqs,
  92. NULL,
  93. };
  94. static inline void local_delay(unsigned long ms)
  95. {
  96. if (no_schedule)
  97. mdelay(ms);
  98. else
  99. msleep(ms);
  100. }
  101. #ifdef DEBUG_FREQ
  102. static inline void debug_calc_bogomips(void)
  103. {
  104. /* This will cause a recalc of bogomips and display the
  105. * result. We backup/restore the value to avoid affecting the
  106. * core cpufreq framework's own calculation.
  107. */
  108. extern void calibrate_delay(void);
  109. unsigned long save_lpj = loops_per_jiffy;
  110. calibrate_delay();
  111. loops_per_jiffy = save_lpj;
  112. }
  113. #endif /* DEBUG_FREQ */
  114. /* Switch CPU speed under 750FX CPU control
  115. */
  116. static int cpu_750fx_cpu_speed(int low_speed)
  117. {
  118. u32 hid2;
  119. if (low_speed == 0) {
  120. /* ramping up, set voltage first */
  121. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  122. /* Make sure we sleep for at least 1ms */
  123. local_delay(10);
  124. /* tweak L2 for high voltage */
  125. if (has_cpu_l2lve) {
  126. hid2 = mfspr(SPRN_HID2);
  127. hid2 &= ~0x2000;
  128. mtspr(SPRN_HID2, hid2);
  129. }
  130. }
  131. #ifdef CONFIG_6xx
  132. low_choose_750fx_pll(low_speed);
  133. #endif
  134. if (low_speed == 1) {
  135. /* tweak L2 for low voltage */
  136. if (has_cpu_l2lve) {
  137. hid2 = mfspr(SPRN_HID2);
  138. hid2 |= 0x2000;
  139. mtspr(SPRN_HID2, hid2);
  140. }
  141. /* ramping down, set voltage last */
  142. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  143. local_delay(10);
  144. }
  145. return 0;
  146. }
  147. static unsigned int cpu_750fx_get_cpu_speed(void)
  148. {
  149. if (mfspr(SPRN_HID1) & HID1_PS)
  150. return low_freq;
  151. else
  152. return hi_freq;
  153. }
  154. /* Switch CPU speed using DFS */
  155. static int dfs_set_cpu_speed(int low_speed)
  156. {
  157. if (low_speed == 0) {
  158. /* ramping up, set voltage first */
  159. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  160. /* Make sure we sleep for at least 1ms */
  161. local_delay(1);
  162. }
  163. /* set frequency */
  164. #ifdef CONFIG_6xx
  165. low_choose_7447a_dfs(low_speed);
  166. #endif
  167. udelay(100);
  168. if (low_speed == 1) {
  169. /* ramping down, set voltage last */
  170. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  171. local_delay(1);
  172. }
  173. return 0;
  174. }
  175. static unsigned int dfs_get_cpu_speed(void)
  176. {
  177. if (mfspr(SPRN_HID1) & HID1_DFS)
  178. return low_freq;
  179. else
  180. return hi_freq;
  181. }
  182. /* Switch CPU speed using slewing GPIOs
  183. */
  184. static int gpios_set_cpu_speed(int low_speed)
  185. {
  186. int gpio, timeout = 0;
  187. /* If ramping up, set voltage first */
  188. if (low_speed == 0) {
  189. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  190. /* Delay is way too big but it's ok, we schedule */
  191. local_delay(10);
  192. }
  193. /* Set frequency */
  194. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  195. if (low_speed == ((gpio & 0x01) == 0))
  196. goto skip;
  197. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
  198. low_speed ? 0x04 : 0x05);
  199. udelay(200);
  200. do {
  201. if (++timeout > 100)
  202. break;
  203. local_delay(1);
  204. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
  205. } while((gpio & 0x02) == 0);
  206. skip:
  207. /* If ramping down, set voltage last */
  208. if (low_speed == 1) {
  209. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  210. /* Delay is way too big but it's ok, we schedule */
  211. local_delay(10);
  212. }
  213. #ifdef DEBUG_FREQ
  214. debug_calc_bogomips();
  215. #endif
  216. return 0;
  217. }
  218. /* Switch CPU speed under PMU control
  219. */
  220. static int pmu_set_cpu_speed(int low_speed)
  221. {
  222. struct adb_request req;
  223. unsigned long save_l2cr;
  224. unsigned long save_l3cr;
  225. unsigned int pic_prio;
  226. unsigned long flags;
  227. preempt_disable();
  228. #ifdef DEBUG_FREQ
  229. printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
  230. #endif
  231. pmu_suspend();
  232. /* Disable all interrupt sources on openpic */
  233. pic_prio = mpic_cpu_get_priority();
  234. mpic_cpu_set_priority(0xf);
  235. /* Make sure the decrementer won't interrupt us */
  236. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  237. /* Make sure any pending DEC interrupt occuring while we did
  238. * the above didn't re-enable the DEC */
  239. mb();
  240. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  241. /* We can now disable MSR_EE */
  242. local_irq_save(flags);
  243. /* Giveup the FPU & vec */
  244. enable_kernel_fp();
  245. #ifdef CONFIG_ALTIVEC
  246. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  247. enable_kernel_altivec();
  248. #endif /* CONFIG_ALTIVEC */
  249. /* Save & disable L2 and L3 caches */
  250. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  251. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  252. /* Send the new speed command. My assumption is that this command
  253. * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
  254. */
  255. pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
  256. while (!req.complete)
  257. pmu_poll();
  258. /* Prepare the northbridge for the speed transition */
  259. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
  260. /* Call low level code to backup CPU state and recover from
  261. * hardware reset
  262. */
  263. low_sleep_handler();
  264. /* Restore the northbridge */
  265. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
  266. /* Restore L2 cache */
  267. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  268. _set_L2CR(save_l2cr);
  269. /* Restore L3 cache */
  270. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  271. _set_L3CR(save_l3cr);
  272. /* Restore userland MMU context */
  273. set_context(current->active_mm->context, current->active_mm->pgd);
  274. #ifdef DEBUG_FREQ
  275. printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
  276. #endif
  277. /* Restore low level PMU operations */
  278. pmu_unlock();
  279. /* Restore decrementer */
  280. wakeup_decrementer();
  281. /* Restore interrupts */
  282. mpic_cpu_set_priority(pic_prio);
  283. /* Let interrupts flow again ... */
  284. local_irq_restore(flags);
  285. #ifdef DEBUG_FREQ
  286. debug_calc_bogomips();
  287. #endif
  288. pmu_resume();
  289. preempt_enable();
  290. return 0;
  291. }
  292. static int do_set_cpu_speed(int speed_mode, int notify)
  293. {
  294. struct cpufreq_freqs freqs;
  295. unsigned long l3cr;
  296. static unsigned long prev_l3cr;
  297. freqs.old = cur_freq;
  298. freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  299. freqs.cpu = smp_processor_id();
  300. if (freqs.old == freqs.new)
  301. return 0;
  302. if (notify)
  303. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  304. if (speed_mode == CPUFREQ_LOW &&
  305. cpu_has_feature(CPU_FTR_L3CR)) {
  306. l3cr = _get_L3CR();
  307. if (l3cr & L3CR_L3E) {
  308. prev_l3cr = l3cr;
  309. _set_L3CR(0);
  310. }
  311. }
  312. set_speed_proc(speed_mode == CPUFREQ_LOW);
  313. if (speed_mode == CPUFREQ_HIGH &&
  314. cpu_has_feature(CPU_FTR_L3CR)) {
  315. l3cr = _get_L3CR();
  316. if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
  317. _set_L3CR(prev_l3cr);
  318. }
  319. if (notify)
  320. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  321. cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  322. return 0;
  323. }
  324. static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
  325. {
  326. return cur_freq;
  327. }
  328. static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
  329. {
  330. return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
  331. }
  332. static int pmac_cpufreq_target( struct cpufreq_policy *policy,
  333. unsigned int target_freq,
  334. unsigned int relation)
  335. {
  336. unsigned int newstate = 0;
  337. int rc;
  338. if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
  339. target_freq, relation, &newstate))
  340. return -EINVAL;
  341. rc = do_set_cpu_speed(newstate, 1);
  342. ppc_proc_freq = cur_freq * 1000ul;
  343. return rc;
  344. }
  345. static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
  346. {
  347. if (policy->cpu != 0)
  348. return -ENODEV;
  349. policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
  350. policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
  351. policy->cur = cur_freq;
  352. cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
  353. return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
  354. }
  355. static u32 read_gpio(struct device_node *np)
  356. {
  357. u32 *reg = (u32 *)get_property(np, "reg", NULL);
  358. u32 offset;
  359. if (reg == NULL)
  360. return 0;
  361. /* That works for all keylargos but shall be fixed properly
  362. * some day... The problem is that it seems we can't rely
  363. * on the "reg" property of the GPIO nodes, they are either
  364. * relative to the base of KeyLargo or to the base of the
  365. * GPIO space, and the device-tree doesn't help.
  366. */
  367. offset = *reg;
  368. if (offset < KEYLARGO_GPIO_LEVELS0)
  369. offset += KEYLARGO_GPIO_LEVELS0;
  370. return offset;
  371. }
  372. static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
  373. {
  374. /* Ok, this could be made a bit smarter, but let's be robust for now. We
  375. * always force a speed change to high speed before sleep, to make sure
  376. * we have appropriate voltage and/or bus speed for the wakeup process,
  377. * and to make sure our loops_per_jiffies are "good enough", that is will
  378. * not cause too short delays if we sleep in low speed and wake in high
  379. * speed..
  380. */
  381. no_schedule = 1;
  382. sleep_freq = cur_freq;
  383. if (cur_freq == low_freq && !is_pmu_based)
  384. do_set_cpu_speed(CPUFREQ_HIGH, 0);
  385. return 0;
  386. }
  387. static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
  388. {
  389. /* If we resume, first check if we have a get() function */
  390. if (get_speed_proc)
  391. cur_freq = get_speed_proc();
  392. else
  393. cur_freq = 0;
  394. /* We don't, hrm... we don't really know our speed here, best
  395. * is that we force a switch to whatever it was, which is
  396. * probably high speed due to our suspend() routine
  397. */
  398. do_set_cpu_speed(sleep_freq == low_freq ?
  399. CPUFREQ_LOW : CPUFREQ_HIGH, 0);
  400. ppc_proc_freq = cur_freq * 1000ul;
  401. no_schedule = 0;
  402. return 0;
  403. }
  404. static struct cpufreq_driver pmac_cpufreq_driver = {
  405. .verify = pmac_cpufreq_verify,
  406. .target = pmac_cpufreq_target,
  407. .get = pmac_cpufreq_get_speed,
  408. .init = pmac_cpufreq_cpu_init,
  409. .suspend = pmac_cpufreq_suspend,
  410. .resume = pmac_cpufreq_resume,
  411. .flags = CPUFREQ_PM_NO_WARN,
  412. .attr = pmac_cpu_freqs_attr,
  413. .name = "powermac",
  414. .owner = THIS_MODULE,
  415. };
  416. static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
  417. {
  418. struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
  419. "voltage-gpio");
  420. struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
  421. "frequency-gpio");
  422. struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
  423. "slewing-done");
  424. u32 *value;
  425. /*
  426. * Check to see if it's GPIO driven or PMU only
  427. *
  428. * The way we extract the GPIO address is slightly hackish, but it
  429. * works well enough for now. We need to abstract the whole GPIO
  430. * stuff sooner or later anyway
  431. */
  432. if (volt_gpio_np)
  433. voltage_gpio = read_gpio(volt_gpio_np);
  434. if (freq_gpio_np)
  435. frequency_gpio = read_gpio(freq_gpio_np);
  436. if (slew_done_gpio_np)
  437. slew_done_gpio = read_gpio(slew_done_gpio_np);
  438. /* If we use the frequency GPIOs, calculate the min/max speeds based
  439. * on the bus frequencies
  440. */
  441. if (frequency_gpio && slew_done_gpio) {
  442. int lenp, rc;
  443. u32 *freqs, *ratio;
  444. freqs = (u32 *)get_property(cpunode, "bus-frequencies", &lenp);
  445. lenp /= sizeof(u32);
  446. if (freqs == NULL || lenp != 2) {
  447. printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
  448. return 1;
  449. }
  450. ratio = (u32 *)get_property(cpunode, "processor-to-bus-ratio*2", NULL);
  451. if (ratio == NULL) {
  452. printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
  453. return 1;
  454. }
  455. /* Get the min/max bus frequencies */
  456. low_freq = min(freqs[0], freqs[1]);
  457. hi_freq = max(freqs[0], freqs[1]);
  458. /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
  459. * frequency, it claims it to be around 84Mhz on some models while
  460. * it appears to be approx. 101Mhz on all. Let's hack around here...
  461. * fortunately, we don't need to be too precise
  462. */
  463. if (low_freq < 98000000)
  464. low_freq = 101000000;
  465. /* Convert those to CPU core clocks */
  466. low_freq = (low_freq * (*ratio)) / 2000;
  467. hi_freq = (hi_freq * (*ratio)) / 2000;
  468. /* Now we get the frequencies, we read the GPIO to see what is out current
  469. * speed
  470. */
  471. rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  472. cur_freq = (rc & 0x01) ? hi_freq : low_freq;
  473. set_speed_proc = gpios_set_cpu_speed;
  474. return 1;
  475. }
  476. /* If we use the PMU, look for the min & max frequencies in the
  477. * device-tree
  478. */
  479. value = (u32 *)get_property(cpunode, "min-clock-frequency", NULL);
  480. if (!value)
  481. return 1;
  482. low_freq = (*value) / 1000;
  483. /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
  484. * here */
  485. if (low_freq < 100000)
  486. low_freq *= 10;
  487. value = (u32 *)get_property(cpunode, "max-clock-frequency", NULL);
  488. if (!value)
  489. return 1;
  490. hi_freq = (*value) / 1000;
  491. set_speed_proc = pmu_set_cpu_speed;
  492. is_pmu_based = 1;
  493. return 0;
  494. }
  495. static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
  496. {
  497. struct device_node *volt_gpio_np;
  498. if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  499. return 1;
  500. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  501. if (volt_gpio_np)
  502. voltage_gpio = read_gpio(volt_gpio_np);
  503. if (!voltage_gpio){
  504. printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
  505. return 1;
  506. }
  507. /* OF only reports the high frequency */
  508. hi_freq = cur_freq;
  509. low_freq = cur_freq/2;
  510. /* Read actual frequency from CPU */
  511. cur_freq = dfs_get_cpu_speed();
  512. set_speed_proc = dfs_set_cpu_speed;
  513. get_speed_proc = dfs_get_cpu_speed;
  514. return 0;
  515. }
  516. static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
  517. {
  518. struct device_node *volt_gpio_np;
  519. u32 pvr, *value;
  520. if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  521. return 1;
  522. hi_freq = cur_freq;
  523. value = (u32 *)get_property(cpunode, "reduced-clock-frequency", NULL);
  524. if (!value)
  525. return 1;
  526. low_freq = (*value) / 1000;
  527. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  528. if (volt_gpio_np)
  529. voltage_gpio = read_gpio(volt_gpio_np);
  530. pvr = mfspr(SPRN_PVR);
  531. has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
  532. set_speed_proc = cpu_750fx_cpu_speed;
  533. get_speed_proc = cpu_750fx_get_cpu_speed;
  534. cur_freq = cpu_750fx_get_cpu_speed();
  535. return 0;
  536. }
  537. /* Currently, we support the following machines:
  538. *
  539. * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
  540. * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
  541. * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
  542. * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
  543. * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
  544. * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
  545. * - Recent MacRISC3 laptops
  546. * - All new machines with 7447A CPUs
  547. */
  548. static int __init pmac_cpufreq_setup(void)
  549. {
  550. struct device_node *cpunode;
  551. u32 *value;
  552. if (strstr(cmd_line, "nocpufreq"))
  553. return 0;
  554. /* Assume only one CPU */
  555. cpunode = find_type_devices("cpu");
  556. if (!cpunode)
  557. goto out;
  558. /* Get current cpu clock freq */
  559. value = (u32 *)get_property(cpunode, "clock-frequency", NULL);
  560. if (!value)
  561. goto out;
  562. cur_freq = (*value) / 1000;
  563. /* Check for 7447A based MacRISC3 */
  564. if (machine_is_compatible("MacRISC3") &&
  565. get_property(cpunode, "dynamic-power-step", NULL) &&
  566. PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
  567. pmac_cpufreq_init_7447A(cpunode);
  568. /* Check for other MacRISC3 machines */
  569. } else if (machine_is_compatible("PowerBook3,4") ||
  570. machine_is_compatible("PowerBook3,5") ||
  571. machine_is_compatible("MacRISC3")) {
  572. pmac_cpufreq_init_MacRISC3(cpunode);
  573. /* Else check for iBook2 500/600 */
  574. } else if (machine_is_compatible("PowerBook4,1")) {
  575. hi_freq = cur_freq;
  576. low_freq = 400000;
  577. set_speed_proc = pmu_set_cpu_speed;
  578. is_pmu_based = 1;
  579. }
  580. /* Else check for TiPb 550 */
  581. else if (machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
  582. hi_freq = cur_freq;
  583. low_freq = 500000;
  584. set_speed_proc = pmu_set_cpu_speed;
  585. is_pmu_based = 1;
  586. }
  587. /* Else check for TiPb 400 & 500 */
  588. else if (machine_is_compatible("PowerBook3,2")) {
  589. /* We only know about the 400 MHz and the 500Mhz model
  590. * they both have 300 MHz as low frequency
  591. */
  592. if (cur_freq < 350000 || cur_freq > 550000)
  593. goto out;
  594. hi_freq = cur_freq;
  595. low_freq = 300000;
  596. set_speed_proc = pmu_set_cpu_speed;
  597. is_pmu_based = 1;
  598. }
  599. /* Else check for 750FX */
  600. else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
  601. pmac_cpufreq_init_750FX(cpunode);
  602. out:
  603. if (set_speed_proc == NULL)
  604. return -ENODEV;
  605. pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
  606. pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
  607. ppc_proc_freq = cur_freq * 1000ul;
  608. printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
  609. printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
  610. low_freq/1000, hi_freq/1000, cur_freq/1000);
  611. return cpufreq_register_driver(&pmac_cpufreq_driver);
  612. }
  613. module_init(pmac_cpufreq_setup);