setup.c 4.8 KB

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  1. /*
  2. * arch/mips/ddb5074/setup.c -- NEC DDB Vrc-5074 setup routines
  3. *
  4. * Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
  5. * Sony Software Development Center Europe (SDCE), Brussels
  6. */
  7. #include <linux/init.h>
  8. #include <linux/kbd_ll.h>
  9. #include <linux/kernel.h>
  10. #include <linux/kdev_t.h>
  11. #include <linux/types.h>
  12. #include <linux/sched.h>
  13. #include <linux/pci.h>
  14. #include <linux/ide.h>
  15. #include <linux/ioport.h>
  16. #include <linux/irq.h>
  17. #include <asm/addrspace.h>
  18. #include <asm/bcache.h>
  19. #include <asm/irq.h>
  20. #include <asm/reboot.h>
  21. #include <asm/gdb-stub.h>
  22. #include <asm/time.h>
  23. #include <asm/nile4.h>
  24. #include <asm/ddb5xxx/ddb5074.h>
  25. #include <asm/ddb5xxx/ddb5xxx.h>
  26. static void (*back_to_prom) (void) = (void (*)(void)) 0xbfc00000;
  27. static void ddb_machine_restart(char *command)
  28. {
  29. u32 t;
  30. /* PCI cold reset */
  31. t = nile4_in32(NILE4_PCICTRL + 4);
  32. t |= 0x40000000;
  33. nile4_out32(NILE4_PCICTRL + 4, t);
  34. /* CPU cold reset */
  35. t = nile4_in32(NILE4_CPUSTAT);
  36. t |= 1;
  37. nile4_out32(NILE4_CPUSTAT, t);
  38. /* Call the PROM */
  39. back_to_prom();
  40. }
  41. static void ddb_machine_halt(void)
  42. {
  43. printk("DDB Vrc-5074 halted.\n");
  44. do {
  45. } while (1);
  46. }
  47. static void ddb_machine_power_off(void)
  48. {
  49. printk("DDB Vrc-5074 halted. Please turn off the power.\n");
  50. do {
  51. } while (1);
  52. }
  53. extern void rtc_ds1386_init(unsigned long base);
  54. extern void (*board_timer_setup) (struct irqaction * irq);
  55. static void __init ddb_timer_init(struct irqaction *irq)
  56. {
  57. /* set the clock to 1 Hz */
  58. nile4_out32(NILE4_T2CTRL, 1000000);
  59. /* enable the General-Purpose Timer */
  60. nile4_out32(NILE4_T2CTRL + 4, 0x00000001);
  61. /* reset timer */
  62. nile4_out32(NILE4_T2CNTR, 0);
  63. /* enable interrupt */
  64. setup_irq(nile4_to_irq(NILE4_INT_GPT), irq);
  65. nile4_enable_irq(nile4_to_irq(NILE4_INT_GPT));
  66. change_c0_status(ST0_IM,
  67. IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4);
  68. }
  69. static void __init ddb_time_init(void)
  70. {
  71. /* we have ds1396 RTC chip */
  72. rtc_ds1386_init(KSEG1ADDR(DDB_PCI_MEM_BASE));
  73. }
  74. void __init plat_setup(void)
  75. {
  76. set_io_port_base(NILE4_PCI_IO_BASE);
  77. isa_slot_offset = NILE4_PCI_MEM_BASE;
  78. board_timer_setup = ddb_timer_init;
  79. board_time_init = ddb_time_init;
  80. _machine_restart = ddb_machine_restart;
  81. _machine_halt = ddb_machine_halt;
  82. _machine_power_off = ddb_machine_power_off;
  83. ddb_out32(DDB_BAR0, 0);
  84. ddb_set_pmr(DDB_PCIINIT0, DDB_PCICMD_IO, 0, 0x10);
  85. ddb_set_pmr(DDB_PCIINIT1, DDB_PCICMD_MEM, DDB_PCI_MEM_BASE , 0x10);
  86. /* Reboot on panic */
  87. panic_timeout = 180;
  88. }
  89. #define USE_NILE4_SERIAL 0
  90. #if USE_NILE4_SERIAL
  91. #define ns16550_in(reg) nile4_in8((reg)*8)
  92. #define ns16550_out(reg, val) nile4_out8((reg)*8, (val))
  93. #else
  94. #define NS16550_BASE (NILE4_PCI_IO_BASE+0x03f8)
  95. static inline u8 ns16550_in(u32 reg)
  96. {
  97. return *(volatile u8 *) (NS16550_BASE + reg);
  98. }
  99. static inline void ns16550_out(u32 reg, u8 val)
  100. {
  101. *(volatile u8 *) (NS16550_BASE + reg) = val;
  102. }
  103. #endif
  104. #define NS16550_RBR 0
  105. #define NS16550_THR 0
  106. #define NS16550_DLL 0
  107. #define NS16550_IER 1
  108. #define NS16550_DLM 1
  109. #define NS16550_FCR 2
  110. #define NS16550_IIR 2
  111. #define NS16550_LCR 3
  112. #define NS16550_MCR 4
  113. #define NS16550_LSR 5
  114. #define NS16550_MSR 6
  115. #define NS16550_SCR 7
  116. #define NS16550_LSR_DR 0x01 /* Data ready */
  117. #define NS16550_LSR_OE 0x02 /* Overrun */
  118. #define NS16550_LSR_PE 0x04 /* Parity error */
  119. #define NS16550_LSR_FE 0x08 /* Framing error */
  120. #define NS16550_LSR_BI 0x10 /* Break */
  121. #define NS16550_LSR_THRE 0x20 /* Xmit holding register empty */
  122. #define NS16550_LSR_TEMT 0x40 /* Xmitter empty */
  123. #define NS16550_LSR_ERR 0x80 /* Error */
  124. void _serinit(void)
  125. {
  126. #if USE_NILE4_SERIAL
  127. ns16550_out(NS16550_LCR, 0x80);
  128. ns16550_out(NS16550_DLM, 0x00);
  129. ns16550_out(NS16550_DLL, 0x36); /* 9600 baud */
  130. ns16550_out(NS16550_LCR, 0x00);
  131. ns16550_out(NS16550_LCR, 0x03);
  132. ns16550_out(NS16550_FCR, 0x47);
  133. #else
  134. /* done by PMON */
  135. #endif
  136. }
  137. void _putc(char c)
  138. {
  139. while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_THRE));
  140. ns16550_out(NS16550_THR, c);
  141. if (c == '\n') {
  142. while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_THRE));
  143. ns16550_out(NS16550_THR, '\r');
  144. }
  145. }
  146. void _puts(const char *s)
  147. {
  148. char c;
  149. while ((c = *s++))
  150. _putc(c);
  151. }
  152. char _getc(void)
  153. {
  154. while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_DR));
  155. return ns16550_in(NS16550_RBR);
  156. }
  157. int _testc(void)
  158. {
  159. return (ns16550_in(NS16550_LSR) & NS16550_LSR_DR) != 0;
  160. }
  161. /*
  162. * Hexadecimal 7-segment LED
  163. */
  164. void ddb5074_led_hex(int hex)
  165. {
  166. outb(hex, 0x80);
  167. }
  168. /*
  169. * LEDs D2 and D3, connected to the GPIO pins of the PMU in the ALi M1543
  170. */
  171. struct pci_dev *pci_pmu = NULL;
  172. void ddb5074_led_d2(int on)
  173. {
  174. u8 t;
  175. if (pci_pmu) {
  176. pci_read_config_byte(pci_pmu, 0x7e, &t);
  177. if (on)
  178. t &= 0x7f;
  179. else
  180. t |= 0x80;
  181. pci_write_config_byte(pci_pmu, 0x7e, t);
  182. }
  183. }
  184. void ddb5074_led_d3(int on)
  185. {
  186. u8 t;
  187. if (pci_pmu) {
  188. pci_read_config_byte(pci_pmu, 0x7e, &t);
  189. if (on)
  190. t &= 0xbf;
  191. else
  192. t |= 0x40;
  193. pci_write_config_byte(pci_pmu, 0x7e, t);
  194. }
  195. }