head.S 6.8 KB

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  1. /*****************************************************************************/
  2. /*
  3. * head.S -- common startup code for ColdFire CPUs.
  4. *
  5. * (C) Copyright 1999-2004, Greg Ungerer (gerg@snapgear.com).
  6. */
  7. /*****************************************************************************/
  8. #include <linux/config.h>
  9. #include <linux/sys.h>
  10. #include <linux/linkage.h>
  11. #include <asm/asm-offsets.h>
  12. #include <asm/coldfire.h>
  13. #include <asm/mcfcache.h>
  14. #include <asm/mcfsim.h>
  15. /*****************************************************************************/
  16. /*
  17. * Define fixed memory sizes. Configuration of a fixed memory size
  18. * overrides everything else. If the user defined a size we just
  19. * blindly use it (they know what they are doing right :-)
  20. */
  21. #if defined(CONFIG_RAM32MB)
  22. #define MEM_SIZE 0x02000000 /* memory size 32Mb */
  23. #elif defined(CONFIG_RAM16MB)
  24. #define MEM_SIZE 0x01000000 /* memory size 16Mb */
  25. #elif defined(CONFIG_RAM8MB)
  26. #define MEM_SIZE 0x00800000 /* memory size 8Mb */
  27. #elif defined(CONFIG_RAM4MB)
  28. #define MEM_SIZE 0x00400000 /* memory size 4Mb */
  29. #elif defined(CONFIG_RAM1MB)
  30. #define MEM_SIZE 0x00100000 /* memory size 1Mb */
  31. #endif
  32. /*
  33. * Memory size exceptions for special cases. Some boards may be set
  34. * for auto memory sizing, but we can't do it that way for some reason.
  35. * For example the 5206eLITE board has static RAM, and auto-detecting
  36. * the SDRAM will do you no good at all. Same goes for the MOD5272.
  37. */
  38. #ifdef CONFIG_RAMAUTO
  39. #if defined(CONFIG_M5206eLITE)
  40. #define MEM_SIZE 0x00100000 /* 1MiB default memory */
  41. #endif
  42. #if defined(CONFIG_MOD5272)
  43. #define MEM_SIZE 0x00800000 /* 8MiB default memory */
  44. #endif
  45. #endif /* CONFIG_RAMAUTO */
  46. /*
  47. * If we don't have a fixed memory size now, then lets build in code
  48. * to auto detect the DRAM size. Obviously this is the prefered
  49. * method, and should work for most boards (it won't work for those
  50. * that do not have their RAM starting at address 0).
  51. */
  52. #if defined(MEM_SIZE)
  53. .macro GET_MEM_SIZE
  54. movel #MEM_SIZE,%d0 /* hard coded memory size */
  55. .endm
  56. #elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
  57. defined(CONFIG_M5249) || defined(CONFIG_M527x) || \
  58. defined(CONFIG_M528x) || defined(CONFIG_M5307) || \
  59. defined(CONFIG_M5407)
  60. /*
  61. * Not all these devices have exactly the same DRAM controller,
  62. * but the DCMR register is virtually identical - give or take
  63. * a couple of bits. The only exception is the 5272 devices, their
  64. * DRAM controller is quite different.
  65. */
  66. .macro GET_MEM_SIZE
  67. movel MCF_MBAR+MCFSIM_DMR0,%d0 /* get mask for 1st bank */
  68. btst #0,%d0 /* check if region enabled */
  69. beq 1f
  70. andl #0xfffc0000,%d0
  71. beq 1f
  72. addl #0x00040000,%d0 /* convert mask to size */
  73. 1:
  74. movel MCF_MBAR+MCFSIM_DMR1,%d1 /* get mask for 2nd bank */
  75. btst #0,%d1 /* check if region enabled */
  76. beq 2f
  77. andl #0xfffc0000, %d1
  78. beq 2f
  79. addl #0x00040000,%d1
  80. addl %d1,%d0 /* total mem size in d0 */
  81. 2:
  82. .endm
  83. #elif defined(CONFIG_M5272)
  84. .macro GET_MEM_SIZE
  85. movel MCF_MBAR+MCFSIM_CSOR7,%d0 /* get SDRAM address mask */
  86. andil #0xfffff000,%d0 /* mask out chip select options */
  87. negl %d0 /* negate bits */
  88. .endm
  89. #else
  90. #error "ERROR: I don't know how to determine your boards memory size?"
  91. #endif
  92. /*
  93. * Most ColdFire boards have their DRAM starting at address 0.
  94. * Notable exception is the 5206eLITE board, another is the MOD5272.
  95. */
  96. #if defined(CONFIG_M5206eLITE)
  97. #define MEM_BASE 0x30000000
  98. #endif
  99. #if defined(CONFIG_MOD5272)
  100. #define MEM_BASE 0x02000000
  101. #define VBR_BASE 0x20000000 /* vectors in SRAM */
  102. #endif
  103. #if defined(CONFIG_M5208EVB)
  104. #define MEM_BASE 0x40000000
  105. #endif
  106. #ifndef MEM_BASE
  107. #define MEM_BASE 0x00000000 /* memory base at address 0 */
  108. #endif
  109. /*
  110. * The default location for the vectors is at the base of RAM.
  111. * Some boards might like to use internal SRAM or something like
  112. * that. If no board specific header defines an alternative then
  113. * use the base of RAM.
  114. */
  115. #ifndef VBR_BASE
  116. #define VBR_BASE MEM_BASE /* vector address */
  117. #endif
  118. /*****************************************************************************/
  119. /*
  120. * Boards and platforms can do specific early hardware setup if
  121. * they need to. Most don't need this, define away if not required.
  122. */
  123. #ifndef PLATFORM_SETUP
  124. #define PLATFORM_SETUP
  125. #endif
  126. /*****************************************************************************/
  127. .global _start
  128. .global _rambase
  129. .global _ramvec
  130. .global _ramstart
  131. .global _ramend
  132. /*****************************************************************************/
  133. .data
  134. /*
  135. * During startup we store away the RAM setup. These are not in the
  136. * bss, since their values are determined and written before the bss
  137. * has been cleared.
  138. */
  139. _rambase:
  140. .long 0
  141. _ramvec:
  142. .long 0
  143. _ramstart:
  144. .long 0
  145. _ramend:
  146. .long 0
  147. /*****************************************************************************/
  148. .text
  149. /*
  150. * This is the codes first entry point. This is where it all
  151. * begins...
  152. */
  153. _start:
  154. nop /* filler */
  155. movew #0x2700, %sr /* no interrupts */
  156. /*
  157. * Do any platform or board specific setup now. Most boards
  158. * don't need anything. Those exceptions are define this in
  159. * their board specific includes.
  160. */
  161. PLATFORM_SETUP
  162. /*
  163. * Create basic memory configuration. Set VBR accordingly,
  164. * and size memory.
  165. */
  166. movel #VBR_BASE,%a7
  167. movec %a7,%VBR /* set vectors addr */
  168. movel %a7,_ramvec
  169. movel #MEM_BASE,%a7 /* mark the base of RAM */
  170. movel %a7,_rambase
  171. GET_MEM_SIZE /* macro code determines size */
  172. addl %a7,%d0
  173. movel %d0,_ramend /* set end ram addr */
  174. /*
  175. * Now that we know what the memory is, lets enable cache
  176. * and get things moving. This is Coldfire CPU specific.
  177. */
  178. CACHE_ENABLE /* enable CPU cache */
  179. #ifdef CONFIG_ROMFS_FS
  180. /*
  181. * Move ROM filesystem above bss :-)
  182. */
  183. lea _sbss,%a0 /* get start of bss */
  184. lea _ebss,%a1 /* set up destination */
  185. movel %a0,%a2 /* copy of bss start */
  186. movel 8(%a0),%d0 /* get size of ROMFS */
  187. addql #8,%d0 /* allow for rounding */
  188. andl #0xfffffffc, %d0 /* whole words */
  189. addl %d0,%a0 /* copy from end */
  190. addl %d0,%a1 /* copy from end */
  191. movel %a1,_ramstart /* set start of ram */
  192. _copy_romfs:
  193. movel -(%a0),%d0 /* copy dword */
  194. movel %d0,-(%a1)
  195. cmpl %a0,%a2 /* check if at end */
  196. bne _copy_romfs
  197. #else /* CONFIG_ROMFS_FS */
  198. lea _ebss,%a1
  199. movel %a1,_ramstart
  200. #endif /* CONFIG_ROMFS_FS */
  201. /*
  202. * Zero out the bss region.
  203. */
  204. lea _sbss,%a0 /* get start of bss */
  205. lea _ebss,%a1 /* get end of bss */
  206. clrl %d0 /* set value */
  207. _clear_bss:
  208. movel %d0,(%a0)+ /* clear each word */
  209. cmpl %a0,%a1 /* check if at end */
  210. bne _clear_bss
  211. /*
  212. * Load the current task pointer and stack.
  213. */
  214. lea init_thread_union,%a0
  215. lea THREAD_SIZE(%a0),%sp
  216. /*
  217. * Assember start up done, start code proper.
  218. */
  219. jsr start_kernel /* start Linux kernel */
  220. _exit:
  221. jmp _exit /* should never get here */
  222. /*****************************************************************************/