powernow-k8.c 31 KB

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  1. /*
  2. * (c) 2003, 2004, 2005 Advanced Micro Devices, Inc.
  3. * Your use of this code is subject to the terms and conditions of the
  4. * GNU general public license version 2. See "COPYING" or
  5. * http://www.gnu.org/licenses/gpl.html
  6. *
  7. * Support : mark.langsdorf@amd.com
  8. *
  9. * Based on the powernow-k7.c module written by Dave Jones.
  10. * (C) 2003 Dave Jones <davej@codemonkey.org.uk> on behalf of SuSE Labs
  11. * (C) 2004 Dominik Brodowski <linux@brodo.de>
  12. * (C) 2004 Pavel Machek <pavel@suse.cz>
  13. * Licensed under the terms of the GNU GPL License version 2.
  14. * Based upon datasheets & sample CPUs kindly provided by AMD.
  15. *
  16. * Valuable input gratefully received from Dave Jones, Pavel Machek,
  17. * Dominik Brodowski, and others.
  18. * Originally developed by Paul Devriendt.
  19. * Processor information obtained from Chapter 9 (Power and Thermal Management)
  20. * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD
  21. * Opteron Processors" available for download from www.amd.com
  22. *
  23. * Tables for specific CPUs can be infrerred from
  24. * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/smp.h>
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/cpufreq.h>
  31. #include <linux/slab.h>
  32. #include <linux/string.h>
  33. #include <linux/cpumask.h>
  34. #include <linux/sched.h> /* for current / set_cpus_allowed() */
  35. #include <asm/msr.h>
  36. #include <asm/io.h>
  37. #include <asm/delay.h>
  38. #ifdef CONFIG_X86_POWERNOW_K8_ACPI
  39. #include <linux/acpi.h>
  40. #include <acpi/processor.h>
  41. #endif
  42. #define PFX "powernow-k8: "
  43. #define BFX PFX "BIOS error: "
  44. #define VERSION "version 1.60.0"
  45. #include "powernow-k8.h"
  46. /* serialize freq changes */
  47. static DECLARE_MUTEX(fidvid_sem);
  48. static struct powernow_k8_data *powernow_data[NR_CPUS];
  49. #ifndef CONFIG_SMP
  50. static cpumask_t cpu_core_map[1];
  51. #endif
  52. /* Return a frequency in MHz, given an input fid */
  53. static u32 find_freq_from_fid(u32 fid)
  54. {
  55. return 800 + (fid * 100);
  56. }
  57. /* Return a frequency in KHz, given an input fid */
  58. static u32 find_khz_freq_from_fid(u32 fid)
  59. {
  60. return 1000 * find_freq_from_fid(fid);
  61. }
  62. /* Return a voltage in miliVolts, given an input vid */
  63. static u32 find_millivolts_from_vid(struct powernow_k8_data *data, u32 vid)
  64. {
  65. return 1550-vid*25;
  66. }
  67. /* Return the vco fid for an input fid
  68. *
  69. * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
  70. * only from corresponding high fids. This returns "high" fid corresponding to
  71. * "low" one.
  72. */
  73. static u32 convert_fid_to_vco_fid(u32 fid)
  74. {
  75. if (fid < HI_FID_TABLE_BOTTOM) {
  76. return 8 + (2 * fid);
  77. } else {
  78. return fid;
  79. }
  80. }
  81. /*
  82. * Return 1 if the pending bit is set. Unless we just instructed the processor
  83. * to transition to a new state, seeing this bit set is really bad news.
  84. */
  85. static int pending_bit_stuck(void)
  86. {
  87. u32 lo, hi;
  88. rdmsr(MSR_FIDVID_STATUS, lo, hi);
  89. return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
  90. }
  91. /*
  92. * Update the global current fid / vid values from the status msr.
  93. * Returns 1 on error.
  94. */
  95. static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
  96. {
  97. u32 lo, hi;
  98. u32 i = 0;
  99. do {
  100. if (i++ > 10000) {
  101. dprintk("detected change pending stuck\n");
  102. return 1;
  103. }
  104. rdmsr(MSR_FIDVID_STATUS, lo, hi);
  105. } while (lo & MSR_S_LO_CHANGE_PENDING);
  106. data->currvid = hi & MSR_S_HI_CURRENT_VID;
  107. data->currfid = lo & MSR_S_LO_CURRENT_FID;
  108. return 0;
  109. }
  110. /* the isochronous relief time */
  111. static void count_off_irt(struct powernow_k8_data *data)
  112. {
  113. udelay((1 << data->irt) * 10);
  114. return;
  115. }
  116. /* the voltage stabalization time */
  117. static void count_off_vst(struct powernow_k8_data *data)
  118. {
  119. udelay(data->vstable * VST_UNITS_20US);
  120. return;
  121. }
  122. /* need to init the control msr to a safe value (for each cpu) */
  123. static void fidvid_msr_init(void)
  124. {
  125. u32 lo, hi;
  126. u8 fid, vid;
  127. rdmsr(MSR_FIDVID_STATUS, lo, hi);
  128. vid = hi & MSR_S_HI_CURRENT_VID;
  129. fid = lo & MSR_S_LO_CURRENT_FID;
  130. lo = fid | (vid << MSR_C_LO_VID_SHIFT);
  131. hi = MSR_C_HI_STP_GNT_BENIGN;
  132. dprintk("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
  133. wrmsr(MSR_FIDVID_CTL, lo, hi);
  134. }
  135. /* write the new fid value along with the other control fields to the msr */
  136. static int write_new_fid(struct powernow_k8_data *data, u32 fid)
  137. {
  138. u32 lo;
  139. u32 savevid = data->currvid;
  140. u32 i = 0;
  141. if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
  142. printk(KERN_ERR PFX "internal error - overflow on fid write\n");
  143. return 1;
  144. }
  145. lo = fid | (data->currvid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
  146. dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
  147. fid, lo, data->plllock * PLL_LOCK_CONVERSION);
  148. do {
  149. wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
  150. if (i++ > 100) {
  151. printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n");
  152. return 1;
  153. }
  154. } while (query_current_values_with_pending_wait(data));
  155. count_off_irt(data);
  156. if (savevid != data->currvid) {
  157. printk(KERN_ERR PFX "vid change on fid trans, old 0x%x, new 0x%x\n",
  158. savevid, data->currvid);
  159. return 1;
  160. }
  161. if (fid != data->currfid) {
  162. printk(KERN_ERR PFX "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
  163. data->currfid);
  164. return 1;
  165. }
  166. return 0;
  167. }
  168. /* Write a new vid to the hardware */
  169. static int write_new_vid(struct powernow_k8_data *data, u32 vid)
  170. {
  171. u32 lo;
  172. u32 savefid = data->currfid;
  173. int i = 0;
  174. if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
  175. printk(KERN_ERR PFX "internal error - overflow on vid write\n");
  176. return 1;
  177. }
  178. lo = data->currfid | (vid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
  179. dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
  180. vid, lo, STOP_GRANT_5NS);
  181. do {
  182. wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
  183. if (i++ > 100) {
  184. printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n");
  185. return 1;
  186. }
  187. } while (query_current_values_with_pending_wait(data));
  188. if (savefid != data->currfid) {
  189. printk(KERN_ERR PFX "fid changed on vid trans, old 0x%x new 0x%x\n",
  190. savefid, data->currfid);
  191. return 1;
  192. }
  193. if (vid != data->currvid) {
  194. printk(KERN_ERR PFX "vid trans failed, vid 0x%x, curr 0x%x\n", vid,
  195. data->currvid);
  196. return 1;
  197. }
  198. return 0;
  199. }
  200. /*
  201. * Reduce the vid by the max of step or reqvid.
  202. * Decreasing vid codes represent increasing voltages:
  203. * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
  204. */
  205. static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid, u32 step)
  206. {
  207. if ((data->currvid - reqvid) > step)
  208. reqvid = data->currvid - step;
  209. if (write_new_vid(data, reqvid))
  210. return 1;
  211. count_off_vst(data);
  212. return 0;
  213. }
  214. /* Change the fid and vid, by the 3 phases. */
  215. static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 reqvid)
  216. {
  217. if (core_voltage_pre_transition(data, reqvid))
  218. return 1;
  219. if (core_frequency_transition(data, reqfid))
  220. return 1;
  221. if (core_voltage_post_transition(data, reqvid))
  222. return 1;
  223. if (query_current_values_with_pending_wait(data))
  224. return 1;
  225. if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
  226. printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n",
  227. smp_processor_id(),
  228. reqfid, reqvid, data->currfid, data->currvid);
  229. return 1;
  230. }
  231. dprintk("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
  232. smp_processor_id(), data->currfid, data->currvid);
  233. return 0;
  234. }
  235. /* Phase 1 - core voltage transition ... setup voltage */
  236. static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid)
  237. {
  238. u32 rvosteps = data->rvo;
  239. u32 savefid = data->currfid;
  240. u32 maxvid, lo;
  241. dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n",
  242. smp_processor_id(),
  243. data->currfid, data->currvid, reqvid, data->rvo);
  244. rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
  245. maxvid = 0x1f & (maxvid >> 16);
  246. dprintk("ph1 maxvid=0x%x\n", maxvid);
  247. if (reqvid < maxvid) /* lower numbers are higher voltages */
  248. reqvid = maxvid;
  249. while (data->currvid > reqvid) {
  250. dprintk("ph1: curr 0x%x, req vid 0x%x\n",
  251. data->currvid, reqvid);
  252. if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
  253. return 1;
  254. }
  255. while ((rvosteps > 0) && ((data->rvo + data->currvid) > reqvid)) {
  256. if (data->currvid == maxvid) {
  257. rvosteps = 0;
  258. } else {
  259. dprintk("ph1: changing vid for rvo, req 0x%x\n",
  260. data->currvid - 1);
  261. if (decrease_vid_code_by_step(data, data->currvid - 1, 1))
  262. return 1;
  263. rvosteps--;
  264. }
  265. }
  266. if (query_current_values_with_pending_wait(data))
  267. return 1;
  268. if (savefid != data->currfid) {
  269. printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", data->currfid);
  270. return 1;
  271. }
  272. dprintk("ph1 complete, currfid 0x%x, currvid 0x%x\n",
  273. data->currfid, data->currvid);
  274. return 0;
  275. }
  276. /* Phase 2 - core frequency transition */
  277. static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
  278. {
  279. u32 vcoreqfid, vcocurrfid, vcofiddiff, fid_interval, savevid = data->currvid;
  280. if ((reqfid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
  281. printk(KERN_ERR PFX "ph2: illegal lo-lo transition 0x%x 0x%x\n",
  282. reqfid, data->currfid);
  283. return 1;
  284. }
  285. if (data->currfid == reqfid) {
  286. printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", data->currfid);
  287. return 0;
  288. }
  289. dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n",
  290. smp_processor_id(),
  291. data->currfid, data->currvid, reqfid);
  292. vcoreqfid = convert_fid_to_vco_fid(reqfid);
  293. vcocurrfid = convert_fid_to_vco_fid(data->currfid);
  294. vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
  295. : vcoreqfid - vcocurrfid;
  296. while (vcofiddiff > 2) {
  297. (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2);
  298. if (reqfid > data->currfid) {
  299. if (data->currfid > LO_FID_TABLE_TOP) {
  300. if (write_new_fid(data, data->currfid + fid_interval)) {
  301. return 1;
  302. }
  303. } else {
  304. if (write_new_fid
  305. (data, 2 + convert_fid_to_vco_fid(data->currfid))) {
  306. return 1;
  307. }
  308. }
  309. } else {
  310. if (write_new_fid(data, data->currfid - fid_interval))
  311. return 1;
  312. }
  313. vcocurrfid = convert_fid_to_vco_fid(data->currfid);
  314. vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
  315. : vcoreqfid - vcocurrfid;
  316. }
  317. if (write_new_fid(data, reqfid))
  318. return 1;
  319. if (query_current_values_with_pending_wait(data))
  320. return 1;
  321. if (data->currfid != reqfid) {
  322. printk(KERN_ERR PFX
  323. "ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n",
  324. data->currfid, reqfid);
  325. return 1;
  326. }
  327. if (savevid != data->currvid) {
  328. printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n",
  329. savevid, data->currvid);
  330. return 1;
  331. }
  332. dprintk("ph2 complete, currfid 0x%x, currvid 0x%x\n",
  333. data->currfid, data->currvid);
  334. return 0;
  335. }
  336. /* Phase 3 - core voltage transition flow ... jump to the final vid. */
  337. static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvid)
  338. {
  339. u32 savefid = data->currfid;
  340. u32 savereqvid = reqvid;
  341. dprintk("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
  342. smp_processor_id(),
  343. data->currfid, data->currvid);
  344. if (reqvid != data->currvid) {
  345. if (write_new_vid(data, reqvid))
  346. return 1;
  347. if (savefid != data->currfid) {
  348. printk(KERN_ERR PFX
  349. "ph3: bad fid change, save 0x%x, curr 0x%x\n",
  350. savefid, data->currfid);
  351. return 1;
  352. }
  353. if (data->currvid != reqvid) {
  354. printk(KERN_ERR PFX
  355. "ph3: failed vid transition\n, req 0x%x, curr 0x%x",
  356. reqvid, data->currvid);
  357. return 1;
  358. }
  359. }
  360. if (query_current_values_with_pending_wait(data))
  361. return 1;
  362. if (savereqvid != data->currvid) {
  363. dprintk("ph3 failed, currvid 0x%x\n", data->currvid);
  364. return 1;
  365. }
  366. if (savefid != data->currfid) {
  367. dprintk("ph3 failed, currfid changed 0x%x\n",
  368. data->currfid);
  369. return 1;
  370. }
  371. dprintk("ph3 complete, currfid 0x%x, currvid 0x%x\n",
  372. data->currfid, data->currvid);
  373. return 0;
  374. }
  375. static int check_supported_cpu(unsigned int cpu)
  376. {
  377. cpumask_t oldmask = CPU_MASK_ALL;
  378. u32 eax, ebx, ecx, edx;
  379. unsigned int rc = 0;
  380. oldmask = current->cpus_allowed;
  381. set_cpus_allowed(current, cpumask_of_cpu(cpu));
  382. if (smp_processor_id() != cpu) {
  383. printk(KERN_ERR PFX "limiting to cpu %u failed\n", cpu);
  384. goto out;
  385. }
  386. if (current_cpu_data.x86_vendor != X86_VENDOR_AMD)
  387. goto out;
  388. eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
  389. if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
  390. ((eax & CPUID_XFAM) != CPUID_XFAM_K8) ||
  391. ((eax & CPUID_XMOD) > CPUID_XMOD_REV_G)) {
  392. printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax);
  393. goto out;
  394. }
  395. eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
  396. if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
  397. printk(KERN_INFO PFX
  398. "No frequency change capabilities detected\n");
  399. goto out;
  400. }
  401. cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
  402. if ((edx & P_STATE_TRANSITION_CAPABLE) != P_STATE_TRANSITION_CAPABLE) {
  403. printk(KERN_INFO PFX "Power state transitions not supported\n");
  404. goto out;
  405. }
  406. rc = 1;
  407. out:
  408. set_cpus_allowed(current, oldmask);
  409. return rc;
  410. }
  411. static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
  412. {
  413. unsigned int j;
  414. u8 lastfid = 0xff;
  415. for (j = 0; j < data->numps; j++) {
  416. if (pst[j].vid > LEAST_VID) {
  417. printk(KERN_ERR PFX "vid %d invalid : 0x%x\n", j, pst[j].vid);
  418. return -EINVAL;
  419. }
  420. if (pst[j].vid < data->rvo) { /* vid + rvo >= 0 */
  421. printk(KERN_ERR BFX "0 vid exceeded with pstate %d\n", j);
  422. return -ENODEV;
  423. }
  424. if (pst[j].vid < maxvid + data->rvo) { /* vid + rvo >= maxvid */
  425. printk(KERN_ERR BFX "maxvid exceeded with pstate %d\n", j);
  426. return -ENODEV;
  427. }
  428. if (pst[j].fid > MAX_FID) {
  429. printk(KERN_ERR BFX "maxfid exceeded with pstate %d\n", j);
  430. return -ENODEV;
  431. }
  432. if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) {
  433. /* Only first fid is allowed to be in "low" range */
  434. printk(KERN_ERR BFX "two low fids - %d : 0x%x\n", j, pst[j].fid);
  435. return -EINVAL;
  436. }
  437. if (pst[j].fid < lastfid)
  438. lastfid = pst[j].fid;
  439. }
  440. if (lastfid & 1) {
  441. printk(KERN_ERR BFX "lastfid invalid\n");
  442. return -EINVAL;
  443. }
  444. if (lastfid > LO_FID_TABLE_TOP)
  445. printk(KERN_INFO BFX "first fid not from lo freq table\n");
  446. return 0;
  447. }
  448. static void print_basics(struct powernow_k8_data *data)
  449. {
  450. int j;
  451. for (j = 0; j < data->numps; j++) {
  452. if (data->powernow_table[j].frequency != CPUFREQ_ENTRY_INVALID)
  453. printk(KERN_INFO PFX " %d : fid 0x%x (%d MHz), vid 0x%x (%d mV)\n", j,
  454. data->powernow_table[j].index & 0xff,
  455. data->powernow_table[j].frequency/1000,
  456. data->powernow_table[j].index >> 8,
  457. find_millivolts_from_vid(data, data->powernow_table[j].index >> 8));
  458. }
  459. if (data->batps)
  460. printk(KERN_INFO PFX "Only %d pstates on battery\n", data->batps);
  461. }
  462. static int fill_powernow_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
  463. {
  464. struct cpufreq_frequency_table *powernow_table;
  465. unsigned int j;
  466. if (data->batps) { /* use ACPI support to get full speed on mains power */
  467. printk(KERN_WARNING PFX "Only %d pstates usable (use ACPI driver for full range\n", data->batps);
  468. data->numps = data->batps;
  469. }
  470. for ( j=1; j<data->numps; j++ ) {
  471. if (pst[j-1].fid >= pst[j].fid) {
  472. printk(KERN_ERR PFX "PST out of sequence\n");
  473. return -EINVAL;
  474. }
  475. }
  476. if (data->numps < 2) {
  477. printk(KERN_ERR PFX "no p states to transition\n");
  478. return -ENODEV;
  479. }
  480. if (check_pst_table(data, pst, maxvid))
  481. return -EINVAL;
  482. powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
  483. * (data->numps + 1)), GFP_KERNEL);
  484. if (!powernow_table) {
  485. printk(KERN_ERR PFX "powernow_table memory alloc failure\n");
  486. return -ENOMEM;
  487. }
  488. for (j = 0; j < data->numps; j++) {
  489. powernow_table[j].index = pst[j].fid; /* lower 8 bits */
  490. powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */
  491. powernow_table[j].frequency = find_khz_freq_from_fid(pst[j].fid);
  492. }
  493. powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
  494. powernow_table[data->numps].index = 0;
  495. if (query_current_values_with_pending_wait(data)) {
  496. kfree(powernow_table);
  497. return -EIO;
  498. }
  499. dprintk("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
  500. data->powernow_table = powernow_table;
  501. print_basics(data);
  502. for (j = 0; j < data->numps; j++)
  503. if ((pst[j].fid==data->currfid) && (pst[j].vid==data->currvid))
  504. return 0;
  505. dprintk("currfid/vid do not match PST, ignoring\n");
  506. return 0;
  507. }
  508. /* Find and validate the PSB/PST table in BIOS. */
  509. static int find_psb_table(struct powernow_k8_data *data)
  510. {
  511. struct psb_s *psb;
  512. unsigned int i;
  513. u32 mvs;
  514. u8 maxvid;
  515. u32 cpst = 0;
  516. u32 thiscpuid;
  517. for (i = 0xc0000; i < 0xffff0; i += 0x10) {
  518. /* Scan BIOS looking for the signature. */
  519. /* It can not be at ffff0 - it is too big. */
  520. psb = phys_to_virt(i);
  521. if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
  522. continue;
  523. dprintk("found PSB header at 0x%p\n", psb);
  524. dprintk("table vers: 0x%x\n", psb->tableversion);
  525. if (psb->tableversion != PSB_VERSION_1_4) {
  526. printk(KERN_ERR BFX "PSB table is not v1.4\n");
  527. return -ENODEV;
  528. }
  529. dprintk("flags: 0x%x\n", psb->flags1);
  530. if (psb->flags1) {
  531. printk(KERN_ERR BFX "unknown flags\n");
  532. return -ENODEV;
  533. }
  534. data->vstable = psb->vstable;
  535. dprintk("voltage stabilization time: %d(*20us)\n", data->vstable);
  536. dprintk("flags2: 0x%x\n", psb->flags2);
  537. data->rvo = psb->flags2 & 3;
  538. data->irt = ((psb->flags2) >> 2) & 3;
  539. mvs = ((psb->flags2) >> 4) & 3;
  540. data->vidmvs = 1 << mvs;
  541. data->batps = ((psb->flags2) >> 6) & 3;
  542. dprintk("ramp voltage offset: %d\n", data->rvo);
  543. dprintk("isochronous relief time: %d\n", data->irt);
  544. dprintk("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
  545. dprintk("numpst: 0x%x\n", psb->num_tables);
  546. cpst = psb->num_tables;
  547. if ((psb->cpuid == 0x00000fc0) || (psb->cpuid == 0x00000fe0) ){
  548. thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
  549. if ((thiscpuid == 0x00000fc0) || (thiscpuid == 0x00000fe0) ) {
  550. cpst = 1;
  551. }
  552. }
  553. if (cpst != 1) {
  554. printk(KERN_ERR BFX "numpst must be 1\n");
  555. return -ENODEV;
  556. }
  557. data->plllock = psb->plllocktime;
  558. dprintk("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
  559. dprintk("maxfid: 0x%x\n", psb->maxfid);
  560. dprintk("maxvid: 0x%x\n", psb->maxvid);
  561. maxvid = psb->maxvid;
  562. data->numps = psb->numps;
  563. dprintk("numpstates: 0x%x\n", data->numps);
  564. return fill_powernow_table(data, (struct pst_s *)(psb+1), maxvid);
  565. }
  566. /*
  567. * If you see this message, complain to BIOS manufacturer. If
  568. * he tells you "we do not support Linux" or some similar
  569. * nonsense, remember that Windows 2000 uses the same legacy
  570. * mechanism that the old Linux PSB driver uses. Tell them it
  571. * is broken with Windows 2000.
  572. *
  573. * The reference to the AMD documentation is chapter 9 in the
  574. * BIOS and Kernel Developer's Guide, which is available on
  575. * www.amd.com
  576. */
  577. printk(KERN_ERR PFX "BIOS error - no PSB or ACPI _PSS objects\n");
  578. return -ENODEV;
  579. }
  580. #ifdef CONFIG_X86_POWERNOW_K8_ACPI
  581. static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index)
  582. {
  583. if (!data->acpi_data.state_count)
  584. return;
  585. data->irt = (data->acpi_data.states[index].control >> IRT_SHIFT) & IRT_MASK;
  586. data->rvo = (data->acpi_data.states[index].control >> RVO_SHIFT) & RVO_MASK;
  587. data->exttype = (data->acpi_data.states[index].control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
  588. data->plllock = (data->acpi_data.states[index].control >> PLL_L_SHIFT) & PLL_L_MASK;
  589. data->vidmvs = 1 << ((data->acpi_data.states[index].control >> MVS_SHIFT) & MVS_MASK);
  590. data->vstable = (data->acpi_data.states[index].control >> VST_SHIFT) & VST_MASK;
  591. }
  592. static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
  593. {
  594. int i;
  595. int cntlofreq = 0;
  596. struct cpufreq_frequency_table *powernow_table;
  597. if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
  598. dprintk("register performance failed: bad ACPI data\n");
  599. return -EIO;
  600. }
  601. /* verify the data contained in the ACPI structures */
  602. if (data->acpi_data.state_count <= 1) {
  603. dprintk("No ACPI P-States\n");
  604. goto err_out;
  605. }
  606. if ((data->acpi_data.control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
  607. (data->acpi_data.status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
  608. dprintk("Invalid control/status registers (%x - %x)\n",
  609. data->acpi_data.control_register.space_id,
  610. data->acpi_data.status_register.space_id);
  611. goto err_out;
  612. }
  613. /* fill in data->powernow_table */
  614. powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
  615. * (data->acpi_data.state_count + 1)), GFP_KERNEL);
  616. if (!powernow_table) {
  617. dprintk("powernow_table memory alloc failure\n");
  618. goto err_out;
  619. }
  620. for (i = 0; i < data->acpi_data.state_count; i++) {
  621. u32 fid;
  622. u32 vid;
  623. if (data->exttype) {
  624. fid = data->acpi_data.states[i].status & FID_MASK;
  625. vid = (data->acpi_data.states[i].status >> VID_SHIFT) & VID_MASK;
  626. } else {
  627. fid = data->acpi_data.states[i].control & FID_MASK;
  628. vid = (data->acpi_data.states[i].control >> VID_SHIFT) & VID_MASK;
  629. }
  630. dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
  631. powernow_table[i].index = fid; /* lower 8 bits */
  632. powernow_table[i].index |= (vid << 8); /* upper 8 bits */
  633. powernow_table[i].frequency = find_khz_freq_from_fid(fid);
  634. /* verify frequency is OK */
  635. if ((powernow_table[i].frequency > (MAX_FREQ * 1000)) ||
  636. (powernow_table[i].frequency < (MIN_FREQ * 1000))) {
  637. dprintk("invalid freq %u kHz, ignoring\n", powernow_table[i].frequency);
  638. powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
  639. continue;
  640. }
  641. /* verify voltage is OK - BIOSs are using "off" to indicate invalid */
  642. if (vid == VID_OFF) {
  643. dprintk("invalid vid %u, ignoring\n", vid);
  644. powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
  645. continue;
  646. }
  647. /* verify only 1 entry from the lo frequency table */
  648. if (fid < HI_FID_TABLE_BOTTOM) {
  649. if (cntlofreq) {
  650. /* if both entries are the same, ignore this
  651. * one...
  652. */
  653. if ((powernow_table[i].frequency != powernow_table[cntlofreq].frequency) ||
  654. (powernow_table[i].index != powernow_table[cntlofreq].index)) {
  655. printk(KERN_ERR PFX "Too many lo freq table entries\n");
  656. goto err_out_mem;
  657. }
  658. dprintk("double low frequency table entry, ignoring it.\n");
  659. powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
  660. continue;
  661. } else
  662. cntlofreq = i;
  663. }
  664. if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) {
  665. printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n",
  666. powernow_table[i].frequency,
  667. (unsigned int) (data->acpi_data.states[i].core_frequency * 1000));
  668. powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
  669. continue;
  670. }
  671. }
  672. powernow_table[data->acpi_data.state_count].frequency = CPUFREQ_TABLE_END;
  673. powernow_table[data->acpi_data.state_count].index = 0;
  674. data->powernow_table = powernow_table;
  675. /* fill in data */
  676. data->numps = data->acpi_data.state_count;
  677. print_basics(data);
  678. powernow_k8_acpi_pst_values(data, 0);
  679. /* notify BIOS that we exist */
  680. acpi_processor_notify_smm(THIS_MODULE);
  681. return 0;
  682. err_out_mem:
  683. kfree(powernow_table);
  684. err_out:
  685. acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
  686. /* data->acpi_data.state_count informs us at ->exit() whether ACPI was used */
  687. data->acpi_data.state_count = 0;
  688. return -ENODEV;
  689. }
  690. static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
  691. {
  692. if (data->acpi_data.state_count)
  693. acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
  694. }
  695. #else
  696. static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) { return -ENODEV; }
  697. static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) { return; }
  698. static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) { return; }
  699. #endif /* CONFIG_X86_POWERNOW_K8_ACPI */
  700. /* Take a frequency, and issue the fid/vid transition command */
  701. static int transition_frequency(struct powernow_k8_data *data, unsigned int index)
  702. {
  703. u32 fid;
  704. u32 vid;
  705. int res, i;
  706. struct cpufreq_freqs freqs;
  707. dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
  708. /* fid are the lower 8 bits of the index we stored into
  709. * the cpufreq frequency table in find_psb_table, vid are
  710. * the upper 8 bits.
  711. */
  712. fid = data->powernow_table[index].index & 0xFF;
  713. vid = (data->powernow_table[index].index & 0xFF00) >> 8;
  714. dprintk("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
  715. if (query_current_values_with_pending_wait(data))
  716. return 1;
  717. if ((data->currvid == vid) && (data->currfid == fid)) {
  718. dprintk("target matches current values (fid 0x%x, vid 0x%x)\n",
  719. fid, vid);
  720. return 0;
  721. }
  722. if ((fid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
  723. printk(KERN_ERR PFX
  724. "ignoring illegal change in lo freq table-%x to 0x%x\n",
  725. data->currfid, fid);
  726. return 1;
  727. }
  728. dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n",
  729. smp_processor_id(), fid, vid);
  730. freqs.cpu = data->cpu;
  731. freqs.old = find_khz_freq_from_fid(data->currfid);
  732. freqs.new = find_khz_freq_from_fid(fid);
  733. for_each_cpu_mask(i, cpu_core_map[data->cpu]) {
  734. freqs.cpu = i;
  735. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  736. }
  737. res = transition_fid_vid(data, fid, vid);
  738. freqs.new = find_khz_freq_from_fid(data->currfid);
  739. for_each_cpu_mask(i, cpu_core_map[data->cpu]) {
  740. freqs.cpu = i;
  741. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  742. }
  743. return res;
  744. }
  745. /* Driver entry point to switch to the target frequency */
  746. static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsigned relation)
  747. {
  748. cpumask_t oldmask = CPU_MASK_ALL;
  749. struct powernow_k8_data *data = powernow_data[pol->cpu];
  750. u32 checkfid = data->currfid;
  751. u32 checkvid = data->currvid;
  752. unsigned int newstate;
  753. int ret = -EIO;
  754. int i;
  755. /* only run on specific CPU from here on */
  756. oldmask = current->cpus_allowed;
  757. set_cpus_allowed(current, cpumask_of_cpu(pol->cpu));
  758. if (smp_processor_id() != pol->cpu) {
  759. printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu);
  760. goto err_out;
  761. }
  762. if (pending_bit_stuck()) {
  763. printk(KERN_ERR PFX "failing targ, change pending bit set\n");
  764. goto err_out;
  765. }
  766. dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n",
  767. pol->cpu, targfreq, pol->min, pol->max, relation);
  768. if (query_current_values_with_pending_wait(data)) {
  769. ret = -EIO;
  770. goto err_out;
  771. }
  772. dprintk("targ: curr fid 0x%x, vid 0x%x\n",
  773. data->currfid, data->currvid);
  774. if ((checkvid != data->currvid) || (checkfid != data->currfid)) {
  775. printk(KERN_INFO PFX
  776. "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
  777. checkfid, data->currfid, checkvid, data->currvid);
  778. }
  779. if (cpufreq_frequency_table_target(pol, data->powernow_table, targfreq, relation, &newstate))
  780. goto err_out;
  781. down(&fidvid_sem);
  782. powernow_k8_acpi_pst_values(data, newstate);
  783. if (transition_frequency(data, newstate)) {
  784. printk(KERN_ERR PFX "transition frequency failed\n");
  785. ret = 1;
  786. up(&fidvid_sem);
  787. goto err_out;
  788. }
  789. /* Update all the fid/vids of our siblings */
  790. for_each_cpu_mask(i, cpu_core_map[pol->cpu]) {
  791. powernow_data[i]->currvid = data->currvid;
  792. powernow_data[i]->currfid = data->currfid;
  793. }
  794. up(&fidvid_sem);
  795. pol->cur = find_khz_freq_from_fid(data->currfid);
  796. ret = 0;
  797. err_out:
  798. set_cpus_allowed(current, oldmask);
  799. return ret;
  800. }
  801. /* Driver entry point to verify the policy and range of frequencies */
  802. static int powernowk8_verify(struct cpufreq_policy *pol)
  803. {
  804. struct powernow_k8_data *data = powernow_data[pol->cpu];
  805. return cpufreq_frequency_table_verify(pol, data->powernow_table);
  806. }
  807. /* per CPU init entry point to the driver */
  808. static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
  809. {
  810. struct powernow_k8_data *data;
  811. cpumask_t oldmask = CPU_MASK_ALL;
  812. int rc, i;
  813. if (!cpu_online(pol->cpu))
  814. return -ENODEV;
  815. if (!check_supported_cpu(pol->cpu))
  816. return -ENODEV;
  817. data = kzalloc(sizeof(struct powernow_k8_data), GFP_KERNEL);
  818. if (!data) {
  819. printk(KERN_ERR PFX "unable to alloc powernow_k8_data");
  820. return -ENOMEM;
  821. }
  822. data->cpu = pol->cpu;
  823. if (powernow_k8_cpu_init_acpi(data)) {
  824. /*
  825. * Use the PSB BIOS structure. This is only availabe on
  826. * an UP version, and is deprecated by AMD.
  827. */
  828. if ((num_online_cpus() != 1) || (num_possible_cpus() != 1)) {
  829. printk(KERN_ERR PFX "MP systems not supported by PSB BIOS structure\n");
  830. kfree(data);
  831. return -ENODEV;
  832. }
  833. if (pol->cpu != 0) {
  834. printk(KERN_ERR PFX "init not cpu 0\n");
  835. kfree(data);
  836. return -ENODEV;
  837. }
  838. rc = find_psb_table(data);
  839. if (rc) {
  840. kfree(data);
  841. return -ENODEV;
  842. }
  843. }
  844. /* only run on specific CPU from here on */
  845. oldmask = current->cpus_allowed;
  846. set_cpus_allowed(current, cpumask_of_cpu(pol->cpu));
  847. if (smp_processor_id() != pol->cpu) {
  848. printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu);
  849. goto err_out;
  850. }
  851. if (pending_bit_stuck()) {
  852. printk(KERN_ERR PFX "failing init, change pending bit set\n");
  853. goto err_out;
  854. }
  855. if (query_current_values_with_pending_wait(data))
  856. goto err_out;
  857. fidvid_msr_init();
  858. /* run on any CPU again */
  859. set_cpus_allowed(current, oldmask);
  860. pol->governor = CPUFREQ_DEFAULT_GOVERNOR;
  861. pol->cpus = cpu_core_map[pol->cpu];
  862. /* Take a crude guess here.
  863. * That guess was in microseconds, so multiply with 1000 */
  864. pol->cpuinfo.transition_latency = (((data->rvo + 8) * data->vstable * VST_UNITS_20US)
  865. + (3 * (1 << data->irt) * 10)) * 1000;
  866. pol->cur = find_khz_freq_from_fid(data->currfid);
  867. dprintk("policy current frequency %d kHz\n", pol->cur);
  868. /* min/max the cpu is capable of */
  869. if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) {
  870. printk(KERN_ERR PFX "invalid powernow_table\n");
  871. powernow_k8_cpu_exit_acpi(data);
  872. kfree(data->powernow_table);
  873. kfree(data);
  874. return -EINVAL;
  875. }
  876. cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
  877. printk("cpu_init done, current fid 0x%x, vid 0x%x\n",
  878. data->currfid, data->currvid);
  879. for_each_cpu_mask(i, cpu_core_map[pol->cpu]) {
  880. powernow_data[i] = data;
  881. }
  882. return 0;
  883. err_out:
  884. set_cpus_allowed(current, oldmask);
  885. powernow_k8_cpu_exit_acpi(data);
  886. kfree(data);
  887. return -ENODEV;
  888. }
  889. static int __devexit powernowk8_cpu_exit (struct cpufreq_policy *pol)
  890. {
  891. struct powernow_k8_data *data = powernow_data[pol->cpu];
  892. if (!data)
  893. return -EINVAL;
  894. powernow_k8_cpu_exit_acpi(data);
  895. cpufreq_frequency_table_put_attr(pol->cpu);
  896. kfree(data->powernow_table);
  897. kfree(data);
  898. return 0;
  899. }
  900. static unsigned int powernowk8_get (unsigned int cpu)
  901. {
  902. struct powernow_k8_data *data = powernow_data[cpu];
  903. cpumask_t oldmask = current->cpus_allowed;
  904. unsigned int khz = 0;
  905. set_cpus_allowed(current, cpumask_of_cpu(cpu));
  906. if (smp_processor_id() != cpu) {
  907. printk(KERN_ERR PFX "limiting to CPU %d failed in powernowk8_get\n", cpu);
  908. set_cpus_allowed(current, oldmask);
  909. return 0;
  910. }
  911. if (query_current_values_with_pending_wait(data))
  912. goto out;
  913. khz = find_khz_freq_from_fid(data->currfid);
  914. out:
  915. set_cpus_allowed(current, oldmask);
  916. return khz;
  917. }
  918. static struct freq_attr* powernow_k8_attr[] = {
  919. &cpufreq_freq_attr_scaling_available_freqs,
  920. NULL,
  921. };
  922. static struct cpufreq_driver cpufreq_amd64_driver = {
  923. .verify = powernowk8_verify,
  924. .target = powernowk8_target,
  925. .init = powernowk8_cpu_init,
  926. .exit = __devexit_p(powernowk8_cpu_exit),
  927. .get = powernowk8_get,
  928. .name = "powernow-k8",
  929. .owner = THIS_MODULE,
  930. .attr = powernow_k8_attr,
  931. };
  932. /* driver entry point for init */
  933. static int __cpuinit powernowk8_init(void)
  934. {
  935. unsigned int i, supported_cpus = 0;
  936. for (i=0; i<NR_CPUS; i++) {
  937. if (!cpu_online(i))
  938. continue;
  939. if (check_supported_cpu(i))
  940. supported_cpus++;
  941. }
  942. if (supported_cpus == num_online_cpus()) {
  943. printk(KERN_INFO PFX "Found %d AMD Athlon 64 / Opteron processors (" VERSION ")\n",
  944. supported_cpus);
  945. return cpufreq_register_driver(&cpufreq_amd64_driver);
  946. }
  947. return -ENODEV;
  948. }
  949. /* driver entry point for term */
  950. static void __exit powernowk8_exit(void)
  951. {
  952. dprintk("exit\n");
  953. cpufreq_unregister_driver(&cpufreq_amd64_driver);
  954. }
  955. MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and Mark Langsdorf <mark.langsdorf@amd.com>");
  956. MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
  957. MODULE_LICENSE("GPL");
  958. late_initcall(powernowk8_init);
  959. module_exit(powernowk8_exit);