iop321-setup.c 4.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175
  1. /*
  2. * linux/arch/arm/mach-iop3xx/iop321-setup.c
  3. *
  4. * Author: Nicolas Pitre <nico@cam.org>
  5. * Copyright (C) 2001 MontaVista Software, Inc.
  6. * Copyright (C) 2004 Intel Corporation.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/mm.h>
  14. #include <linux/init.h>
  15. #include <linux/config.h>
  16. #include <linux/init.h>
  17. #include <linux/major.h>
  18. #include <linux/fs.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/serial.h>
  21. #include <linux/tty.h>
  22. #include <linux/serial_core.h>
  23. #include <asm/io.h>
  24. #include <asm/pgtable.h>
  25. #include <asm/page.h>
  26. #include <asm/mach/map.h>
  27. #include <asm/setup.h>
  28. #include <asm/system.h>
  29. #include <asm/memory.h>
  30. #include <asm/hardware.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/mach/arch.h>
  33. #define IOP321_UART_XTAL 1843200
  34. /*
  35. * Standard IO mapping for all IOP321 based systems
  36. */
  37. static struct map_desc iop321_std_desc[] __initdata = {
  38. { /* mem mapped registers */
  39. .virtual = IOP321_VIRT_MEM_BASE,
  40. .pfn = __phys_to_pfn(IOP321_PHYS_MEM_BASE),
  41. .length = 0x00002000,
  42. .type = MT_DEVICE
  43. }, { /* PCI IO space */
  44. .virtual = IOP321_PCI_LOWER_IO_VA,
  45. .pfn = __phys_to_pfn(IOP321_PCI_LOWER_IO_PA),
  46. .length = IOP321_PCI_IO_WINDOW_SIZE,
  47. .type = MT_DEVICE
  48. }
  49. };
  50. #ifdef CONFIG_ARCH_IQ80321
  51. #define UARTBASE IQ80321_UART
  52. #define IRQ_UART IRQ_IQ80321_UART
  53. #endif
  54. #ifdef CONFIG_ARCH_IQ31244
  55. #define UARTBASE IQ31244_UART
  56. #define IRQ_UART IRQ_IQ31244_UART
  57. #endif
  58. static struct uart_port iop321_serial_ports[] = {
  59. {
  60. .membase = (char*)(UARTBASE),
  61. .mapbase = (UARTBASE),
  62. .irq = IRQ_UART,
  63. .flags = UPF_SKIP_TEST,
  64. .iotype = UPIO_MEM,
  65. .regshift = 0,
  66. .uartclk = IOP321_UART_XTAL,
  67. .line = 0,
  68. .type = PORT_16550A,
  69. .fifosize = 16
  70. }
  71. };
  72. static struct resource iop32x_i2c_0_resources[] = {
  73. [0] = {
  74. .start = 0xfffff680,
  75. .end = 0xfffff698,
  76. .flags = IORESOURCE_MEM,
  77. },
  78. [1] = {
  79. .start = IRQ_IOP321_I2C_0,
  80. .end = IRQ_IOP321_I2C_0,
  81. .flags = IORESOURCE_IRQ
  82. }
  83. };
  84. static struct resource iop32x_i2c_1_resources[] = {
  85. [0] = {
  86. .start = 0xfffff6a0,
  87. .end = 0xfffff6b8,
  88. .flags = IORESOURCE_MEM,
  89. },
  90. [1] = {
  91. .start = IRQ_IOP321_I2C_1,
  92. .end = IRQ_IOP321_I2C_1,
  93. .flags = IORESOURCE_IRQ
  94. }
  95. };
  96. static struct platform_device iop32x_i2c_0_controller = {
  97. .name = "IOP3xx-I2C",
  98. .id = 0,
  99. .num_resources = 2,
  100. .resource = iop32x_i2c_0_resources
  101. };
  102. static struct platform_device iop32x_i2c_1_controller = {
  103. .name = "IOP3xx-I2C",
  104. .id = 1,
  105. .num_resources = 2,
  106. .resource = iop32x_i2c_1_resources
  107. };
  108. static struct platform_device *iop32x_devices[] __initdata = {
  109. &iop32x_i2c_0_controller,
  110. &iop32x_i2c_1_controller
  111. };
  112. void __init iop32x_init(void)
  113. {
  114. if(iop_is_321())
  115. {
  116. platform_add_devices(iop32x_devices,
  117. ARRAY_SIZE(iop32x_devices));
  118. }
  119. }
  120. void __init iop321_map_io(void)
  121. {
  122. iotable_init(iop321_std_desc, ARRAY_SIZE(iop321_std_desc));
  123. early_serial_setup(&iop321_serial_ports[0]);
  124. }
  125. #ifdef CONFIG_ARCH_IQ80321
  126. extern void iq80321_map_io(void);
  127. extern struct sys_timer iop321_timer;
  128. extern void iop321_init_time(void);
  129. #endif
  130. #ifdef CONFIG_ARCH_IQ31244
  131. extern void iq31244_map_io(void);
  132. extern struct sys_timer iop321_timer;
  133. extern void iop321_init_time(void);
  134. #endif
  135. #if defined(CONFIG_ARCH_IQ80321)
  136. MACHINE_START(IQ80321, "Intel IQ80321")
  137. /* Maintainer: Intel Corporation */
  138. .phys_io = IQ80321_UART,
  139. .io_pg_offst = ((IQ80321_UART) >> 18) & 0xfffc,
  140. .map_io = iq80321_map_io,
  141. .init_irq = iop321_init_irq,
  142. .timer = &iop321_timer,
  143. .boot_params = 0xa0000100,
  144. .init_machine = iop32x_init,
  145. MACHINE_END
  146. #elif defined(CONFIG_ARCH_IQ31244)
  147. MACHINE_START(IQ31244, "Intel IQ31244")
  148. /* Maintainer: Intel Corp. */
  149. .phys_io = IQ31244_UART,
  150. .io_pg_offst = ((IQ31244_UART) >> 18) & 0xfffc,
  151. .map_io = iq31244_map_io,
  152. .init_irq = iop321_init_irq,
  153. .timer = &iop321_timer,
  154. .boot_params = 0xa0000100,
  155. .init_machine = iop32x_init,
  156. MACHINE_END
  157. #else
  158. #error No machine descriptor defined for this IOP3XX implementation
  159. #endif