iwl3945-base.c 118 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/lib80211.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-sta.h"
  50. #include "iwl-3945.h"
  51. #include "iwl-helpers.h"
  52. #include "iwl-core.h"
  53. #include "iwl-dev.h"
  54. /*
  55. * module name, copyright, version, etc.
  56. */
  57. #define DRV_DESCRIPTION \
  58. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  59. #ifdef CONFIG_IWLWIFI_DEBUG
  60. #define VD "d"
  61. #else
  62. #define VD
  63. #endif
  64. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  65. #define VS "s"
  66. #else
  67. #define VS
  68. #endif
  69. #define IWL39_VERSION "1.2.26k" VD VS
  70. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  71. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  72. #define DRV_VERSION IWL39_VERSION
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_VERSION(DRV_VERSION);
  75. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  76. MODULE_LICENSE("GPL");
  77. /* module parameters */
  78. struct iwl_mod_params iwl3945_mod_params = {
  79. .num_of_queues = IWL39_NUM_QUEUES, /* Not used */
  80. .sw_crypto = 1,
  81. .restart_fw = 1,
  82. /* the rest are 0 by default */
  83. };
  84. /**
  85. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  86. * @priv: eeprom and antenna fields are used to determine antenna flags
  87. *
  88. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  89. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  90. *
  91. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  92. * IWL_ANTENNA_MAIN - Force MAIN antenna
  93. * IWL_ANTENNA_AUX - Force AUX antenna
  94. */
  95. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  96. {
  97. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  98. switch (iwl3945_mod_params.antenna) {
  99. case IWL_ANTENNA_DIVERSITY:
  100. return 0;
  101. case IWL_ANTENNA_MAIN:
  102. if (eeprom->antenna_switch_type)
  103. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  104. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  105. case IWL_ANTENNA_AUX:
  106. if (eeprom->antenna_switch_type)
  107. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  108. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  109. }
  110. /* bad antenna selector value */
  111. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  112. iwl3945_mod_params.antenna);
  113. return 0; /* "diversity" is default if error */
  114. }
  115. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  116. struct ieee80211_key_conf *keyconf,
  117. u8 sta_id)
  118. {
  119. unsigned long flags;
  120. __le16 key_flags = 0;
  121. int ret;
  122. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  123. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  124. if (sta_id == priv->hw_params.bcast_sta_id)
  125. key_flags |= STA_KEY_MULTICAST_MSK;
  126. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  127. keyconf->hw_key_idx = keyconf->keyidx;
  128. key_flags &= ~STA_KEY_FLG_INVALID;
  129. spin_lock_irqsave(&priv->sta_lock, flags);
  130. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  131. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  132. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  133. keyconf->keylen);
  134. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  135. keyconf->keylen);
  136. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  137. == STA_KEY_FLG_NO_ENC)
  138. priv->stations[sta_id].sta.key.key_offset =
  139. iwl_get_free_ucode_key_index(priv);
  140. /* else, we are overriding an existing key => no need to allocated room
  141. * in uCode. */
  142. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  143. "no space for a new key");
  144. priv->stations[sta_id].sta.key.key_flags = key_flags;
  145. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  146. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  147. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  148. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  149. spin_unlock_irqrestore(&priv->sta_lock, flags);
  150. return ret;
  151. }
  152. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  153. struct ieee80211_key_conf *keyconf,
  154. u8 sta_id)
  155. {
  156. return -EOPNOTSUPP;
  157. }
  158. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  159. struct ieee80211_key_conf *keyconf,
  160. u8 sta_id)
  161. {
  162. return -EOPNOTSUPP;
  163. }
  164. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  165. {
  166. unsigned long flags;
  167. spin_lock_irqsave(&priv->sta_lock, flags);
  168. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  169. memset(&priv->stations[sta_id].sta.key, 0,
  170. sizeof(struct iwl4965_keyinfo));
  171. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  172. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  173. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  174. spin_unlock_irqrestore(&priv->sta_lock, flags);
  175. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  176. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
  177. return 0;
  178. }
  179. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  180. struct ieee80211_key_conf *keyconf, u8 sta_id)
  181. {
  182. int ret = 0;
  183. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  184. switch (keyconf->alg) {
  185. case ALG_CCMP:
  186. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  187. break;
  188. case ALG_TKIP:
  189. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  190. break;
  191. case ALG_WEP:
  192. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  193. break;
  194. default:
  195. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  196. ret = -EINVAL;
  197. }
  198. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  199. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  200. sta_id, ret);
  201. return ret;
  202. }
  203. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  204. {
  205. int ret = -EOPNOTSUPP;
  206. return ret;
  207. }
  208. static int iwl3945_set_static_key(struct iwl_priv *priv,
  209. struct ieee80211_key_conf *key)
  210. {
  211. if (key->alg == ALG_WEP)
  212. return -EOPNOTSUPP;
  213. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  214. return -EINVAL;
  215. }
  216. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  217. {
  218. struct list_head *element;
  219. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  220. priv->frames_count);
  221. while (!list_empty(&priv->free_frames)) {
  222. element = priv->free_frames.next;
  223. list_del(element);
  224. kfree(list_entry(element, struct iwl3945_frame, list));
  225. priv->frames_count--;
  226. }
  227. if (priv->frames_count) {
  228. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  229. priv->frames_count);
  230. priv->frames_count = 0;
  231. }
  232. }
  233. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  234. {
  235. struct iwl3945_frame *frame;
  236. struct list_head *element;
  237. if (list_empty(&priv->free_frames)) {
  238. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  239. if (!frame) {
  240. IWL_ERR(priv, "Could not allocate frame!\n");
  241. return NULL;
  242. }
  243. priv->frames_count++;
  244. return frame;
  245. }
  246. element = priv->free_frames.next;
  247. list_del(element);
  248. return list_entry(element, struct iwl3945_frame, list);
  249. }
  250. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  251. {
  252. memset(frame, 0, sizeof(*frame));
  253. list_add(&frame->list, &priv->free_frames);
  254. }
  255. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  256. struct ieee80211_hdr *hdr,
  257. int left)
  258. {
  259. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  260. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  261. (priv->iw_mode != NL80211_IFTYPE_AP)))
  262. return 0;
  263. if (priv->ibss_beacon->len > left)
  264. return 0;
  265. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  266. return priv->ibss_beacon->len;
  267. }
  268. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  269. {
  270. struct iwl3945_frame *frame;
  271. unsigned int frame_size;
  272. int rc;
  273. u8 rate;
  274. frame = iwl3945_get_free_frame(priv);
  275. if (!frame) {
  276. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  277. "command.\n");
  278. return -ENOMEM;
  279. }
  280. rate = iwl_rate_get_lowest_plcp(priv);
  281. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  282. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  283. &frame->u.cmd[0]);
  284. iwl3945_free_frame(priv, frame);
  285. return rc;
  286. }
  287. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  288. {
  289. if (priv->shared_virt)
  290. pci_free_consistent(priv->pci_dev,
  291. sizeof(struct iwl3945_shared),
  292. priv->shared_virt,
  293. priv->shared_phys);
  294. }
  295. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  296. struct ieee80211_tx_info *info,
  297. struct iwl_device_cmd *cmd,
  298. struct sk_buff *skb_frag,
  299. int sta_id)
  300. {
  301. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  302. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  303. switch (keyinfo->alg) {
  304. case ALG_CCMP:
  305. tx->sec_ctl = TX_CMD_SEC_CCM;
  306. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  307. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  308. break;
  309. case ALG_TKIP:
  310. break;
  311. case ALG_WEP:
  312. tx->sec_ctl = TX_CMD_SEC_WEP |
  313. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  314. if (keyinfo->keylen == 13)
  315. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  316. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  317. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  318. "with key %d\n", info->control.hw_key->hw_key_idx);
  319. break;
  320. default:
  321. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  322. break;
  323. }
  324. }
  325. /*
  326. * handle build REPLY_TX command notification.
  327. */
  328. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  329. struct iwl_device_cmd *cmd,
  330. struct ieee80211_tx_info *info,
  331. struct ieee80211_hdr *hdr, u8 std_id)
  332. {
  333. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  334. __le32 tx_flags = tx->tx_flags;
  335. __le16 fc = hdr->frame_control;
  336. u8 rc_flags = info->control.rates[0].flags;
  337. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  338. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  339. tx_flags |= TX_CMD_FLG_ACK_MSK;
  340. if (ieee80211_is_mgmt(fc))
  341. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  342. if (ieee80211_is_probe_resp(fc) &&
  343. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  344. tx_flags |= TX_CMD_FLG_TSF_MSK;
  345. } else {
  346. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  347. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  348. }
  349. tx->sta_id = std_id;
  350. if (ieee80211_has_morefrags(fc))
  351. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  352. if (ieee80211_is_data_qos(fc)) {
  353. u8 *qc = ieee80211_get_qos_ctl(hdr);
  354. tx->tid_tspec = qc[0] & 0xf;
  355. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  356. } else {
  357. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  358. }
  359. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  360. tx_flags |= TX_CMD_FLG_RTS_MSK;
  361. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  362. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  363. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  364. tx_flags |= TX_CMD_FLG_CTS_MSK;
  365. }
  366. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  367. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  368. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  369. if (ieee80211_is_mgmt(fc)) {
  370. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  371. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  372. else
  373. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  374. } else {
  375. tx->timeout.pm_frame_timeout = 0;
  376. #ifdef CONFIG_IWLWIFI_LEDS
  377. priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
  378. #endif
  379. }
  380. tx->driver_txop = 0;
  381. tx->tx_flags = tx_flags;
  382. tx->next_frame_len = 0;
  383. }
  384. /*
  385. * start REPLY_TX command process
  386. */
  387. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  388. {
  389. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  390. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  391. struct iwl3945_tx_cmd *tx;
  392. struct iwl_tx_queue *txq = NULL;
  393. struct iwl_queue *q = NULL;
  394. struct iwl_device_cmd *out_cmd;
  395. struct iwl_cmd_meta *out_meta;
  396. dma_addr_t phys_addr;
  397. dma_addr_t txcmd_phys;
  398. int txq_id = skb_get_queue_mapping(skb);
  399. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  400. u8 id;
  401. u8 unicast;
  402. u8 sta_id;
  403. u8 tid = 0;
  404. u16 seq_number = 0;
  405. __le16 fc;
  406. u8 wait_write_ptr = 0;
  407. u8 *qc = NULL;
  408. unsigned long flags;
  409. int rc;
  410. spin_lock_irqsave(&priv->lock, flags);
  411. if (iwl_is_rfkill(priv)) {
  412. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  413. goto drop_unlock;
  414. }
  415. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  416. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  417. goto drop_unlock;
  418. }
  419. unicast = !is_multicast_ether_addr(hdr->addr1);
  420. id = 0;
  421. fc = hdr->frame_control;
  422. #ifdef CONFIG_IWLWIFI_DEBUG
  423. if (ieee80211_is_auth(fc))
  424. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  425. else if (ieee80211_is_assoc_req(fc))
  426. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  427. else if (ieee80211_is_reassoc_req(fc))
  428. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  429. #endif
  430. /* drop all non-injected data frame if we are not associated */
  431. if (ieee80211_is_data(fc) &&
  432. !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
  433. (!iwl_is_associated(priv) ||
  434. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  435. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  436. goto drop_unlock;
  437. }
  438. spin_unlock_irqrestore(&priv->lock, flags);
  439. hdr_len = ieee80211_hdrlen(fc);
  440. /* Find (or create) index into station table for destination station */
  441. if (info->flags & IEEE80211_TX_CTL_INJECTED)
  442. sta_id = priv->hw_params.bcast_sta_id;
  443. else
  444. sta_id = iwl_get_sta_id(priv, hdr);
  445. if (sta_id == IWL_INVALID_STATION) {
  446. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  447. hdr->addr1);
  448. goto drop;
  449. }
  450. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  451. if (ieee80211_is_data_qos(fc)) {
  452. qc = ieee80211_get_qos_ctl(hdr);
  453. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  454. if (unlikely(tid >= MAX_TID_COUNT))
  455. goto drop;
  456. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  457. IEEE80211_SCTL_SEQ;
  458. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  459. (hdr->seq_ctrl &
  460. cpu_to_le16(IEEE80211_SCTL_FRAG));
  461. seq_number += 0x10;
  462. }
  463. /* Descriptor for chosen Tx queue */
  464. txq = &priv->txq[txq_id];
  465. q = &txq->q;
  466. spin_lock_irqsave(&priv->lock, flags);
  467. idx = get_cmd_index(q, q->write_ptr, 0);
  468. /* Set up driver data for this TFD */
  469. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  470. txq->txb[q->write_ptr].skb[0] = skb;
  471. /* Init first empty entry in queue's array of Tx/cmd buffers */
  472. out_cmd = txq->cmd[idx];
  473. out_meta = &txq->meta[idx];
  474. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  475. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  476. memset(tx, 0, sizeof(*tx));
  477. /*
  478. * Set up the Tx-command (not MAC!) header.
  479. * Store the chosen Tx queue and TFD index within the sequence field;
  480. * after Tx, uCode's Tx response will return this value so driver can
  481. * locate the frame within the tx queue and do post-tx processing.
  482. */
  483. out_cmd->hdr.cmd = REPLY_TX;
  484. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  485. INDEX_TO_SEQ(q->write_ptr)));
  486. /* Copy MAC header from skb into command buffer */
  487. memcpy(tx->hdr, hdr, hdr_len);
  488. if (info->control.hw_key)
  489. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  490. /* TODO need this for burst mode later on */
  491. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  492. /* set is_hcca to 0; it probably will never be implemented */
  493. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  494. /* Total # bytes to be transmitted */
  495. len = (u16)skb->len;
  496. tx->len = cpu_to_le16(len);
  497. iwl_dbg_log_tx_data_frame(priv, len, hdr);
  498. iwl_update_stats(priv, true, fc, len);
  499. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  500. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  501. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  502. txq->need_update = 1;
  503. if (qc)
  504. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  505. } else {
  506. wait_write_ptr = 1;
  507. txq->need_update = 0;
  508. }
  509. IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
  510. le16_to_cpu(out_cmd->hdr.sequence));
  511. IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags));
  512. iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
  513. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
  514. ieee80211_hdrlen(fc));
  515. /*
  516. * Use the first empty entry in this queue's command buffer array
  517. * to contain the Tx command and MAC header concatenated together
  518. * (payload data will be in another buffer).
  519. * Size of this varies, due to varying MAC header length.
  520. * If end is not dword aligned, we'll have 2 extra bytes at the end
  521. * of the MAC header (device reads on dword boundaries).
  522. * We'll tell device about this padding later.
  523. */
  524. len = sizeof(struct iwl3945_tx_cmd) +
  525. sizeof(struct iwl_cmd_header) + hdr_len;
  526. len_org = len;
  527. len = (len + 3) & ~3;
  528. if (len_org != len)
  529. len_org = 1;
  530. else
  531. len_org = 0;
  532. /* Physical address of this Tx command's header (not MAC header!),
  533. * within command buffer array. */
  534. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  535. len, PCI_DMA_TODEVICE);
  536. /* we do not map meta data ... so we can safely access address to
  537. * provide to unmap command*/
  538. pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
  539. pci_unmap_len_set(out_meta, len, len);
  540. /* Add buffer containing Tx command and MAC(!) header to TFD's
  541. * first entry */
  542. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  543. txcmd_phys, len, 1, 0);
  544. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  545. * if any (802.11 null frames have no payload). */
  546. len = skb->len - hdr_len;
  547. if (len) {
  548. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  549. len, PCI_DMA_TODEVICE);
  550. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  551. phys_addr, len,
  552. 0, U32_PAD(len));
  553. }
  554. /* Tell device the write index *just past* this latest filled TFD */
  555. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  556. rc = iwl_txq_update_write_ptr(priv, txq);
  557. spin_unlock_irqrestore(&priv->lock, flags);
  558. if (rc)
  559. return rc;
  560. if ((iwl_queue_space(q) < q->high_mark)
  561. && priv->mac80211_registered) {
  562. if (wait_write_ptr) {
  563. spin_lock_irqsave(&priv->lock, flags);
  564. txq->need_update = 1;
  565. iwl_txq_update_write_ptr(priv, txq);
  566. spin_unlock_irqrestore(&priv->lock, flags);
  567. }
  568. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  569. }
  570. return 0;
  571. drop_unlock:
  572. spin_unlock_irqrestore(&priv->lock, flags);
  573. drop:
  574. return -1;
  575. }
  576. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  577. #include "iwl-spectrum.h"
  578. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  579. #define BEACON_TIME_MASK_HIGH 0xFF000000
  580. #define TIME_UNIT 1024
  581. /*
  582. * extended beacon time format
  583. * time in usec will be changed into a 32-bit value in 8:24 format
  584. * the high 1 byte is the beacon counts
  585. * the lower 3 bytes is the time in usec within one beacon interval
  586. */
  587. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  588. {
  589. u32 quot;
  590. u32 rem;
  591. u32 interval = beacon_interval * 1024;
  592. if (!interval || !usec)
  593. return 0;
  594. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  595. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  596. return (quot << 24) + rem;
  597. }
  598. /* base is usually what we get from ucode with each received frame,
  599. * the same as HW timer counter counting down
  600. */
  601. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  602. {
  603. u32 base_low = base & BEACON_TIME_MASK_LOW;
  604. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  605. u32 interval = beacon_interval * TIME_UNIT;
  606. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  607. (addon & BEACON_TIME_MASK_HIGH);
  608. if (base_low > addon_low)
  609. res += base_low - addon_low;
  610. else if (base_low < addon_low) {
  611. res += interval + base_low - addon_low;
  612. res += (1 << 24);
  613. } else
  614. res += (1 << 24);
  615. return cpu_to_le32(res);
  616. }
  617. static int iwl3945_get_measurement(struct iwl_priv *priv,
  618. struct ieee80211_measurement_params *params,
  619. u8 type)
  620. {
  621. struct iwl_spectrum_cmd spectrum;
  622. struct iwl_rx_packet *res;
  623. struct iwl_host_cmd cmd = {
  624. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  625. .data = (void *)&spectrum,
  626. .flags = CMD_WANT_SKB,
  627. };
  628. u32 add_time = le64_to_cpu(params->start_time);
  629. int rc;
  630. int spectrum_resp_status;
  631. int duration = le16_to_cpu(params->duration);
  632. if (iwl_is_associated(priv))
  633. add_time =
  634. iwl3945_usecs_to_beacons(
  635. le64_to_cpu(params->start_time) - priv->last_tsf,
  636. le16_to_cpu(priv->rxon_timing.beacon_interval));
  637. memset(&spectrum, 0, sizeof(spectrum));
  638. spectrum.channel_count = cpu_to_le16(1);
  639. spectrum.flags =
  640. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  641. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  642. cmd.len = sizeof(spectrum);
  643. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  644. if (iwl_is_associated(priv))
  645. spectrum.start_time =
  646. iwl3945_add_beacon_time(priv->last_beacon_time,
  647. add_time,
  648. le16_to_cpu(priv->rxon_timing.beacon_interval));
  649. else
  650. spectrum.start_time = 0;
  651. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  652. spectrum.channels[0].channel = params->channel;
  653. spectrum.channels[0].type = type;
  654. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  655. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  656. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  657. rc = iwl_send_cmd_sync(priv, &cmd);
  658. if (rc)
  659. return rc;
  660. res = (struct iwl_rx_packet *)cmd.reply_skb->data;
  661. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  662. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  663. rc = -EIO;
  664. }
  665. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  666. switch (spectrum_resp_status) {
  667. case 0: /* Command will be handled */
  668. if (res->u.spectrum.id != 0xff) {
  669. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  670. res->u.spectrum.id);
  671. priv->measurement_status &= ~MEASUREMENT_READY;
  672. }
  673. priv->measurement_status |= MEASUREMENT_ACTIVE;
  674. rc = 0;
  675. break;
  676. case 1: /* Command will not be handled */
  677. rc = -EAGAIN;
  678. break;
  679. }
  680. dev_kfree_skb_any(cmd.reply_skb);
  681. return rc;
  682. }
  683. #endif
  684. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  685. struct iwl_rx_mem_buffer *rxb)
  686. {
  687. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  688. struct iwl_alive_resp *palive;
  689. struct delayed_work *pwork;
  690. palive = &pkt->u.alive_frame;
  691. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  692. "0x%01X 0x%01X\n",
  693. palive->is_valid, palive->ver_type,
  694. palive->ver_subtype);
  695. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  696. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  697. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  698. sizeof(struct iwl_alive_resp));
  699. pwork = &priv->init_alive_start;
  700. } else {
  701. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  702. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  703. sizeof(struct iwl_alive_resp));
  704. pwork = &priv->alive_start;
  705. iwl3945_disable_events(priv);
  706. }
  707. /* We delay the ALIVE response by 5ms to
  708. * give the HW RF Kill time to activate... */
  709. if (palive->is_valid == UCODE_VALID_OK)
  710. queue_delayed_work(priv->workqueue, pwork,
  711. msecs_to_jiffies(5));
  712. else
  713. IWL_WARN(priv, "uCode did not respond OK.\n");
  714. }
  715. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  716. struct iwl_rx_mem_buffer *rxb)
  717. {
  718. #ifdef CONFIG_IWLWIFI_DEBUG
  719. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  720. #endif
  721. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  722. return;
  723. }
  724. static void iwl3945_bg_beacon_update(struct work_struct *work)
  725. {
  726. struct iwl_priv *priv =
  727. container_of(work, struct iwl_priv, beacon_update);
  728. struct sk_buff *beacon;
  729. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  730. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  731. if (!beacon) {
  732. IWL_ERR(priv, "update beacon failed\n");
  733. return;
  734. }
  735. mutex_lock(&priv->mutex);
  736. /* new beacon skb is allocated every time; dispose previous.*/
  737. if (priv->ibss_beacon)
  738. dev_kfree_skb(priv->ibss_beacon);
  739. priv->ibss_beacon = beacon;
  740. mutex_unlock(&priv->mutex);
  741. iwl3945_send_beacon_cmd(priv);
  742. }
  743. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  744. struct iwl_rx_mem_buffer *rxb)
  745. {
  746. #ifdef CONFIG_IWLWIFI_DEBUG
  747. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  748. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  749. u8 rate = beacon->beacon_notify_hdr.rate;
  750. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  751. "tsf %d %d rate %d\n",
  752. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  753. beacon->beacon_notify_hdr.failure_frame,
  754. le32_to_cpu(beacon->ibss_mgr_status),
  755. le32_to_cpu(beacon->high_tsf),
  756. le32_to_cpu(beacon->low_tsf), rate);
  757. #endif
  758. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  759. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  760. queue_work(priv->workqueue, &priv->beacon_update);
  761. }
  762. /* Handle notification from uCode that card's power state is changing
  763. * due to software, hardware, or critical temperature RFKILL */
  764. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  765. struct iwl_rx_mem_buffer *rxb)
  766. {
  767. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  768. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  769. unsigned long status = priv->status;
  770. IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
  771. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  772. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  773. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  774. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  775. if (flags & HW_CARD_DISABLED)
  776. set_bit(STATUS_RF_KILL_HW, &priv->status);
  777. else
  778. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  779. iwl_scan_cancel(priv);
  780. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  781. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  782. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  783. test_bit(STATUS_RF_KILL_HW, &priv->status));
  784. else
  785. wake_up_interruptible(&priv->wait_command_queue);
  786. }
  787. /**
  788. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  789. *
  790. * Setup the RX handlers for each of the reply types sent from the uCode
  791. * to the host.
  792. *
  793. * This function chains into the hardware specific files for them to setup
  794. * any hardware specific handlers as well.
  795. */
  796. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  797. {
  798. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  799. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  800. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  801. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  802. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  803. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  804. iwl_rx_pm_debug_statistics_notif;
  805. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  806. /*
  807. * The same handler is used for both the REPLY to a discrete
  808. * statistics request from the host as well as for the periodic
  809. * statistics notifications (after received beacons) from the uCode.
  810. */
  811. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  812. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  813. iwl_setup_spectrum_handlers(priv);
  814. iwl_setup_rx_scan_handlers(priv);
  815. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  816. /* Set up hardware specific Rx handlers */
  817. iwl3945_hw_rx_handler_setup(priv);
  818. }
  819. /************************** RX-FUNCTIONS ****************************/
  820. /*
  821. * Rx theory of operation
  822. *
  823. * The host allocates 32 DMA target addresses and passes the host address
  824. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  825. * 0 to 31
  826. *
  827. * Rx Queue Indexes
  828. * The host/firmware share two index registers for managing the Rx buffers.
  829. *
  830. * The READ index maps to the first position that the firmware may be writing
  831. * to -- the driver can read up to (but not including) this position and get
  832. * good data.
  833. * The READ index is managed by the firmware once the card is enabled.
  834. *
  835. * The WRITE index maps to the last position the driver has read from -- the
  836. * position preceding WRITE is the last slot the firmware can place a packet.
  837. *
  838. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  839. * WRITE = READ.
  840. *
  841. * During initialization, the host sets up the READ queue position to the first
  842. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  843. *
  844. * When the firmware places a packet in a buffer, it will advance the READ index
  845. * and fire the RX interrupt. The driver can then query the READ index and
  846. * process as many packets as possible, moving the WRITE index forward as it
  847. * resets the Rx queue buffers with new memory.
  848. *
  849. * The management in the driver is as follows:
  850. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  851. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  852. * to replenish the iwl->rxq->rx_free.
  853. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  854. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  855. * 'processed' and 'read' driver indexes as well)
  856. * + A received packet is processed and handed to the kernel network stack,
  857. * detached from the iwl->rxq. The driver 'processed' index is updated.
  858. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  859. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  860. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  861. * were enough free buffers and RX_STALLED is set it is cleared.
  862. *
  863. *
  864. * Driver sequence:
  865. *
  866. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  867. * iwl3945_rx_queue_restock
  868. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  869. * queue, updates firmware pointers, and updates
  870. * the WRITE index. If insufficient rx_free buffers
  871. * are available, schedules iwl3945_rx_replenish
  872. *
  873. * -- enable interrupts --
  874. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  875. * READ INDEX, detaching the SKB from the pool.
  876. * Moves the packet buffer from queue to rx_used.
  877. * Calls iwl3945_rx_queue_restock to refill any empty
  878. * slots.
  879. * ...
  880. *
  881. */
  882. /**
  883. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  884. */
  885. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  886. dma_addr_t dma_addr)
  887. {
  888. return cpu_to_le32((u32)dma_addr);
  889. }
  890. /**
  891. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  892. *
  893. * If there are slots in the RX queue that need to be restocked,
  894. * and we have free pre-allocated buffers, fill the ranks as much
  895. * as we can, pulling from rx_free.
  896. *
  897. * This moves the 'write' index forward to catch up with 'processed', and
  898. * also updates the memory address in the firmware to reference the new
  899. * target buffer.
  900. */
  901. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  902. {
  903. struct iwl_rx_queue *rxq = &priv->rxq;
  904. struct list_head *element;
  905. struct iwl_rx_mem_buffer *rxb;
  906. unsigned long flags;
  907. int write, rc;
  908. spin_lock_irqsave(&rxq->lock, flags);
  909. write = rxq->write & ~0x7;
  910. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  911. /* Get next free Rx buffer, remove from free list */
  912. element = rxq->rx_free.next;
  913. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  914. list_del(element);
  915. /* Point to Rx buffer via next RBD in circular buffer */
  916. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  917. rxq->queue[rxq->write] = rxb;
  918. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  919. rxq->free_count--;
  920. }
  921. spin_unlock_irqrestore(&rxq->lock, flags);
  922. /* If the pre-allocated buffer pool is dropping low, schedule to
  923. * refill it */
  924. if (rxq->free_count <= RX_LOW_WATERMARK)
  925. queue_work(priv->workqueue, &priv->rx_replenish);
  926. /* If we've added more space for the firmware to place data, tell it.
  927. * Increment device's write pointer in multiples of 8. */
  928. if ((rxq->write_actual != (rxq->write & ~0x7))
  929. || (abs(rxq->write - rxq->read) > 7)) {
  930. spin_lock_irqsave(&rxq->lock, flags);
  931. rxq->need_update = 1;
  932. spin_unlock_irqrestore(&rxq->lock, flags);
  933. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  934. if (rc)
  935. return rc;
  936. }
  937. return 0;
  938. }
  939. /**
  940. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  941. *
  942. * When moving to rx_free an SKB is allocated for the slot.
  943. *
  944. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  945. * This is called as a scheduled work item (except for during initialization)
  946. */
  947. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  948. {
  949. struct iwl_rx_queue *rxq = &priv->rxq;
  950. struct list_head *element;
  951. struct iwl_rx_mem_buffer *rxb;
  952. struct sk_buff *skb;
  953. unsigned long flags;
  954. while (1) {
  955. spin_lock_irqsave(&rxq->lock, flags);
  956. if (list_empty(&rxq->rx_used)) {
  957. spin_unlock_irqrestore(&rxq->lock, flags);
  958. return;
  959. }
  960. spin_unlock_irqrestore(&rxq->lock, flags);
  961. if (rxq->free_count > RX_LOW_WATERMARK)
  962. priority |= __GFP_NOWARN;
  963. /* Alloc a new receive buffer */
  964. skb = alloc_skb(priv->hw_params.rx_buf_size, priority);
  965. if (!skb) {
  966. if (net_ratelimit())
  967. IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
  968. if ((rxq->free_count <= RX_LOW_WATERMARK) &&
  969. net_ratelimit())
  970. IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  971. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  972. rxq->free_count);
  973. /* We don't reschedule replenish work here -- we will
  974. * call the restock method and if it still needs
  975. * more buffers it will schedule replenish */
  976. break;
  977. }
  978. spin_lock_irqsave(&rxq->lock, flags);
  979. if (list_empty(&rxq->rx_used)) {
  980. spin_unlock_irqrestore(&rxq->lock, flags);
  981. dev_kfree_skb_any(skb);
  982. return;
  983. }
  984. element = rxq->rx_used.next;
  985. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  986. list_del(element);
  987. spin_unlock_irqrestore(&rxq->lock, flags);
  988. rxb->skb = skb;
  989. /* If radiotap head is required, reserve some headroom here.
  990. * The physical head count is a variable rx_stats->phy_count.
  991. * We reserve 4 bytes here. Plus these extra bytes, the
  992. * headroom of the physical head should be enough for the
  993. * radiotap head that iwl3945 supported. See iwl3945_rt.
  994. */
  995. skb_reserve(rxb->skb, 4);
  996. /* Get physical address of RB/SKB */
  997. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  998. rxb->skb->data,
  999. priv->hw_params.rx_buf_size,
  1000. PCI_DMA_FROMDEVICE);
  1001. spin_lock_irqsave(&rxq->lock, flags);
  1002. list_add_tail(&rxb->list, &rxq->rx_free);
  1003. priv->alloc_rxb_skb++;
  1004. rxq->free_count++;
  1005. spin_unlock_irqrestore(&rxq->lock, flags);
  1006. }
  1007. }
  1008. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1009. {
  1010. unsigned long flags;
  1011. int i;
  1012. spin_lock_irqsave(&rxq->lock, flags);
  1013. INIT_LIST_HEAD(&rxq->rx_free);
  1014. INIT_LIST_HEAD(&rxq->rx_used);
  1015. /* Fill the rx_used queue with _all_ of the Rx buffers */
  1016. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  1017. /* In the reset function, these buffers may have been allocated
  1018. * to an SKB, so we need to unmap and free potential storage */
  1019. if (rxq->pool[i].skb != NULL) {
  1020. pci_unmap_single(priv->pci_dev,
  1021. rxq->pool[i].real_dma_addr,
  1022. priv->hw_params.rx_buf_size,
  1023. PCI_DMA_FROMDEVICE);
  1024. priv->alloc_rxb_skb--;
  1025. dev_kfree_skb(rxq->pool[i].skb);
  1026. rxq->pool[i].skb = NULL;
  1027. }
  1028. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  1029. }
  1030. /* Set us so that we have processed and used all buffers, but have
  1031. * not restocked the Rx queue with fresh buffers */
  1032. rxq->read = rxq->write = 0;
  1033. rxq->free_count = 0;
  1034. rxq->write_actual = 0;
  1035. spin_unlock_irqrestore(&rxq->lock, flags);
  1036. }
  1037. void iwl3945_rx_replenish(void *data)
  1038. {
  1039. struct iwl_priv *priv = data;
  1040. unsigned long flags;
  1041. iwl3945_rx_allocate(priv, GFP_KERNEL);
  1042. spin_lock_irqsave(&priv->lock, flags);
  1043. iwl3945_rx_queue_restock(priv);
  1044. spin_unlock_irqrestore(&priv->lock, flags);
  1045. }
  1046. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  1047. {
  1048. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  1049. iwl3945_rx_queue_restock(priv);
  1050. }
  1051. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1052. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1053. * This free routine walks the list of POOL entries and if SKB is set to
  1054. * non NULL it is unmapped and freed
  1055. */
  1056. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1057. {
  1058. int i;
  1059. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1060. if (rxq->pool[i].skb != NULL) {
  1061. pci_unmap_single(priv->pci_dev,
  1062. rxq->pool[i].real_dma_addr,
  1063. priv->hw_params.rx_buf_size,
  1064. PCI_DMA_FROMDEVICE);
  1065. dev_kfree_skb(rxq->pool[i].skb);
  1066. }
  1067. }
  1068. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1069. rxq->dma_addr);
  1070. pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
  1071. rxq->rb_stts, rxq->rb_stts_dma);
  1072. rxq->bd = NULL;
  1073. rxq->rb_stts = NULL;
  1074. }
  1075. /* Convert linear signal-to-noise ratio into dB */
  1076. static u8 ratio2dB[100] = {
  1077. /* 0 1 2 3 4 5 6 7 8 9 */
  1078. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1079. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1080. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1081. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1082. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1083. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1084. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1085. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1086. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1087. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1088. };
  1089. /* Calculates a relative dB value from a ratio of linear
  1090. * (i.e. not dB) signal levels.
  1091. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1092. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1093. {
  1094. /* 1000:1 or higher just report as 60 dB */
  1095. if (sig_ratio >= 1000)
  1096. return 60;
  1097. /* 100:1 or higher, divide by 10 and use table,
  1098. * add 20 dB to make up for divide by 10 */
  1099. if (sig_ratio >= 100)
  1100. return 20 + (int)ratio2dB[sig_ratio/10];
  1101. /* We shouldn't see this */
  1102. if (sig_ratio < 1)
  1103. return 0;
  1104. /* Use table for ratios 1:1 - 99:1 */
  1105. return (int)ratio2dB[sig_ratio];
  1106. }
  1107. #define PERFECT_RSSI (-20) /* dBm */
  1108. #define WORST_RSSI (-95) /* dBm */
  1109. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  1110. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  1111. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  1112. * about formulas used below. */
  1113. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  1114. {
  1115. int sig_qual;
  1116. int degradation = PERFECT_RSSI - rssi_dbm;
  1117. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  1118. * as indicator; formula is (signal dbm - noise dbm).
  1119. * SNR at or above 40 is a great signal (100%).
  1120. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  1121. * Weakest usable signal is usually 10 - 15 dB SNR. */
  1122. if (noise_dbm) {
  1123. if (rssi_dbm - noise_dbm >= 40)
  1124. return 100;
  1125. else if (rssi_dbm < noise_dbm)
  1126. return 0;
  1127. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  1128. /* Else use just the signal level.
  1129. * This formula is a least squares fit of data points collected and
  1130. * compared with a reference system that had a percentage (%) display
  1131. * for signal quality. */
  1132. } else
  1133. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  1134. (15 * RSSI_RANGE + 62 * degradation)) /
  1135. (RSSI_RANGE * RSSI_RANGE);
  1136. if (sig_qual > 100)
  1137. sig_qual = 100;
  1138. else if (sig_qual < 1)
  1139. sig_qual = 0;
  1140. return sig_qual;
  1141. }
  1142. /**
  1143. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1144. *
  1145. * Uses the priv->rx_handlers callback function array to invoke
  1146. * the appropriate handlers, including command responses,
  1147. * frame-received notifications, and other notifications.
  1148. */
  1149. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1150. {
  1151. struct iwl_rx_mem_buffer *rxb;
  1152. struct iwl_rx_packet *pkt;
  1153. struct iwl_rx_queue *rxq = &priv->rxq;
  1154. u32 r, i;
  1155. int reclaim;
  1156. unsigned long flags;
  1157. u8 fill_rx = 0;
  1158. u32 count = 8;
  1159. int total_empty = 0;
  1160. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1161. * buffer that the driver may process (last buffer filled by ucode). */
  1162. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1163. i = rxq->read;
  1164. /* calculate total frames need to be restock after handling RX */
  1165. total_empty = r - priv->rxq.write_actual;
  1166. if (total_empty < 0)
  1167. total_empty += RX_QUEUE_SIZE;
  1168. if (total_empty > (RX_QUEUE_SIZE / 2))
  1169. fill_rx = 1;
  1170. /* Rx interrupt, but nothing sent from uCode */
  1171. if (i == r)
  1172. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  1173. while (i != r) {
  1174. rxb = rxq->queue[i];
  1175. /* If an RXB doesn't have a Rx queue slot associated with it,
  1176. * then a bug has been introduced in the queue refilling
  1177. * routines -- catch it here */
  1178. BUG_ON(rxb == NULL);
  1179. rxq->queue[i] = NULL;
  1180. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  1181. priv->hw_params.rx_buf_size,
  1182. PCI_DMA_FROMDEVICE);
  1183. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1184. /* Reclaim a command buffer only if this packet is a response
  1185. * to a (driver-originated) command.
  1186. * If the packet (e.g. Rx frame) originated from uCode,
  1187. * there is no command buffer to reclaim.
  1188. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1189. * but apparently a few don't get set; catch them here. */
  1190. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1191. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1192. (pkt->hdr.cmd != REPLY_TX);
  1193. /* Based on type of command response or notification,
  1194. * handle those that need handling via function in
  1195. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1196. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1197. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1198. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1199. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1200. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1201. } else {
  1202. /* No handling needed */
  1203. IWL_DEBUG_RX(priv, "r %d i %d No handler needed for %s, 0x%02x\n",
  1204. r, i, get_cmd_string(pkt->hdr.cmd),
  1205. pkt->hdr.cmd);
  1206. }
  1207. if (reclaim) {
  1208. /* Invoke any callbacks, transfer the skb to caller, and
  1209. * fire off the (possibly) blocking iwl_send_cmd()
  1210. * as we reclaim the driver command queue */
  1211. if (rxb && rxb->skb)
  1212. iwl_tx_cmd_complete(priv, rxb);
  1213. else
  1214. IWL_WARN(priv, "Claim null rxb?\n");
  1215. }
  1216. /* For now we just don't re-use anything. We can tweak this
  1217. * later to try and re-use notification packets and SKBs that
  1218. * fail to Rx correctly */
  1219. if (rxb->skb != NULL) {
  1220. priv->alloc_rxb_skb--;
  1221. dev_kfree_skb_any(rxb->skb);
  1222. rxb->skb = NULL;
  1223. }
  1224. spin_lock_irqsave(&rxq->lock, flags);
  1225. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  1226. spin_unlock_irqrestore(&rxq->lock, flags);
  1227. i = (i + 1) & RX_QUEUE_MASK;
  1228. /* If there are a lot of unused frames,
  1229. * restock the Rx queue so ucode won't assert. */
  1230. if (fill_rx) {
  1231. count++;
  1232. if (count >= 8) {
  1233. priv->rxq.read = i;
  1234. iwl3945_rx_replenish_now(priv);
  1235. count = 0;
  1236. }
  1237. }
  1238. }
  1239. /* Backtrack one entry */
  1240. priv->rxq.read = i;
  1241. if (fill_rx)
  1242. iwl3945_rx_replenish_now(priv);
  1243. else
  1244. iwl3945_rx_queue_restock(priv);
  1245. }
  1246. /* call this function to flush any scheduled tasklet */
  1247. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1248. {
  1249. /* wait to make sure we flush pending tasklet*/
  1250. synchronize_irq(priv->pci_dev->irq);
  1251. tasklet_kill(&priv->irq_tasklet);
  1252. }
  1253. #ifdef CONFIG_IWLWIFI_DEBUG
  1254. static const char *desc_lookup(int i)
  1255. {
  1256. switch (i) {
  1257. case 1:
  1258. return "FAIL";
  1259. case 2:
  1260. return "BAD_PARAM";
  1261. case 3:
  1262. return "BAD_CHECKSUM";
  1263. case 4:
  1264. return "NMI_INTERRUPT";
  1265. case 5:
  1266. return "SYSASSERT";
  1267. case 6:
  1268. return "FATAL_ERROR";
  1269. }
  1270. return "UNKNOWN";
  1271. }
  1272. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1273. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1274. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1275. {
  1276. u32 i;
  1277. u32 desc, time, count, base, data1;
  1278. u32 blink1, blink2, ilink1, ilink2;
  1279. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1280. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1281. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1282. return;
  1283. }
  1284. count = iwl_read_targ_mem(priv, base);
  1285. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1286. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1287. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1288. priv->status, count);
  1289. }
  1290. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1291. "ilink1 nmiPC Line\n");
  1292. for (i = ERROR_START_OFFSET;
  1293. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1294. i += ERROR_ELEM_SIZE) {
  1295. desc = iwl_read_targ_mem(priv, base + i);
  1296. time =
  1297. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1298. blink1 =
  1299. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1300. blink2 =
  1301. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1302. ilink1 =
  1303. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1304. ilink2 =
  1305. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1306. data1 =
  1307. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1308. IWL_ERR(priv,
  1309. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1310. desc_lookup(desc), desc, time, blink1, blink2,
  1311. ilink1, ilink2, data1);
  1312. }
  1313. }
  1314. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1315. /**
  1316. * iwl3945_print_event_log - Dump error event log to syslog
  1317. *
  1318. */
  1319. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1320. u32 num_events, u32 mode)
  1321. {
  1322. u32 i;
  1323. u32 base; /* SRAM byte address of event log header */
  1324. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1325. u32 ptr; /* SRAM byte address of log data */
  1326. u32 ev, time, data; /* event log data */
  1327. if (num_events == 0)
  1328. return;
  1329. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1330. if (mode == 0)
  1331. event_size = 2 * sizeof(u32);
  1332. else
  1333. event_size = 3 * sizeof(u32);
  1334. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1335. /* "time" is actually "data" for mode 0 (no timestamp).
  1336. * place event id # at far right for easier visual parsing. */
  1337. for (i = 0; i < num_events; i++) {
  1338. ev = iwl_read_targ_mem(priv, ptr);
  1339. ptr += sizeof(u32);
  1340. time = iwl_read_targ_mem(priv, ptr);
  1341. ptr += sizeof(u32);
  1342. if (mode == 0) {
  1343. /* data, ev */
  1344. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1345. } else {
  1346. data = iwl_read_targ_mem(priv, ptr);
  1347. ptr += sizeof(u32);
  1348. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  1349. }
  1350. }
  1351. }
  1352. void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1353. {
  1354. u32 base; /* SRAM byte address of event log header */
  1355. u32 capacity; /* event log capacity in # entries */
  1356. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1357. u32 num_wraps; /* # times uCode wrapped to top of log */
  1358. u32 next_entry; /* index of next entry to be written by uCode */
  1359. u32 size; /* # entries that we'll print */
  1360. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1361. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1362. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1363. return;
  1364. }
  1365. /* event log header */
  1366. capacity = iwl_read_targ_mem(priv, base);
  1367. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1368. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1369. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1370. size = num_wraps ? capacity : next_entry;
  1371. /* bail out if nothing in log */
  1372. if (size == 0) {
  1373. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1374. return;
  1375. }
  1376. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  1377. size, num_wraps);
  1378. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1379. * i.e the next one that uCode would fill. */
  1380. if (num_wraps)
  1381. iwl3945_print_event_log(priv, next_entry,
  1382. capacity - next_entry, mode);
  1383. /* (then/else) start at top of log */
  1384. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1385. }
  1386. #else
  1387. void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1388. {
  1389. }
  1390. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1391. {
  1392. }
  1393. #endif
  1394. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1395. {
  1396. u32 inta, handled = 0;
  1397. u32 inta_fh;
  1398. unsigned long flags;
  1399. #ifdef CONFIG_IWLWIFI_DEBUG
  1400. u32 inta_mask;
  1401. #endif
  1402. spin_lock_irqsave(&priv->lock, flags);
  1403. /* Ack/clear/reset pending uCode interrupts.
  1404. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1405. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1406. inta = iwl_read32(priv, CSR_INT);
  1407. iwl_write32(priv, CSR_INT, inta);
  1408. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1409. * Any new interrupts that happen after this, either while we're
  1410. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1411. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1412. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1413. #ifdef CONFIG_IWLWIFI_DEBUG
  1414. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  1415. /* just for debug */
  1416. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1417. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1418. inta, inta_mask, inta_fh);
  1419. }
  1420. #endif
  1421. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1422. * atomic, make sure that inta covers all the interrupts that
  1423. * we've discovered, even if FH interrupt came in just after
  1424. * reading CSR_INT. */
  1425. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1426. inta |= CSR_INT_BIT_FH_RX;
  1427. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1428. inta |= CSR_INT_BIT_FH_TX;
  1429. /* Now service all interrupt bits discovered above. */
  1430. if (inta & CSR_INT_BIT_HW_ERR) {
  1431. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  1432. /* Tell the device to stop sending interrupts */
  1433. iwl_disable_interrupts(priv);
  1434. priv->isr_stats.hw++;
  1435. iwl_irq_handle_error(priv);
  1436. handled |= CSR_INT_BIT_HW_ERR;
  1437. spin_unlock_irqrestore(&priv->lock, flags);
  1438. return;
  1439. }
  1440. #ifdef CONFIG_IWLWIFI_DEBUG
  1441. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1442. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1443. if (inta & CSR_INT_BIT_SCD) {
  1444. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1445. "the frame/frames.\n");
  1446. priv->isr_stats.sch++;
  1447. }
  1448. /* Alive notification via Rx interrupt will do the real work */
  1449. if (inta & CSR_INT_BIT_ALIVE) {
  1450. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1451. priv->isr_stats.alive++;
  1452. }
  1453. }
  1454. #endif
  1455. /* Safely ignore these bits for debug checks below */
  1456. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1457. /* Error detected by uCode */
  1458. if (inta & CSR_INT_BIT_SW_ERR) {
  1459. IWL_ERR(priv, "Microcode SW error detected. "
  1460. "Restarting 0x%X.\n", inta);
  1461. priv->isr_stats.sw++;
  1462. priv->isr_stats.sw_err = inta;
  1463. iwl_irq_handle_error(priv);
  1464. handled |= CSR_INT_BIT_SW_ERR;
  1465. }
  1466. /* uCode wakes up after power-down sleep */
  1467. if (inta & CSR_INT_BIT_WAKEUP) {
  1468. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1469. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1470. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1471. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1472. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1473. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1474. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1475. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1476. priv->isr_stats.wakeup++;
  1477. handled |= CSR_INT_BIT_WAKEUP;
  1478. }
  1479. /* All uCode command responses, including Tx command responses,
  1480. * Rx "responses" (frame-received notification), and other
  1481. * notifications from uCode come through here*/
  1482. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1483. iwl3945_rx_handle(priv);
  1484. priv->isr_stats.rx++;
  1485. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1486. }
  1487. if (inta & CSR_INT_BIT_FH_TX) {
  1488. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1489. priv->isr_stats.tx++;
  1490. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1491. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1492. (FH39_SRVC_CHNL), 0x0);
  1493. handled |= CSR_INT_BIT_FH_TX;
  1494. }
  1495. if (inta & ~handled) {
  1496. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1497. priv->isr_stats.unhandled++;
  1498. }
  1499. if (inta & ~priv->inta_mask) {
  1500. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1501. inta & ~priv->inta_mask);
  1502. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1503. }
  1504. /* Re-enable all interrupts */
  1505. /* only Re-enable if disabled by irq */
  1506. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1507. iwl_enable_interrupts(priv);
  1508. #ifdef CONFIG_IWLWIFI_DEBUG
  1509. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1510. inta = iwl_read32(priv, CSR_INT);
  1511. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1512. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1513. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1514. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1515. }
  1516. #endif
  1517. spin_unlock_irqrestore(&priv->lock, flags);
  1518. }
  1519. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1520. enum ieee80211_band band,
  1521. u8 is_active, u8 n_probes,
  1522. struct iwl3945_scan_channel *scan_ch)
  1523. {
  1524. struct ieee80211_channel *chan;
  1525. const struct ieee80211_supported_band *sband;
  1526. const struct iwl_channel_info *ch_info;
  1527. u16 passive_dwell = 0;
  1528. u16 active_dwell = 0;
  1529. int added, i;
  1530. sband = iwl_get_hw_mode(priv, band);
  1531. if (!sband)
  1532. return 0;
  1533. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1534. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1535. if (passive_dwell <= active_dwell)
  1536. passive_dwell = active_dwell + 1;
  1537. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1538. chan = priv->scan_request->channels[i];
  1539. if (chan->band != band)
  1540. continue;
  1541. scan_ch->channel = chan->hw_value;
  1542. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1543. if (!is_channel_valid(ch_info)) {
  1544. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1545. scan_ch->channel);
  1546. continue;
  1547. }
  1548. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1549. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1550. /* If passive , set up for auto-switch
  1551. * and use long active_dwell time.
  1552. */
  1553. if (!is_active || is_channel_passive(ch_info) ||
  1554. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1555. scan_ch->type = 0; /* passive */
  1556. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1557. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1558. } else {
  1559. scan_ch->type = 1; /* active */
  1560. }
  1561. /* Set direct probe bits. These may be used both for active
  1562. * scan channels (probes gets sent right away),
  1563. * or for passive channels (probes get se sent only after
  1564. * hearing clear Rx packet).*/
  1565. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1566. if (n_probes)
  1567. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1568. } else {
  1569. /* uCode v1 does not allow setting direct probe bits on
  1570. * passive channel. */
  1571. if ((scan_ch->type & 1) && n_probes)
  1572. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1573. }
  1574. /* Set txpower levels to defaults */
  1575. scan_ch->tpc.dsp_atten = 110;
  1576. /* scan_pwr_info->tpc.dsp_atten; */
  1577. /*scan_pwr_info->tpc.tx_gain; */
  1578. if (band == IEEE80211_BAND_5GHZ)
  1579. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1580. else {
  1581. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1582. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1583. * power level:
  1584. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1585. */
  1586. }
  1587. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1588. scan_ch->channel,
  1589. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1590. (scan_ch->type & 1) ?
  1591. active_dwell : passive_dwell);
  1592. scan_ch++;
  1593. added++;
  1594. }
  1595. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1596. return added;
  1597. }
  1598. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1599. struct ieee80211_rate *rates)
  1600. {
  1601. int i;
  1602. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1603. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1604. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1605. rates[i].hw_value_short = i;
  1606. rates[i].flags = 0;
  1607. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1608. /*
  1609. * If CCK != 1M then set short preamble rate flag.
  1610. */
  1611. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1612. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1613. }
  1614. }
  1615. }
  1616. /******************************************************************************
  1617. *
  1618. * uCode download functions
  1619. *
  1620. ******************************************************************************/
  1621. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1622. {
  1623. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1624. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1625. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1626. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1627. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1628. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1629. }
  1630. /**
  1631. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1632. * looking at all data.
  1633. */
  1634. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1635. {
  1636. u32 val;
  1637. u32 save_len = len;
  1638. int rc = 0;
  1639. u32 errcnt;
  1640. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1641. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1642. IWL39_RTC_INST_LOWER_BOUND);
  1643. errcnt = 0;
  1644. for (; len > 0; len -= sizeof(u32), image++) {
  1645. /* read data comes through single port, auto-incr addr */
  1646. /* NOTE: Use the debugless read so we don't flood kernel log
  1647. * if IWL_DL_IO is set */
  1648. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1649. if (val != le32_to_cpu(*image)) {
  1650. IWL_ERR(priv, "uCode INST section is invalid at "
  1651. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1652. save_len - len, val, le32_to_cpu(*image));
  1653. rc = -EIO;
  1654. errcnt++;
  1655. if (errcnt >= 20)
  1656. break;
  1657. }
  1658. }
  1659. if (!errcnt)
  1660. IWL_DEBUG_INFO(priv,
  1661. "ucode image in INSTRUCTION memory is good\n");
  1662. return rc;
  1663. }
  1664. /**
  1665. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1666. * using sample data 100 bytes apart. If these sample points are good,
  1667. * it's a pretty good bet that everything between them is good, too.
  1668. */
  1669. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1670. {
  1671. u32 val;
  1672. int rc = 0;
  1673. u32 errcnt = 0;
  1674. u32 i;
  1675. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1676. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1677. /* read data comes through single port, auto-incr addr */
  1678. /* NOTE: Use the debugless read so we don't flood kernel log
  1679. * if IWL_DL_IO is set */
  1680. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1681. i + IWL39_RTC_INST_LOWER_BOUND);
  1682. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1683. if (val != le32_to_cpu(*image)) {
  1684. #if 0 /* Enable this if you want to see details */
  1685. IWL_ERR(priv, "uCode INST section is invalid at "
  1686. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1687. i, val, *image);
  1688. #endif
  1689. rc = -EIO;
  1690. errcnt++;
  1691. if (errcnt >= 3)
  1692. break;
  1693. }
  1694. }
  1695. return rc;
  1696. }
  1697. /**
  1698. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1699. * and verify its contents
  1700. */
  1701. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1702. {
  1703. __le32 *image;
  1704. u32 len;
  1705. int rc = 0;
  1706. /* Try bootstrap */
  1707. image = (__le32 *)priv->ucode_boot.v_addr;
  1708. len = priv->ucode_boot.len;
  1709. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1710. if (rc == 0) {
  1711. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1712. return 0;
  1713. }
  1714. /* Try initialize */
  1715. image = (__le32 *)priv->ucode_init.v_addr;
  1716. len = priv->ucode_init.len;
  1717. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1718. if (rc == 0) {
  1719. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1720. return 0;
  1721. }
  1722. /* Try runtime/protocol */
  1723. image = (__le32 *)priv->ucode_code.v_addr;
  1724. len = priv->ucode_code.len;
  1725. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1726. if (rc == 0) {
  1727. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1728. return 0;
  1729. }
  1730. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1731. /* Since nothing seems to match, show first several data entries in
  1732. * instruction SRAM, so maybe visual inspection will give a clue.
  1733. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1734. image = (__le32 *)priv->ucode_boot.v_addr;
  1735. len = priv->ucode_boot.len;
  1736. rc = iwl3945_verify_inst_full(priv, image, len);
  1737. return rc;
  1738. }
  1739. static void iwl3945_nic_start(struct iwl_priv *priv)
  1740. {
  1741. /* Remove all resets to allow NIC to operate */
  1742. iwl_write32(priv, CSR_RESET, 0);
  1743. }
  1744. /**
  1745. * iwl3945_read_ucode - Read uCode images from disk file.
  1746. *
  1747. * Copy into buffers for card to fetch via bus-mastering
  1748. */
  1749. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1750. {
  1751. const struct iwl_ucode_header *ucode;
  1752. int ret = -EINVAL, index;
  1753. const struct firmware *ucode_raw;
  1754. /* firmware file name contains uCode/driver compatibility version */
  1755. const char *name_pre = priv->cfg->fw_name_pre;
  1756. const unsigned int api_max = priv->cfg->ucode_api_max;
  1757. const unsigned int api_min = priv->cfg->ucode_api_min;
  1758. char buf[25];
  1759. u8 *src;
  1760. size_t len;
  1761. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1762. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1763. * request_firmware() is synchronous, file is in memory on return. */
  1764. for (index = api_max; index >= api_min; index--) {
  1765. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1766. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1767. if (ret < 0) {
  1768. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1769. buf, ret);
  1770. if (ret == -ENOENT)
  1771. continue;
  1772. else
  1773. goto error;
  1774. } else {
  1775. if (index < api_max)
  1776. IWL_ERR(priv, "Loaded firmware %s, "
  1777. "which is deprecated. "
  1778. " Please use API v%u instead.\n",
  1779. buf, api_max);
  1780. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1781. "(%zd bytes) from disk\n",
  1782. buf, ucode_raw->size);
  1783. break;
  1784. }
  1785. }
  1786. if (ret < 0)
  1787. goto error;
  1788. /* Make sure that we got at least our header! */
  1789. if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
  1790. IWL_ERR(priv, "File size way too small!\n");
  1791. ret = -EINVAL;
  1792. goto err_release;
  1793. }
  1794. /* Data from ucode file: header followed by uCode images */
  1795. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1796. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1797. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1798. inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
  1799. data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
  1800. init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
  1801. init_data_size =
  1802. priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
  1803. boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
  1804. src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
  1805. /* api_ver should match the api version forming part of the
  1806. * firmware filename ... but we don't check for that and only rely
  1807. * on the API version read from firmware header from here on forward */
  1808. if (api_ver < api_min || api_ver > api_max) {
  1809. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1810. "Driver supports v%u, firmware is v%u.\n",
  1811. api_max, api_ver);
  1812. priv->ucode_ver = 0;
  1813. ret = -EINVAL;
  1814. goto err_release;
  1815. }
  1816. if (api_ver != api_max)
  1817. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1818. "got %u. New firmware can be obtained "
  1819. "from http://www.intellinuxwireless.org.\n",
  1820. api_max, api_ver);
  1821. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1822. IWL_UCODE_MAJOR(priv->ucode_ver),
  1823. IWL_UCODE_MINOR(priv->ucode_ver),
  1824. IWL_UCODE_API(priv->ucode_ver),
  1825. IWL_UCODE_SERIAL(priv->ucode_ver));
  1826. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1827. priv->ucode_ver);
  1828. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1829. inst_size);
  1830. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1831. data_size);
  1832. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1833. init_size);
  1834. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1835. init_data_size);
  1836. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1837. boot_size);
  1838. /* Verify size of file vs. image size info in file's header */
  1839. if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
  1840. inst_size + data_size + init_size +
  1841. init_data_size + boot_size) {
  1842. IWL_DEBUG_INFO(priv,
  1843. "uCode file size %zd does not match expected size\n",
  1844. ucode_raw->size);
  1845. ret = -EINVAL;
  1846. goto err_release;
  1847. }
  1848. /* Verify that uCode images will fit in card's SRAM */
  1849. if (inst_size > IWL39_MAX_INST_SIZE) {
  1850. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1851. inst_size);
  1852. ret = -EINVAL;
  1853. goto err_release;
  1854. }
  1855. if (data_size > IWL39_MAX_DATA_SIZE) {
  1856. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1857. data_size);
  1858. ret = -EINVAL;
  1859. goto err_release;
  1860. }
  1861. if (init_size > IWL39_MAX_INST_SIZE) {
  1862. IWL_DEBUG_INFO(priv,
  1863. "uCode init instr len %d too large to fit in\n",
  1864. init_size);
  1865. ret = -EINVAL;
  1866. goto err_release;
  1867. }
  1868. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1869. IWL_DEBUG_INFO(priv,
  1870. "uCode init data len %d too large to fit in\n",
  1871. init_data_size);
  1872. ret = -EINVAL;
  1873. goto err_release;
  1874. }
  1875. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1876. IWL_DEBUG_INFO(priv,
  1877. "uCode boot instr len %d too large to fit in\n",
  1878. boot_size);
  1879. ret = -EINVAL;
  1880. goto err_release;
  1881. }
  1882. /* Allocate ucode buffers for card's bus-master loading ... */
  1883. /* Runtime instructions and 2 copies of data:
  1884. * 1) unmodified from disk
  1885. * 2) backup cache for save/restore during power-downs */
  1886. priv->ucode_code.len = inst_size;
  1887. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1888. priv->ucode_data.len = data_size;
  1889. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1890. priv->ucode_data_backup.len = data_size;
  1891. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1892. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1893. !priv->ucode_data_backup.v_addr)
  1894. goto err_pci_alloc;
  1895. /* Initialization instructions and data */
  1896. if (init_size && init_data_size) {
  1897. priv->ucode_init.len = init_size;
  1898. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1899. priv->ucode_init_data.len = init_data_size;
  1900. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1901. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1902. goto err_pci_alloc;
  1903. }
  1904. /* Bootstrap (instructions only, no data) */
  1905. if (boot_size) {
  1906. priv->ucode_boot.len = boot_size;
  1907. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1908. if (!priv->ucode_boot.v_addr)
  1909. goto err_pci_alloc;
  1910. }
  1911. /* Copy images into buffers for card's bus-master reads ... */
  1912. /* Runtime instructions (first block of data in file) */
  1913. len = inst_size;
  1914. IWL_DEBUG_INFO(priv,
  1915. "Copying (but not loading) uCode instr len %zd\n", len);
  1916. memcpy(priv->ucode_code.v_addr, src, len);
  1917. src += len;
  1918. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1919. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1920. /* Runtime data (2nd block)
  1921. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1922. len = data_size;
  1923. IWL_DEBUG_INFO(priv,
  1924. "Copying (but not loading) uCode data len %zd\n", len);
  1925. memcpy(priv->ucode_data.v_addr, src, len);
  1926. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1927. src += len;
  1928. /* Initialization instructions (3rd block) */
  1929. if (init_size) {
  1930. len = init_size;
  1931. IWL_DEBUG_INFO(priv,
  1932. "Copying (but not loading) init instr len %zd\n", len);
  1933. memcpy(priv->ucode_init.v_addr, src, len);
  1934. src += len;
  1935. }
  1936. /* Initialization data (4th block) */
  1937. if (init_data_size) {
  1938. len = init_data_size;
  1939. IWL_DEBUG_INFO(priv,
  1940. "Copying (but not loading) init data len %zd\n", len);
  1941. memcpy(priv->ucode_init_data.v_addr, src, len);
  1942. src += len;
  1943. }
  1944. /* Bootstrap instructions (5th block) */
  1945. len = boot_size;
  1946. IWL_DEBUG_INFO(priv,
  1947. "Copying (but not loading) boot instr len %zd\n", len);
  1948. memcpy(priv->ucode_boot.v_addr, src, len);
  1949. /* We have our copies now, allow OS release its copies */
  1950. release_firmware(ucode_raw);
  1951. return 0;
  1952. err_pci_alloc:
  1953. IWL_ERR(priv, "failed to allocate pci memory\n");
  1954. ret = -ENOMEM;
  1955. iwl3945_dealloc_ucode_pci(priv);
  1956. err_release:
  1957. release_firmware(ucode_raw);
  1958. error:
  1959. return ret;
  1960. }
  1961. /**
  1962. * iwl3945_set_ucode_ptrs - Set uCode address location
  1963. *
  1964. * Tell initialization uCode where to find runtime uCode.
  1965. *
  1966. * BSM registers initially contain pointers to initialization uCode.
  1967. * We need to replace them to load runtime uCode inst and data,
  1968. * and to save runtime data when powering down.
  1969. */
  1970. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  1971. {
  1972. dma_addr_t pinst;
  1973. dma_addr_t pdata;
  1974. /* bits 31:0 for 3945 */
  1975. pinst = priv->ucode_code.p_addr;
  1976. pdata = priv->ucode_data_backup.p_addr;
  1977. /* Tell bootstrap uCode where to find image to load */
  1978. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  1979. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  1980. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  1981. priv->ucode_data.len);
  1982. /* Inst byte count must be last to set up, bit 31 signals uCode
  1983. * that all new ptr/size info is in place */
  1984. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  1985. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  1986. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  1987. return 0;
  1988. }
  1989. /**
  1990. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  1991. *
  1992. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  1993. *
  1994. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1995. */
  1996. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  1997. {
  1998. /* Check alive response for "valid" sign from uCode */
  1999. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2000. /* We had an error bringing up the hardware, so take it
  2001. * all the way back down so we can try again */
  2002. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2003. goto restart;
  2004. }
  2005. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2006. * This is a paranoid check, because we would not have gotten the
  2007. * "initialize" alive if code weren't properly loaded. */
  2008. if (iwl3945_verify_ucode(priv)) {
  2009. /* Runtime instruction load was bad;
  2010. * take it all the way back down so we can try again */
  2011. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2012. goto restart;
  2013. }
  2014. /* Send pointers to protocol/runtime uCode image ... init code will
  2015. * load and launch runtime uCode, which will send us another "Alive"
  2016. * notification. */
  2017. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2018. if (iwl3945_set_ucode_ptrs(priv)) {
  2019. /* Runtime instruction load won't happen;
  2020. * take it all the way back down so we can try again */
  2021. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2022. goto restart;
  2023. }
  2024. return;
  2025. restart:
  2026. queue_work(priv->workqueue, &priv->restart);
  2027. }
  2028. /**
  2029. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2030. * from protocol/runtime uCode (initialization uCode's
  2031. * Alive gets handled by iwl3945_init_alive_start()).
  2032. */
  2033. static void iwl3945_alive_start(struct iwl_priv *priv)
  2034. {
  2035. int thermal_spin = 0;
  2036. u32 rfkill;
  2037. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2038. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2039. /* We had an error bringing up the hardware, so take it
  2040. * all the way back down so we can try again */
  2041. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2042. goto restart;
  2043. }
  2044. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2045. * This is a paranoid check, because we would not have gotten the
  2046. * "runtime" alive if code weren't properly loaded. */
  2047. if (iwl3945_verify_ucode(priv)) {
  2048. /* Runtime instruction load was bad;
  2049. * take it all the way back down so we can try again */
  2050. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2051. goto restart;
  2052. }
  2053. iwl_clear_stations_table(priv);
  2054. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2055. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2056. if (rfkill & 0x1) {
  2057. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2058. /* if RFKILL is not on, then wait for thermal
  2059. * sensor in adapter to kick in */
  2060. while (iwl3945_hw_get_temperature(priv) == 0) {
  2061. thermal_spin++;
  2062. udelay(10);
  2063. }
  2064. if (thermal_spin)
  2065. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2066. thermal_spin * 10);
  2067. } else
  2068. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2069. /* After the ALIVE response, we can send commands to 3945 uCode */
  2070. set_bit(STATUS_ALIVE, &priv->status);
  2071. if (iwl_is_rfkill(priv))
  2072. return;
  2073. ieee80211_wake_queues(priv->hw);
  2074. priv->active_rate = priv->rates_mask;
  2075. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2076. iwl_power_update_mode(priv, false);
  2077. if (iwl_is_associated(priv)) {
  2078. struct iwl3945_rxon_cmd *active_rxon =
  2079. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2080. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2081. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2082. } else {
  2083. /* Initialize our rx_config data */
  2084. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2085. }
  2086. /* Configure Bluetooth device coexistence support */
  2087. iwl_send_bt_config(priv);
  2088. /* Configure the adapter for unassociated operation */
  2089. iwlcore_commit_rxon(priv);
  2090. iwl3945_reg_txpower_periodic(priv);
  2091. iwl3945_led_register(priv);
  2092. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2093. set_bit(STATUS_READY, &priv->status);
  2094. wake_up_interruptible(&priv->wait_command_queue);
  2095. /* reassociate for ADHOC mode */
  2096. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2097. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2098. priv->vif);
  2099. if (beacon)
  2100. iwl_mac_beacon_update(priv->hw, beacon);
  2101. }
  2102. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2103. iwl_set_mode(priv, priv->iw_mode);
  2104. return;
  2105. restart:
  2106. queue_work(priv->workqueue, &priv->restart);
  2107. }
  2108. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2109. static void __iwl3945_down(struct iwl_priv *priv)
  2110. {
  2111. unsigned long flags;
  2112. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2113. struct ieee80211_conf *conf = NULL;
  2114. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2115. conf = ieee80211_get_hw_conf(priv->hw);
  2116. if (!exit_pending)
  2117. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2118. iwl3945_led_unregister(priv);
  2119. iwl_clear_stations_table(priv);
  2120. /* Unblock any waiting calls */
  2121. wake_up_interruptible_all(&priv->wait_command_queue);
  2122. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2123. * exiting the module */
  2124. if (!exit_pending)
  2125. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2126. /* stop and reset the on-board processor */
  2127. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2128. /* tell the device to stop sending interrupts */
  2129. spin_lock_irqsave(&priv->lock, flags);
  2130. iwl_disable_interrupts(priv);
  2131. spin_unlock_irqrestore(&priv->lock, flags);
  2132. iwl_synchronize_irq(priv);
  2133. if (priv->mac80211_registered)
  2134. ieee80211_stop_queues(priv->hw);
  2135. /* If we have not previously called iwl3945_init() then
  2136. * clear all bits but the RF Kill bits and return */
  2137. if (!iwl_is_init(priv)) {
  2138. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2139. STATUS_RF_KILL_HW |
  2140. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2141. STATUS_GEO_CONFIGURED |
  2142. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2143. STATUS_EXIT_PENDING;
  2144. goto exit;
  2145. }
  2146. /* ...otherwise clear out all the status bits but the RF Kill
  2147. * bit and continue taking the NIC down. */
  2148. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2149. STATUS_RF_KILL_HW |
  2150. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2151. STATUS_GEO_CONFIGURED |
  2152. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2153. STATUS_FW_ERROR |
  2154. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2155. STATUS_EXIT_PENDING;
  2156. priv->cfg->ops->lib->apm_ops.reset(priv);
  2157. spin_lock_irqsave(&priv->lock, flags);
  2158. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2159. spin_unlock_irqrestore(&priv->lock, flags);
  2160. iwl3945_hw_txq_ctx_stop(priv);
  2161. iwl3945_hw_rxq_stop(priv);
  2162. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  2163. APMG_CLK_VAL_DMA_CLK_RQT);
  2164. udelay(5);
  2165. if (exit_pending)
  2166. priv->cfg->ops->lib->apm_ops.stop(priv);
  2167. else
  2168. priv->cfg->ops->lib->apm_ops.reset(priv);
  2169. exit:
  2170. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2171. if (priv->ibss_beacon)
  2172. dev_kfree_skb(priv->ibss_beacon);
  2173. priv->ibss_beacon = NULL;
  2174. /* clear out any free frames */
  2175. iwl3945_clear_free_frames(priv);
  2176. }
  2177. static void iwl3945_down(struct iwl_priv *priv)
  2178. {
  2179. mutex_lock(&priv->mutex);
  2180. __iwl3945_down(priv);
  2181. mutex_unlock(&priv->mutex);
  2182. iwl3945_cancel_deferred_work(priv);
  2183. }
  2184. #define MAX_HW_RESTARTS 5
  2185. static int __iwl3945_up(struct iwl_priv *priv)
  2186. {
  2187. int rc, i;
  2188. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2189. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2190. return -EIO;
  2191. }
  2192. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2193. IWL_ERR(priv, "ucode not available for device bring up\n");
  2194. return -EIO;
  2195. }
  2196. /* If platform's RF_KILL switch is NOT set to KILL */
  2197. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2198. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2199. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2200. else {
  2201. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2202. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2203. return -ENODEV;
  2204. }
  2205. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2206. rc = iwl3945_hw_nic_init(priv);
  2207. if (rc) {
  2208. IWL_ERR(priv, "Unable to int nic\n");
  2209. return rc;
  2210. }
  2211. /* make sure rfkill handshake bits are cleared */
  2212. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2213. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2214. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2215. /* clear (again), then enable host interrupts */
  2216. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2217. iwl_enable_interrupts(priv);
  2218. /* really make sure rfkill handshake bits are cleared */
  2219. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2220. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2221. /* Copy original ucode data image from disk into backup cache.
  2222. * This will be used to initialize the on-board processor's
  2223. * data SRAM for a clean start when the runtime program first loads. */
  2224. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2225. priv->ucode_data.len);
  2226. /* We return success when we resume from suspend and rf_kill is on. */
  2227. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2228. return 0;
  2229. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2230. iwl_clear_stations_table(priv);
  2231. /* load bootstrap state machine,
  2232. * load bootstrap program into processor's memory,
  2233. * prepare to load the "initialize" uCode */
  2234. priv->cfg->ops->lib->load_ucode(priv);
  2235. if (rc) {
  2236. IWL_ERR(priv,
  2237. "Unable to set up bootstrap uCode: %d\n", rc);
  2238. continue;
  2239. }
  2240. /* start card; "initialize" will load runtime ucode */
  2241. iwl3945_nic_start(priv);
  2242. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2243. return 0;
  2244. }
  2245. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2246. __iwl3945_down(priv);
  2247. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2248. /* tried to restart and config the device for as long as our
  2249. * patience could withstand */
  2250. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2251. return -EIO;
  2252. }
  2253. /*****************************************************************************
  2254. *
  2255. * Workqueue callbacks
  2256. *
  2257. *****************************************************************************/
  2258. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2259. {
  2260. struct iwl_priv *priv =
  2261. container_of(data, struct iwl_priv, init_alive_start.work);
  2262. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2263. return;
  2264. mutex_lock(&priv->mutex);
  2265. iwl3945_init_alive_start(priv);
  2266. mutex_unlock(&priv->mutex);
  2267. }
  2268. static void iwl3945_bg_alive_start(struct work_struct *data)
  2269. {
  2270. struct iwl_priv *priv =
  2271. container_of(data, struct iwl_priv, alive_start.work);
  2272. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2273. return;
  2274. mutex_lock(&priv->mutex);
  2275. iwl3945_alive_start(priv);
  2276. mutex_unlock(&priv->mutex);
  2277. }
  2278. static void iwl3945_rfkill_poll(struct work_struct *data)
  2279. {
  2280. struct iwl_priv *priv =
  2281. container_of(data, struct iwl_priv, rfkill_poll.work);
  2282. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2283. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2284. else
  2285. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2286. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  2287. test_bit(STATUS_RF_KILL_HW, &priv->status));
  2288. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2289. round_jiffies_relative(2 * HZ));
  2290. }
  2291. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2292. static void iwl3945_bg_request_scan(struct work_struct *data)
  2293. {
  2294. struct iwl_priv *priv =
  2295. container_of(data, struct iwl_priv, request_scan);
  2296. struct iwl_host_cmd cmd = {
  2297. .id = REPLY_SCAN_CMD,
  2298. .len = sizeof(struct iwl3945_scan_cmd),
  2299. .flags = CMD_SIZE_HUGE,
  2300. };
  2301. int rc = 0;
  2302. struct iwl3945_scan_cmd *scan;
  2303. struct ieee80211_conf *conf = NULL;
  2304. u8 n_probes = 0;
  2305. enum ieee80211_band band;
  2306. bool is_active = false;
  2307. conf = ieee80211_get_hw_conf(priv->hw);
  2308. mutex_lock(&priv->mutex);
  2309. cancel_delayed_work(&priv->scan_check);
  2310. if (!iwl_is_ready(priv)) {
  2311. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2312. goto done;
  2313. }
  2314. /* Make sure the scan wasn't canceled before this queued work
  2315. * was given the chance to run... */
  2316. if (!test_bit(STATUS_SCANNING, &priv->status))
  2317. goto done;
  2318. /* This should never be called or scheduled if there is currently
  2319. * a scan active in the hardware. */
  2320. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2321. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2322. "Ignoring second request.\n");
  2323. rc = -EIO;
  2324. goto done;
  2325. }
  2326. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2327. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2328. goto done;
  2329. }
  2330. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2331. IWL_DEBUG_HC(priv,
  2332. "Scan request while abort pending. Queuing.\n");
  2333. goto done;
  2334. }
  2335. if (iwl_is_rfkill(priv)) {
  2336. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2337. goto done;
  2338. }
  2339. if (!test_bit(STATUS_READY, &priv->status)) {
  2340. IWL_DEBUG_HC(priv,
  2341. "Scan request while uninitialized. Queuing.\n");
  2342. goto done;
  2343. }
  2344. if (!priv->scan_bands) {
  2345. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2346. goto done;
  2347. }
  2348. if (!priv->scan) {
  2349. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2350. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2351. if (!priv->scan) {
  2352. rc = -ENOMEM;
  2353. goto done;
  2354. }
  2355. }
  2356. scan = priv->scan;
  2357. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2358. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2359. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2360. if (iwl_is_associated(priv)) {
  2361. u16 interval = 0;
  2362. u32 extra;
  2363. u32 suspend_time = 100;
  2364. u32 scan_suspend_time = 100;
  2365. unsigned long flags;
  2366. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2367. spin_lock_irqsave(&priv->lock, flags);
  2368. interval = priv->beacon_int;
  2369. spin_unlock_irqrestore(&priv->lock, flags);
  2370. scan->suspend_time = 0;
  2371. scan->max_out_time = cpu_to_le32(200 * 1024);
  2372. if (!interval)
  2373. interval = suspend_time;
  2374. /*
  2375. * suspend time format:
  2376. * 0-19: beacon interval in usec (time before exec.)
  2377. * 20-23: 0
  2378. * 24-31: number of beacons (suspend between channels)
  2379. */
  2380. extra = (suspend_time / interval) << 24;
  2381. scan_suspend_time = 0xFF0FFFFF &
  2382. (extra | ((suspend_time % interval) * 1024));
  2383. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2384. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2385. scan_suspend_time, interval);
  2386. }
  2387. if (priv->scan_request->n_ssids) {
  2388. int i, p = 0;
  2389. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2390. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2391. /* always does wildcard anyway */
  2392. if (!priv->scan_request->ssids[i].ssid_len)
  2393. continue;
  2394. scan->direct_scan[p].id = WLAN_EID_SSID;
  2395. scan->direct_scan[p].len =
  2396. priv->scan_request->ssids[i].ssid_len;
  2397. memcpy(scan->direct_scan[p].ssid,
  2398. priv->scan_request->ssids[i].ssid,
  2399. priv->scan_request->ssids[i].ssid_len);
  2400. n_probes++;
  2401. p++;
  2402. }
  2403. is_active = true;
  2404. } else
  2405. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2406. /* We don't build a direct scan probe request; the uCode will do
  2407. * that based on the direct_mask added to each channel entry */
  2408. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2409. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2410. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2411. /* flags + rate selection */
  2412. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2413. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2414. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2415. scan->good_CRC_th = 0;
  2416. band = IEEE80211_BAND_2GHZ;
  2417. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2418. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2419. /*
  2420. * If active scaning is requested but a certain channel
  2421. * is marked passive, we can do active scanning if we
  2422. * detect transmissions.
  2423. */
  2424. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
  2425. band = IEEE80211_BAND_5GHZ;
  2426. } else {
  2427. IWL_WARN(priv, "Invalid scan band count\n");
  2428. goto done;
  2429. }
  2430. scan->tx_cmd.len = cpu_to_le16(
  2431. iwl_fill_probe_req(priv,
  2432. (struct ieee80211_mgmt *)scan->data,
  2433. priv->scan_request->ie,
  2434. priv->scan_request->ie_len,
  2435. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2436. /* select Rx antennas */
  2437. scan->flags |= iwl3945_get_antenna_flags(priv);
  2438. if (iwl_is_monitor_mode(priv))
  2439. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2440. scan->channel_count =
  2441. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2442. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2443. if (scan->channel_count == 0) {
  2444. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2445. goto done;
  2446. }
  2447. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2448. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2449. cmd.data = scan;
  2450. scan->len = cpu_to_le16(cmd.len);
  2451. set_bit(STATUS_SCAN_HW, &priv->status);
  2452. rc = iwl_send_cmd_sync(priv, &cmd);
  2453. if (rc)
  2454. goto done;
  2455. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2456. IWL_SCAN_CHECK_WATCHDOG);
  2457. mutex_unlock(&priv->mutex);
  2458. return;
  2459. done:
  2460. /* can not perform scan make sure we clear scanning
  2461. * bits from status so next scan request can be performed.
  2462. * if we dont clear scanning status bit here all next scan
  2463. * will fail
  2464. */
  2465. clear_bit(STATUS_SCAN_HW, &priv->status);
  2466. clear_bit(STATUS_SCANNING, &priv->status);
  2467. /* inform mac80211 scan aborted */
  2468. queue_work(priv->workqueue, &priv->scan_completed);
  2469. mutex_unlock(&priv->mutex);
  2470. }
  2471. static void iwl3945_bg_up(struct work_struct *data)
  2472. {
  2473. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  2474. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2475. return;
  2476. mutex_lock(&priv->mutex);
  2477. __iwl3945_up(priv);
  2478. mutex_unlock(&priv->mutex);
  2479. }
  2480. static void iwl3945_bg_restart(struct work_struct *data)
  2481. {
  2482. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2483. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2484. return;
  2485. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2486. mutex_lock(&priv->mutex);
  2487. priv->vif = NULL;
  2488. priv->is_open = 0;
  2489. mutex_unlock(&priv->mutex);
  2490. iwl3945_down(priv);
  2491. ieee80211_restart_hw(priv->hw);
  2492. } else {
  2493. iwl3945_down(priv);
  2494. queue_work(priv->workqueue, &priv->up);
  2495. }
  2496. }
  2497. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2498. {
  2499. struct iwl_priv *priv =
  2500. container_of(data, struct iwl_priv, rx_replenish);
  2501. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2502. return;
  2503. mutex_lock(&priv->mutex);
  2504. iwl3945_rx_replenish(priv);
  2505. mutex_unlock(&priv->mutex);
  2506. }
  2507. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2508. void iwl3945_post_associate(struct iwl_priv *priv)
  2509. {
  2510. int rc = 0;
  2511. struct ieee80211_conf *conf = NULL;
  2512. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2513. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2514. return;
  2515. }
  2516. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2517. priv->assoc_id, priv->active_rxon.bssid_addr);
  2518. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2519. return;
  2520. if (!priv->vif || !priv->is_open)
  2521. return;
  2522. iwl_scan_cancel_timeout(priv, 200);
  2523. conf = ieee80211_get_hw_conf(priv->hw);
  2524. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2525. iwlcore_commit_rxon(priv);
  2526. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2527. iwl_setup_rxon_timing(priv);
  2528. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2529. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2530. if (rc)
  2531. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2532. "Attempting to continue.\n");
  2533. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2534. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2535. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2536. priv->assoc_id, priv->beacon_int);
  2537. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2538. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2539. else
  2540. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2541. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2542. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2543. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2544. else
  2545. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2546. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2547. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2548. }
  2549. iwlcore_commit_rxon(priv);
  2550. switch (priv->iw_mode) {
  2551. case NL80211_IFTYPE_STATION:
  2552. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2553. break;
  2554. case NL80211_IFTYPE_ADHOC:
  2555. priv->assoc_id = 1;
  2556. iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
  2557. iwl3945_sync_sta(priv, IWL_STA_ID,
  2558. (priv->band == IEEE80211_BAND_5GHZ) ?
  2559. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2560. CMD_ASYNC);
  2561. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2562. iwl3945_send_beacon_cmd(priv);
  2563. break;
  2564. default:
  2565. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2566. __func__, priv->iw_mode);
  2567. break;
  2568. }
  2569. iwl_activate_qos(priv, 0);
  2570. /* we have just associated, don't start scan too early */
  2571. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2572. }
  2573. /*****************************************************************************
  2574. *
  2575. * mac80211 entry point functions
  2576. *
  2577. *****************************************************************************/
  2578. #define UCODE_READY_TIMEOUT (2 * HZ)
  2579. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2580. {
  2581. struct iwl_priv *priv = hw->priv;
  2582. int ret;
  2583. IWL_DEBUG_MAC80211(priv, "enter\n");
  2584. /* we should be verifying the device is ready to be opened */
  2585. mutex_lock(&priv->mutex);
  2586. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2587. * ucode filename and max sizes are card-specific. */
  2588. if (!priv->ucode_code.len) {
  2589. ret = iwl3945_read_ucode(priv);
  2590. if (ret) {
  2591. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2592. mutex_unlock(&priv->mutex);
  2593. goto out_release_irq;
  2594. }
  2595. }
  2596. ret = __iwl3945_up(priv);
  2597. mutex_unlock(&priv->mutex);
  2598. if (ret)
  2599. goto out_release_irq;
  2600. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2601. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2602. * mac80211 will not be run successfully. */
  2603. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2604. test_bit(STATUS_READY, &priv->status),
  2605. UCODE_READY_TIMEOUT);
  2606. if (!ret) {
  2607. if (!test_bit(STATUS_READY, &priv->status)) {
  2608. IWL_ERR(priv,
  2609. "Wait for START_ALIVE timeout after %dms.\n",
  2610. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2611. ret = -ETIMEDOUT;
  2612. goto out_release_irq;
  2613. }
  2614. }
  2615. /* ucode is running and will send rfkill notifications,
  2616. * no need to poll the killswitch state anymore */
  2617. cancel_delayed_work(&priv->rfkill_poll);
  2618. priv->is_open = 1;
  2619. IWL_DEBUG_MAC80211(priv, "leave\n");
  2620. return 0;
  2621. out_release_irq:
  2622. priv->is_open = 0;
  2623. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2624. return ret;
  2625. }
  2626. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2627. {
  2628. struct iwl_priv *priv = hw->priv;
  2629. IWL_DEBUG_MAC80211(priv, "enter\n");
  2630. if (!priv->is_open) {
  2631. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2632. return;
  2633. }
  2634. priv->is_open = 0;
  2635. if (iwl_is_ready_rf(priv)) {
  2636. /* stop mac, cancel any scan request and clear
  2637. * RXON_FILTER_ASSOC_MSK BIT
  2638. */
  2639. mutex_lock(&priv->mutex);
  2640. iwl_scan_cancel_timeout(priv, 100);
  2641. mutex_unlock(&priv->mutex);
  2642. }
  2643. iwl3945_down(priv);
  2644. flush_workqueue(priv->workqueue);
  2645. /* start polling the killswitch state again */
  2646. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2647. round_jiffies_relative(2 * HZ));
  2648. IWL_DEBUG_MAC80211(priv, "leave\n");
  2649. }
  2650. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2651. {
  2652. struct iwl_priv *priv = hw->priv;
  2653. IWL_DEBUG_MAC80211(priv, "enter\n");
  2654. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2655. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2656. if (iwl3945_tx_skb(priv, skb))
  2657. dev_kfree_skb_any(skb);
  2658. IWL_DEBUG_MAC80211(priv, "leave\n");
  2659. return NETDEV_TX_OK;
  2660. }
  2661. void iwl3945_config_ap(struct iwl_priv *priv)
  2662. {
  2663. int rc = 0;
  2664. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2665. return;
  2666. /* The following should be done only at AP bring up */
  2667. if (!(iwl_is_associated(priv))) {
  2668. /* RXON - unassoc (to set timing command) */
  2669. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2670. iwlcore_commit_rxon(priv);
  2671. /* RXON Timing */
  2672. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2673. iwl_setup_rxon_timing(priv);
  2674. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2675. sizeof(priv->rxon_timing),
  2676. &priv->rxon_timing);
  2677. if (rc)
  2678. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2679. "Attempting to continue.\n");
  2680. /* FIXME: what should be the assoc_id for AP? */
  2681. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2682. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2683. priv->staging_rxon.flags |=
  2684. RXON_FLG_SHORT_PREAMBLE_MSK;
  2685. else
  2686. priv->staging_rxon.flags &=
  2687. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2688. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2689. if (priv->assoc_capability &
  2690. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2691. priv->staging_rxon.flags |=
  2692. RXON_FLG_SHORT_SLOT_MSK;
  2693. else
  2694. priv->staging_rxon.flags &=
  2695. ~RXON_FLG_SHORT_SLOT_MSK;
  2696. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2697. priv->staging_rxon.flags &=
  2698. ~RXON_FLG_SHORT_SLOT_MSK;
  2699. }
  2700. /* restore RXON assoc */
  2701. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2702. iwlcore_commit_rxon(priv);
  2703. iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
  2704. }
  2705. iwl3945_send_beacon_cmd(priv);
  2706. /* FIXME - we need to add code here to detect a totally new
  2707. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2708. * clear sta table, add BCAST sta... */
  2709. }
  2710. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2711. struct ieee80211_vif *vif,
  2712. struct ieee80211_sta *sta,
  2713. struct ieee80211_key_conf *key)
  2714. {
  2715. struct iwl_priv *priv = hw->priv;
  2716. const u8 *addr;
  2717. int ret = 0;
  2718. u8 sta_id = IWL_INVALID_STATION;
  2719. u8 static_key;
  2720. IWL_DEBUG_MAC80211(priv, "enter\n");
  2721. if (iwl3945_mod_params.sw_crypto) {
  2722. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2723. return -EOPNOTSUPP;
  2724. }
  2725. addr = sta ? sta->addr : iwl_bcast_addr;
  2726. static_key = !iwl_is_associated(priv);
  2727. if (!static_key) {
  2728. sta_id = iwl_find_station(priv, addr);
  2729. if (sta_id == IWL_INVALID_STATION) {
  2730. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2731. addr);
  2732. return -EINVAL;
  2733. }
  2734. }
  2735. mutex_lock(&priv->mutex);
  2736. iwl_scan_cancel_timeout(priv, 100);
  2737. mutex_unlock(&priv->mutex);
  2738. switch (cmd) {
  2739. case SET_KEY:
  2740. if (static_key)
  2741. ret = iwl3945_set_static_key(priv, key);
  2742. else
  2743. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2744. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2745. break;
  2746. case DISABLE_KEY:
  2747. if (static_key)
  2748. ret = iwl3945_remove_static_key(priv);
  2749. else
  2750. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2751. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2752. break;
  2753. default:
  2754. ret = -EINVAL;
  2755. }
  2756. IWL_DEBUG_MAC80211(priv, "leave\n");
  2757. return ret;
  2758. }
  2759. /*****************************************************************************
  2760. *
  2761. * sysfs attributes
  2762. *
  2763. *****************************************************************************/
  2764. #ifdef CONFIG_IWLWIFI_DEBUG
  2765. /*
  2766. * The following adds a new attribute to the sysfs representation
  2767. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2768. * used for controlling the debug level.
  2769. *
  2770. * See the level definitions in iwl for details.
  2771. *
  2772. * The debug_level being managed using sysfs below is a per device debug
  2773. * level that is used instead of the global debug level if it (the per
  2774. * device debug level) is set.
  2775. */
  2776. static ssize_t show_debug_level(struct device *d,
  2777. struct device_attribute *attr, char *buf)
  2778. {
  2779. struct iwl_priv *priv = dev_get_drvdata(d);
  2780. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  2781. }
  2782. static ssize_t store_debug_level(struct device *d,
  2783. struct device_attribute *attr,
  2784. const char *buf, size_t count)
  2785. {
  2786. struct iwl_priv *priv = dev_get_drvdata(d);
  2787. unsigned long val;
  2788. int ret;
  2789. ret = strict_strtoul(buf, 0, &val);
  2790. if (ret)
  2791. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2792. else {
  2793. priv->debug_level = val;
  2794. if (iwl_alloc_traffic_mem(priv))
  2795. IWL_ERR(priv,
  2796. "Not enough memory to generate traffic log\n");
  2797. }
  2798. return strnlen(buf, count);
  2799. }
  2800. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2801. show_debug_level, store_debug_level);
  2802. #endif /* CONFIG_IWLWIFI_DEBUG */
  2803. static ssize_t show_temperature(struct device *d,
  2804. struct device_attribute *attr, char *buf)
  2805. {
  2806. struct iwl_priv *priv = dev_get_drvdata(d);
  2807. if (!iwl_is_alive(priv))
  2808. return -EAGAIN;
  2809. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2810. }
  2811. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2812. static ssize_t show_tx_power(struct device *d,
  2813. struct device_attribute *attr, char *buf)
  2814. {
  2815. struct iwl_priv *priv = dev_get_drvdata(d);
  2816. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2817. }
  2818. static ssize_t store_tx_power(struct device *d,
  2819. struct device_attribute *attr,
  2820. const char *buf, size_t count)
  2821. {
  2822. struct iwl_priv *priv = dev_get_drvdata(d);
  2823. char *p = (char *)buf;
  2824. u32 val;
  2825. val = simple_strtoul(p, &p, 10);
  2826. if (p == buf)
  2827. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2828. else
  2829. iwl3945_hw_reg_set_txpower(priv, val);
  2830. return count;
  2831. }
  2832. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2833. static ssize_t show_flags(struct device *d,
  2834. struct device_attribute *attr, char *buf)
  2835. {
  2836. struct iwl_priv *priv = dev_get_drvdata(d);
  2837. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2838. }
  2839. static ssize_t store_flags(struct device *d,
  2840. struct device_attribute *attr,
  2841. const char *buf, size_t count)
  2842. {
  2843. struct iwl_priv *priv = dev_get_drvdata(d);
  2844. u32 flags = simple_strtoul(buf, NULL, 0);
  2845. mutex_lock(&priv->mutex);
  2846. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2847. /* Cancel any currently running scans... */
  2848. if (iwl_scan_cancel_timeout(priv, 100))
  2849. IWL_WARN(priv, "Could not cancel scan.\n");
  2850. else {
  2851. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2852. flags);
  2853. priv->staging_rxon.flags = cpu_to_le32(flags);
  2854. iwlcore_commit_rxon(priv);
  2855. }
  2856. }
  2857. mutex_unlock(&priv->mutex);
  2858. return count;
  2859. }
  2860. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2861. static ssize_t show_filter_flags(struct device *d,
  2862. struct device_attribute *attr, char *buf)
  2863. {
  2864. struct iwl_priv *priv = dev_get_drvdata(d);
  2865. return sprintf(buf, "0x%04X\n",
  2866. le32_to_cpu(priv->active_rxon.filter_flags));
  2867. }
  2868. static ssize_t store_filter_flags(struct device *d,
  2869. struct device_attribute *attr,
  2870. const char *buf, size_t count)
  2871. {
  2872. struct iwl_priv *priv = dev_get_drvdata(d);
  2873. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2874. mutex_lock(&priv->mutex);
  2875. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2876. /* Cancel any currently running scans... */
  2877. if (iwl_scan_cancel_timeout(priv, 100))
  2878. IWL_WARN(priv, "Could not cancel scan.\n");
  2879. else {
  2880. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2881. "0x%04X\n", filter_flags);
  2882. priv->staging_rxon.filter_flags =
  2883. cpu_to_le32(filter_flags);
  2884. iwlcore_commit_rxon(priv);
  2885. }
  2886. }
  2887. mutex_unlock(&priv->mutex);
  2888. return count;
  2889. }
  2890. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2891. store_filter_flags);
  2892. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  2893. static ssize_t show_measurement(struct device *d,
  2894. struct device_attribute *attr, char *buf)
  2895. {
  2896. struct iwl_priv *priv = dev_get_drvdata(d);
  2897. struct iwl_spectrum_notification measure_report;
  2898. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2899. u8 *data = (u8 *)&measure_report;
  2900. unsigned long flags;
  2901. spin_lock_irqsave(&priv->lock, flags);
  2902. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2903. spin_unlock_irqrestore(&priv->lock, flags);
  2904. return 0;
  2905. }
  2906. memcpy(&measure_report, &priv->measure_report, size);
  2907. priv->measurement_status = 0;
  2908. spin_unlock_irqrestore(&priv->lock, flags);
  2909. while (size && (PAGE_SIZE - len)) {
  2910. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2911. PAGE_SIZE - len, 1);
  2912. len = strlen(buf);
  2913. if (PAGE_SIZE - len)
  2914. buf[len++] = '\n';
  2915. ofs += 16;
  2916. size -= min(size, 16U);
  2917. }
  2918. return len;
  2919. }
  2920. static ssize_t store_measurement(struct device *d,
  2921. struct device_attribute *attr,
  2922. const char *buf, size_t count)
  2923. {
  2924. struct iwl_priv *priv = dev_get_drvdata(d);
  2925. struct ieee80211_measurement_params params = {
  2926. .channel = le16_to_cpu(priv->active_rxon.channel),
  2927. .start_time = cpu_to_le64(priv->last_tsf),
  2928. .duration = cpu_to_le16(1),
  2929. };
  2930. u8 type = IWL_MEASURE_BASIC;
  2931. u8 buffer[32];
  2932. u8 channel;
  2933. if (count) {
  2934. char *p = buffer;
  2935. strncpy(buffer, buf, min(sizeof(buffer), count));
  2936. channel = simple_strtoul(p, NULL, 0);
  2937. if (channel)
  2938. params.channel = channel;
  2939. p = buffer;
  2940. while (*p && *p != ' ')
  2941. p++;
  2942. if (*p)
  2943. type = simple_strtoul(p + 1, NULL, 0);
  2944. }
  2945. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  2946. "channel %d (for '%s')\n", type, params.channel, buf);
  2947. iwl3945_get_measurement(priv, &params, type);
  2948. return count;
  2949. }
  2950. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  2951. show_measurement, store_measurement);
  2952. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  2953. static ssize_t store_retry_rate(struct device *d,
  2954. struct device_attribute *attr,
  2955. const char *buf, size_t count)
  2956. {
  2957. struct iwl_priv *priv = dev_get_drvdata(d);
  2958. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  2959. if (priv->retry_rate <= 0)
  2960. priv->retry_rate = 1;
  2961. return count;
  2962. }
  2963. static ssize_t show_retry_rate(struct device *d,
  2964. struct device_attribute *attr, char *buf)
  2965. {
  2966. struct iwl_priv *priv = dev_get_drvdata(d);
  2967. return sprintf(buf, "%d", priv->retry_rate);
  2968. }
  2969. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  2970. store_retry_rate);
  2971. static ssize_t show_channels(struct device *d,
  2972. struct device_attribute *attr, char *buf)
  2973. {
  2974. /* all this shit doesn't belong into sysfs anyway */
  2975. return 0;
  2976. }
  2977. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  2978. static ssize_t show_statistics(struct device *d,
  2979. struct device_attribute *attr, char *buf)
  2980. {
  2981. struct iwl_priv *priv = dev_get_drvdata(d);
  2982. u32 size = sizeof(struct iwl3945_notif_statistics);
  2983. u32 len = 0, ofs = 0;
  2984. u8 *data = (u8 *)&priv->statistics_39;
  2985. int rc = 0;
  2986. if (!iwl_is_alive(priv))
  2987. return -EAGAIN;
  2988. mutex_lock(&priv->mutex);
  2989. rc = iwl_send_statistics_request(priv, 0);
  2990. mutex_unlock(&priv->mutex);
  2991. if (rc) {
  2992. len = sprintf(buf,
  2993. "Error sending statistics request: 0x%08X\n", rc);
  2994. return len;
  2995. }
  2996. while (size && (PAGE_SIZE - len)) {
  2997. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2998. PAGE_SIZE - len, 1);
  2999. len = strlen(buf);
  3000. if (PAGE_SIZE - len)
  3001. buf[len++] = '\n';
  3002. ofs += 16;
  3003. size -= min(size, 16U);
  3004. }
  3005. return len;
  3006. }
  3007. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3008. static ssize_t show_antenna(struct device *d,
  3009. struct device_attribute *attr, char *buf)
  3010. {
  3011. struct iwl_priv *priv = dev_get_drvdata(d);
  3012. if (!iwl_is_alive(priv))
  3013. return -EAGAIN;
  3014. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3015. }
  3016. static ssize_t store_antenna(struct device *d,
  3017. struct device_attribute *attr,
  3018. const char *buf, size_t count)
  3019. {
  3020. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3021. int ant;
  3022. if (count == 0)
  3023. return 0;
  3024. if (sscanf(buf, "%1i", &ant) != 1) {
  3025. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3026. return count;
  3027. }
  3028. if ((ant >= 0) && (ant <= 2)) {
  3029. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3030. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3031. } else
  3032. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3033. return count;
  3034. }
  3035. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3036. static ssize_t show_status(struct device *d,
  3037. struct device_attribute *attr, char *buf)
  3038. {
  3039. struct iwl_priv *priv = dev_get_drvdata(d);
  3040. if (!iwl_is_alive(priv))
  3041. return -EAGAIN;
  3042. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3043. }
  3044. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3045. static ssize_t dump_error_log(struct device *d,
  3046. struct device_attribute *attr,
  3047. const char *buf, size_t count)
  3048. {
  3049. struct iwl_priv *priv = dev_get_drvdata(d);
  3050. char *p = (char *)buf;
  3051. if (p[0] == '1')
  3052. iwl3945_dump_nic_error_log(priv);
  3053. return strnlen(buf, count);
  3054. }
  3055. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3056. /*****************************************************************************
  3057. *
  3058. * driver setup and tear down
  3059. *
  3060. *****************************************************************************/
  3061. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3062. {
  3063. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3064. init_waitqueue_head(&priv->wait_command_queue);
  3065. INIT_WORK(&priv->up, iwl3945_bg_up);
  3066. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3067. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3068. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3069. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3070. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3071. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3072. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3073. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3074. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3075. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3076. iwl3945_hw_setup_deferred_work(priv);
  3077. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3078. iwl3945_irq_tasklet, (unsigned long)priv);
  3079. }
  3080. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3081. {
  3082. iwl3945_hw_cancel_deferred_work(priv);
  3083. cancel_delayed_work_sync(&priv->init_alive_start);
  3084. cancel_delayed_work(&priv->scan_check);
  3085. cancel_delayed_work(&priv->alive_start);
  3086. cancel_work_sync(&priv->beacon_update);
  3087. }
  3088. static struct attribute *iwl3945_sysfs_entries[] = {
  3089. &dev_attr_antenna.attr,
  3090. &dev_attr_channels.attr,
  3091. &dev_attr_dump_errors.attr,
  3092. &dev_attr_flags.attr,
  3093. &dev_attr_filter_flags.attr,
  3094. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3095. &dev_attr_measurement.attr,
  3096. #endif
  3097. &dev_attr_retry_rate.attr,
  3098. &dev_attr_statistics.attr,
  3099. &dev_attr_status.attr,
  3100. &dev_attr_temperature.attr,
  3101. &dev_attr_tx_power.attr,
  3102. #ifdef CONFIG_IWLWIFI_DEBUG
  3103. &dev_attr_debug_level.attr,
  3104. #endif
  3105. NULL
  3106. };
  3107. static struct attribute_group iwl3945_attribute_group = {
  3108. .name = NULL, /* put in device directory */
  3109. .attrs = iwl3945_sysfs_entries,
  3110. };
  3111. static struct ieee80211_ops iwl3945_hw_ops = {
  3112. .tx = iwl3945_mac_tx,
  3113. .start = iwl3945_mac_start,
  3114. .stop = iwl3945_mac_stop,
  3115. .add_interface = iwl_mac_add_interface,
  3116. .remove_interface = iwl_mac_remove_interface,
  3117. .config = iwl_mac_config,
  3118. .configure_filter = iwl_configure_filter,
  3119. .set_key = iwl3945_mac_set_key,
  3120. .get_tx_stats = iwl_mac_get_tx_stats,
  3121. .conf_tx = iwl_mac_conf_tx,
  3122. .reset_tsf = iwl_mac_reset_tsf,
  3123. .bss_info_changed = iwl_bss_info_changed,
  3124. .hw_scan = iwl_mac_hw_scan
  3125. };
  3126. static int iwl3945_init_drv(struct iwl_priv *priv)
  3127. {
  3128. int ret;
  3129. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3130. priv->retry_rate = 1;
  3131. priv->ibss_beacon = NULL;
  3132. spin_lock_init(&priv->lock);
  3133. spin_lock_init(&priv->sta_lock);
  3134. spin_lock_init(&priv->hcmd_lock);
  3135. INIT_LIST_HEAD(&priv->free_frames);
  3136. mutex_init(&priv->mutex);
  3137. /* Clear the driver's (not device's) station table */
  3138. iwl_clear_stations_table(priv);
  3139. priv->data_retry_limit = -1;
  3140. priv->ieee_channels = NULL;
  3141. priv->ieee_rates = NULL;
  3142. priv->band = IEEE80211_BAND_2GHZ;
  3143. priv->iw_mode = NL80211_IFTYPE_STATION;
  3144. iwl_reset_qos(priv);
  3145. priv->qos_data.qos_active = 0;
  3146. priv->qos_data.qos_cap.val = 0;
  3147. priv->rates_mask = IWL_RATES_MASK;
  3148. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3149. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3150. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3151. eeprom->version);
  3152. ret = -EINVAL;
  3153. goto err;
  3154. }
  3155. ret = iwl_init_channel_map(priv);
  3156. if (ret) {
  3157. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3158. goto err;
  3159. }
  3160. /* Set up txpower settings in driver for all channels */
  3161. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3162. ret = -EIO;
  3163. goto err_free_channel_map;
  3164. }
  3165. ret = iwlcore_init_geos(priv);
  3166. if (ret) {
  3167. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3168. goto err_free_channel_map;
  3169. }
  3170. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3171. return 0;
  3172. err_free_channel_map:
  3173. iwl_free_channel_map(priv);
  3174. err:
  3175. return ret;
  3176. }
  3177. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3178. {
  3179. int ret;
  3180. struct ieee80211_hw *hw = priv->hw;
  3181. hw->rate_control_algorithm = "iwl-3945-rs";
  3182. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3183. /* Tell mac80211 our characteristics */
  3184. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3185. IEEE80211_HW_NOISE_DBM |
  3186. IEEE80211_HW_SPECTRUM_MGMT |
  3187. IEEE80211_HW_SUPPORTS_PS |
  3188. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  3189. hw->wiphy->interface_modes =
  3190. BIT(NL80211_IFTYPE_STATION) |
  3191. BIT(NL80211_IFTYPE_ADHOC);
  3192. hw->wiphy->custom_regulatory = true;
  3193. /* Firmware does not support this */
  3194. hw->wiphy->disable_beacon_hints = true;
  3195. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3196. /* we create the 802.11 header and a zero-length SSID element */
  3197. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3198. /* Default value; 4 EDCA QOS priorities */
  3199. hw->queues = 4;
  3200. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3201. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3202. &priv->bands[IEEE80211_BAND_2GHZ];
  3203. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3204. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3205. &priv->bands[IEEE80211_BAND_5GHZ];
  3206. ret = ieee80211_register_hw(priv->hw);
  3207. if (ret) {
  3208. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3209. return ret;
  3210. }
  3211. priv->mac80211_registered = 1;
  3212. return 0;
  3213. }
  3214. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3215. {
  3216. int err = 0;
  3217. struct iwl_priv *priv;
  3218. struct ieee80211_hw *hw;
  3219. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3220. struct iwl3945_eeprom *eeprom;
  3221. unsigned long flags;
  3222. /***********************
  3223. * 1. Allocating HW data
  3224. * ********************/
  3225. /* mac80211 allocates memory for this device instance, including
  3226. * space for this driver's private structure */
  3227. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3228. if (hw == NULL) {
  3229. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3230. err = -ENOMEM;
  3231. goto out;
  3232. }
  3233. priv = hw->priv;
  3234. SET_IEEE80211_DEV(hw, &pdev->dev);
  3235. /*
  3236. * Disabling hardware scan means that mac80211 will perform scans
  3237. * "the hard way", rather than using device's scan.
  3238. */
  3239. if (iwl3945_mod_params.disable_hw_scan) {
  3240. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3241. iwl3945_hw_ops.hw_scan = NULL;
  3242. }
  3243. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3244. priv->cfg = cfg;
  3245. priv->pci_dev = pdev;
  3246. priv->inta_mask = CSR_INI_SET_MASK;
  3247. #ifdef CONFIG_IWLWIFI_DEBUG
  3248. atomic_set(&priv->restrict_refcnt, 0);
  3249. #endif
  3250. if (iwl_alloc_traffic_mem(priv))
  3251. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  3252. /***************************
  3253. * 2. Initializing PCI bus
  3254. * *************************/
  3255. if (pci_enable_device(pdev)) {
  3256. err = -ENODEV;
  3257. goto out_ieee80211_free_hw;
  3258. }
  3259. pci_set_master(pdev);
  3260. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3261. if (!err)
  3262. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3263. if (err) {
  3264. IWL_WARN(priv, "No suitable DMA available.\n");
  3265. goto out_pci_disable_device;
  3266. }
  3267. pci_set_drvdata(pdev, priv);
  3268. err = pci_request_regions(pdev, DRV_NAME);
  3269. if (err)
  3270. goto out_pci_disable_device;
  3271. /***********************
  3272. * 3. Read REV Register
  3273. * ********************/
  3274. priv->hw_base = pci_iomap(pdev, 0, 0);
  3275. if (!priv->hw_base) {
  3276. err = -ENODEV;
  3277. goto out_pci_release_regions;
  3278. }
  3279. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3280. (unsigned long long) pci_resource_len(pdev, 0));
  3281. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3282. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3283. * PCI Tx retries from interfering with C3 CPU state */
  3284. pci_write_config_byte(pdev, 0x41, 0x00);
  3285. /* this spin lock will be used in apm_ops.init and EEPROM access
  3286. * we should init now
  3287. */
  3288. spin_lock_init(&priv->reg_lock);
  3289. /* amp init */
  3290. err = priv->cfg->ops->lib->apm_ops.init(priv);
  3291. if (err < 0) {
  3292. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  3293. goto out_iounmap;
  3294. }
  3295. /***********************
  3296. * 4. Read EEPROM
  3297. * ********************/
  3298. /* Read the EEPROM */
  3299. err = iwl_eeprom_init(priv);
  3300. if (err) {
  3301. IWL_ERR(priv, "Unable to init EEPROM\n");
  3302. goto out_iounmap;
  3303. }
  3304. /* MAC Address location in EEPROM same for 3945/4965 */
  3305. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3306. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3307. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3308. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3309. /***********************
  3310. * 5. Setup HW Constants
  3311. * ********************/
  3312. /* Device-specific setup */
  3313. if (iwl3945_hw_set_hw_params(priv)) {
  3314. IWL_ERR(priv, "failed to set hw settings\n");
  3315. goto out_eeprom_free;
  3316. }
  3317. /***********************
  3318. * 6. Setup priv
  3319. * ********************/
  3320. err = iwl3945_init_drv(priv);
  3321. if (err) {
  3322. IWL_ERR(priv, "initializing driver failed\n");
  3323. goto out_unset_hw_params;
  3324. }
  3325. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3326. priv->cfg->name);
  3327. /***********************
  3328. * 7. Setup Services
  3329. * ********************/
  3330. spin_lock_irqsave(&priv->lock, flags);
  3331. iwl_disable_interrupts(priv);
  3332. spin_unlock_irqrestore(&priv->lock, flags);
  3333. pci_enable_msi(priv->pci_dev);
  3334. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3335. IRQF_SHARED, DRV_NAME, priv);
  3336. if (err) {
  3337. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3338. goto out_disable_msi;
  3339. }
  3340. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3341. if (err) {
  3342. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3343. goto out_release_irq;
  3344. }
  3345. iwl_set_rxon_channel(priv,
  3346. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3347. iwl3945_setup_deferred_work(priv);
  3348. iwl3945_setup_rx_handlers(priv);
  3349. /*********************************
  3350. * 8. Setup and Register mac80211
  3351. * *******************************/
  3352. iwl_enable_interrupts(priv);
  3353. err = iwl3945_setup_mac(priv);
  3354. if (err)
  3355. goto out_remove_sysfs;
  3356. err = iwl_dbgfs_register(priv, DRV_NAME);
  3357. if (err)
  3358. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3359. /* Start monitoring the killswitch */
  3360. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3361. 2 * HZ);
  3362. return 0;
  3363. out_remove_sysfs:
  3364. destroy_workqueue(priv->workqueue);
  3365. priv->workqueue = NULL;
  3366. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3367. out_release_irq:
  3368. free_irq(priv->pci_dev->irq, priv);
  3369. out_disable_msi:
  3370. pci_disable_msi(priv->pci_dev);
  3371. iwlcore_free_geos(priv);
  3372. iwl_free_channel_map(priv);
  3373. out_unset_hw_params:
  3374. iwl3945_unset_hw_params(priv);
  3375. out_eeprom_free:
  3376. iwl_eeprom_free(priv);
  3377. out_iounmap:
  3378. pci_iounmap(pdev, priv->hw_base);
  3379. out_pci_release_regions:
  3380. pci_release_regions(pdev);
  3381. out_pci_disable_device:
  3382. pci_set_drvdata(pdev, NULL);
  3383. pci_disable_device(pdev);
  3384. out_ieee80211_free_hw:
  3385. iwl_free_traffic_mem(priv);
  3386. ieee80211_free_hw(priv->hw);
  3387. out:
  3388. return err;
  3389. }
  3390. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3391. {
  3392. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3393. unsigned long flags;
  3394. if (!priv)
  3395. return;
  3396. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3397. iwl_dbgfs_unregister(priv);
  3398. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3399. if (priv->mac80211_registered) {
  3400. ieee80211_unregister_hw(priv->hw);
  3401. priv->mac80211_registered = 0;
  3402. } else {
  3403. iwl3945_down(priv);
  3404. }
  3405. /* make sure we flush any pending irq or
  3406. * tasklet for the driver
  3407. */
  3408. spin_lock_irqsave(&priv->lock, flags);
  3409. iwl_disable_interrupts(priv);
  3410. spin_unlock_irqrestore(&priv->lock, flags);
  3411. iwl_synchronize_irq(priv);
  3412. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3413. cancel_delayed_work_sync(&priv->rfkill_poll);
  3414. iwl3945_dealloc_ucode_pci(priv);
  3415. if (priv->rxq.bd)
  3416. iwl3945_rx_queue_free(priv, &priv->rxq);
  3417. iwl3945_hw_txq_ctx_free(priv);
  3418. iwl3945_unset_hw_params(priv);
  3419. iwl_clear_stations_table(priv);
  3420. /*netif_stop_queue(dev); */
  3421. flush_workqueue(priv->workqueue);
  3422. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3423. * priv->workqueue... so we can't take down the workqueue
  3424. * until now... */
  3425. destroy_workqueue(priv->workqueue);
  3426. priv->workqueue = NULL;
  3427. iwl_free_traffic_mem(priv);
  3428. free_irq(pdev->irq, priv);
  3429. pci_disable_msi(pdev);
  3430. pci_iounmap(pdev, priv->hw_base);
  3431. pci_release_regions(pdev);
  3432. pci_disable_device(pdev);
  3433. pci_set_drvdata(pdev, NULL);
  3434. iwl_free_channel_map(priv);
  3435. iwlcore_free_geos(priv);
  3436. kfree(priv->scan);
  3437. if (priv->ibss_beacon)
  3438. dev_kfree_skb(priv->ibss_beacon);
  3439. ieee80211_free_hw(priv->hw);
  3440. }
  3441. /*****************************************************************************
  3442. *
  3443. * driver and module entry point
  3444. *
  3445. *****************************************************************************/
  3446. static struct pci_driver iwl3945_driver = {
  3447. .name = DRV_NAME,
  3448. .id_table = iwl3945_hw_card_ids,
  3449. .probe = iwl3945_pci_probe,
  3450. .remove = __devexit_p(iwl3945_pci_remove),
  3451. #ifdef CONFIG_PM
  3452. .suspend = iwl_pci_suspend,
  3453. .resume = iwl_pci_resume,
  3454. #endif
  3455. };
  3456. static int __init iwl3945_init(void)
  3457. {
  3458. int ret;
  3459. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3460. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3461. ret = iwl3945_rate_control_register();
  3462. if (ret) {
  3463. printk(KERN_ERR DRV_NAME
  3464. "Unable to register rate control algorithm: %d\n", ret);
  3465. return ret;
  3466. }
  3467. ret = pci_register_driver(&iwl3945_driver);
  3468. if (ret) {
  3469. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3470. goto error_register;
  3471. }
  3472. return ret;
  3473. error_register:
  3474. iwl3945_rate_control_unregister();
  3475. return ret;
  3476. }
  3477. static void __exit iwl3945_exit(void)
  3478. {
  3479. pci_unregister_driver(&iwl3945_driver);
  3480. iwl3945_rate_control_unregister();
  3481. }
  3482. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3483. module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
  3484. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3485. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
  3486. MODULE_PARM_DESC(swcrypto,
  3487. "using software crypto (default 1 [software])\n");
  3488. #ifdef CONFIG_IWLWIFI_DEBUG
  3489. module_param_named(debug, iwl_debug_level, uint, 0644);
  3490. MODULE_PARM_DESC(debug, "debug output mask");
  3491. #endif
  3492. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
  3493. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3494. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
  3495. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3496. module_exit(iwl3945_exit);
  3497. module_init(iwl3945_init);