iwl-core.c 86 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <net/mac80211.h>
  32. #include "iwl-eeprom.h"
  33. #include "iwl-dev.h" /* FIXME: remove */
  34. #include "iwl-debug.h"
  35. #include "iwl-core.h"
  36. #include "iwl-io.h"
  37. #include "iwl-power.h"
  38. #include "iwl-sta.h"
  39. #include "iwl-helpers.h"
  40. MODULE_DESCRIPTION("iwl core");
  41. MODULE_VERSION(IWLWIFI_VERSION);
  42. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  43. MODULE_LICENSE("GPL");
  44. #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
  45. [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
  46. IWL_RATE_SISO_##s##M_PLCP, \
  47. IWL_RATE_MIMO2_##s##M_PLCP,\
  48. IWL_RATE_MIMO3_##s##M_PLCP,\
  49. IWL_RATE_##r##M_IEEE, \
  50. IWL_RATE_##ip##M_INDEX, \
  51. IWL_RATE_##in##M_INDEX, \
  52. IWL_RATE_##rp##M_INDEX, \
  53. IWL_RATE_##rn##M_INDEX, \
  54. IWL_RATE_##pp##M_INDEX, \
  55. IWL_RATE_##np##M_INDEX }
  56. u32 iwl_debug_level;
  57. EXPORT_SYMBOL(iwl_debug_level);
  58. static irqreturn_t iwl_isr(int irq, void *data);
  59. /*
  60. * Parameter order:
  61. * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
  62. *
  63. * If there isn't a valid next or previous rate then INV is used which
  64. * maps to IWL_RATE_INVALID
  65. *
  66. */
  67. const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
  68. IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
  69. IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
  70. IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
  71. IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
  72. IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
  73. IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
  74. IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
  75. IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
  76. IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
  77. IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
  78. IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
  79. IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  80. IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
  81. /* FIXME:RS: ^^ should be INV (legacy) */
  82. };
  83. EXPORT_SYMBOL(iwl_rates);
  84. /**
  85. * translate ucode response to mac80211 tx status control values
  86. */
  87. void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
  88. struct ieee80211_tx_info *info)
  89. {
  90. struct ieee80211_tx_rate *r = &info->control.rates[0];
  91. info->antenna_sel_tx =
  92. ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
  93. if (rate_n_flags & RATE_MCS_HT_MSK)
  94. r->flags |= IEEE80211_TX_RC_MCS;
  95. if (rate_n_flags & RATE_MCS_GF_MSK)
  96. r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
  97. if (rate_n_flags & RATE_MCS_HT40_MSK)
  98. r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
  99. if (rate_n_flags & RATE_MCS_DUP_MSK)
  100. r->flags |= IEEE80211_TX_RC_DUP_DATA;
  101. if (rate_n_flags & RATE_MCS_SGI_MSK)
  102. r->flags |= IEEE80211_TX_RC_SHORT_GI;
  103. r->idx = iwl_hwrate_to_mac80211_idx(rate_n_flags, info->band);
  104. }
  105. EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
  106. int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
  107. {
  108. int idx = 0;
  109. /* HT rate format */
  110. if (rate_n_flags & RATE_MCS_HT_MSK) {
  111. idx = (rate_n_flags & 0xff);
  112. if (idx >= IWL_RATE_MIMO3_6M_PLCP)
  113. idx = idx - IWL_RATE_MIMO3_6M_PLCP;
  114. else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
  115. idx = idx - IWL_RATE_MIMO2_6M_PLCP;
  116. idx += IWL_FIRST_OFDM_RATE;
  117. /* skip 9M not supported in ht*/
  118. if (idx >= IWL_RATE_9M_INDEX)
  119. idx += 1;
  120. if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
  121. return idx;
  122. /* legacy rate format, search for match in table */
  123. } else {
  124. for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
  125. if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
  126. return idx;
  127. }
  128. return -1;
  129. }
  130. EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
  131. int iwl_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
  132. {
  133. int idx = 0;
  134. int band_offset = 0;
  135. /* HT rate format: mac80211 wants an MCS number, which is just LSB */
  136. if (rate_n_flags & RATE_MCS_HT_MSK) {
  137. idx = (rate_n_flags & 0xff);
  138. return idx;
  139. /* Legacy rate format, search for match in table */
  140. } else {
  141. if (band == IEEE80211_BAND_5GHZ)
  142. band_offset = IWL_FIRST_OFDM_RATE;
  143. for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
  144. if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
  145. return idx - band_offset;
  146. }
  147. return -1;
  148. }
  149. u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
  150. {
  151. int i;
  152. u8 ind = ant;
  153. for (i = 0; i < RATE_ANT_NUM - 1; i++) {
  154. ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
  155. if (priv->hw_params.valid_tx_ant & BIT(ind))
  156. return ind;
  157. }
  158. return ant;
  159. }
  160. const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  161. EXPORT_SYMBOL(iwl_bcast_addr);
  162. /* This function both allocates and initializes hw and priv. */
  163. struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
  164. struct ieee80211_ops *hw_ops)
  165. {
  166. struct iwl_priv *priv;
  167. /* mac80211 allocates memory for this device instance, including
  168. * space for this driver's private structure */
  169. struct ieee80211_hw *hw =
  170. ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
  171. if (hw == NULL) {
  172. printk(KERN_ERR "%s: Can not allocate network device\n",
  173. cfg->name);
  174. goto out;
  175. }
  176. priv = hw->priv;
  177. priv->hw = hw;
  178. out:
  179. return hw;
  180. }
  181. EXPORT_SYMBOL(iwl_alloc_all);
  182. void iwl_hw_detect(struct iwl_priv *priv)
  183. {
  184. priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
  185. priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
  186. pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
  187. }
  188. EXPORT_SYMBOL(iwl_hw_detect);
  189. int iwl_hw_nic_init(struct iwl_priv *priv)
  190. {
  191. unsigned long flags;
  192. struct iwl_rx_queue *rxq = &priv->rxq;
  193. int ret;
  194. /* nic_init */
  195. spin_lock_irqsave(&priv->lock, flags);
  196. priv->cfg->ops->lib->apm_ops.init(priv);
  197. iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
  198. spin_unlock_irqrestore(&priv->lock, flags);
  199. ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
  200. priv->cfg->ops->lib->apm_ops.config(priv);
  201. /* Allocate the RX queue, or reset if it is already allocated */
  202. if (!rxq->bd) {
  203. ret = iwl_rx_queue_alloc(priv);
  204. if (ret) {
  205. IWL_ERR(priv, "Unable to initialize Rx queue\n");
  206. return -ENOMEM;
  207. }
  208. } else
  209. iwl_rx_queue_reset(priv, rxq);
  210. iwl_rx_replenish(priv);
  211. iwl_rx_init(priv, rxq);
  212. spin_lock_irqsave(&priv->lock, flags);
  213. rxq->need_update = 1;
  214. iwl_rx_queue_update_write_ptr(priv, rxq);
  215. spin_unlock_irqrestore(&priv->lock, flags);
  216. /* Allocate and init all Tx and Command queues */
  217. ret = iwl_txq_ctx_reset(priv);
  218. if (ret)
  219. return ret;
  220. set_bit(STATUS_INIT, &priv->status);
  221. return 0;
  222. }
  223. EXPORT_SYMBOL(iwl_hw_nic_init);
  224. /*
  225. * QoS support
  226. */
  227. void iwl_activate_qos(struct iwl_priv *priv, u8 force)
  228. {
  229. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  230. return;
  231. priv->qos_data.def_qos_parm.qos_flags = 0;
  232. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  233. !priv->qos_data.qos_cap.q_AP.txop_request)
  234. priv->qos_data.def_qos_parm.qos_flags |=
  235. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  236. if (priv->qos_data.qos_active)
  237. priv->qos_data.def_qos_parm.qos_flags |=
  238. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  239. if (priv->current_ht_config.is_ht)
  240. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  241. if (force || iwl_is_associated(priv)) {
  242. IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  243. priv->qos_data.qos_active,
  244. priv->qos_data.def_qos_parm.qos_flags);
  245. iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
  246. sizeof(struct iwl_qosparam_cmd),
  247. &priv->qos_data.def_qos_parm, NULL);
  248. }
  249. }
  250. EXPORT_SYMBOL(iwl_activate_qos);
  251. /*
  252. * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
  253. * (802.11b) (802.11a/g)
  254. * AC_BK 15 1023 7 0 0
  255. * AC_BE 15 1023 3 0 0
  256. * AC_VI 7 15 2 6.016ms 3.008ms
  257. * AC_VO 3 7 2 3.264ms 1.504ms
  258. */
  259. void iwl_reset_qos(struct iwl_priv *priv)
  260. {
  261. u16 cw_min = 15;
  262. u16 cw_max = 1023;
  263. u8 aifs = 2;
  264. bool is_legacy = false;
  265. unsigned long flags;
  266. int i;
  267. spin_lock_irqsave(&priv->lock, flags);
  268. /* QoS always active in AP and ADHOC mode
  269. * In STA mode wait for association
  270. */
  271. if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
  272. priv->iw_mode == NL80211_IFTYPE_AP)
  273. priv->qos_data.qos_active = 1;
  274. else
  275. priv->qos_data.qos_active = 0;
  276. /* check for legacy mode */
  277. if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  278. (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
  279. (priv->iw_mode == NL80211_IFTYPE_STATION &&
  280. (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
  281. cw_min = 31;
  282. is_legacy = 1;
  283. }
  284. if (priv->qos_data.qos_active)
  285. aifs = 3;
  286. /* AC_BE */
  287. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  288. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  289. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  290. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  291. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  292. if (priv->qos_data.qos_active) {
  293. /* AC_BK */
  294. i = 1;
  295. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  296. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  297. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  298. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  299. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  300. /* AC_VI */
  301. i = 2;
  302. priv->qos_data.def_qos_parm.ac[i].cw_min =
  303. cpu_to_le16((cw_min + 1) / 2 - 1);
  304. priv->qos_data.def_qos_parm.ac[i].cw_max =
  305. cpu_to_le16(cw_min);
  306. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  307. if (is_legacy)
  308. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  309. cpu_to_le16(6016);
  310. else
  311. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  312. cpu_to_le16(3008);
  313. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  314. /* AC_VO */
  315. i = 3;
  316. priv->qos_data.def_qos_parm.ac[i].cw_min =
  317. cpu_to_le16((cw_min + 1) / 4 - 1);
  318. priv->qos_data.def_qos_parm.ac[i].cw_max =
  319. cpu_to_le16((cw_min + 1) / 2 - 1);
  320. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  321. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  322. if (is_legacy)
  323. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  324. cpu_to_le16(3264);
  325. else
  326. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  327. cpu_to_le16(1504);
  328. } else {
  329. for (i = 1; i < 4; i++) {
  330. priv->qos_data.def_qos_parm.ac[i].cw_min =
  331. cpu_to_le16(cw_min);
  332. priv->qos_data.def_qos_parm.ac[i].cw_max =
  333. cpu_to_le16(cw_max);
  334. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  335. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  336. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  337. }
  338. }
  339. IWL_DEBUG_QOS(priv, "set QoS to default \n");
  340. spin_unlock_irqrestore(&priv->lock, flags);
  341. }
  342. EXPORT_SYMBOL(iwl_reset_qos);
  343. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  344. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  345. static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
  346. struct ieee80211_sta_ht_cap *ht_info,
  347. enum ieee80211_band band)
  348. {
  349. u16 max_bit_rate = 0;
  350. u8 rx_chains_num = priv->hw_params.rx_chains_num;
  351. u8 tx_chains_num = priv->hw_params.tx_chains_num;
  352. ht_info->cap = 0;
  353. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  354. ht_info->ht_supported = true;
  355. if (priv->cfg->ht_greenfield_support)
  356. ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
  357. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  358. ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
  359. (WLAN_HT_CAP_SM_PS_DISABLED << 2));
  360. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  361. if (priv->hw_params.ht40_channel & BIT(band)) {
  362. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  363. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  364. ht_info->mcs.rx_mask[4] = 0x01;
  365. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  366. }
  367. if (priv->cfg->mod_params->amsdu_size_8K)
  368. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  369. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  370. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  371. ht_info->mcs.rx_mask[0] = 0xFF;
  372. if (rx_chains_num >= 2)
  373. ht_info->mcs.rx_mask[1] = 0xFF;
  374. if (rx_chains_num >= 3)
  375. ht_info->mcs.rx_mask[2] = 0xFF;
  376. /* Highest supported Rx data rate */
  377. max_bit_rate *= rx_chains_num;
  378. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  379. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  380. /* Tx MCS capabilities */
  381. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  382. if (tx_chains_num != rx_chains_num) {
  383. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  384. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  385. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  386. }
  387. }
  388. static void iwlcore_init_hw_rates(struct iwl_priv *priv,
  389. struct ieee80211_rate *rates)
  390. {
  391. int i;
  392. for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
  393. rates[i].bitrate = iwl_rates[i].ieee * 5;
  394. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  395. rates[i].hw_value_short = i;
  396. rates[i].flags = 0;
  397. if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
  398. /*
  399. * If CCK != 1M then set short preamble rate flag.
  400. */
  401. rates[i].flags |=
  402. (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  403. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  404. }
  405. }
  406. }
  407. /**
  408. * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
  409. */
  410. int iwlcore_init_geos(struct iwl_priv *priv)
  411. {
  412. struct iwl_channel_info *ch;
  413. struct ieee80211_supported_band *sband;
  414. struct ieee80211_channel *channels;
  415. struct ieee80211_channel *geo_ch;
  416. struct ieee80211_rate *rates;
  417. int i = 0;
  418. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  419. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  420. IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
  421. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  422. return 0;
  423. }
  424. channels = kzalloc(sizeof(struct ieee80211_channel) *
  425. priv->channel_count, GFP_KERNEL);
  426. if (!channels)
  427. return -ENOMEM;
  428. rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
  429. GFP_KERNEL);
  430. if (!rates) {
  431. kfree(channels);
  432. return -ENOMEM;
  433. }
  434. /* 5.2GHz channels start after the 2.4GHz channels */
  435. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  436. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  437. /* just OFDM */
  438. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  439. sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
  440. if (priv->cfg->sku & IWL_SKU_N)
  441. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  442. IEEE80211_BAND_5GHZ);
  443. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  444. sband->channels = channels;
  445. /* OFDM & CCK */
  446. sband->bitrates = rates;
  447. sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
  448. if (priv->cfg->sku & IWL_SKU_N)
  449. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  450. IEEE80211_BAND_2GHZ);
  451. priv->ieee_channels = channels;
  452. priv->ieee_rates = rates;
  453. for (i = 0; i < priv->channel_count; i++) {
  454. ch = &priv->channel_info[i];
  455. /* FIXME: might be removed if scan is OK */
  456. if (!is_channel_valid(ch))
  457. continue;
  458. if (is_channel_a_band(ch))
  459. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  460. else
  461. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  462. geo_ch = &sband->channels[sband->n_channels++];
  463. geo_ch->center_freq =
  464. ieee80211_channel_to_frequency(ch->channel);
  465. geo_ch->max_power = ch->max_power_avg;
  466. geo_ch->max_antenna_gain = 0xff;
  467. geo_ch->hw_value = ch->channel;
  468. if (is_channel_valid(ch)) {
  469. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  470. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  471. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  472. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  473. if (ch->flags & EEPROM_CHANNEL_RADAR)
  474. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  475. geo_ch->flags |= ch->ht40_extension_channel;
  476. if (ch->max_power_avg > priv->tx_power_device_lmt)
  477. priv->tx_power_device_lmt = ch->max_power_avg;
  478. } else {
  479. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  480. }
  481. IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  482. ch->channel, geo_ch->center_freq,
  483. is_channel_a_band(ch) ? "5.2" : "2.4",
  484. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  485. "restricted" : "valid",
  486. geo_ch->flags);
  487. }
  488. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  489. priv->cfg->sku & IWL_SKU_A) {
  490. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  491. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  492. priv->pci_dev->device,
  493. priv->pci_dev->subsystem_device);
  494. priv->cfg->sku &= ~IWL_SKU_A;
  495. }
  496. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  497. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  498. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  499. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  500. return 0;
  501. }
  502. EXPORT_SYMBOL(iwlcore_init_geos);
  503. /*
  504. * iwlcore_free_geos - undo allocations in iwlcore_init_geos
  505. */
  506. void iwlcore_free_geos(struct iwl_priv *priv)
  507. {
  508. kfree(priv->ieee_channels);
  509. kfree(priv->ieee_rates);
  510. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  511. }
  512. EXPORT_SYMBOL(iwlcore_free_geos);
  513. static bool is_single_rx_stream(struct iwl_priv *priv)
  514. {
  515. return !priv->current_ht_config.is_ht ||
  516. ((priv->current_ht_config.mcs.rx_mask[1] == 0) &&
  517. (priv->current_ht_config.mcs.rx_mask[2] == 0));
  518. }
  519. static u8 iwl_is_channel_extension(struct iwl_priv *priv,
  520. enum ieee80211_band band,
  521. u16 channel, u8 extension_chan_offset)
  522. {
  523. const struct iwl_channel_info *ch_info;
  524. ch_info = iwl_get_channel_info(priv, band, channel);
  525. if (!is_channel_valid(ch_info))
  526. return 0;
  527. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  528. return !(ch_info->ht40_extension_channel &
  529. IEEE80211_CHAN_NO_HT40PLUS);
  530. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  531. return !(ch_info->ht40_extension_channel &
  532. IEEE80211_CHAN_NO_HT40MINUS);
  533. return 0;
  534. }
  535. u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
  536. struct ieee80211_sta_ht_cap *sta_ht_inf)
  537. {
  538. struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
  539. if ((!iwl_ht_conf->is_ht) ||
  540. (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ))
  541. return 0;
  542. /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  543. * the bit will not set if it is pure 40MHz case
  544. */
  545. if (sta_ht_inf) {
  546. if (!sta_ht_inf->ht_supported)
  547. return 0;
  548. }
  549. #ifdef CONFIG_IWLWIFI_DEBUG
  550. if (priv->disable_ht40)
  551. return 0;
  552. #endif
  553. return iwl_is_channel_extension(priv, priv->band,
  554. le16_to_cpu(priv->staging_rxon.channel),
  555. iwl_ht_conf->extension_chan_offset);
  556. }
  557. EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
  558. static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  559. {
  560. u16 new_val = 0;
  561. u16 beacon_factor = 0;
  562. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  563. new_val = beacon_val / beacon_factor;
  564. if (!new_val)
  565. new_val = max_beacon_val;
  566. return new_val;
  567. }
  568. void iwl_setup_rxon_timing(struct iwl_priv *priv)
  569. {
  570. u64 tsf;
  571. s32 interval_tm, rem;
  572. unsigned long flags;
  573. struct ieee80211_conf *conf = NULL;
  574. u16 beacon_int;
  575. conf = ieee80211_get_hw_conf(priv->hw);
  576. spin_lock_irqsave(&priv->lock, flags);
  577. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  578. priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
  579. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  580. beacon_int = priv->beacon_int;
  581. priv->rxon_timing.atim_window = 0;
  582. } else {
  583. beacon_int = priv->vif->bss_conf.beacon_int;
  584. /* TODO: we need to get atim_window from upper stack
  585. * for now we set to 0 */
  586. priv->rxon_timing.atim_window = 0;
  587. }
  588. beacon_int = iwl_adjust_beacon_interval(beacon_int,
  589. priv->hw_params.max_beacon_itrvl * 1024);
  590. priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
  591. tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
  592. interval_tm = beacon_int * 1024;
  593. rem = do_div(tsf, interval_tm);
  594. priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  595. spin_unlock_irqrestore(&priv->lock, flags);
  596. IWL_DEBUG_ASSOC(priv,
  597. "beacon interval %d beacon timer %d beacon tim %d\n",
  598. le16_to_cpu(priv->rxon_timing.beacon_interval),
  599. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  600. le16_to_cpu(priv->rxon_timing.atim_window));
  601. }
  602. EXPORT_SYMBOL(iwl_setup_rxon_timing);
  603. void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  604. {
  605. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  606. if (hw_decrypt)
  607. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  608. else
  609. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  610. }
  611. EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
  612. /**
  613. * iwl_check_rxon_cmd - validate RXON structure is valid
  614. *
  615. * NOTE: This is really only useful during development and can eventually
  616. * be #ifdef'd out once the driver is stable and folks aren't actively
  617. * making changes
  618. */
  619. int iwl_check_rxon_cmd(struct iwl_priv *priv)
  620. {
  621. int error = 0;
  622. int counter = 1;
  623. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  624. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  625. error |= le32_to_cpu(rxon->flags &
  626. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  627. RXON_FLG_RADAR_DETECT_MSK));
  628. if (error)
  629. IWL_WARN(priv, "check 24G fields %d | %d\n",
  630. counter++, error);
  631. } else {
  632. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  633. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  634. if (error)
  635. IWL_WARN(priv, "check 52 fields %d | %d\n",
  636. counter++, error);
  637. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  638. if (error)
  639. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  640. counter++, error);
  641. }
  642. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  643. if (error)
  644. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  645. /* make sure basic rates 6Mbps and 1Mbps are supported */
  646. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  647. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  648. if (error)
  649. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  650. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  651. if (error)
  652. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  653. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  654. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  655. if (error)
  656. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  657. counter++, error);
  658. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  659. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  660. if (error)
  661. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  662. counter++, error);
  663. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  664. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  665. if (error)
  666. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  667. counter++, error);
  668. if (error)
  669. IWL_WARN(priv, "Tuning to channel %d\n",
  670. le16_to_cpu(rxon->channel));
  671. if (error) {
  672. IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
  673. return -1;
  674. }
  675. return 0;
  676. }
  677. EXPORT_SYMBOL(iwl_check_rxon_cmd);
  678. /**
  679. * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  680. * @priv: staging_rxon is compared to active_rxon
  681. *
  682. * If the RXON structure is changing enough to require a new tune,
  683. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  684. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  685. */
  686. int iwl_full_rxon_required(struct iwl_priv *priv)
  687. {
  688. /* These items are only settable from the full RXON command */
  689. if (!(iwl_is_associated(priv)) ||
  690. compare_ether_addr(priv->staging_rxon.bssid_addr,
  691. priv->active_rxon.bssid_addr) ||
  692. compare_ether_addr(priv->staging_rxon.node_addr,
  693. priv->active_rxon.node_addr) ||
  694. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  695. priv->active_rxon.wlap_bssid_addr) ||
  696. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  697. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  698. (priv->staging_rxon.air_propagation !=
  699. priv->active_rxon.air_propagation) ||
  700. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  701. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  702. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  703. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  704. (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
  705. priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
  706. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  707. return 1;
  708. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  709. * be updated with the RXON_ASSOC command -- however only some
  710. * flag transitions are allowed using RXON_ASSOC */
  711. /* Check if we are not switching bands */
  712. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  713. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  714. return 1;
  715. /* Check if we are switching association toggle */
  716. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  717. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  718. return 1;
  719. return 0;
  720. }
  721. EXPORT_SYMBOL(iwl_full_rxon_required);
  722. u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
  723. {
  724. int i;
  725. int rate_mask;
  726. /* Set rate mask*/
  727. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
  728. rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
  729. else
  730. rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
  731. /* Find lowest valid rate */
  732. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  733. i = iwl_rates[i].next_ieee) {
  734. if (rate_mask & (1 << i))
  735. return iwl_rates[i].plcp;
  736. }
  737. /* No valid rate was found. Assign the lowest one */
  738. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
  739. return IWL_RATE_1M_PLCP;
  740. else
  741. return IWL_RATE_6M_PLCP;
  742. }
  743. EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
  744. void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
  745. {
  746. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  747. if (!ht_info->is_ht) {
  748. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  749. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  750. RXON_FLG_HT40_PROT_MSK |
  751. RXON_FLG_HT_PROT_MSK);
  752. return;
  753. }
  754. /* FIXME: if the definition of ht_protection changed, the "translation"
  755. * will be needed for rxon->flags
  756. */
  757. rxon->flags |= cpu_to_le32(ht_info->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
  758. /* Set up channel bandwidth:
  759. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  760. /* clear the HT channel mode before set the mode */
  761. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  762. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  763. if (iwl_is_ht40_tx_allowed(priv, NULL)) {
  764. /* pure ht40 */
  765. if (ht_info->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  766. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  767. /* Note: control channel is opposite of extension channel */
  768. switch (ht_info->extension_chan_offset) {
  769. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  770. rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  771. break;
  772. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  773. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  774. break;
  775. }
  776. } else {
  777. /* Note: control channel is opposite of extension channel */
  778. switch (ht_info->extension_chan_offset) {
  779. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  780. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  781. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  782. break;
  783. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  784. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  785. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  786. break;
  787. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  788. default:
  789. /* channel location only valid if in Mixed mode */
  790. IWL_ERR(priv, "invalid extension channel offset\n");
  791. break;
  792. }
  793. }
  794. } else {
  795. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  796. }
  797. if (priv->cfg->ops->hcmd->set_rxon_chain)
  798. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  799. IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X "
  800. "rxon flags 0x%X operation mode :0x%X "
  801. "extension channel offset 0x%x\n",
  802. ht_info->mcs.rx_mask[0],
  803. ht_info->mcs.rx_mask[1],
  804. ht_info->mcs.rx_mask[2],
  805. le32_to_cpu(rxon->flags), ht_info->ht_protection,
  806. ht_info->extension_chan_offset);
  807. return;
  808. }
  809. EXPORT_SYMBOL(iwl_set_rxon_ht);
  810. #define IWL_NUM_RX_CHAINS_MULTIPLE 3
  811. #define IWL_NUM_RX_CHAINS_SINGLE 2
  812. #define IWL_NUM_IDLE_CHAINS_DUAL 2
  813. #define IWL_NUM_IDLE_CHAINS_SINGLE 1
  814. /* Determine how many receiver/antenna chains to use.
  815. * More provides better reception via diversity. Fewer saves power.
  816. * MIMO (dual stream) requires at least 2, but works better with 3.
  817. * This does not determine *which* chains to use, just how many.
  818. */
  819. static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
  820. {
  821. bool is_single = is_single_rx_stream(priv);
  822. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  823. /* # of Rx chains to use when expecting MIMO. */
  824. if (is_single || (!is_cam && (priv->current_ht_config.sm_ps ==
  825. WLAN_HT_CAP_SM_PS_STATIC)))
  826. return IWL_NUM_RX_CHAINS_SINGLE;
  827. else
  828. return IWL_NUM_RX_CHAINS_MULTIPLE;
  829. }
  830. static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
  831. {
  832. int idle_cnt;
  833. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  834. /* # Rx chains when idling and maybe trying to save power */
  835. switch (priv->current_ht_config.sm_ps) {
  836. case WLAN_HT_CAP_SM_PS_STATIC:
  837. case WLAN_HT_CAP_SM_PS_DYNAMIC:
  838. idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
  839. IWL_NUM_IDLE_CHAINS_SINGLE;
  840. break;
  841. case WLAN_HT_CAP_SM_PS_DISABLED:
  842. idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
  843. break;
  844. case WLAN_HT_CAP_SM_PS_INVALID:
  845. default:
  846. IWL_ERR(priv, "invalid mimo ps mode %d\n",
  847. priv->current_ht_config.sm_ps);
  848. WARN_ON(1);
  849. idle_cnt = -1;
  850. break;
  851. }
  852. return idle_cnt;
  853. }
  854. /* up to 4 chains */
  855. static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
  856. {
  857. u8 res;
  858. res = (chain_bitmap & BIT(0)) >> 0;
  859. res += (chain_bitmap & BIT(1)) >> 1;
  860. res += (chain_bitmap & BIT(2)) >> 2;
  861. res += (chain_bitmap & BIT(4)) >> 4;
  862. return res;
  863. }
  864. /**
  865. * iwl_is_monitor_mode - Determine if interface in monitor mode
  866. *
  867. * priv->iw_mode is set in add_interface, but add_interface is
  868. * never called for monitor mode. The only way mac80211 informs us about
  869. * monitor mode is through configuring filters (call to configure_filter).
  870. */
  871. bool iwl_is_monitor_mode(struct iwl_priv *priv)
  872. {
  873. return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
  874. }
  875. EXPORT_SYMBOL(iwl_is_monitor_mode);
  876. /**
  877. * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
  878. *
  879. * Selects how many and which Rx receivers/antennas/chains to use.
  880. * This should not be used for scan command ... it puts data in wrong place.
  881. */
  882. void iwl_set_rxon_chain(struct iwl_priv *priv)
  883. {
  884. bool is_single = is_single_rx_stream(priv);
  885. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  886. u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
  887. u32 active_chains;
  888. u16 rx_chain;
  889. /* Tell uCode which antennas are actually connected.
  890. * Before first association, we assume all antennas are connected.
  891. * Just after first association, iwl_chain_noise_calibration()
  892. * checks which antennas actually *are* connected. */
  893. if (priv->chain_noise_data.active_chains)
  894. active_chains = priv->chain_noise_data.active_chains;
  895. else
  896. active_chains = priv->hw_params.valid_rx_ant;
  897. rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
  898. /* How many receivers should we use? */
  899. active_rx_cnt = iwl_get_active_rx_chain_count(priv);
  900. idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
  901. /* correct rx chain count according hw settings
  902. * and chain noise calibration
  903. */
  904. valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
  905. if (valid_rx_cnt < active_rx_cnt)
  906. active_rx_cnt = valid_rx_cnt;
  907. if (valid_rx_cnt < idle_rx_cnt)
  908. idle_rx_cnt = valid_rx_cnt;
  909. rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
  910. rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
  911. /* copied from 'iwl_bg_request_scan()' */
  912. /* Force use of chains B and C (0x6) for Rx for 4965
  913. * Avoid A (0x1) because of its off-channel reception on A-band.
  914. * MIMO is not used here, but value is required */
  915. if (iwl_is_monitor_mode(priv) &&
  916. !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
  917. ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
  918. rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
  919. rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
  920. rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
  921. rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
  922. }
  923. priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
  924. if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
  925. priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
  926. else
  927. priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
  928. IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
  929. priv->staging_rxon.rx_chain,
  930. active_rx_cnt, idle_rx_cnt);
  931. WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
  932. active_rx_cnt < idle_rx_cnt);
  933. }
  934. EXPORT_SYMBOL(iwl_set_rxon_chain);
  935. /**
  936. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  937. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  938. * @channel: Any channel valid for the requested phymode
  939. * In addition to setting the staging RXON, priv->phymode is also set.
  940. *
  941. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  942. * in the staging RXON flag structure based on the phymode
  943. */
  944. int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
  945. {
  946. enum ieee80211_band band = ch->band;
  947. u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
  948. if (!iwl_get_channel_info(priv, band, channel)) {
  949. IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
  950. channel, band);
  951. return -EINVAL;
  952. }
  953. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  954. (priv->band == band))
  955. return 0;
  956. priv->staging_rxon.channel = cpu_to_le16(channel);
  957. if (band == IEEE80211_BAND_5GHZ)
  958. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  959. else
  960. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  961. priv->band = band;
  962. IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
  963. return 0;
  964. }
  965. EXPORT_SYMBOL(iwl_set_rxon_channel);
  966. void iwl_set_flags_for_band(struct iwl_priv *priv,
  967. enum ieee80211_band band)
  968. {
  969. if (band == IEEE80211_BAND_5GHZ) {
  970. priv->staging_rxon.flags &=
  971. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  972. | RXON_FLG_CCK_MSK);
  973. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  974. } else {
  975. /* Copied from iwl_post_associate() */
  976. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  977. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  978. else
  979. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  980. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  981. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  982. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  983. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  984. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  985. }
  986. }
  987. /*
  988. * initialize rxon structure with default values from eeprom
  989. */
  990. void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
  991. {
  992. const struct iwl_channel_info *ch_info;
  993. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  994. switch (mode) {
  995. case NL80211_IFTYPE_AP:
  996. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  997. break;
  998. case NL80211_IFTYPE_STATION:
  999. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1000. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1001. break;
  1002. case NL80211_IFTYPE_ADHOC:
  1003. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1004. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1005. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1006. RXON_FILTER_ACCEPT_GRP_MSK;
  1007. break;
  1008. default:
  1009. IWL_ERR(priv, "Unsupported interface type %d\n", mode);
  1010. break;
  1011. }
  1012. #if 0
  1013. /* TODO: Figure out when short_preamble would be set and cache from
  1014. * that */
  1015. if (!hw_to_local(priv->hw)->short_preamble)
  1016. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1017. else
  1018. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1019. #endif
  1020. ch_info = iwl_get_channel_info(priv, priv->band,
  1021. le16_to_cpu(priv->active_rxon.channel));
  1022. if (!ch_info)
  1023. ch_info = &priv->channel_info[0];
  1024. /*
  1025. * in some case A channels are all non IBSS
  1026. * in this case force B/G channel
  1027. */
  1028. if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
  1029. !(is_channel_ibss(ch_info)))
  1030. ch_info = &priv->channel_info[0];
  1031. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  1032. priv->band = ch_info->band;
  1033. iwl_set_flags_for_band(priv, priv->band);
  1034. priv->staging_rxon.ofdm_basic_rates =
  1035. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1036. priv->staging_rxon.cck_basic_rates =
  1037. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1038. /* clear both MIX and PURE40 mode flag */
  1039. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  1040. RXON_FLG_CHANNEL_MODE_PURE_40);
  1041. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1042. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  1043. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  1044. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  1045. priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
  1046. }
  1047. EXPORT_SYMBOL(iwl_connection_init_rx_config);
  1048. static void iwl_set_rate(struct iwl_priv *priv)
  1049. {
  1050. const struct ieee80211_supported_band *hw = NULL;
  1051. struct ieee80211_rate *rate;
  1052. int i;
  1053. hw = iwl_get_hw_mode(priv, priv->band);
  1054. if (!hw) {
  1055. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  1056. return;
  1057. }
  1058. priv->active_rate = 0;
  1059. priv->active_rate_basic = 0;
  1060. for (i = 0; i < hw->n_bitrates; i++) {
  1061. rate = &(hw->bitrates[i]);
  1062. if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
  1063. priv->active_rate |= (1 << rate->hw_value);
  1064. }
  1065. IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
  1066. priv->active_rate, priv->active_rate_basic);
  1067. /*
  1068. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  1069. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  1070. * OFDM
  1071. */
  1072. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  1073. priv->staging_rxon.cck_basic_rates =
  1074. ((priv->active_rate_basic &
  1075. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  1076. else
  1077. priv->staging_rxon.cck_basic_rates =
  1078. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1079. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  1080. priv->staging_rxon.ofdm_basic_rates =
  1081. ((priv->active_rate_basic &
  1082. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  1083. IWL_FIRST_OFDM_RATE) & 0xFF;
  1084. else
  1085. priv->staging_rxon.ofdm_basic_rates =
  1086. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1087. }
  1088. void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  1089. {
  1090. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1091. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  1092. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  1093. IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n",
  1094. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  1095. rxon->channel = csa->channel;
  1096. priv->staging_rxon.channel = csa->channel;
  1097. }
  1098. EXPORT_SYMBOL(iwl_rx_csa);
  1099. #ifdef CONFIG_IWLWIFI_DEBUG
  1100. static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
  1101. {
  1102. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  1103. IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
  1104. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  1105. IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  1106. IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  1107. IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
  1108. le32_to_cpu(rxon->filter_flags));
  1109. IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
  1110. IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
  1111. rxon->ofdm_basic_rates);
  1112. IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  1113. IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
  1114. IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  1115. IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  1116. }
  1117. #endif
  1118. /**
  1119. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  1120. */
  1121. void iwl_irq_handle_error(struct iwl_priv *priv)
  1122. {
  1123. /* Set the FW error flag -- cleared on iwl_down */
  1124. set_bit(STATUS_FW_ERROR, &priv->status);
  1125. /* Cancel currently queued command. */
  1126. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  1127. #ifdef CONFIG_IWLWIFI_DEBUG
  1128. if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) {
  1129. priv->cfg->ops->lib->dump_nic_error_log(priv);
  1130. priv->cfg->ops->lib->dump_nic_event_log(priv);
  1131. iwl_print_rx_config_cmd(priv);
  1132. }
  1133. #endif
  1134. wake_up_interruptible(&priv->wait_command_queue);
  1135. /* Keep the restart process from trying to send host
  1136. * commands by clearing the INIT status bit */
  1137. clear_bit(STATUS_READY, &priv->status);
  1138. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  1139. IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
  1140. "Restarting adapter due to uCode error.\n");
  1141. if (priv->cfg->mod_params->restart_fw)
  1142. queue_work(priv->workqueue, &priv->restart);
  1143. }
  1144. }
  1145. EXPORT_SYMBOL(iwl_irq_handle_error);
  1146. void iwl_configure_filter(struct ieee80211_hw *hw,
  1147. unsigned int changed_flags,
  1148. unsigned int *total_flags,
  1149. u64 multicast)
  1150. {
  1151. struct iwl_priv *priv = hw->priv;
  1152. __le32 *filter_flags = &priv->staging_rxon.filter_flags;
  1153. IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
  1154. changed_flags, *total_flags);
  1155. if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
  1156. if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
  1157. *filter_flags |= RXON_FILTER_PROMISC_MSK;
  1158. else
  1159. *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
  1160. }
  1161. if (changed_flags & FIF_ALLMULTI) {
  1162. if (*total_flags & FIF_ALLMULTI)
  1163. *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
  1164. else
  1165. *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
  1166. }
  1167. if (changed_flags & FIF_CONTROL) {
  1168. if (*total_flags & FIF_CONTROL)
  1169. *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
  1170. else
  1171. *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
  1172. }
  1173. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  1174. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  1175. *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
  1176. else
  1177. *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
  1178. }
  1179. /* We avoid iwl_commit_rxon here to commit the new filter flags
  1180. * since mac80211 will call ieee80211_hw_config immediately.
  1181. * (mc_list is not supported at this time). Otherwise, we need to
  1182. * queue a background iwl_commit_rxon work.
  1183. */
  1184. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  1185. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  1186. }
  1187. EXPORT_SYMBOL(iwl_configure_filter);
  1188. int iwl_setup_mac(struct iwl_priv *priv)
  1189. {
  1190. int ret;
  1191. struct ieee80211_hw *hw = priv->hw;
  1192. hw->rate_control_algorithm = "iwl-agn-rs";
  1193. /* Tell mac80211 our characteristics */
  1194. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  1195. IEEE80211_HW_NOISE_DBM |
  1196. IEEE80211_HW_AMPDU_AGGREGATION |
  1197. IEEE80211_HW_SPECTRUM_MGMT;
  1198. if (!priv->cfg->broken_powersave)
  1199. hw->flags |= IEEE80211_HW_SUPPORTS_PS |
  1200. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  1201. hw->wiphy->interface_modes =
  1202. BIT(NL80211_IFTYPE_STATION) |
  1203. BIT(NL80211_IFTYPE_ADHOC);
  1204. hw->wiphy->custom_regulatory = true;
  1205. /* Firmware does not support this */
  1206. hw->wiphy->disable_beacon_hints = true;
  1207. /*
  1208. * For now, disable PS by default because it affects
  1209. * RX performance significantly.
  1210. */
  1211. hw->wiphy->ps_default = false;
  1212. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
  1213. /* we create the 802.11 header and a zero-length SSID element */
  1214. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  1215. /* Default value; 4 EDCA QOS priorities */
  1216. hw->queues = 4;
  1217. hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
  1218. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  1219. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  1220. &priv->bands[IEEE80211_BAND_2GHZ];
  1221. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  1222. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  1223. &priv->bands[IEEE80211_BAND_5GHZ];
  1224. ret = ieee80211_register_hw(priv->hw);
  1225. if (ret) {
  1226. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  1227. return ret;
  1228. }
  1229. priv->mac80211_registered = 1;
  1230. return 0;
  1231. }
  1232. EXPORT_SYMBOL(iwl_setup_mac);
  1233. int iwl_set_hw_params(struct iwl_priv *priv)
  1234. {
  1235. priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
  1236. priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
  1237. if (priv->cfg->mod_params->amsdu_size_8K)
  1238. priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
  1239. else
  1240. priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
  1241. priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
  1242. priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
  1243. if (priv->cfg->mod_params->disable_11n)
  1244. priv->cfg->sku &= ~IWL_SKU_N;
  1245. /* Device-specific setup */
  1246. return priv->cfg->ops->lib->set_hw_params(priv);
  1247. }
  1248. EXPORT_SYMBOL(iwl_set_hw_params);
  1249. int iwl_init_drv(struct iwl_priv *priv)
  1250. {
  1251. int ret;
  1252. priv->ibss_beacon = NULL;
  1253. spin_lock_init(&priv->lock);
  1254. spin_lock_init(&priv->sta_lock);
  1255. spin_lock_init(&priv->hcmd_lock);
  1256. INIT_LIST_HEAD(&priv->free_frames);
  1257. mutex_init(&priv->mutex);
  1258. /* Clear the driver's (not device's) station table */
  1259. iwl_clear_stations_table(priv);
  1260. priv->data_retry_limit = -1;
  1261. priv->ieee_channels = NULL;
  1262. priv->ieee_rates = NULL;
  1263. priv->band = IEEE80211_BAND_2GHZ;
  1264. priv->iw_mode = NL80211_IFTYPE_STATION;
  1265. priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
  1266. /* Choose which receivers/antennas to use */
  1267. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1268. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1269. iwl_init_scan_params(priv);
  1270. iwl_reset_qos(priv);
  1271. priv->qos_data.qos_active = 0;
  1272. priv->qos_data.qos_cap.val = 0;
  1273. priv->rates_mask = IWL_RATES_MASK;
  1274. /* Set the tx_power_user_lmt to the lowest power level
  1275. * this value will get overwritten by channel max power avg
  1276. * from eeprom */
  1277. priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
  1278. ret = iwl_init_channel_map(priv);
  1279. if (ret) {
  1280. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  1281. goto err;
  1282. }
  1283. ret = iwlcore_init_geos(priv);
  1284. if (ret) {
  1285. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  1286. goto err_free_channel_map;
  1287. }
  1288. iwlcore_init_hw_rates(priv, priv->ieee_rates);
  1289. return 0;
  1290. err_free_channel_map:
  1291. iwl_free_channel_map(priv);
  1292. err:
  1293. return ret;
  1294. }
  1295. EXPORT_SYMBOL(iwl_init_drv);
  1296. int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
  1297. {
  1298. int ret = 0;
  1299. s8 prev_tx_power = priv->tx_power_user_lmt;
  1300. if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
  1301. IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
  1302. tx_power,
  1303. IWL_TX_POWER_TARGET_POWER_MIN);
  1304. return -EINVAL;
  1305. }
  1306. if (tx_power > priv->tx_power_device_lmt) {
  1307. IWL_WARN(priv,
  1308. "Requested user TXPOWER %d above upper limit %d.\n",
  1309. tx_power, priv->tx_power_device_lmt);
  1310. return -EINVAL;
  1311. }
  1312. if (priv->tx_power_user_lmt != tx_power)
  1313. force = true;
  1314. /* if nic is not up don't send command */
  1315. if (iwl_is_ready_rf(priv)) {
  1316. priv->tx_power_user_lmt = tx_power;
  1317. if (force && priv->cfg->ops->lib->send_tx_power)
  1318. ret = priv->cfg->ops->lib->send_tx_power(priv);
  1319. else if (!priv->cfg->ops->lib->send_tx_power)
  1320. ret = -EOPNOTSUPP;
  1321. /*
  1322. * if fail to set tx_power, restore the orig. tx power
  1323. */
  1324. if (ret)
  1325. priv->tx_power_user_lmt = prev_tx_power;
  1326. }
  1327. /*
  1328. * Even this is an async host command, the command
  1329. * will always report success from uCode
  1330. * So once driver can placing the command into the queue
  1331. * successfully, driver can use priv->tx_power_user_lmt
  1332. * to reflect the current tx power
  1333. */
  1334. return ret;
  1335. }
  1336. EXPORT_SYMBOL(iwl_set_tx_power);
  1337. void iwl_uninit_drv(struct iwl_priv *priv)
  1338. {
  1339. iwl_calib_free_results(priv);
  1340. iwlcore_free_geos(priv);
  1341. iwl_free_channel_map(priv);
  1342. kfree(priv->scan);
  1343. }
  1344. EXPORT_SYMBOL(iwl_uninit_drv);
  1345. #define ICT_COUNT (PAGE_SIZE/sizeof(u32))
  1346. /* Free dram table */
  1347. void iwl_free_isr_ict(struct iwl_priv *priv)
  1348. {
  1349. if (priv->ict_tbl_vir) {
  1350. pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
  1351. PAGE_SIZE, priv->ict_tbl_vir,
  1352. priv->ict_tbl_dma);
  1353. priv->ict_tbl_vir = NULL;
  1354. }
  1355. }
  1356. EXPORT_SYMBOL(iwl_free_isr_ict);
  1357. /* allocate dram shared table it is a PAGE_SIZE aligned
  1358. * also reset all data related to ICT table interrupt.
  1359. */
  1360. int iwl_alloc_isr_ict(struct iwl_priv *priv)
  1361. {
  1362. if (priv->cfg->use_isr_legacy)
  1363. return 0;
  1364. /* allocate shrared data table */
  1365. priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
  1366. ICT_COUNT) + PAGE_SIZE,
  1367. &priv->ict_tbl_dma);
  1368. if (!priv->ict_tbl_vir)
  1369. return -ENOMEM;
  1370. /* align table to PAGE_SIZE boundry */
  1371. priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
  1372. IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
  1373. (unsigned long long)priv->ict_tbl_dma,
  1374. (unsigned long long)priv->aligned_ict_tbl_dma,
  1375. (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
  1376. priv->ict_tbl = priv->ict_tbl_vir +
  1377. (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
  1378. IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
  1379. priv->ict_tbl, priv->ict_tbl_vir,
  1380. (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
  1381. /* reset table and index to all 0 */
  1382. memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
  1383. priv->ict_index = 0;
  1384. /* add periodic RX interrupt */
  1385. priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
  1386. return 0;
  1387. }
  1388. EXPORT_SYMBOL(iwl_alloc_isr_ict);
  1389. /* Device is going up inform it about using ICT interrupt table,
  1390. * also we need to tell the driver to start using ICT interrupt.
  1391. */
  1392. int iwl_reset_ict(struct iwl_priv *priv)
  1393. {
  1394. u32 val;
  1395. unsigned long flags;
  1396. if (!priv->ict_tbl_vir)
  1397. return 0;
  1398. spin_lock_irqsave(&priv->lock, flags);
  1399. iwl_disable_interrupts(priv);
  1400. memset(&priv->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
  1401. val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
  1402. val |= CSR_DRAM_INT_TBL_ENABLE;
  1403. val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
  1404. IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
  1405. "aligned dma address %Lx\n",
  1406. val, (unsigned long long)priv->aligned_ict_tbl_dma);
  1407. iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
  1408. priv->use_ict = true;
  1409. priv->ict_index = 0;
  1410. iwl_write32(priv, CSR_INT, priv->inta_mask);
  1411. iwl_enable_interrupts(priv);
  1412. spin_unlock_irqrestore(&priv->lock, flags);
  1413. return 0;
  1414. }
  1415. EXPORT_SYMBOL(iwl_reset_ict);
  1416. /* Device is going down disable ict interrupt usage */
  1417. void iwl_disable_ict(struct iwl_priv *priv)
  1418. {
  1419. unsigned long flags;
  1420. spin_lock_irqsave(&priv->lock, flags);
  1421. priv->use_ict = false;
  1422. spin_unlock_irqrestore(&priv->lock, flags);
  1423. }
  1424. EXPORT_SYMBOL(iwl_disable_ict);
  1425. /* interrupt handler using ict table, with this interrupt driver will
  1426. * stop using INTA register to get device's interrupt, reading this register
  1427. * is expensive, device will write interrupts in ICT dram table, increment
  1428. * index then will fire interrupt to driver, driver will OR all ICT table
  1429. * entries from current index up to table entry with 0 value. the result is
  1430. * the interrupt we need to service, driver will set the entries back to 0 and
  1431. * set index.
  1432. */
  1433. irqreturn_t iwl_isr_ict(int irq, void *data)
  1434. {
  1435. struct iwl_priv *priv = data;
  1436. u32 inta, inta_mask;
  1437. u32 val = 0;
  1438. if (!priv)
  1439. return IRQ_NONE;
  1440. /* dram interrupt table not set yet,
  1441. * use legacy interrupt.
  1442. */
  1443. if (!priv->use_ict)
  1444. return iwl_isr(irq, data);
  1445. spin_lock(&priv->lock);
  1446. /* Disable (but don't clear!) interrupts here to avoid
  1447. * back-to-back ISRs and sporadic interrupts from our NIC.
  1448. * If we have something to service, the tasklet will re-enable ints.
  1449. * If we *don't* have something, we'll re-enable before leaving here.
  1450. */
  1451. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1452. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1453. /* Ignore interrupt if there's nothing in NIC to service.
  1454. * This may be due to IRQ shared with another device,
  1455. * or due to sporadic interrupts thrown from our NIC. */
  1456. if (!priv->ict_tbl[priv->ict_index]) {
  1457. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
  1458. goto none;
  1459. }
  1460. /* read all entries that not 0 start with ict_index */
  1461. while (priv->ict_tbl[priv->ict_index]) {
  1462. val |= le32_to_cpu(priv->ict_tbl[priv->ict_index]);
  1463. IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
  1464. priv->ict_index,
  1465. le32_to_cpu(priv->ict_tbl[priv->ict_index]));
  1466. priv->ict_tbl[priv->ict_index] = 0;
  1467. priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
  1468. ICT_COUNT);
  1469. }
  1470. /* We should not get this value, just ignore it. */
  1471. if (val == 0xffffffff)
  1472. val = 0;
  1473. inta = (0xff & val) | ((0xff00 & val) << 16);
  1474. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
  1475. inta, inta_mask, val);
  1476. inta &= priv->inta_mask;
  1477. priv->inta |= inta;
  1478. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1479. if (likely(inta))
  1480. tasklet_schedule(&priv->irq_tasklet);
  1481. else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
  1482. /* Allow interrupt if was disabled by this handler and
  1483. * no tasklet was schedules, We should not enable interrupt,
  1484. * tasklet will enable it.
  1485. */
  1486. iwl_enable_interrupts(priv);
  1487. }
  1488. spin_unlock(&priv->lock);
  1489. return IRQ_HANDLED;
  1490. none:
  1491. /* re-enable interrupts here since we don't have anything to service.
  1492. * only Re-enable if disabled by irq.
  1493. */
  1494. if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
  1495. iwl_enable_interrupts(priv);
  1496. spin_unlock(&priv->lock);
  1497. return IRQ_NONE;
  1498. }
  1499. EXPORT_SYMBOL(iwl_isr_ict);
  1500. static irqreturn_t iwl_isr(int irq, void *data)
  1501. {
  1502. struct iwl_priv *priv = data;
  1503. u32 inta, inta_mask;
  1504. #ifdef CONFIG_IWLWIFI_DEBUG
  1505. u32 inta_fh;
  1506. #endif
  1507. if (!priv)
  1508. return IRQ_NONE;
  1509. spin_lock(&priv->lock);
  1510. /* Disable (but don't clear!) interrupts here to avoid
  1511. * back-to-back ISRs and sporadic interrupts from our NIC.
  1512. * If we have something to service, the tasklet will re-enable ints.
  1513. * If we *don't* have something, we'll re-enable before leaving here. */
  1514. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1515. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1516. /* Discover which interrupts are active/pending */
  1517. inta = iwl_read32(priv, CSR_INT);
  1518. /* Ignore interrupt if there's nothing in NIC to service.
  1519. * This may be due to IRQ shared with another device,
  1520. * or due to sporadic interrupts thrown from our NIC. */
  1521. if (!inta) {
  1522. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
  1523. goto none;
  1524. }
  1525. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  1526. /* Hardware disappeared. It might have already raised
  1527. * an interrupt */
  1528. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  1529. goto unplugged;
  1530. }
  1531. #ifdef CONFIG_IWLWIFI_DEBUG
  1532. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1533. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1534. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
  1535. "fh 0x%08x\n", inta, inta_mask, inta_fh);
  1536. }
  1537. #endif
  1538. priv->inta |= inta;
  1539. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1540. if (likely(inta))
  1541. tasklet_schedule(&priv->irq_tasklet);
  1542. else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
  1543. iwl_enable_interrupts(priv);
  1544. unplugged:
  1545. spin_unlock(&priv->lock);
  1546. return IRQ_HANDLED;
  1547. none:
  1548. /* re-enable interrupts here since we don't have anything to service. */
  1549. /* only Re-enable if diabled by irq and no schedules tasklet. */
  1550. if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
  1551. iwl_enable_interrupts(priv);
  1552. spin_unlock(&priv->lock);
  1553. return IRQ_NONE;
  1554. }
  1555. irqreturn_t iwl_isr_legacy(int irq, void *data)
  1556. {
  1557. struct iwl_priv *priv = data;
  1558. u32 inta, inta_mask;
  1559. u32 inta_fh;
  1560. if (!priv)
  1561. return IRQ_NONE;
  1562. spin_lock(&priv->lock);
  1563. /* Disable (but don't clear!) interrupts here to avoid
  1564. * back-to-back ISRs and sporadic interrupts from our NIC.
  1565. * If we have something to service, the tasklet will re-enable ints.
  1566. * If we *don't* have something, we'll re-enable before leaving here. */
  1567. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1568. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1569. /* Discover which interrupts are active/pending */
  1570. inta = iwl_read32(priv, CSR_INT);
  1571. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1572. /* Ignore interrupt if there's nothing in NIC to service.
  1573. * This may be due to IRQ shared with another device,
  1574. * or due to sporadic interrupts thrown from our NIC. */
  1575. if (!inta && !inta_fh) {
  1576. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
  1577. goto none;
  1578. }
  1579. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  1580. /* Hardware disappeared. It might have already raised
  1581. * an interrupt */
  1582. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  1583. goto unplugged;
  1584. }
  1585. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1586. inta, inta_mask, inta_fh);
  1587. inta &= ~CSR_INT_BIT_SCD;
  1588. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1589. if (likely(inta || inta_fh))
  1590. tasklet_schedule(&priv->irq_tasklet);
  1591. unplugged:
  1592. spin_unlock(&priv->lock);
  1593. return IRQ_HANDLED;
  1594. none:
  1595. /* re-enable interrupts here since we don't have anything to service. */
  1596. /* only Re-enable if diabled by irq */
  1597. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1598. iwl_enable_interrupts(priv);
  1599. spin_unlock(&priv->lock);
  1600. return IRQ_NONE;
  1601. }
  1602. EXPORT_SYMBOL(iwl_isr_legacy);
  1603. int iwl_send_bt_config(struct iwl_priv *priv)
  1604. {
  1605. struct iwl_bt_cmd bt_cmd = {
  1606. .flags = 3,
  1607. .lead_time = 0xAA,
  1608. .max_kill = 1,
  1609. .kill_ack_mask = 0,
  1610. .kill_cts_mask = 0,
  1611. };
  1612. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1613. sizeof(struct iwl_bt_cmd), &bt_cmd);
  1614. }
  1615. EXPORT_SYMBOL(iwl_send_bt_config);
  1616. int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
  1617. {
  1618. u32 stat_flags = 0;
  1619. struct iwl_host_cmd cmd = {
  1620. .id = REPLY_STATISTICS_CMD,
  1621. .flags = flags,
  1622. .len = sizeof(stat_flags),
  1623. .data = (u8 *) &stat_flags,
  1624. };
  1625. return iwl_send_cmd(priv, &cmd);
  1626. }
  1627. EXPORT_SYMBOL(iwl_send_statistics_request);
  1628. /**
  1629. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1630. * using sample data 100 bytes apart. If these sample points are good,
  1631. * it's a pretty good bet that everything between them is good, too.
  1632. */
  1633. static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1634. {
  1635. u32 val;
  1636. int ret = 0;
  1637. u32 errcnt = 0;
  1638. u32 i;
  1639. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1640. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1641. /* read data comes through single port, auto-incr addr */
  1642. /* NOTE: Use the debugless read so we don't flood kernel log
  1643. * if IWL_DL_IO is set */
  1644. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1645. i + IWL49_RTC_INST_LOWER_BOUND);
  1646. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1647. if (val != le32_to_cpu(*image)) {
  1648. ret = -EIO;
  1649. errcnt++;
  1650. if (errcnt >= 3)
  1651. break;
  1652. }
  1653. }
  1654. return ret;
  1655. }
  1656. /**
  1657. * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
  1658. * looking at all data.
  1659. */
  1660. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  1661. u32 len)
  1662. {
  1663. u32 val;
  1664. u32 save_len = len;
  1665. int ret = 0;
  1666. u32 errcnt;
  1667. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1668. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1669. IWL49_RTC_INST_LOWER_BOUND);
  1670. errcnt = 0;
  1671. for (; len > 0; len -= sizeof(u32), image++) {
  1672. /* read data comes through single port, auto-incr addr */
  1673. /* NOTE: Use the debugless read so we don't flood kernel log
  1674. * if IWL_DL_IO is set */
  1675. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1676. if (val != le32_to_cpu(*image)) {
  1677. IWL_ERR(priv, "uCode INST section is invalid at "
  1678. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1679. save_len - len, val, le32_to_cpu(*image));
  1680. ret = -EIO;
  1681. errcnt++;
  1682. if (errcnt >= 20)
  1683. break;
  1684. }
  1685. }
  1686. if (!errcnt)
  1687. IWL_DEBUG_INFO(priv,
  1688. "ucode image in INSTRUCTION memory is good\n");
  1689. return ret;
  1690. }
  1691. /**
  1692. * iwl_verify_ucode - determine which instruction image is in SRAM,
  1693. * and verify its contents
  1694. */
  1695. int iwl_verify_ucode(struct iwl_priv *priv)
  1696. {
  1697. __le32 *image;
  1698. u32 len;
  1699. int ret;
  1700. /* Try bootstrap */
  1701. image = (__le32 *)priv->ucode_boot.v_addr;
  1702. len = priv->ucode_boot.len;
  1703. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1704. if (!ret) {
  1705. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1706. return 0;
  1707. }
  1708. /* Try initialize */
  1709. image = (__le32 *)priv->ucode_init.v_addr;
  1710. len = priv->ucode_init.len;
  1711. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1712. if (!ret) {
  1713. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1714. return 0;
  1715. }
  1716. /* Try runtime/protocol */
  1717. image = (__le32 *)priv->ucode_code.v_addr;
  1718. len = priv->ucode_code.len;
  1719. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1720. if (!ret) {
  1721. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1722. return 0;
  1723. }
  1724. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1725. /* Since nothing seems to match, show first several data entries in
  1726. * instruction SRAM, so maybe visual inspection will give a clue.
  1727. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1728. image = (__le32 *)priv->ucode_boot.v_addr;
  1729. len = priv->ucode_boot.len;
  1730. ret = iwl_verify_inst_full(priv, image, len);
  1731. return ret;
  1732. }
  1733. EXPORT_SYMBOL(iwl_verify_ucode);
  1734. void iwl_rf_kill_ct_config(struct iwl_priv *priv)
  1735. {
  1736. struct iwl_ct_kill_config cmd;
  1737. struct iwl_ct_kill_throttling_config adv_cmd;
  1738. unsigned long flags;
  1739. int ret = 0;
  1740. spin_lock_irqsave(&priv->lock, flags);
  1741. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  1742. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  1743. spin_unlock_irqrestore(&priv->lock, flags);
  1744. priv->thermal_throttle.ct_kill_toggle = false;
  1745. switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
  1746. case CSR_HW_REV_TYPE_1000:
  1747. case CSR_HW_REV_TYPE_6x00:
  1748. case CSR_HW_REV_TYPE_6x50:
  1749. adv_cmd.critical_temperature_enter =
  1750. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1751. adv_cmd.critical_temperature_exit =
  1752. cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
  1753. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1754. sizeof(adv_cmd), &adv_cmd);
  1755. if (ret)
  1756. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1757. else
  1758. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1759. "succeeded, "
  1760. "critical temperature enter is %d,"
  1761. "exit is %d\n",
  1762. priv->hw_params.ct_kill_threshold,
  1763. priv->hw_params.ct_kill_exit_threshold);
  1764. break;
  1765. default:
  1766. cmd.critical_temperature_R =
  1767. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1768. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1769. sizeof(cmd), &cmd);
  1770. if (ret)
  1771. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1772. else
  1773. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1774. "succeeded, "
  1775. "critical temperature is %d\n",
  1776. priv->hw_params.ct_kill_threshold);
  1777. break;
  1778. }
  1779. }
  1780. EXPORT_SYMBOL(iwl_rf_kill_ct_config);
  1781. /*
  1782. * CARD_STATE_CMD
  1783. *
  1784. * Use: Sets the device's internal card state to enable, disable, or halt
  1785. *
  1786. * When in the 'enable' state the card operates as normal.
  1787. * When in the 'disable' state, the card enters into a low power mode.
  1788. * When in the 'halt' state, the card is shut down and must be fully
  1789. * restarted to come back on.
  1790. */
  1791. int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1792. {
  1793. struct iwl_host_cmd cmd = {
  1794. .id = REPLY_CARD_STATE_CMD,
  1795. .len = sizeof(u32),
  1796. .data = &flags,
  1797. .flags = meta_flag,
  1798. };
  1799. return iwl_send_cmd(priv, &cmd);
  1800. }
  1801. void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  1802. struct iwl_rx_mem_buffer *rxb)
  1803. {
  1804. #ifdef CONFIG_IWLWIFI_DEBUG
  1805. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1806. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  1807. IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
  1808. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  1809. #endif
  1810. }
  1811. EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
  1812. void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  1813. struct iwl_rx_mem_buffer *rxb)
  1814. {
  1815. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1816. u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  1817. IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
  1818. "notification for %s:\n", len,
  1819. get_cmd_string(pkt->hdr.cmd));
  1820. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
  1821. }
  1822. EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
  1823. void iwl_rx_reply_error(struct iwl_priv *priv,
  1824. struct iwl_rx_mem_buffer *rxb)
  1825. {
  1826. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1827. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  1828. "seq 0x%04X ser 0x%08X\n",
  1829. le32_to_cpu(pkt->u.err_resp.error_type),
  1830. get_cmd_string(pkt->u.err_resp.cmd_id),
  1831. pkt->u.err_resp.cmd_id,
  1832. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  1833. le32_to_cpu(pkt->u.err_resp.error_info));
  1834. }
  1835. EXPORT_SYMBOL(iwl_rx_reply_error);
  1836. void iwl_clear_isr_stats(struct iwl_priv *priv)
  1837. {
  1838. memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
  1839. }
  1840. int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1841. const struct ieee80211_tx_queue_params *params)
  1842. {
  1843. struct iwl_priv *priv = hw->priv;
  1844. unsigned long flags;
  1845. int q;
  1846. IWL_DEBUG_MAC80211(priv, "enter\n");
  1847. if (!iwl_is_ready_rf(priv)) {
  1848. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1849. return -EIO;
  1850. }
  1851. if (queue >= AC_NUM) {
  1852. IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
  1853. return 0;
  1854. }
  1855. q = AC_NUM - 1 - queue;
  1856. spin_lock_irqsave(&priv->lock, flags);
  1857. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  1858. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  1859. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  1860. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  1861. cpu_to_le16((params->txop * 32));
  1862. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  1863. priv->qos_data.qos_active = 1;
  1864. if (priv->iw_mode == NL80211_IFTYPE_AP)
  1865. iwl_activate_qos(priv, 1);
  1866. else if (priv->assoc_id && iwl_is_associated(priv))
  1867. iwl_activate_qos(priv, 0);
  1868. spin_unlock_irqrestore(&priv->lock, flags);
  1869. IWL_DEBUG_MAC80211(priv, "leave\n");
  1870. return 0;
  1871. }
  1872. EXPORT_SYMBOL(iwl_mac_conf_tx);
  1873. static void iwl_ht_conf(struct iwl_priv *priv,
  1874. struct ieee80211_bss_conf *bss_conf)
  1875. {
  1876. struct ieee80211_sta_ht_cap *ht_conf;
  1877. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  1878. struct ieee80211_sta *sta;
  1879. IWL_DEBUG_MAC80211(priv, "enter: \n");
  1880. if (!iwl_conf->is_ht)
  1881. return;
  1882. /*
  1883. * It is totally wrong to base global information on something
  1884. * that is valid only when associated, alas, this driver works
  1885. * that way and I don't know how to fix it.
  1886. */
  1887. rcu_read_lock();
  1888. sta = ieee80211_find_sta(priv->hw, priv->bssid);
  1889. if (!sta) {
  1890. rcu_read_unlock();
  1891. return;
  1892. }
  1893. ht_conf = &sta->ht_cap;
  1894. iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
  1895. memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
  1896. iwl_conf->ht_protection =
  1897. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  1898. iwl_conf->non_GF_STA_present =
  1899. !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  1900. rcu_read_unlock();
  1901. IWL_DEBUG_MAC80211(priv, "leave\n");
  1902. }
  1903. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  1904. void iwl_bss_info_changed(struct ieee80211_hw *hw,
  1905. struct ieee80211_vif *vif,
  1906. struct ieee80211_bss_conf *bss_conf,
  1907. u32 changes)
  1908. {
  1909. struct iwl_priv *priv = hw->priv;
  1910. int ret;
  1911. IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
  1912. if (!iwl_is_alive(priv))
  1913. return;
  1914. mutex_lock(&priv->mutex);
  1915. if (changes & BSS_CHANGED_BEACON &&
  1916. priv->iw_mode == NL80211_IFTYPE_AP) {
  1917. dev_kfree_skb(priv->ibss_beacon);
  1918. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  1919. }
  1920. if (changes & BSS_CHANGED_BEACON_INT) {
  1921. priv->beacon_int = bss_conf->beacon_int;
  1922. /* TODO: in AP mode, do something to make this take effect */
  1923. }
  1924. if (changes & BSS_CHANGED_BSSID) {
  1925. IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
  1926. /*
  1927. * If there is currently a HW scan going on in the
  1928. * background then we need to cancel it else the RXON
  1929. * below/in post_associate will fail.
  1930. */
  1931. if (iwl_scan_cancel_timeout(priv, 100)) {
  1932. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  1933. IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
  1934. mutex_unlock(&priv->mutex);
  1935. return;
  1936. }
  1937. /* mac80211 only sets assoc when in STATION mode */
  1938. if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
  1939. bss_conf->assoc) {
  1940. memcpy(priv->staging_rxon.bssid_addr,
  1941. bss_conf->bssid, ETH_ALEN);
  1942. /* currently needed in a few places */
  1943. memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
  1944. } else {
  1945. priv->staging_rxon.filter_flags &=
  1946. ~RXON_FILTER_ASSOC_MSK;
  1947. }
  1948. }
  1949. /*
  1950. * This needs to be after setting the BSSID in case
  1951. * mac80211 decides to do both changes at once because
  1952. * it will invoke post_associate.
  1953. */
  1954. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  1955. changes & BSS_CHANGED_BEACON) {
  1956. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  1957. if (beacon)
  1958. iwl_mac_beacon_update(hw, beacon);
  1959. }
  1960. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  1961. IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
  1962. bss_conf->use_short_preamble);
  1963. if (bss_conf->use_short_preamble)
  1964. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1965. else
  1966. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1967. }
  1968. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  1969. IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
  1970. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  1971. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  1972. else
  1973. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  1974. }
  1975. if (changes & BSS_CHANGED_BASIC_RATES) {
  1976. /* XXX use this information
  1977. *
  1978. * To do that, remove code from iwl_set_rate() and put something
  1979. * like this here:
  1980. *
  1981. if (A-band)
  1982. priv->staging_rxon.ofdm_basic_rates =
  1983. bss_conf->basic_rates;
  1984. else
  1985. priv->staging_rxon.ofdm_basic_rates =
  1986. bss_conf->basic_rates >> 4;
  1987. priv->staging_rxon.cck_basic_rates =
  1988. bss_conf->basic_rates & 0xF;
  1989. */
  1990. }
  1991. if (changes & BSS_CHANGED_HT) {
  1992. iwl_ht_conf(priv, bss_conf);
  1993. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1994. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1995. }
  1996. if (changes & BSS_CHANGED_ASSOC) {
  1997. IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
  1998. if (bss_conf->assoc) {
  1999. priv->assoc_id = bss_conf->aid;
  2000. priv->beacon_int = bss_conf->beacon_int;
  2001. priv->timestamp = bss_conf->timestamp;
  2002. priv->assoc_capability = bss_conf->assoc_capability;
  2003. /*
  2004. * We have just associated, don't start scan too early
  2005. * leave time for EAPOL exchange to complete.
  2006. *
  2007. * XXX: do this in mac80211
  2008. */
  2009. priv->next_scan_jiffies = jiffies +
  2010. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  2011. if (!iwl_is_rfkill(priv))
  2012. priv->cfg->ops->lib->post_associate(priv);
  2013. } else
  2014. priv->assoc_id = 0;
  2015. }
  2016. if (changes && iwl_is_associated(priv) && priv->assoc_id) {
  2017. IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
  2018. changes);
  2019. ret = iwl_send_rxon_assoc(priv);
  2020. if (!ret) {
  2021. /* Sync active_rxon with latest change. */
  2022. memcpy((void *)&priv->active_rxon,
  2023. &priv->staging_rxon,
  2024. sizeof(struct iwl_rxon_cmd));
  2025. }
  2026. }
  2027. mutex_unlock(&priv->mutex);
  2028. IWL_DEBUG_MAC80211(priv, "leave\n");
  2029. }
  2030. EXPORT_SYMBOL(iwl_bss_info_changed);
  2031. int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  2032. {
  2033. struct iwl_priv *priv = hw->priv;
  2034. unsigned long flags;
  2035. __le64 timestamp;
  2036. IWL_DEBUG_MAC80211(priv, "enter\n");
  2037. if (!iwl_is_ready_rf(priv)) {
  2038. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  2039. return -EIO;
  2040. }
  2041. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  2042. IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
  2043. return -EIO;
  2044. }
  2045. spin_lock_irqsave(&priv->lock, flags);
  2046. if (priv->ibss_beacon)
  2047. dev_kfree_skb(priv->ibss_beacon);
  2048. priv->ibss_beacon = skb;
  2049. priv->assoc_id = 0;
  2050. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  2051. priv->timestamp = le64_to_cpu(timestamp);
  2052. IWL_DEBUG_MAC80211(priv, "leave\n");
  2053. spin_unlock_irqrestore(&priv->lock, flags);
  2054. iwl_reset_qos(priv);
  2055. priv->cfg->ops->lib->post_associate(priv);
  2056. return 0;
  2057. }
  2058. EXPORT_SYMBOL(iwl_mac_beacon_update);
  2059. int iwl_set_mode(struct iwl_priv *priv, int mode)
  2060. {
  2061. if (mode == NL80211_IFTYPE_ADHOC) {
  2062. const struct iwl_channel_info *ch_info;
  2063. ch_info = iwl_get_channel_info(priv,
  2064. priv->band,
  2065. le16_to_cpu(priv->staging_rxon.channel));
  2066. if (!ch_info || !is_channel_ibss(ch_info)) {
  2067. IWL_ERR(priv, "channel %d not IBSS channel\n",
  2068. le16_to_cpu(priv->staging_rxon.channel));
  2069. return -EINVAL;
  2070. }
  2071. }
  2072. iwl_connection_init_rx_config(priv, mode);
  2073. if (priv->cfg->ops->hcmd->set_rxon_chain)
  2074. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  2075. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2076. iwl_clear_stations_table(priv);
  2077. /* dont commit rxon if rf-kill is on*/
  2078. if (!iwl_is_ready_rf(priv))
  2079. return -EAGAIN;
  2080. iwlcore_commit_rxon(priv);
  2081. return 0;
  2082. }
  2083. EXPORT_SYMBOL(iwl_set_mode);
  2084. int iwl_mac_add_interface(struct ieee80211_hw *hw,
  2085. struct ieee80211_if_init_conf *conf)
  2086. {
  2087. struct iwl_priv *priv = hw->priv;
  2088. unsigned long flags;
  2089. IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
  2090. if (priv->vif) {
  2091. IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
  2092. return -EOPNOTSUPP;
  2093. }
  2094. spin_lock_irqsave(&priv->lock, flags);
  2095. priv->vif = conf->vif;
  2096. priv->iw_mode = conf->type;
  2097. spin_unlock_irqrestore(&priv->lock, flags);
  2098. mutex_lock(&priv->mutex);
  2099. if (conf->mac_addr) {
  2100. IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
  2101. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  2102. }
  2103. if (iwl_set_mode(priv, conf->type) == -EAGAIN)
  2104. /* we are not ready, will run again when ready */
  2105. set_bit(STATUS_MODE_PENDING, &priv->status);
  2106. mutex_unlock(&priv->mutex);
  2107. IWL_DEBUG_MAC80211(priv, "leave\n");
  2108. return 0;
  2109. }
  2110. EXPORT_SYMBOL(iwl_mac_add_interface);
  2111. void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  2112. struct ieee80211_if_init_conf *conf)
  2113. {
  2114. struct iwl_priv *priv = hw->priv;
  2115. IWL_DEBUG_MAC80211(priv, "enter\n");
  2116. mutex_lock(&priv->mutex);
  2117. if (iwl_is_ready_rf(priv)) {
  2118. iwl_scan_cancel_timeout(priv, 100);
  2119. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2120. iwlcore_commit_rxon(priv);
  2121. }
  2122. if (priv->vif == conf->vif) {
  2123. priv->vif = NULL;
  2124. memset(priv->bssid, 0, ETH_ALEN);
  2125. }
  2126. mutex_unlock(&priv->mutex);
  2127. IWL_DEBUG_MAC80211(priv, "leave\n");
  2128. }
  2129. EXPORT_SYMBOL(iwl_mac_remove_interface);
  2130. /**
  2131. * iwl_mac_config - mac80211 config callback
  2132. *
  2133. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  2134. * be set inappropriately and the driver currently sets the hardware up to
  2135. * use it whenever needed.
  2136. */
  2137. int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
  2138. {
  2139. struct iwl_priv *priv = hw->priv;
  2140. const struct iwl_channel_info *ch_info;
  2141. struct ieee80211_conf *conf = &hw->conf;
  2142. struct iwl_ht_info *ht_conf = &priv->current_ht_config;
  2143. unsigned long flags = 0;
  2144. int ret = 0;
  2145. u16 ch;
  2146. int scan_active = 0;
  2147. mutex_lock(&priv->mutex);
  2148. IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
  2149. conf->channel->hw_value, changed);
  2150. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  2151. test_bit(STATUS_SCANNING, &priv->status))) {
  2152. scan_active = 1;
  2153. IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
  2154. }
  2155. /* during scanning mac80211 will delay channel setting until
  2156. * scan finish with changed = 0
  2157. */
  2158. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  2159. if (scan_active)
  2160. goto set_ch_out;
  2161. ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
  2162. ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
  2163. if (!is_channel_valid(ch_info)) {
  2164. IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
  2165. ret = -EINVAL;
  2166. goto set_ch_out;
  2167. }
  2168. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  2169. !is_channel_ibss(ch_info)) {
  2170. IWL_ERR(priv, "channel %d in band %d not "
  2171. "IBSS channel\n",
  2172. conf->channel->hw_value, conf->channel->band);
  2173. ret = -EINVAL;
  2174. goto set_ch_out;
  2175. }
  2176. spin_lock_irqsave(&priv->lock, flags);
  2177. /* Configure HT40 channels */
  2178. ht_conf->is_ht = conf_is_ht(conf);
  2179. if (ht_conf->is_ht) {
  2180. if (conf_is_ht40_minus(conf)) {
  2181. ht_conf->extension_chan_offset =
  2182. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  2183. ht_conf->supported_chan_width =
  2184. IWL_CHANNEL_WIDTH_40MHZ;
  2185. } else if (conf_is_ht40_plus(conf)) {
  2186. ht_conf->extension_chan_offset =
  2187. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  2188. ht_conf->supported_chan_width =
  2189. IWL_CHANNEL_WIDTH_40MHZ;
  2190. } else {
  2191. ht_conf->extension_chan_offset =
  2192. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  2193. ht_conf->supported_chan_width =
  2194. IWL_CHANNEL_WIDTH_20MHZ;
  2195. }
  2196. } else
  2197. ht_conf->supported_chan_width = IWL_CHANNEL_WIDTH_20MHZ;
  2198. /* Default to no protection. Protection mode will later be set
  2199. * from BSS config in iwl_ht_conf */
  2200. ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
  2201. /* if we are switching from ht to 2.4 clear flags
  2202. * from any ht related info since 2.4 does not
  2203. * support ht */
  2204. if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
  2205. priv->staging_rxon.flags = 0;
  2206. iwl_set_rxon_channel(priv, conf->channel);
  2207. iwl_set_flags_for_band(priv, conf->channel->band);
  2208. spin_unlock_irqrestore(&priv->lock, flags);
  2209. set_ch_out:
  2210. /* The list of supported rates and rate mask can be different
  2211. * for each band; since the band may have changed, reset
  2212. * the rate mask to what mac80211 lists */
  2213. iwl_set_rate(priv);
  2214. }
  2215. if (changed & IEEE80211_CONF_CHANGE_PS) {
  2216. ret = iwl_power_update_mode(priv, false);
  2217. if (ret)
  2218. IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
  2219. }
  2220. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  2221. IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
  2222. priv->tx_power_user_lmt, conf->power_level);
  2223. iwl_set_tx_power(priv, conf->power_level, false);
  2224. }
  2225. /* call to ensure that 4965 rx_chain is set properly in monitor mode */
  2226. if (priv->cfg->ops->hcmd->set_rxon_chain)
  2227. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  2228. if (!iwl_is_ready(priv)) {
  2229. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  2230. goto out;
  2231. }
  2232. if (scan_active)
  2233. goto out;
  2234. if (memcmp(&priv->active_rxon,
  2235. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  2236. iwlcore_commit_rxon(priv);
  2237. else
  2238. IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
  2239. out:
  2240. IWL_DEBUG_MAC80211(priv, "leave\n");
  2241. mutex_unlock(&priv->mutex);
  2242. return ret;
  2243. }
  2244. EXPORT_SYMBOL(iwl_mac_config);
  2245. int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
  2246. struct ieee80211_tx_queue_stats *stats)
  2247. {
  2248. struct iwl_priv *priv = hw->priv;
  2249. int i, avail;
  2250. struct iwl_tx_queue *txq;
  2251. struct iwl_queue *q;
  2252. unsigned long flags;
  2253. IWL_DEBUG_MAC80211(priv, "enter\n");
  2254. if (!iwl_is_ready_rf(priv)) {
  2255. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  2256. return -EIO;
  2257. }
  2258. spin_lock_irqsave(&priv->lock, flags);
  2259. for (i = 0; i < AC_NUM; i++) {
  2260. txq = &priv->txq[i];
  2261. q = &txq->q;
  2262. avail = iwl_queue_space(q);
  2263. stats[i].len = q->n_window - avail;
  2264. stats[i].limit = q->n_window - q->high_mark;
  2265. stats[i].count = q->n_window;
  2266. }
  2267. spin_unlock_irqrestore(&priv->lock, flags);
  2268. IWL_DEBUG_MAC80211(priv, "leave\n");
  2269. return 0;
  2270. }
  2271. EXPORT_SYMBOL(iwl_mac_get_tx_stats);
  2272. void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  2273. {
  2274. struct iwl_priv *priv = hw->priv;
  2275. unsigned long flags;
  2276. mutex_lock(&priv->mutex);
  2277. IWL_DEBUG_MAC80211(priv, "enter\n");
  2278. spin_lock_irqsave(&priv->lock, flags);
  2279. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  2280. spin_unlock_irqrestore(&priv->lock, flags);
  2281. iwl_reset_qos(priv);
  2282. spin_lock_irqsave(&priv->lock, flags);
  2283. priv->assoc_id = 0;
  2284. priv->assoc_capability = 0;
  2285. priv->assoc_station_added = 0;
  2286. /* new association get rid of ibss beacon skb */
  2287. if (priv->ibss_beacon)
  2288. dev_kfree_skb(priv->ibss_beacon);
  2289. priv->ibss_beacon = NULL;
  2290. priv->beacon_int = priv->vif->bss_conf.beacon_int;
  2291. priv->timestamp = 0;
  2292. if ((priv->iw_mode == NL80211_IFTYPE_STATION))
  2293. priv->beacon_int = 0;
  2294. spin_unlock_irqrestore(&priv->lock, flags);
  2295. if (!iwl_is_ready_rf(priv)) {
  2296. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  2297. mutex_unlock(&priv->mutex);
  2298. return;
  2299. }
  2300. /* we are restarting association process
  2301. * clear RXON_FILTER_ASSOC_MSK bit
  2302. */
  2303. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  2304. iwl_scan_cancel_timeout(priv, 100);
  2305. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2306. iwlcore_commit_rxon(priv);
  2307. }
  2308. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  2309. IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
  2310. mutex_unlock(&priv->mutex);
  2311. return;
  2312. }
  2313. iwl_set_rate(priv);
  2314. mutex_unlock(&priv->mutex);
  2315. IWL_DEBUG_MAC80211(priv, "leave\n");
  2316. }
  2317. EXPORT_SYMBOL(iwl_mac_reset_tsf);
  2318. #ifdef CONFIG_IWLWIFI_DEBUGFS
  2319. #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
  2320. void iwl_reset_traffic_log(struct iwl_priv *priv)
  2321. {
  2322. priv->tx_traffic_idx = 0;
  2323. priv->rx_traffic_idx = 0;
  2324. if (priv->tx_traffic)
  2325. memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  2326. if (priv->rx_traffic)
  2327. memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  2328. }
  2329. int iwl_alloc_traffic_mem(struct iwl_priv *priv)
  2330. {
  2331. u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
  2332. if (iwl_debug_level & IWL_DL_TX) {
  2333. if (!priv->tx_traffic) {
  2334. priv->tx_traffic =
  2335. kzalloc(traffic_size, GFP_KERNEL);
  2336. if (!priv->tx_traffic)
  2337. return -ENOMEM;
  2338. }
  2339. }
  2340. if (iwl_debug_level & IWL_DL_RX) {
  2341. if (!priv->rx_traffic) {
  2342. priv->rx_traffic =
  2343. kzalloc(traffic_size, GFP_KERNEL);
  2344. if (!priv->rx_traffic)
  2345. return -ENOMEM;
  2346. }
  2347. }
  2348. iwl_reset_traffic_log(priv);
  2349. return 0;
  2350. }
  2351. EXPORT_SYMBOL(iwl_alloc_traffic_mem);
  2352. void iwl_free_traffic_mem(struct iwl_priv *priv)
  2353. {
  2354. kfree(priv->tx_traffic);
  2355. priv->tx_traffic = NULL;
  2356. kfree(priv->rx_traffic);
  2357. priv->rx_traffic = NULL;
  2358. }
  2359. EXPORT_SYMBOL(iwl_free_traffic_mem);
  2360. void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
  2361. u16 length, struct ieee80211_hdr *header)
  2362. {
  2363. __le16 fc;
  2364. u16 len;
  2365. if (likely(!(iwl_debug_level & IWL_DL_TX)))
  2366. return;
  2367. if (!priv->tx_traffic)
  2368. return;
  2369. fc = header->frame_control;
  2370. if (ieee80211_is_data(fc)) {
  2371. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  2372. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  2373. memcpy((priv->tx_traffic +
  2374. (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  2375. header, len);
  2376. priv->tx_traffic_idx =
  2377. (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  2378. }
  2379. }
  2380. EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
  2381. void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
  2382. u16 length, struct ieee80211_hdr *header)
  2383. {
  2384. __le16 fc;
  2385. u16 len;
  2386. if (likely(!(iwl_debug_level & IWL_DL_RX)))
  2387. return;
  2388. if (!priv->rx_traffic)
  2389. return;
  2390. fc = header->frame_control;
  2391. if (ieee80211_is_data(fc)) {
  2392. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  2393. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  2394. memcpy((priv->rx_traffic +
  2395. (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  2396. header, len);
  2397. priv->rx_traffic_idx =
  2398. (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  2399. }
  2400. }
  2401. EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
  2402. const char *get_mgmt_string(int cmd)
  2403. {
  2404. switch (cmd) {
  2405. IWL_CMD(MANAGEMENT_ASSOC_REQ);
  2406. IWL_CMD(MANAGEMENT_ASSOC_RESP);
  2407. IWL_CMD(MANAGEMENT_REASSOC_REQ);
  2408. IWL_CMD(MANAGEMENT_REASSOC_RESP);
  2409. IWL_CMD(MANAGEMENT_PROBE_REQ);
  2410. IWL_CMD(MANAGEMENT_PROBE_RESP);
  2411. IWL_CMD(MANAGEMENT_BEACON);
  2412. IWL_CMD(MANAGEMENT_ATIM);
  2413. IWL_CMD(MANAGEMENT_DISASSOC);
  2414. IWL_CMD(MANAGEMENT_AUTH);
  2415. IWL_CMD(MANAGEMENT_DEAUTH);
  2416. IWL_CMD(MANAGEMENT_ACTION);
  2417. default:
  2418. return "UNKNOWN";
  2419. }
  2420. }
  2421. const char *get_ctrl_string(int cmd)
  2422. {
  2423. switch (cmd) {
  2424. IWL_CMD(CONTROL_BACK_REQ);
  2425. IWL_CMD(CONTROL_BACK);
  2426. IWL_CMD(CONTROL_PSPOLL);
  2427. IWL_CMD(CONTROL_RTS);
  2428. IWL_CMD(CONTROL_CTS);
  2429. IWL_CMD(CONTROL_ACK);
  2430. IWL_CMD(CONTROL_CFEND);
  2431. IWL_CMD(CONTROL_CFENDACK);
  2432. default:
  2433. return "UNKNOWN";
  2434. }
  2435. }
  2436. void iwl_clear_tx_stats(struct iwl_priv *priv)
  2437. {
  2438. memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
  2439. }
  2440. void iwl_clear_rx_stats(struct iwl_priv *priv)
  2441. {
  2442. memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
  2443. }
  2444. /*
  2445. * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
  2446. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
  2447. * Use debugFs to display the rx/rx_statistics
  2448. * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
  2449. * information will be recorded, but DATA pkt still will be recorded
  2450. * for the reason of iwl_led.c need to control the led blinking based on
  2451. * number of tx and rx data.
  2452. *
  2453. */
  2454. void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
  2455. {
  2456. struct traffic_stats *stats;
  2457. if (is_tx)
  2458. stats = &priv->tx_stats;
  2459. else
  2460. stats = &priv->rx_stats;
  2461. if (ieee80211_is_mgmt(fc)) {
  2462. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2463. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  2464. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  2465. break;
  2466. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  2467. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  2468. break;
  2469. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  2470. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  2471. break;
  2472. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  2473. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  2474. break;
  2475. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  2476. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  2477. break;
  2478. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  2479. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  2480. break;
  2481. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  2482. stats->mgmt[MANAGEMENT_BEACON]++;
  2483. break;
  2484. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  2485. stats->mgmt[MANAGEMENT_ATIM]++;
  2486. break;
  2487. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  2488. stats->mgmt[MANAGEMENT_DISASSOC]++;
  2489. break;
  2490. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  2491. stats->mgmt[MANAGEMENT_AUTH]++;
  2492. break;
  2493. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  2494. stats->mgmt[MANAGEMENT_DEAUTH]++;
  2495. break;
  2496. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  2497. stats->mgmt[MANAGEMENT_ACTION]++;
  2498. break;
  2499. }
  2500. } else if (ieee80211_is_ctl(fc)) {
  2501. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2502. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  2503. stats->ctrl[CONTROL_BACK_REQ]++;
  2504. break;
  2505. case cpu_to_le16(IEEE80211_STYPE_BACK):
  2506. stats->ctrl[CONTROL_BACK]++;
  2507. break;
  2508. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  2509. stats->ctrl[CONTROL_PSPOLL]++;
  2510. break;
  2511. case cpu_to_le16(IEEE80211_STYPE_RTS):
  2512. stats->ctrl[CONTROL_RTS]++;
  2513. break;
  2514. case cpu_to_le16(IEEE80211_STYPE_CTS):
  2515. stats->ctrl[CONTROL_CTS]++;
  2516. break;
  2517. case cpu_to_le16(IEEE80211_STYPE_ACK):
  2518. stats->ctrl[CONTROL_ACK]++;
  2519. break;
  2520. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  2521. stats->ctrl[CONTROL_CFEND]++;
  2522. break;
  2523. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  2524. stats->ctrl[CONTROL_CFENDACK]++;
  2525. break;
  2526. }
  2527. } else {
  2528. /* data */
  2529. stats->data_cnt++;
  2530. stats->data_bytes += len;
  2531. }
  2532. }
  2533. EXPORT_SYMBOL(iwl_update_stats);
  2534. #endif
  2535. #ifdef CONFIG_PM
  2536. int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  2537. {
  2538. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2539. /*
  2540. * This function is called when system goes into suspend state
  2541. * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
  2542. * first but since iwl_mac_stop() has no knowledge of who the caller is,
  2543. * it will not call apm_ops.stop() to stop the DMA operation.
  2544. * Calling apm_ops.stop here to make sure we stop the DMA.
  2545. */
  2546. priv->cfg->ops->lib->apm_ops.stop(priv);
  2547. pci_save_state(pdev);
  2548. pci_disable_device(pdev);
  2549. pci_set_power_state(pdev, PCI_D3hot);
  2550. return 0;
  2551. }
  2552. EXPORT_SYMBOL(iwl_pci_suspend);
  2553. int iwl_pci_resume(struct pci_dev *pdev)
  2554. {
  2555. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2556. int ret;
  2557. pci_set_power_state(pdev, PCI_D0);
  2558. ret = pci_enable_device(pdev);
  2559. if (ret)
  2560. return ret;
  2561. pci_restore_state(pdev);
  2562. iwl_enable_interrupts(priv);
  2563. return 0;
  2564. }
  2565. EXPORT_SYMBOL(iwl_pci_resume);
  2566. #endif /* CONFIG_PM */