pio.c 20 KB

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  1. /*
  2. Broadcom B43 wireless driver
  3. PIO data transfer
  4. Copyright (c) 2005-2008 Michael Buesch <mb@bu3sch.de>
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; see the file COPYING. If not, write to
  15. the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  16. Boston, MA 02110-1301, USA.
  17. */
  18. #include "b43.h"
  19. #include "pio.h"
  20. #include "dma.h"
  21. #include "main.h"
  22. #include "xmit.h"
  23. #include <linux/delay.h>
  24. static u16 generate_cookie(struct b43_pio_txqueue *q,
  25. struct b43_pio_txpacket *pack)
  26. {
  27. u16 cookie;
  28. /* Use the upper 4 bits of the cookie as
  29. * PIO controller ID and store the packet index number
  30. * in the lower 12 bits.
  31. * Note that the cookie must never be 0, as this
  32. * is a special value used in RX path.
  33. * It can also not be 0xFFFF because that is special
  34. * for multicast frames.
  35. */
  36. cookie = (((u16)q->index + 1) << 12);
  37. cookie |= pack->index;
  38. return cookie;
  39. }
  40. static
  41. struct b43_pio_txqueue *parse_cookie(struct b43_wldev *dev,
  42. u16 cookie,
  43. struct b43_pio_txpacket **pack)
  44. {
  45. struct b43_pio *pio = &dev->pio;
  46. struct b43_pio_txqueue *q = NULL;
  47. unsigned int pack_index;
  48. switch (cookie & 0xF000) {
  49. case 0x1000:
  50. q = pio->tx_queue_AC_BK;
  51. break;
  52. case 0x2000:
  53. q = pio->tx_queue_AC_BE;
  54. break;
  55. case 0x3000:
  56. q = pio->tx_queue_AC_VI;
  57. break;
  58. case 0x4000:
  59. q = pio->tx_queue_AC_VO;
  60. break;
  61. case 0x5000:
  62. q = pio->tx_queue_mcast;
  63. break;
  64. }
  65. if (B43_WARN_ON(!q))
  66. return NULL;
  67. pack_index = (cookie & 0x0FFF);
  68. if (B43_WARN_ON(pack_index >= ARRAY_SIZE(q->packets)))
  69. return NULL;
  70. *pack = &q->packets[pack_index];
  71. return q;
  72. }
  73. static u16 index_to_pioqueue_base(struct b43_wldev *dev,
  74. unsigned int index)
  75. {
  76. static const u16 bases[] = {
  77. B43_MMIO_PIO_BASE0,
  78. B43_MMIO_PIO_BASE1,
  79. B43_MMIO_PIO_BASE2,
  80. B43_MMIO_PIO_BASE3,
  81. B43_MMIO_PIO_BASE4,
  82. B43_MMIO_PIO_BASE5,
  83. B43_MMIO_PIO_BASE6,
  84. B43_MMIO_PIO_BASE7,
  85. };
  86. static const u16 bases_rev11[] = {
  87. B43_MMIO_PIO11_BASE0,
  88. B43_MMIO_PIO11_BASE1,
  89. B43_MMIO_PIO11_BASE2,
  90. B43_MMIO_PIO11_BASE3,
  91. B43_MMIO_PIO11_BASE4,
  92. B43_MMIO_PIO11_BASE5,
  93. };
  94. if (dev->dev->id.revision >= 11) {
  95. B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11));
  96. return bases_rev11[index];
  97. }
  98. B43_WARN_ON(index >= ARRAY_SIZE(bases));
  99. return bases[index];
  100. }
  101. static u16 pio_txqueue_offset(struct b43_wldev *dev)
  102. {
  103. if (dev->dev->id.revision >= 11)
  104. return 0x18;
  105. return 0;
  106. }
  107. static u16 pio_rxqueue_offset(struct b43_wldev *dev)
  108. {
  109. if (dev->dev->id.revision >= 11)
  110. return 0x38;
  111. return 8;
  112. }
  113. static struct b43_pio_txqueue *b43_setup_pioqueue_tx(struct b43_wldev *dev,
  114. unsigned int index)
  115. {
  116. struct b43_pio_txqueue *q;
  117. struct b43_pio_txpacket *p;
  118. unsigned int i;
  119. q = kzalloc(sizeof(*q), GFP_KERNEL);
  120. if (!q)
  121. return NULL;
  122. q->dev = dev;
  123. q->rev = dev->dev->id.revision;
  124. q->mmio_base = index_to_pioqueue_base(dev, index) +
  125. pio_txqueue_offset(dev);
  126. q->index = index;
  127. q->free_packet_slots = B43_PIO_MAX_NR_TXPACKETS;
  128. if (q->rev >= 8) {
  129. q->buffer_size = 1920; //FIXME this constant is wrong.
  130. } else {
  131. q->buffer_size = b43_piotx_read16(q, B43_PIO_TXQBUFSIZE);
  132. q->buffer_size -= 80;
  133. }
  134. INIT_LIST_HEAD(&q->packets_list);
  135. for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
  136. p = &(q->packets[i]);
  137. INIT_LIST_HEAD(&p->list);
  138. p->index = i;
  139. p->queue = q;
  140. list_add(&p->list, &q->packets_list);
  141. }
  142. return q;
  143. }
  144. static struct b43_pio_rxqueue *b43_setup_pioqueue_rx(struct b43_wldev *dev,
  145. unsigned int index)
  146. {
  147. struct b43_pio_rxqueue *q;
  148. q = kzalloc(sizeof(*q), GFP_KERNEL);
  149. if (!q)
  150. return NULL;
  151. q->dev = dev;
  152. q->rev = dev->dev->id.revision;
  153. q->mmio_base = index_to_pioqueue_base(dev, index) +
  154. pio_rxqueue_offset(dev);
  155. /* Enable Direct FIFO RX (PIO) on the engine. */
  156. b43_dma_direct_fifo_rx(dev, index, 1);
  157. return q;
  158. }
  159. static void b43_pio_cancel_tx_packets(struct b43_pio_txqueue *q)
  160. {
  161. struct b43_pio_txpacket *pack;
  162. unsigned int i;
  163. for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
  164. pack = &(q->packets[i]);
  165. if (pack->skb) {
  166. dev_kfree_skb_any(pack->skb);
  167. pack->skb = NULL;
  168. }
  169. }
  170. }
  171. static void b43_destroy_pioqueue_tx(struct b43_pio_txqueue *q,
  172. const char *name)
  173. {
  174. if (!q)
  175. return;
  176. b43_pio_cancel_tx_packets(q);
  177. kfree(q);
  178. }
  179. static void b43_destroy_pioqueue_rx(struct b43_pio_rxqueue *q,
  180. const char *name)
  181. {
  182. if (!q)
  183. return;
  184. kfree(q);
  185. }
  186. #define destroy_queue_tx(pio, queue) do { \
  187. b43_destroy_pioqueue_tx((pio)->queue, __stringify(queue)); \
  188. (pio)->queue = NULL; \
  189. } while (0)
  190. #define destroy_queue_rx(pio, queue) do { \
  191. b43_destroy_pioqueue_rx((pio)->queue, __stringify(queue)); \
  192. (pio)->queue = NULL; \
  193. } while (0)
  194. void b43_pio_free(struct b43_wldev *dev)
  195. {
  196. struct b43_pio *pio;
  197. if (!b43_using_pio_transfers(dev))
  198. return;
  199. pio = &dev->pio;
  200. destroy_queue_rx(pio, rx_queue);
  201. destroy_queue_tx(pio, tx_queue_mcast);
  202. destroy_queue_tx(pio, tx_queue_AC_VO);
  203. destroy_queue_tx(pio, tx_queue_AC_VI);
  204. destroy_queue_tx(pio, tx_queue_AC_BE);
  205. destroy_queue_tx(pio, tx_queue_AC_BK);
  206. }
  207. int b43_pio_init(struct b43_wldev *dev)
  208. {
  209. struct b43_pio *pio = &dev->pio;
  210. int err = -ENOMEM;
  211. b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
  212. & ~B43_MACCTL_BE);
  213. b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_RXPADOFF, 0);
  214. pio->tx_queue_AC_BK = b43_setup_pioqueue_tx(dev, 0);
  215. if (!pio->tx_queue_AC_BK)
  216. goto out;
  217. pio->tx_queue_AC_BE = b43_setup_pioqueue_tx(dev, 1);
  218. if (!pio->tx_queue_AC_BE)
  219. goto err_destroy_bk;
  220. pio->tx_queue_AC_VI = b43_setup_pioqueue_tx(dev, 2);
  221. if (!pio->tx_queue_AC_VI)
  222. goto err_destroy_be;
  223. pio->tx_queue_AC_VO = b43_setup_pioqueue_tx(dev, 3);
  224. if (!pio->tx_queue_AC_VO)
  225. goto err_destroy_vi;
  226. pio->tx_queue_mcast = b43_setup_pioqueue_tx(dev, 4);
  227. if (!pio->tx_queue_mcast)
  228. goto err_destroy_vo;
  229. pio->rx_queue = b43_setup_pioqueue_rx(dev, 0);
  230. if (!pio->rx_queue)
  231. goto err_destroy_mcast;
  232. b43dbg(dev->wl, "PIO initialized\n");
  233. err = 0;
  234. out:
  235. return err;
  236. err_destroy_mcast:
  237. destroy_queue_tx(pio, tx_queue_mcast);
  238. err_destroy_vo:
  239. destroy_queue_tx(pio, tx_queue_AC_VO);
  240. err_destroy_vi:
  241. destroy_queue_tx(pio, tx_queue_AC_VI);
  242. err_destroy_be:
  243. destroy_queue_tx(pio, tx_queue_AC_BE);
  244. err_destroy_bk:
  245. destroy_queue_tx(pio, tx_queue_AC_BK);
  246. return err;
  247. }
  248. /* Static mapping of mac80211's queues (priorities) to b43 PIO queues. */
  249. static struct b43_pio_txqueue *select_queue_by_priority(struct b43_wldev *dev,
  250. u8 queue_prio)
  251. {
  252. struct b43_pio_txqueue *q;
  253. if (dev->qos_enabled) {
  254. /* 0 = highest priority */
  255. switch (queue_prio) {
  256. default:
  257. B43_WARN_ON(1);
  258. /* fallthrough */
  259. case 0:
  260. q = dev->pio.tx_queue_AC_VO;
  261. break;
  262. case 1:
  263. q = dev->pio.tx_queue_AC_VI;
  264. break;
  265. case 2:
  266. q = dev->pio.tx_queue_AC_BE;
  267. break;
  268. case 3:
  269. q = dev->pio.tx_queue_AC_BK;
  270. break;
  271. }
  272. } else
  273. q = dev->pio.tx_queue_AC_BE;
  274. return q;
  275. }
  276. static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q,
  277. u16 ctl,
  278. const void *_data,
  279. unsigned int data_len)
  280. {
  281. struct b43_wldev *dev = q->dev;
  282. struct b43_wl *wl = dev->wl;
  283. const u8 *data = _data;
  284. ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI;
  285. b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
  286. ssb_block_write(dev->dev, data, (data_len & ~1),
  287. q->mmio_base + B43_PIO_TXDATA,
  288. sizeof(u16));
  289. if (data_len & 1) {
  290. /* Write the last byte. */
  291. ctl &= ~B43_PIO_TXCTL_WRITEHI;
  292. b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
  293. wl->tx_tail[0] = data[data_len - 1];
  294. wl->tx_tail[1] = 0;
  295. ssb_block_write(dev->dev, wl->tx_tail, 2,
  296. q->mmio_base + B43_PIO_TXDATA,
  297. sizeof(u16));
  298. }
  299. return ctl;
  300. }
  301. static void pio_tx_frame_2byte_queue(struct b43_pio_txpacket *pack,
  302. const u8 *hdr, unsigned int hdrlen)
  303. {
  304. struct b43_pio_txqueue *q = pack->queue;
  305. const char *frame = pack->skb->data;
  306. unsigned int frame_len = pack->skb->len;
  307. u16 ctl;
  308. ctl = b43_piotx_read16(q, B43_PIO_TXCTL);
  309. ctl |= B43_PIO_TXCTL_FREADY;
  310. ctl &= ~B43_PIO_TXCTL_EOF;
  311. /* Transfer the header data. */
  312. ctl = tx_write_2byte_queue(q, ctl, hdr, hdrlen);
  313. /* Transfer the frame data. */
  314. ctl = tx_write_2byte_queue(q, ctl, frame, frame_len);
  315. ctl |= B43_PIO_TXCTL_EOF;
  316. b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
  317. }
  318. static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q,
  319. u32 ctl,
  320. const void *_data,
  321. unsigned int data_len)
  322. {
  323. struct b43_wldev *dev = q->dev;
  324. struct b43_wl *wl = dev->wl;
  325. const u8 *data = _data;
  326. ctl |= B43_PIO8_TXCTL_0_7 | B43_PIO8_TXCTL_8_15 |
  327. B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_24_31;
  328. b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
  329. ssb_block_write(dev->dev, data, (data_len & ~3),
  330. q->mmio_base + B43_PIO8_TXDATA,
  331. sizeof(u32));
  332. if (data_len & 3) {
  333. wl->tx_tail[3] = 0;
  334. /* Write the last few bytes. */
  335. ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 |
  336. B43_PIO8_TXCTL_24_31);
  337. switch (data_len & 3) {
  338. case 3:
  339. ctl |= B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_8_15;
  340. wl->tx_tail[0] = data[data_len - 3];
  341. wl->tx_tail[1] = data[data_len - 2];
  342. wl->tx_tail[2] = data[data_len - 1];
  343. break;
  344. case 2:
  345. ctl |= B43_PIO8_TXCTL_8_15;
  346. wl->tx_tail[0] = data[data_len - 2];
  347. wl->tx_tail[1] = data[data_len - 1];
  348. wl->tx_tail[2] = 0;
  349. break;
  350. case 1:
  351. wl->tx_tail[0] = data[data_len - 1];
  352. wl->tx_tail[1] = 0;
  353. wl->tx_tail[2] = 0;
  354. break;
  355. }
  356. b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
  357. ssb_block_write(dev->dev, wl->tx_tail, 4,
  358. q->mmio_base + B43_PIO8_TXDATA,
  359. sizeof(u32));
  360. }
  361. return ctl;
  362. }
  363. static void pio_tx_frame_4byte_queue(struct b43_pio_txpacket *pack,
  364. const u8 *hdr, unsigned int hdrlen)
  365. {
  366. struct b43_pio_txqueue *q = pack->queue;
  367. const char *frame = pack->skb->data;
  368. unsigned int frame_len = pack->skb->len;
  369. u32 ctl;
  370. ctl = b43_piotx_read32(q, B43_PIO8_TXCTL);
  371. ctl |= B43_PIO8_TXCTL_FREADY;
  372. ctl &= ~B43_PIO8_TXCTL_EOF;
  373. /* Transfer the header data. */
  374. ctl = tx_write_4byte_queue(q, ctl, hdr, hdrlen);
  375. /* Transfer the frame data. */
  376. ctl = tx_write_4byte_queue(q, ctl, frame, frame_len);
  377. ctl |= B43_PIO8_TXCTL_EOF;
  378. b43_piotx_write32(q, B43_PIO_TXCTL, ctl);
  379. }
  380. static int pio_tx_frame(struct b43_pio_txqueue *q,
  381. struct sk_buff *skb)
  382. {
  383. struct b43_wldev *dev = q->dev;
  384. struct b43_wl *wl = dev->wl;
  385. struct b43_pio_txpacket *pack;
  386. u16 cookie;
  387. int err;
  388. unsigned int hdrlen;
  389. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  390. B43_WARN_ON(list_empty(&q->packets_list));
  391. pack = list_entry(q->packets_list.next,
  392. struct b43_pio_txpacket, list);
  393. cookie = generate_cookie(q, pack);
  394. hdrlen = b43_txhdr_size(dev);
  395. err = b43_generate_txhdr(dev, (u8 *)&wl->txhdr, skb,
  396. info, cookie);
  397. if (err)
  398. return err;
  399. if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
  400. /* Tell the firmware about the cookie of the last
  401. * mcast frame, so it can clear the more-data bit in it. */
  402. b43_shm_write16(dev, B43_SHM_SHARED,
  403. B43_SHM_SH_MCASTCOOKIE, cookie);
  404. }
  405. pack->skb = skb;
  406. if (q->rev >= 8)
  407. pio_tx_frame_4byte_queue(pack, (const u8 *)&wl->txhdr, hdrlen);
  408. else
  409. pio_tx_frame_2byte_queue(pack, (const u8 *)&wl->txhdr, hdrlen);
  410. /* Remove it from the list of available packet slots.
  411. * It will be put back when we receive the status report. */
  412. list_del(&pack->list);
  413. /* Update the queue statistics. */
  414. q->buffer_used += roundup(skb->len + hdrlen, 4);
  415. q->free_packet_slots -= 1;
  416. return 0;
  417. }
  418. int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb)
  419. {
  420. struct b43_pio_txqueue *q;
  421. struct ieee80211_hdr *hdr;
  422. unsigned int hdrlen, total_len;
  423. int err = 0;
  424. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  425. hdr = (struct ieee80211_hdr *)skb->data;
  426. if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
  427. /* The multicast queue will be sent after the DTIM. */
  428. q = dev->pio.tx_queue_mcast;
  429. /* Set the frame More-Data bit. Ucode will clear it
  430. * for us on the last frame. */
  431. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
  432. } else {
  433. /* Decide by priority where to put this frame. */
  434. q = select_queue_by_priority(dev, skb_get_queue_mapping(skb));
  435. }
  436. hdrlen = b43_txhdr_size(dev);
  437. total_len = roundup(skb->len + hdrlen, 4);
  438. if (unlikely(total_len > q->buffer_size)) {
  439. err = -ENOBUFS;
  440. b43dbg(dev->wl, "PIO: TX packet longer than queue.\n");
  441. goto out;
  442. }
  443. if (unlikely(q->free_packet_slots == 0)) {
  444. err = -ENOBUFS;
  445. b43warn(dev->wl, "PIO: TX packet overflow.\n");
  446. goto out;
  447. }
  448. B43_WARN_ON(q->buffer_used > q->buffer_size);
  449. if (total_len > (q->buffer_size - q->buffer_used)) {
  450. /* Not enough memory on the queue. */
  451. err = -EBUSY;
  452. ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
  453. q->stopped = 1;
  454. goto out;
  455. }
  456. /* Assign the queue number to the ring (if not already done before)
  457. * so TX status handling can use it. The mac80211-queue to b43-queue
  458. * mapping is static, so we don't need to store it per frame. */
  459. q->queue_prio = skb_get_queue_mapping(skb);
  460. err = pio_tx_frame(q, skb);
  461. if (unlikely(err == -ENOKEY)) {
  462. /* Drop this packet, as we don't have the encryption key
  463. * anymore and must not transmit it unencrypted. */
  464. dev_kfree_skb_any(skb);
  465. err = 0;
  466. goto out;
  467. }
  468. if (unlikely(err)) {
  469. b43err(dev->wl, "PIO transmission failure\n");
  470. goto out;
  471. }
  472. q->nr_tx_packets++;
  473. B43_WARN_ON(q->buffer_used > q->buffer_size);
  474. if (((q->buffer_size - q->buffer_used) < roundup(2 + 2 + 6, 4)) ||
  475. (q->free_packet_slots == 0)) {
  476. /* The queue is full. */
  477. ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
  478. q->stopped = 1;
  479. }
  480. out:
  481. return err;
  482. }
  483. void b43_pio_handle_txstatus(struct b43_wldev *dev,
  484. const struct b43_txstatus *status)
  485. {
  486. struct b43_pio_txqueue *q;
  487. struct b43_pio_txpacket *pack = NULL;
  488. unsigned int total_len;
  489. struct ieee80211_tx_info *info;
  490. q = parse_cookie(dev, status->cookie, &pack);
  491. if (unlikely(!q))
  492. return;
  493. B43_WARN_ON(!pack);
  494. info = IEEE80211_SKB_CB(pack->skb);
  495. b43_fill_txstatus_report(dev, info, status);
  496. total_len = pack->skb->len + b43_txhdr_size(dev);
  497. total_len = roundup(total_len, 4);
  498. q->buffer_used -= total_len;
  499. q->free_packet_slots += 1;
  500. ieee80211_tx_status(dev->wl->hw, pack->skb);
  501. pack->skb = NULL;
  502. list_add(&pack->list, &q->packets_list);
  503. if (q->stopped) {
  504. ieee80211_wake_queue(dev->wl->hw, q->queue_prio);
  505. q->stopped = 0;
  506. }
  507. }
  508. void b43_pio_get_tx_stats(struct b43_wldev *dev,
  509. struct ieee80211_tx_queue_stats *stats)
  510. {
  511. const int nr_queues = dev->wl->hw->queues;
  512. struct b43_pio_txqueue *q;
  513. int i;
  514. for (i = 0; i < nr_queues; i++) {
  515. q = select_queue_by_priority(dev, i);
  516. stats[i].len = B43_PIO_MAX_NR_TXPACKETS - q->free_packet_slots;
  517. stats[i].limit = B43_PIO_MAX_NR_TXPACKETS;
  518. stats[i].count = q->nr_tx_packets;
  519. }
  520. }
  521. /* Returns whether we should fetch another frame. */
  522. static bool pio_rx_frame(struct b43_pio_rxqueue *q)
  523. {
  524. struct b43_wldev *dev = q->dev;
  525. struct b43_wl *wl = dev->wl;
  526. u16 len;
  527. u32 macstat;
  528. unsigned int i, padding;
  529. struct sk_buff *skb;
  530. const char *err_msg = NULL;
  531. memset(&wl->rxhdr, 0, sizeof(wl->rxhdr));
  532. /* Check if we have data and wait for it to get ready. */
  533. if (q->rev >= 8) {
  534. u32 ctl;
  535. ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
  536. if (!(ctl & B43_PIO8_RXCTL_FRAMERDY))
  537. return 0;
  538. b43_piorx_write32(q, B43_PIO8_RXCTL,
  539. B43_PIO8_RXCTL_FRAMERDY);
  540. for (i = 0; i < 10; i++) {
  541. ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
  542. if (ctl & B43_PIO8_RXCTL_DATARDY)
  543. goto data_ready;
  544. udelay(10);
  545. }
  546. } else {
  547. u16 ctl;
  548. ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
  549. if (!(ctl & B43_PIO_RXCTL_FRAMERDY))
  550. return 0;
  551. b43_piorx_write16(q, B43_PIO_RXCTL,
  552. B43_PIO_RXCTL_FRAMERDY);
  553. for (i = 0; i < 10; i++) {
  554. ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
  555. if (ctl & B43_PIO_RXCTL_DATARDY)
  556. goto data_ready;
  557. udelay(10);
  558. }
  559. }
  560. b43dbg(q->dev->wl, "PIO RX timed out\n");
  561. return 1;
  562. data_ready:
  563. /* Get the preamble (RX header) */
  564. if (q->rev >= 8) {
  565. ssb_block_read(dev->dev, &wl->rxhdr, sizeof(wl->rxhdr),
  566. q->mmio_base + B43_PIO8_RXDATA,
  567. sizeof(u32));
  568. } else {
  569. ssb_block_read(dev->dev, &wl->rxhdr, sizeof(wl->rxhdr),
  570. q->mmio_base + B43_PIO_RXDATA,
  571. sizeof(u16));
  572. }
  573. /* Sanity checks. */
  574. len = le16_to_cpu(wl->rxhdr.frame_len);
  575. if (unlikely(len > 0x700)) {
  576. err_msg = "len > 0x700";
  577. goto rx_error;
  578. }
  579. if (unlikely(len == 0)) {
  580. err_msg = "len == 0";
  581. goto rx_error;
  582. }
  583. macstat = le32_to_cpu(wl->rxhdr.mac_status);
  584. if (macstat & B43_RX_MAC_FCSERR) {
  585. if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) {
  586. /* Drop frames with failed FCS. */
  587. err_msg = "Frame FCS error";
  588. goto rx_error;
  589. }
  590. }
  591. /* We always pad 2 bytes, as that's what upstream code expects
  592. * due to the RX-header being 30 bytes. In case the frame is
  593. * unaligned, we pad another 2 bytes. */
  594. padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0;
  595. skb = dev_alloc_skb(len + padding + 2);
  596. if (unlikely(!skb)) {
  597. err_msg = "Out of memory";
  598. goto rx_error;
  599. }
  600. skb_reserve(skb, 2);
  601. skb_put(skb, len + padding);
  602. if (q->rev >= 8) {
  603. ssb_block_read(dev->dev, skb->data + padding, (len & ~3),
  604. q->mmio_base + B43_PIO8_RXDATA,
  605. sizeof(u32));
  606. if (len & 3) {
  607. /* Read the last few bytes. */
  608. ssb_block_read(dev->dev, wl->rx_tail, 4,
  609. q->mmio_base + B43_PIO8_RXDATA,
  610. sizeof(u32));
  611. switch (len & 3) {
  612. case 3:
  613. skb->data[len + padding - 3] = wl->rx_tail[0];
  614. skb->data[len + padding - 2] = wl->rx_tail[1];
  615. skb->data[len + padding - 1] = wl->rx_tail[2];
  616. break;
  617. case 2:
  618. skb->data[len + padding - 2] = wl->rx_tail[0];
  619. skb->data[len + padding - 1] = wl->rx_tail[1];
  620. break;
  621. case 1:
  622. skb->data[len + padding - 1] = wl->rx_tail[0];
  623. break;
  624. }
  625. }
  626. } else {
  627. ssb_block_read(dev->dev, skb->data + padding, (len & ~1),
  628. q->mmio_base + B43_PIO_RXDATA,
  629. sizeof(u16));
  630. if (len & 1) {
  631. /* Read the last byte. */
  632. ssb_block_read(dev->dev, wl->rx_tail, 2,
  633. q->mmio_base + B43_PIO_RXDATA,
  634. sizeof(u16));
  635. skb->data[len + padding - 1] = wl->rx_tail[0];
  636. }
  637. }
  638. b43_rx(q->dev, skb, &wl->rxhdr);
  639. return 1;
  640. rx_error:
  641. if (err_msg)
  642. b43dbg(q->dev->wl, "PIO RX error: %s\n", err_msg);
  643. b43_piorx_write16(q, B43_PIO_RXCTL, B43_PIO_RXCTL_DATARDY);
  644. return 1;
  645. }
  646. void b43_pio_rx(struct b43_pio_rxqueue *q)
  647. {
  648. unsigned int count = 0;
  649. bool stop;
  650. while (1) {
  651. stop = (pio_rx_frame(q) == 0);
  652. if (stop)
  653. break;
  654. cond_resched();
  655. if (WARN_ON_ONCE(++count > 10000))
  656. break;
  657. }
  658. }
  659. static void b43_pio_tx_suspend_queue(struct b43_pio_txqueue *q)
  660. {
  661. if (q->rev >= 8) {
  662. b43_piotx_write32(q, B43_PIO8_TXCTL,
  663. b43_piotx_read32(q, B43_PIO8_TXCTL)
  664. | B43_PIO8_TXCTL_SUSPREQ);
  665. } else {
  666. b43_piotx_write16(q, B43_PIO_TXCTL,
  667. b43_piotx_read16(q, B43_PIO_TXCTL)
  668. | B43_PIO_TXCTL_SUSPREQ);
  669. }
  670. }
  671. static void b43_pio_tx_resume_queue(struct b43_pio_txqueue *q)
  672. {
  673. if (q->rev >= 8) {
  674. b43_piotx_write32(q, B43_PIO8_TXCTL,
  675. b43_piotx_read32(q, B43_PIO8_TXCTL)
  676. & ~B43_PIO8_TXCTL_SUSPREQ);
  677. } else {
  678. b43_piotx_write16(q, B43_PIO_TXCTL,
  679. b43_piotx_read16(q, B43_PIO_TXCTL)
  680. & ~B43_PIO_TXCTL_SUSPREQ);
  681. }
  682. }
  683. void b43_pio_tx_suspend(struct b43_wldev *dev)
  684. {
  685. b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
  686. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BK);
  687. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BE);
  688. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VI);
  689. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VO);
  690. b43_pio_tx_suspend_queue(dev->pio.tx_queue_mcast);
  691. }
  692. void b43_pio_tx_resume(struct b43_wldev *dev)
  693. {
  694. b43_pio_tx_resume_queue(dev->pio.tx_queue_mcast);
  695. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VO);
  696. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VI);
  697. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BE);
  698. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BK);
  699. b43_power_saving_ctl_bits(dev, 0);
  700. }