setup.c 16 KB

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  1. /*
  2. * Copyright (C) 2009 Renesas Solutions Corp.
  3. *
  4. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/device.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/io.h>
  17. #include <linux/delay.h>
  18. #include <linux/usb/r8a66597.h>
  19. #include <linux/i2c.h>
  20. #include <linux/input.h>
  21. #include <video/sh_mobile_lcdc.h>
  22. #include <media/sh_mobile_ceu.h>
  23. #include <asm/heartbeat.h>
  24. #include <asm/sh_eth.h>
  25. #include <asm/sh_keysc.h>
  26. #include <asm/clock.h>
  27. #include <cpu/sh7724.h>
  28. /*
  29. * Address Interface BusWidth
  30. *-----------------------------------------
  31. * 0x0000_0000 uboot 16bit
  32. * 0x0004_0000 Linux romImage 16bit
  33. * 0x0014_0000 MTD for Linux 16bit
  34. * 0x0400_0000 Internal I/O 16/32bit
  35. * 0x0800_0000 DRAM 32bit
  36. * 0x1800_0000 MFI 16bit
  37. */
  38. /* Heartbeat */
  39. static unsigned char led_pos[] = { 0, 1, 2, 3 };
  40. static struct heartbeat_data heartbeat_data = {
  41. .regsize = 8,
  42. .nr_bits = 4,
  43. .bit_pos = led_pos,
  44. };
  45. static struct resource heartbeat_resources[] = {
  46. [0] = {
  47. .start = 0xA405012C, /* PTG */
  48. .end = 0xA405012E - 1,
  49. .flags = IORESOURCE_MEM,
  50. },
  51. };
  52. static struct platform_device heartbeat_device = {
  53. .name = "heartbeat",
  54. .id = -1,
  55. .dev = {
  56. .platform_data = &heartbeat_data,
  57. },
  58. .num_resources = ARRAY_SIZE(heartbeat_resources),
  59. .resource = heartbeat_resources,
  60. };
  61. /* MTD */
  62. static struct mtd_partition nor_flash_partitions[] = {
  63. {
  64. .name = "boot loader",
  65. .offset = 0,
  66. .size = (5 * 1024 * 1024),
  67. .mask_flags = MTD_CAP_ROM,
  68. }, {
  69. .name = "free-area",
  70. .offset = MTDPART_OFS_APPEND,
  71. .size = MTDPART_SIZ_FULL,
  72. },
  73. };
  74. static struct physmap_flash_data nor_flash_data = {
  75. .width = 2,
  76. .parts = nor_flash_partitions,
  77. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  78. };
  79. static struct resource nor_flash_resources[] = {
  80. [0] = {
  81. .name = "NOR Flash",
  82. .start = 0x00000000,
  83. .end = 0x03ffffff,
  84. .flags = IORESOURCE_MEM,
  85. }
  86. };
  87. static struct platform_device nor_flash_device = {
  88. .name = "physmap-flash",
  89. .resource = nor_flash_resources,
  90. .num_resources = ARRAY_SIZE(nor_flash_resources),
  91. .dev = {
  92. .platform_data = &nor_flash_data,
  93. },
  94. };
  95. /* SH Eth */
  96. #define SH_ETH_ADDR (0xA4600000)
  97. #define SH_ETH_MAHR (SH_ETH_ADDR + 0x1C0)
  98. #define SH_ETH_MALR (SH_ETH_ADDR + 0x1C8)
  99. static struct resource sh_eth_resources[] = {
  100. [0] = {
  101. .start = SH_ETH_ADDR,
  102. .end = SH_ETH_ADDR + 0x1FC,
  103. .flags = IORESOURCE_MEM,
  104. },
  105. [1] = {
  106. .start = 91,
  107. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  108. },
  109. };
  110. struct sh_eth_plat_data sh_eth_plat = {
  111. .phy = 0x1f, /* SMSC LAN8700 */
  112. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  113. };
  114. static struct platform_device sh_eth_device = {
  115. .name = "sh-eth",
  116. .id = 0,
  117. .dev = {
  118. .platform_data = &sh_eth_plat,
  119. },
  120. .num_resources = ARRAY_SIZE(sh_eth_resources),
  121. .resource = sh_eth_resources,
  122. };
  123. /* USB0 host */
  124. void usb0_port_power(int port, int power)
  125. {
  126. gpio_set_value(GPIO_PTB4, power);
  127. }
  128. static struct r8a66597_platdata usb0_host_data = {
  129. .on_chip = 1,
  130. .port_power = usb0_port_power,
  131. };
  132. static struct resource usb0_host_resources[] = {
  133. [0] = {
  134. .start = 0xa4d80000,
  135. .end = 0xa4d80124 - 1,
  136. .flags = IORESOURCE_MEM,
  137. },
  138. [1] = {
  139. .start = 65,
  140. .end = 65,
  141. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  142. },
  143. };
  144. static struct platform_device usb0_host_device = {
  145. .name = "r8a66597_hcd",
  146. .id = 0,
  147. .dev = {
  148. .dma_mask = NULL, /* not use dma */
  149. .coherent_dma_mask = 0xffffffff,
  150. .platform_data = &usb0_host_data,
  151. },
  152. .num_resources = ARRAY_SIZE(usb0_host_resources),
  153. .resource = usb0_host_resources,
  154. };
  155. /*
  156. * USB1
  157. *
  158. * CN5 can use both host/function,
  159. * and we can determine it by checking PTB[3]
  160. *
  161. * This time only USB1 host is supported.
  162. */
  163. void usb1_port_power(int port, int power)
  164. {
  165. if (!gpio_get_value(GPIO_PTB3)) {
  166. printk(KERN_ERR "USB1 function is not supported\n");
  167. return;
  168. }
  169. gpio_set_value(GPIO_PTB5, power);
  170. }
  171. static struct r8a66597_platdata usb1_host_data = {
  172. .on_chip = 1,
  173. .port_power = usb1_port_power,
  174. };
  175. static struct resource usb1_host_resources[] = {
  176. [0] = {
  177. .start = 0xa4d90000,
  178. .end = 0xa4d90124 - 1,
  179. .flags = IORESOURCE_MEM,
  180. },
  181. [1] = {
  182. .start = 66,
  183. .end = 66,
  184. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  185. },
  186. };
  187. static struct platform_device usb1_host_device = {
  188. .name = "r8a66597_hcd",
  189. .id = 1,
  190. .dev = {
  191. .dma_mask = NULL, /* not use dma */
  192. .coherent_dma_mask = 0xffffffff,
  193. .platform_data = &usb1_host_data,
  194. },
  195. .num_resources = ARRAY_SIZE(usb1_host_resources),
  196. .resource = usb1_host_resources,
  197. };
  198. /* LCDC */
  199. static struct sh_mobile_lcdc_info lcdc_info = {
  200. .ch[0] = {
  201. .interface_type = RGB18,
  202. .chan = LCDC_CHAN_MAINLCD,
  203. .bpp = 16,
  204. .lcd_cfg = {
  205. .sync = 0, /* hsync and vsync are active low */
  206. },
  207. .lcd_size_cfg = { /* 7.0 inch */
  208. .width = 152,
  209. .height = 91,
  210. },
  211. .board_cfg = {
  212. },
  213. }
  214. };
  215. static struct resource lcdc_resources[] = {
  216. [0] = {
  217. .name = "LCDC",
  218. .start = 0xfe940000,
  219. .end = 0xfe942fff,
  220. .flags = IORESOURCE_MEM,
  221. },
  222. [1] = {
  223. .start = 106,
  224. .flags = IORESOURCE_IRQ,
  225. },
  226. };
  227. static struct platform_device lcdc_device = {
  228. .name = "sh_mobile_lcdc_fb",
  229. .num_resources = ARRAY_SIZE(lcdc_resources),
  230. .resource = lcdc_resources,
  231. .dev = {
  232. .platform_data = &lcdc_info,
  233. },
  234. .archdata = {
  235. .hwblk_id = HWBLK_LCDC,
  236. },
  237. };
  238. /* CEU0 */
  239. static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
  240. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  241. };
  242. static struct resource ceu0_resources[] = {
  243. [0] = {
  244. .name = "CEU0",
  245. .start = 0xfe910000,
  246. .end = 0xfe91009f,
  247. .flags = IORESOURCE_MEM,
  248. },
  249. [1] = {
  250. .start = 52,
  251. .flags = IORESOURCE_IRQ,
  252. },
  253. [2] = {
  254. /* place holder for contiguous memory */
  255. },
  256. };
  257. static struct platform_device ceu0_device = {
  258. .name = "sh_mobile_ceu",
  259. .id = 0, /* "ceu0" clock */
  260. .num_resources = ARRAY_SIZE(ceu0_resources),
  261. .resource = ceu0_resources,
  262. .dev = {
  263. .platform_data = &sh_mobile_ceu0_info,
  264. },
  265. .archdata = {
  266. .hwblk_id = HWBLK_CEU0,
  267. },
  268. };
  269. /* CEU1 */
  270. static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
  271. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  272. };
  273. static struct resource ceu1_resources[] = {
  274. [0] = {
  275. .name = "CEU1",
  276. .start = 0xfe914000,
  277. .end = 0xfe91409f,
  278. .flags = IORESOURCE_MEM,
  279. },
  280. [1] = {
  281. .start = 63,
  282. .flags = IORESOURCE_IRQ,
  283. },
  284. [2] = {
  285. /* place holder for contiguous memory */
  286. },
  287. };
  288. static struct platform_device ceu1_device = {
  289. .name = "sh_mobile_ceu",
  290. .id = 1, /* "ceu1" clock */
  291. .num_resources = ARRAY_SIZE(ceu1_resources),
  292. .resource = ceu1_resources,
  293. .dev = {
  294. .platform_data = &sh_mobile_ceu1_info,
  295. },
  296. .archdata = {
  297. .hwblk_id = HWBLK_CEU1,
  298. },
  299. };
  300. /* I2C device */
  301. static struct i2c_board_info i2c1_devices[] = {
  302. {
  303. I2C_BOARD_INFO("r2025sd", 0x32),
  304. },
  305. };
  306. /* KEYSC */
  307. static struct sh_keysc_info keysc_info = {
  308. .mode = SH_KEYSC_MODE_1,
  309. .scan_timing = 3,
  310. .delay = 50,
  311. .kycr2_delay = 100,
  312. .keycodes = { KEY_1, 0, 0, 0, 0,
  313. KEY_2, 0, 0, 0, 0,
  314. KEY_3, 0, 0, 0, 0,
  315. KEY_4, 0, 0, 0, 0,
  316. KEY_5, 0, 0, 0, 0,
  317. KEY_6, 0, 0, 0, 0, },
  318. };
  319. static struct resource keysc_resources[] = {
  320. [0] = {
  321. .name = "KEYSC",
  322. .start = 0x044b0000,
  323. .end = 0x044b000f,
  324. .flags = IORESOURCE_MEM,
  325. },
  326. [1] = {
  327. .start = 79,
  328. .flags = IORESOURCE_IRQ,
  329. },
  330. };
  331. static struct platform_device keysc_device = {
  332. .name = "sh_keysc",
  333. .id = 0, /* keysc0 clock */
  334. .num_resources = ARRAY_SIZE(keysc_resources),
  335. .resource = keysc_resources,
  336. .dev = {
  337. .platform_data = &keysc_info,
  338. },
  339. .archdata = {
  340. .hwblk_id = HWBLK_KEYSC,
  341. },
  342. };
  343. static struct platform_device *ecovec_devices[] __initdata = {
  344. &heartbeat_device,
  345. &nor_flash_device,
  346. &sh_eth_device,
  347. &usb0_host_device,
  348. &usb1_host_device, /* USB1 host support */
  349. &lcdc_device,
  350. &ceu0_device,
  351. &ceu1_device,
  352. &keysc_device,
  353. };
  354. #define EEPROM_ADDR 0x50
  355. static u8 mac_read(struct i2c_adapter *a, u8 command)
  356. {
  357. struct i2c_msg msg[2];
  358. u8 buf;
  359. int ret;
  360. msg[0].addr = EEPROM_ADDR;
  361. msg[0].flags = 0;
  362. msg[0].len = 1;
  363. msg[0].buf = &command;
  364. msg[1].addr = EEPROM_ADDR;
  365. msg[1].flags = I2C_M_RD;
  366. msg[1].len = 1;
  367. msg[1].buf = &buf;
  368. ret = i2c_transfer(a, msg, 2);
  369. if (ret < 0) {
  370. printk(KERN_ERR "error %d\n", ret);
  371. buf = 0xff;
  372. }
  373. return buf;
  374. }
  375. #define MAC_LEN 6
  376. static void __init sh_eth_init(void)
  377. {
  378. struct i2c_adapter *a = i2c_get_adapter(1);
  379. struct clk *eth_clk;
  380. u8 mac[MAC_LEN];
  381. int i;
  382. if (!a) {
  383. pr_err("can not get I2C 1\n");
  384. return;
  385. }
  386. eth_clk = clk_get(NULL, "eth0");
  387. if (!eth_clk) {
  388. pr_err("can not get eth0 clk\n");
  389. return;
  390. }
  391. /* read MAC address frome EEPROM */
  392. for (i = 0; i < MAC_LEN; i++) {
  393. mac[i] = mac_read(a, 0x10 + i);
  394. msleep(10);
  395. }
  396. /* clock enable */
  397. clk_enable(eth_clk);
  398. /* reset sh-eth */
  399. ctrl_outl(0x1, SH_ETH_ADDR + 0x0);
  400. /* set MAC addr */
  401. ctrl_outl((mac[0] << 24) |
  402. (mac[1] << 16) |
  403. (mac[2] << 8) |
  404. (mac[3] << 0), SH_ETH_MAHR);
  405. ctrl_outl((mac[4] << 8) |
  406. (mac[5] << 0), SH_ETH_MALR);
  407. clk_put(eth_clk);
  408. }
  409. #define PORT_HIZA 0xA4050158
  410. #define IODRIVEA 0xA405018A
  411. static int __init arch_setup(void)
  412. {
  413. /* enable SCIFA0 */
  414. gpio_request(GPIO_FN_SCIF0_TXD, NULL);
  415. gpio_request(GPIO_FN_SCIF0_RXD, NULL);
  416. /* enable debug LED */
  417. gpio_request(GPIO_PTG0, NULL);
  418. gpio_request(GPIO_PTG1, NULL);
  419. gpio_request(GPIO_PTG2, NULL);
  420. gpio_request(GPIO_PTG3, NULL);
  421. gpio_direction_output(GPIO_PTG0, 0);
  422. gpio_direction_output(GPIO_PTG1, 0);
  423. gpio_direction_output(GPIO_PTG2, 0);
  424. gpio_direction_output(GPIO_PTG3, 0);
  425. ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
  426. /* enable SH-Eth */
  427. gpio_request(GPIO_PTA1, NULL);
  428. gpio_direction_output(GPIO_PTA1, 1);
  429. mdelay(20);
  430. gpio_request(GPIO_FN_RMII_RXD0, NULL);
  431. gpio_request(GPIO_FN_RMII_RXD1, NULL);
  432. gpio_request(GPIO_FN_RMII_TXD0, NULL);
  433. gpio_request(GPIO_FN_RMII_TXD1, NULL);
  434. gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
  435. gpio_request(GPIO_FN_RMII_TX_EN, NULL);
  436. gpio_request(GPIO_FN_RMII_RX_ER, NULL);
  437. gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
  438. gpio_request(GPIO_FN_MDIO, NULL);
  439. gpio_request(GPIO_FN_MDC, NULL);
  440. gpio_request(GPIO_FN_LNKSTA, NULL);
  441. /* enable USB */
  442. ctrl_outw(0x0000, 0xA4D80000);
  443. ctrl_outw(0x0000, 0xA4D90000);
  444. gpio_request(GPIO_PTB3, NULL);
  445. gpio_request(GPIO_PTB4, NULL);
  446. gpio_request(GPIO_PTB5, NULL);
  447. gpio_direction_input(GPIO_PTB3);
  448. gpio_direction_output(GPIO_PTB4, 0);
  449. gpio_direction_output(GPIO_PTB5, 0);
  450. ctrl_outw(0x0600, 0xa40501d4);
  451. ctrl_outw(0x0600, 0xa4050192);
  452. /* enable LCDC */
  453. gpio_request(GPIO_FN_LCDD23, NULL);
  454. gpio_request(GPIO_FN_LCDD22, NULL);
  455. gpio_request(GPIO_FN_LCDD21, NULL);
  456. gpio_request(GPIO_FN_LCDD20, NULL);
  457. gpio_request(GPIO_FN_LCDD19, NULL);
  458. gpio_request(GPIO_FN_LCDD18, NULL);
  459. gpio_request(GPIO_FN_LCDD17, NULL);
  460. gpio_request(GPIO_FN_LCDD16, NULL);
  461. gpio_request(GPIO_FN_LCDD15, NULL);
  462. gpio_request(GPIO_FN_LCDD14, NULL);
  463. gpio_request(GPIO_FN_LCDD13, NULL);
  464. gpio_request(GPIO_FN_LCDD12, NULL);
  465. gpio_request(GPIO_FN_LCDD11, NULL);
  466. gpio_request(GPIO_FN_LCDD10, NULL);
  467. gpio_request(GPIO_FN_LCDD9, NULL);
  468. gpio_request(GPIO_FN_LCDD8, NULL);
  469. gpio_request(GPIO_FN_LCDD7, NULL);
  470. gpio_request(GPIO_FN_LCDD6, NULL);
  471. gpio_request(GPIO_FN_LCDD5, NULL);
  472. gpio_request(GPIO_FN_LCDD4, NULL);
  473. gpio_request(GPIO_FN_LCDD3, NULL);
  474. gpio_request(GPIO_FN_LCDD2, NULL);
  475. gpio_request(GPIO_FN_LCDD1, NULL);
  476. gpio_request(GPIO_FN_LCDD0, NULL);
  477. gpio_request(GPIO_FN_LCDDISP, NULL);
  478. gpio_request(GPIO_FN_LCDHSYN, NULL);
  479. gpio_request(GPIO_FN_LCDDCK, NULL);
  480. gpio_request(GPIO_FN_LCDVSYN, NULL);
  481. gpio_request(GPIO_FN_LCDDON, NULL);
  482. gpio_request(GPIO_FN_LCDLCLK, NULL);
  483. ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
  484. gpio_request(GPIO_PTE6, NULL);
  485. gpio_request(GPIO_PTU1, NULL);
  486. gpio_request(GPIO_PTR1, NULL);
  487. gpio_request(GPIO_PTA2, NULL);
  488. gpio_direction_input(GPIO_PTE6);
  489. gpio_direction_output(GPIO_PTU1, 0);
  490. gpio_direction_output(GPIO_PTR1, 0);
  491. gpio_direction_output(GPIO_PTA2, 0);
  492. /* I/O buffer drive ability is low */
  493. ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0040 , IODRIVEA);
  494. if (gpio_get_value(GPIO_PTE6)) {
  495. /* DVI */
  496. lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
  497. lcdc_info.ch[0].clock_divider = 1,
  498. lcdc_info.ch[0].lcd_cfg.name = "DVI";
  499. lcdc_info.ch[0].lcd_cfg.xres = 1280;
  500. lcdc_info.ch[0].lcd_cfg.yres = 720;
  501. lcdc_info.ch[0].lcd_cfg.left_margin = 220;
  502. lcdc_info.ch[0].lcd_cfg.right_margin = 110;
  503. lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
  504. lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
  505. lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
  506. lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
  507. gpio_set_value(GPIO_PTA2, 1);
  508. gpio_set_value(GPIO_PTU1, 1);
  509. } else {
  510. /* Panel */
  511. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  512. lcdc_info.ch[0].clock_divider = 2,
  513. lcdc_info.ch[0].lcd_cfg.name = "Panel";
  514. lcdc_info.ch[0].lcd_cfg.xres = 800;
  515. lcdc_info.ch[0].lcd_cfg.yres = 480;
  516. lcdc_info.ch[0].lcd_cfg.left_margin = 220;
  517. lcdc_info.ch[0].lcd_cfg.right_margin = 110;
  518. lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
  519. lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
  520. lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
  521. lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
  522. gpio_set_value(GPIO_PTR1, 1);
  523. /* FIXME
  524. *
  525. * LCDDON control is needed for Panel,
  526. * but current sh_mobile_lcdc driver doesn't control it.
  527. * It is temporary correspondence
  528. */
  529. gpio_request(GPIO_PTF4, NULL);
  530. gpio_direction_output(GPIO_PTF4, 1);
  531. }
  532. /* enable CEU0 */
  533. gpio_request(GPIO_FN_VIO0_D15, NULL);
  534. gpio_request(GPIO_FN_VIO0_D14, NULL);
  535. gpio_request(GPIO_FN_VIO0_D13, NULL);
  536. gpio_request(GPIO_FN_VIO0_D12, NULL);
  537. gpio_request(GPIO_FN_VIO0_D11, NULL);
  538. gpio_request(GPIO_FN_VIO0_D10, NULL);
  539. gpio_request(GPIO_FN_VIO0_D9, NULL);
  540. gpio_request(GPIO_FN_VIO0_D8, NULL);
  541. gpio_request(GPIO_FN_VIO0_D7, NULL);
  542. gpio_request(GPIO_FN_VIO0_D6, NULL);
  543. gpio_request(GPIO_FN_VIO0_D5, NULL);
  544. gpio_request(GPIO_FN_VIO0_D4, NULL);
  545. gpio_request(GPIO_FN_VIO0_D3, NULL);
  546. gpio_request(GPIO_FN_VIO0_D2, NULL);
  547. gpio_request(GPIO_FN_VIO0_D1, NULL);
  548. gpio_request(GPIO_FN_VIO0_D0, NULL);
  549. gpio_request(GPIO_FN_VIO0_VD, NULL);
  550. gpio_request(GPIO_FN_VIO0_CLK, NULL);
  551. gpio_request(GPIO_FN_VIO0_FLD, NULL);
  552. gpio_request(GPIO_FN_VIO0_HD, NULL);
  553. platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
  554. /* enable CEU1 */
  555. gpio_request(GPIO_FN_VIO1_D7, NULL);
  556. gpio_request(GPIO_FN_VIO1_D6, NULL);
  557. gpio_request(GPIO_FN_VIO1_D5, NULL);
  558. gpio_request(GPIO_FN_VIO1_D4, NULL);
  559. gpio_request(GPIO_FN_VIO1_D3, NULL);
  560. gpio_request(GPIO_FN_VIO1_D2, NULL);
  561. gpio_request(GPIO_FN_VIO1_D1, NULL);
  562. gpio_request(GPIO_FN_VIO1_D0, NULL);
  563. gpio_request(GPIO_FN_VIO1_FLD, NULL);
  564. gpio_request(GPIO_FN_VIO1_HD, NULL);
  565. gpio_request(GPIO_FN_VIO1_VD, NULL);
  566. gpio_request(GPIO_FN_VIO1_CLK, NULL);
  567. platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
  568. /* enable KEYSC */
  569. gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
  570. gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
  571. gpio_request(GPIO_FN_KEYOUT3, NULL);
  572. gpio_request(GPIO_FN_KEYOUT2, NULL);
  573. gpio_request(GPIO_FN_KEYOUT1, NULL);
  574. gpio_request(GPIO_FN_KEYOUT0, NULL);
  575. gpio_request(GPIO_FN_KEYIN0, NULL);
  576. /* enable user debug switch */
  577. gpio_request(GPIO_PTR0, NULL);
  578. gpio_request(GPIO_PTR4, NULL);
  579. gpio_request(GPIO_PTR5, NULL);
  580. gpio_request(GPIO_PTR6, NULL);
  581. gpio_direction_input(GPIO_PTR0);
  582. gpio_direction_input(GPIO_PTR4);
  583. gpio_direction_input(GPIO_PTR5);
  584. gpio_direction_input(GPIO_PTR6);
  585. /* enable I2C device */
  586. i2c_register_board_info(1, i2c1_devices,
  587. ARRAY_SIZE(i2c1_devices));
  588. return platform_add_devices(ecovec_devices,
  589. ARRAY_SIZE(ecovec_devices));
  590. }
  591. arch_initcall(arch_setup);
  592. static int __init devices_setup(void)
  593. {
  594. sh_eth_init();
  595. return 0;
  596. }
  597. device_initcall(devices_setup);
  598. static struct sh_machine_vector mv_ecovec __initmv = {
  599. .mv_name = "R0P7724 (EcoVec)",
  600. };