setup.c 20 KB

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  1. /*
  2. * linux/arch/arm/kernel/setup.c
  3. *
  4. * Copyright (C) 1995-2001 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/stddef.h>
  13. #include <linux/ioport.h>
  14. #include <linux/delay.h>
  15. #include <linux/utsname.h>
  16. #include <linux/initrd.h>
  17. #include <linux/console.h>
  18. #include <linux/bootmem.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/screen_info.h>
  21. #include <linux/init.h>
  22. #include <linux/root_dev.h>
  23. #include <linux/cpu.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/smp.h>
  26. #include <linux/fs.h>
  27. #include <asm/unified.h>
  28. #include <asm/cpu.h>
  29. #include <asm/cputype.h>
  30. #include <asm/elf.h>
  31. #include <asm/procinfo.h>
  32. #include <asm/sections.h>
  33. #include <asm/setup.h>
  34. #include <asm/mach-types.h>
  35. #include <asm/cacheflush.h>
  36. #include <asm/cachetype.h>
  37. #include <asm/tlbflush.h>
  38. #include <asm/mach/arch.h>
  39. #include <asm/mach/irq.h>
  40. #include <asm/mach/time.h>
  41. #include <asm/traps.h>
  42. #include <asm/unwind.h>
  43. #include "compat.h"
  44. #include "atags.h"
  45. #ifndef MEM_SIZE
  46. #define MEM_SIZE (16*1024*1024)
  47. #endif
  48. #if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
  49. char fpe_type[8];
  50. static int __init fpe_setup(char *line)
  51. {
  52. memcpy(fpe_type, line, 8);
  53. return 1;
  54. }
  55. __setup("fpe=", fpe_setup);
  56. #endif
  57. extern void paging_init(struct machine_desc *desc);
  58. extern void reboot_setup(char *str);
  59. unsigned int processor_id;
  60. EXPORT_SYMBOL(processor_id);
  61. unsigned int __machine_arch_type;
  62. EXPORT_SYMBOL(__machine_arch_type);
  63. unsigned int cacheid;
  64. EXPORT_SYMBOL(cacheid);
  65. unsigned int __atags_pointer __initdata;
  66. unsigned int system_rev;
  67. EXPORT_SYMBOL(system_rev);
  68. unsigned int system_serial_low;
  69. EXPORT_SYMBOL(system_serial_low);
  70. unsigned int system_serial_high;
  71. EXPORT_SYMBOL(system_serial_high);
  72. unsigned int elf_hwcap;
  73. EXPORT_SYMBOL(elf_hwcap);
  74. #ifdef MULTI_CPU
  75. struct processor processor;
  76. #endif
  77. #ifdef MULTI_TLB
  78. struct cpu_tlb_fns cpu_tlb;
  79. #endif
  80. #ifdef MULTI_USER
  81. struct cpu_user_fns cpu_user;
  82. #endif
  83. #ifdef MULTI_CACHE
  84. struct cpu_cache_fns cpu_cache;
  85. #endif
  86. #ifdef CONFIG_OUTER_CACHE
  87. struct outer_cache_fns outer_cache;
  88. #endif
  89. struct stack {
  90. u32 irq[3];
  91. u32 abt[3];
  92. u32 und[3];
  93. } ____cacheline_aligned;
  94. static struct stack stacks[NR_CPUS];
  95. char elf_platform[ELF_PLATFORM_SIZE];
  96. EXPORT_SYMBOL(elf_platform);
  97. static const char *cpu_name;
  98. static const char *machine_name;
  99. static char __initdata command_line[COMMAND_LINE_SIZE];
  100. static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
  101. static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } };
  102. #define ENDIANNESS ((char)endian_test.l)
  103. DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data);
  104. /*
  105. * Standard memory resources
  106. */
  107. static struct resource mem_res[] = {
  108. {
  109. .name = "Video RAM",
  110. .start = 0,
  111. .end = 0,
  112. .flags = IORESOURCE_MEM
  113. },
  114. {
  115. .name = "Kernel text",
  116. .start = 0,
  117. .end = 0,
  118. .flags = IORESOURCE_MEM
  119. },
  120. {
  121. .name = "Kernel data",
  122. .start = 0,
  123. .end = 0,
  124. .flags = IORESOURCE_MEM
  125. }
  126. };
  127. #define video_ram mem_res[0]
  128. #define kernel_code mem_res[1]
  129. #define kernel_data mem_res[2]
  130. static struct resource io_res[] = {
  131. {
  132. .name = "reserved",
  133. .start = 0x3bc,
  134. .end = 0x3be,
  135. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  136. },
  137. {
  138. .name = "reserved",
  139. .start = 0x378,
  140. .end = 0x37f,
  141. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  142. },
  143. {
  144. .name = "reserved",
  145. .start = 0x278,
  146. .end = 0x27f,
  147. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  148. }
  149. };
  150. #define lp0 io_res[0]
  151. #define lp1 io_res[1]
  152. #define lp2 io_res[2]
  153. static const char *proc_arch[] = {
  154. "undefined/unknown",
  155. "3",
  156. "4",
  157. "4T",
  158. "5",
  159. "5T",
  160. "5TE",
  161. "5TEJ",
  162. "6TEJ",
  163. "7",
  164. "?(11)",
  165. "?(12)",
  166. "?(13)",
  167. "?(14)",
  168. "?(15)",
  169. "?(16)",
  170. "?(17)",
  171. };
  172. int cpu_architecture(void)
  173. {
  174. int cpu_arch;
  175. if ((read_cpuid_id() & 0x0008f000) == 0) {
  176. cpu_arch = CPU_ARCH_UNKNOWN;
  177. } else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
  178. cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3;
  179. } else if ((read_cpuid_id() & 0x00080000) == 0x00000000) {
  180. cpu_arch = (read_cpuid_id() >> 16) & 7;
  181. if (cpu_arch)
  182. cpu_arch += CPU_ARCH_ARMv3;
  183. } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
  184. unsigned int mmfr0;
  185. /* Revised CPUID format. Read the Memory Model Feature
  186. * Register 0 and check for VMSAv7 or PMSAv7 */
  187. asm("mrc p15, 0, %0, c0, c1, 4"
  188. : "=r" (mmfr0));
  189. if ((mmfr0 & 0x0000000f) == 0x00000003 ||
  190. (mmfr0 & 0x000000f0) == 0x00000030)
  191. cpu_arch = CPU_ARCH_ARMv7;
  192. else if ((mmfr0 & 0x0000000f) == 0x00000002 ||
  193. (mmfr0 & 0x000000f0) == 0x00000020)
  194. cpu_arch = CPU_ARCH_ARMv6;
  195. else
  196. cpu_arch = CPU_ARCH_UNKNOWN;
  197. } else
  198. cpu_arch = CPU_ARCH_UNKNOWN;
  199. return cpu_arch;
  200. }
  201. static void __init cacheid_init(void)
  202. {
  203. unsigned int cachetype = read_cpuid_cachetype();
  204. unsigned int arch = cpu_architecture();
  205. if (arch >= CPU_ARCH_ARMv6) {
  206. if ((cachetype & (7 << 29)) == 4 << 29) {
  207. /* ARMv7 register format */
  208. cacheid = CACHEID_VIPT_NONALIASING;
  209. if ((cachetype & (3 << 14)) == 1 << 14)
  210. cacheid |= CACHEID_ASID_TAGGED;
  211. } else if (cachetype & (1 << 23))
  212. cacheid = CACHEID_VIPT_ALIASING;
  213. else
  214. cacheid = CACHEID_VIPT_NONALIASING;
  215. } else {
  216. cacheid = CACHEID_VIVT;
  217. }
  218. printk("CPU: %s data cache, %s instruction cache\n",
  219. cache_is_vivt() ? "VIVT" :
  220. cache_is_vipt_aliasing() ? "VIPT aliasing" :
  221. cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown",
  222. cache_is_vivt() ? "VIVT" :
  223. icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" :
  224. cache_is_vipt_aliasing() ? "VIPT aliasing" :
  225. cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown");
  226. }
  227. /*
  228. * These functions re-use the assembly code in head.S, which
  229. * already provide the required functionality.
  230. */
  231. extern struct proc_info_list *lookup_processor_type(unsigned int);
  232. extern struct machine_desc *lookup_machine_type(unsigned int);
  233. static void __init setup_processor(void)
  234. {
  235. struct proc_info_list *list;
  236. /*
  237. * locate processor in the list of supported processor
  238. * types. The linker builds this table for us from the
  239. * entries in arch/arm/mm/proc-*.S
  240. */
  241. list = lookup_processor_type(read_cpuid_id());
  242. if (!list) {
  243. printk("CPU configuration botched (ID %08x), unable "
  244. "to continue.\n", read_cpuid_id());
  245. while (1);
  246. }
  247. cpu_name = list->cpu_name;
  248. #ifdef MULTI_CPU
  249. processor = *list->proc;
  250. #endif
  251. #ifdef MULTI_TLB
  252. cpu_tlb = *list->tlb;
  253. #endif
  254. #ifdef MULTI_USER
  255. cpu_user = *list->user;
  256. #endif
  257. #ifdef MULTI_CACHE
  258. cpu_cache = *list->cache;
  259. #endif
  260. printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
  261. cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
  262. proc_arch[cpu_architecture()], cr_alignment);
  263. sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS);
  264. sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
  265. elf_hwcap = list->elf_hwcap;
  266. #ifndef CONFIG_ARM_THUMB
  267. elf_hwcap &= ~HWCAP_THUMB;
  268. #endif
  269. cacheid_init();
  270. cpu_proc_init();
  271. }
  272. /*
  273. * cpu_init - initialise one CPU.
  274. *
  275. * cpu_init sets up the per-CPU stacks.
  276. */
  277. void cpu_init(void)
  278. {
  279. unsigned int cpu = smp_processor_id();
  280. struct stack *stk = &stacks[cpu];
  281. if (cpu >= NR_CPUS) {
  282. printk(KERN_CRIT "CPU%u: bad primary CPU number\n", cpu);
  283. BUG();
  284. }
  285. /*
  286. * Define the placement constraint for the inline asm directive below.
  287. * In Thumb-2, msr with an immediate value is not allowed.
  288. */
  289. #ifdef CONFIG_THUMB2_KERNEL
  290. #define PLC "r"
  291. #else
  292. #define PLC "I"
  293. #endif
  294. /*
  295. * setup stacks for re-entrant exception handlers
  296. */
  297. __asm__ (
  298. "msr cpsr_c, %1\n\t"
  299. "add r14, %0, %2\n\t"
  300. "mov sp, r14\n\t"
  301. "msr cpsr_c, %3\n\t"
  302. "add r14, %0, %4\n\t"
  303. "mov sp, r14\n\t"
  304. "msr cpsr_c, %5\n\t"
  305. "add r14, %0, %6\n\t"
  306. "mov sp, r14\n\t"
  307. "msr cpsr_c, %7"
  308. :
  309. : "r" (stk),
  310. PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
  311. "I" (offsetof(struct stack, irq[0])),
  312. PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
  313. "I" (offsetof(struct stack, abt[0])),
  314. PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
  315. "I" (offsetof(struct stack, und[0])),
  316. PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
  317. : "r14");
  318. }
  319. static struct machine_desc * __init setup_machine(unsigned int nr)
  320. {
  321. struct machine_desc *list;
  322. /*
  323. * locate machine in the list of supported machines.
  324. */
  325. list = lookup_machine_type(nr);
  326. if (!list) {
  327. printk("Machine configuration botched (nr %d), unable "
  328. "to continue.\n", nr);
  329. while (1);
  330. }
  331. printk("Machine: %s\n", list->name);
  332. return list;
  333. }
  334. static int __init arm_add_memory(unsigned long start, unsigned long size)
  335. {
  336. struct membank *bank = &meminfo.bank[meminfo.nr_banks];
  337. if (meminfo.nr_banks >= NR_BANKS) {
  338. printk(KERN_CRIT "NR_BANKS too low, "
  339. "ignoring memory at %#lx\n", start);
  340. return -EINVAL;
  341. }
  342. /*
  343. * Ensure that start/size are aligned to a page boundary.
  344. * Size is appropriately rounded down, start is rounded up.
  345. */
  346. size -= start & ~PAGE_MASK;
  347. bank->start = PAGE_ALIGN(start);
  348. bank->size = size & PAGE_MASK;
  349. bank->node = PHYS_TO_NID(start);
  350. /*
  351. * Check whether this memory region has non-zero size or
  352. * invalid node number.
  353. */
  354. if (bank->size == 0 || bank->node >= MAX_NUMNODES)
  355. return -EINVAL;
  356. meminfo.nr_banks++;
  357. return 0;
  358. }
  359. /*
  360. * Pick out the memory size. We look for mem=size@start,
  361. * where start and size are "size[KkMm]"
  362. */
  363. static void __init early_mem(char **p)
  364. {
  365. static int usermem __initdata = 0;
  366. unsigned long size, start;
  367. /*
  368. * If the user specifies memory size, we
  369. * blow away any automatically generated
  370. * size.
  371. */
  372. if (usermem == 0) {
  373. usermem = 1;
  374. meminfo.nr_banks = 0;
  375. }
  376. start = PHYS_OFFSET;
  377. size = memparse(*p, p);
  378. if (**p == '@')
  379. start = memparse(*p + 1, p);
  380. arm_add_memory(start, size);
  381. }
  382. __early_param("mem=", early_mem);
  383. /*
  384. * Initial parsing of the command line.
  385. */
  386. static void __init parse_cmdline(char **cmdline_p, char *from)
  387. {
  388. char c = ' ', *to = command_line;
  389. int len = 0;
  390. for (;;) {
  391. if (c == ' ') {
  392. extern struct early_params __early_begin, __early_end;
  393. struct early_params *p;
  394. for (p = &__early_begin; p < &__early_end; p++) {
  395. int arglen = strlen(p->arg);
  396. if (memcmp(from, p->arg, arglen) == 0) {
  397. if (to != command_line)
  398. to -= 1;
  399. from += arglen;
  400. p->fn(&from);
  401. while (*from != ' ' && *from != '\0')
  402. from++;
  403. break;
  404. }
  405. }
  406. }
  407. c = *from++;
  408. if (!c)
  409. break;
  410. if (COMMAND_LINE_SIZE <= ++len)
  411. break;
  412. *to++ = c;
  413. }
  414. *to = '\0';
  415. *cmdline_p = command_line;
  416. }
  417. static void __init
  418. setup_ramdisk(int doload, int prompt, int image_start, unsigned int rd_sz)
  419. {
  420. #ifdef CONFIG_BLK_DEV_RAM
  421. extern int rd_size, rd_image_start, rd_prompt, rd_doload;
  422. rd_image_start = image_start;
  423. rd_prompt = prompt;
  424. rd_doload = doload;
  425. if (rd_sz)
  426. rd_size = rd_sz;
  427. #endif
  428. }
  429. static void __init
  430. request_standard_resources(struct meminfo *mi, struct machine_desc *mdesc)
  431. {
  432. struct resource *res;
  433. int i;
  434. kernel_code.start = virt_to_phys(_text);
  435. kernel_code.end = virt_to_phys(_etext - 1);
  436. kernel_data.start = virt_to_phys(_data);
  437. kernel_data.end = virt_to_phys(_end - 1);
  438. for (i = 0; i < mi->nr_banks; i++) {
  439. if (mi->bank[i].size == 0)
  440. continue;
  441. res = alloc_bootmem_low(sizeof(*res));
  442. res->name = "System RAM";
  443. res->start = mi->bank[i].start;
  444. res->end = mi->bank[i].start + mi->bank[i].size - 1;
  445. res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
  446. request_resource(&iomem_resource, res);
  447. if (kernel_code.start >= res->start &&
  448. kernel_code.end <= res->end)
  449. request_resource(res, &kernel_code);
  450. if (kernel_data.start >= res->start &&
  451. kernel_data.end <= res->end)
  452. request_resource(res, &kernel_data);
  453. }
  454. if (mdesc->video_start) {
  455. video_ram.start = mdesc->video_start;
  456. video_ram.end = mdesc->video_end;
  457. request_resource(&iomem_resource, &video_ram);
  458. }
  459. /*
  460. * Some machines don't have the possibility of ever
  461. * possessing lp0, lp1 or lp2
  462. */
  463. if (mdesc->reserve_lp0)
  464. request_resource(&ioport_resource, &lp0);
  465. if (mdesc->reserve_lp1)
  466. request_resource(&ioport_resource, &lp1);
  467. if (mdesc->reserve_lp2)
  468. request_resource(&ioport_resource, &lp2);
  469. }
  470. /*
  471. * Tag parsing.
  472. *
  473. * This is the new way of passing data to the kernel at boot time. Rather
  474. * than passing a fixed inflexible structure to the kernel, we pass a list
  475. * of variable-sized tags to the kernel. The first tag must be a ATAG_CORE
  476. * tag for the list to be recognised (to distinguish the tagged list from
  477. * a param_struct). The list is terminated with a zero-length tag (this tag
  478. * is not parsed in any way).
  479. */
  480. static int __init parse_tag_core(const struct tag *tag)
  481. {
  482. if (tag->hdr.size > 2) {
  483. if ((tag->u.core.flags & 1) == 0)
  484. root_mountflags &= ~MS_RDONLY;
  485. ROOT_DEV = old_decode_dev(tag->u.core.rootdev);
  486. }
  487. return 0;
  488. }
  489. __tagtable(ATAG_CORE, parse_tag_core);
  490. static int __init parse_tag_mem32(const struct tag *tag)
  491. {
  492. return arm_add_memory(tag->u.mem.start, tag->u.mem.size);
  493. }
  494. __tagtable(ATAG_MEM, parse_tag_mem32);
  495. #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
  496. struct screen_info screen_info = {
  497. .orig_video_lines = 30,
  498. .orig_video_cols = 80,
  499. .orig_video_mode = 0,
  500. .orig_video_ega_bx = 0,
  501. .orig_video_isVGA = 1,
  502. .orig_video_points = 8
  503. };
  504. static int __init parse_tag_videotext(const struct tag *tag)
  505. {
  506. screen_info.orig_x = tag->u.videotext.x;
  507. screen_info.orig_y = tag->u.videotext.y;
  508. screen_info.orig_video_page = tag->u.videotext.video_page;
  509. screen_info.orig_video_mode = tag->u.videotext.video_mode;
  510. screen_info.orig_video_cols = tag->u.videotext.video_cols;
  511. screen_info.orig_video_ega_bx = tag->u.videotext.video_ega_bx;
  512. screen_info.orig_video_lines = tag->u.videotext.video_lines;
  513. screen_info.orig_video_isVGA = tag->u.videotext.video_isvga;
  514. screen_info.orig_video_points = tag->u.videotext.video_points;
  515. return 0;
  516. }
  517. __tagtable(ATAG_VIDEOTEXT, parse_tag_videotext);
  518. #endif
  519. static int __init parse_tag_ramdisk(const struct tag *tag)
  520. {
  521. setup_ramdisk((tag->u.ramdisk.flags & 1) == 0,
  522. (tag->u.ramdisk.flags & 2) == 0,
  523. tag->u.ramdisk.start, tag->u.ramdisk.size);
  524. return 0;
  525. }
  526. __tagtable(ATAG_RAMDISK, parse_tag_ramdisk);
  527. static int __init parse_tag_serialnr(const struct tag *tag)
  528. {
  529. system_serial_low = tag->u.serialnr.low;
  530. system_serial_high = tag->u.serialnr.high;
  531. return 0;
  532. }
  533. __tagtable(ATAG_SERIAL, parse_tag_serialnr);
  534. static int __init parse_tag_revision(const struct tag *tag)
  535. {
  536. system_rev = tag->u.revision.rev;
  537. return 0;
  538. }
  539. __tagtable(ATAG_REVISION, parse_tag_revision);
  540. static int __init parse_tag_cmdline(const struct tag *tag)
  541. {
  542. strlcpy(default_command_line, tag->u.cmdline.cmdline, COMMAND_LINE_SIZE);
  543. return 0;
  544. }
  545. __tagtable(ATAG_CMDLINE, parse_tag_cmdline);
  546. /*
  547. * Scan the tag table for this tag, and call its parse function.
  548. * The tag table is built by the linker from all the __tagtable
  549. * declarations.
  550. */
  551. static int __init parse_tag(const struct tag *tag)
  552. {
  553. extern struct tagtable __tagtable_begin, __tagtable_end;
  554. struct tagtable *t;
  555. for (t = &__tagtable_begin; t < &__tagtable_end; t++)
  556. if (tag->hdr.tag == t->tag) {
  557. t->parse(tag);
  558. break;
  559. }
  560. return t < &__tagtable_end;
  561. }
  562. /*
  563. * Parse all tags in the list, checking both the global and architecture
  564. * specific tag tables.
  565. */
  566. static void __init parse_tags(const struct tag *t)
  567. {
  568. for (; t->hdr.size; t = tag_next(t))
  569. if (!parse_tag(t))
  570. printk(KERN_WARNING
  571. "Ignoring unrecognised tag 0x%08x\n",
  572. t->hdr.tag);
  573. }
  574. /*
  575. * This holds our defaults.
  576. */
  577. static struct init_tags {
  578. struct tag_header hdr1;
  579. struct tag_core core;
  580. struct tag_header hdr2;
  581. struct tag_mem32 mem;
  582. struct tag_header hdr3;
  583. } init_tags __initdata = {
  584. { tag_size(tag_core), ATAG_CORE },
  585. { 1, PAGE_SIZE, 0xff },
  586. { tag_size(tag_mem32), ATAG_MEM },
  587. { MEM_SIZE, PHYS_OFFSET },
  588. { 0, ATAG_NONE }
  589. };
  590. static void (*init_machine)(void) __initdata;
  591. static int __init customize_machine(void)
  592. {
  593. /* customizes platform devices, or adds new ones */
  594. if (init_machine)
  595. init_machine();
  596. return 0;
  597. }
  598. arch_initcall(customize_machine);
  599. void __init setup_arch(char **cmdline_p)
  600. {
  601. struct tag *tags = (struct tag *)&init_tags;
  602. struct machine_desc *mdesc;
  603. char *from = default_command_line;
  604. unwind_init();
  605. setup_processor();
  606. mdesc = setup_machine(machine_arch_type);
  607. machine_name = mdesc->name;
  608. if (mdesc->soft_reboot)
  609. reboot_setup("s");
  610. if (__atags_pointer)
  611. tags = phys_to_virt(__atags_pointer);
  612. else if (mdesc->boot_params)
  613. tags = phys_to_virt(mdesc->boot_params);
  614. /*
  615. * If we have the old style parameters, convert them to
  616. * a tag list.
  617. */
  618. if (tags->hdr.tag != ATAG_CORE)
  619. convert_to_tag_list(tags);
  620. if (tags->hdr.tag != ATAG_CORE)
  621. tags = (struct tag *)&init_tags;
  622. if (mdesc->fixup)
  623. mdesc->fixup(mdesc, tags, &from, &meminfo);
  624. if (tags->hdr.tag == ATAG_CORE) {
  625. if (meminfo.nr_banks != 0)
  626. squash_mem_tags(tags);
  627. save_atags(tags);
  628. parse_tags(tags);
  629. }
  630. init_mm.start_code = (unsigned long) _text;
  631. init_mm.end_code = (unsigned long) _etext;
  632. init_mm.end_data = (unsigned long) _edata;
  633. init_mm.brk = (unsigned long) _end;
  634. memcpy(boot_command_line, from, COMMAND_LINE_SIZE);
  635. boot_command_line[COMMAND_LINE_SIZE-1] = '\0';
  636. parse_cmdline(cmdline_p, from);
  637. paging_init(mdesc);
  638. request_standard_resources(&meminfo, mdesc);
  639. #ifdef CONFIG_SMP
  640. smp_init_cpus();
  641. #endif
  642. cpu_init();
  643. /*
  644. * Set up various architecture-specific pointers
  645. */
  646. init_arch_irq = mdesc->init_irq;
  647. system_timer = mdesc->timer;
  648. init_machine = mdesc->init_machine;
  649. #ifdef CONFIG_VT
  650. #if defined(CONFIG_VGA_CONSOLE)
  651. conswitchp = &vga_con;
  652. #elif defined(CONFIG_DUMMY_CONSOLE)
  653. conswitchp = &dummy_con;
  654. #endif
  655. #endif
  656. early_trap_init();
  657. }
  658. static int __init topology_init(void)
  659. {
  660. int cpu;
  661. for_each_possible_cpu(cpu) {
  662. struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu);
  663. cpuinfo->cpu.hotpluggable = 1;
  664. register_cpu(&cpuinfo->cpu, cpu);
  665. }
  666. return 0;
  667. }
  668. subsys_initcall(topology_init);
  669. static const char *hwcap_str[] = {
  670. "swp",
  671. "half",
  672. "thumb",
  673. "26bit",
  674. "fastmult",
  675. "fpa",
  676. "vfp",
  677. "edsp",
  678. "java",
  679. "iwmmxt",
  680. "crunch",
  681. "thumbee",
  682. "neon",
  683. "vfpv3",
  684. "vfpv3d16",
  685. NULL
  686. };
  687. static int c_show(struct seq_file *m, void *v)
  688. {
  689. int i;
  690. seq_printf(m, "Processor\t: %s rev %d (%s)\n",
  691. cpu_name, read_cpuid_id() & 15, elf_platform);
  692. #if defined(CONFIG_SMP)
  693. for_each_online_cpu(i) {
  694. /*
  695. * glibc reads /proc/cpuinfo to determine the number of
  696. * online processors, looking for lines beginning with
  697. * "processor". Give glibc what it expects.
  698. */
  699. seq_printf(m, "processor\t: %d\n", i);
  700. seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n",
  701. per_cpu(cpu_data, i).loops_per_jiffy / (500000UL/HZ),
  702. (per_cpu(cpu_data, i).loops_per_jiffy / (5000UL/HZ)) % 100);
  703. }
  704. #else /* CONFIG_SMP */
  705. seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
  706. loops_per_jiffy / (500000/HZ),
  707. (loops_per_jiffy / (5000/HZ)) % 100);
  708. #endif
  709. /* dump out the processor features */
  710. seq_puts(m, "Features\t: ");
  711. for (i = 0; hwcap_str[i]; i++)
  712. if (elf_hwcap & (1 << i))
  713. seq_printf(m, "%s ", hwcap_str[i]);
  714. seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
  715. seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]);
  716. if ((read_cpuid_id() & 0x0008f000) == 0x00000000) {
  717. /* pre-ARM7 */
  718. seq_printf(m, "CPU part\t: %07x\n", read_cpuid_id() >> 4);
  719. } else {
  720. if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
  721. /* ARM7 */
  722. seq_printf(m, "CPU variant\t: 0x%02x\n",
  723. (read_cpuid_id() >> 16) & 127);
  724. } else {
  725. /* post-ARM7 */
  726. seq_printf(m, "CPU variant\t: 0x%x\n",
  727. (read_cpuid_id() >> 20) & 15);
  728. }
  729. seq_printf(m, "CPU part\t: 0x%03x\n",
  730. (read_cpuid_id() >> 4) & 0xfff);
  731. }
  732. seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
  733. seq_puts(m, "\n");
  734. seq_printf(m, "Hardware\t: %s\n", machine_name);
  735. seq_printf(m, "Revision\t: %04x\n", system_rev);
  736. seq_printf(m, "Serial\t\t: %08x%08x\n",
  737. system_serial_high, system_serial_low);
  738. return 0;
  739. }
  740. static void *c_start(struct seq_file *m, loff_t *pos)
  741. {
  742. return *pos < 1 ? (void *)1 : NULL;
  743. }
  744. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  745. {
  746. ++*pos;
  747. return NULL;
  748. }
  749. static void c_stop(struct seq_file *m, void *v)
  750. {
  751. }
  752. const struct seq_operations cpuinfo_op = {
  753. .start = c_start,
  754. .next = c_next,
  755. .stop = c_stop,
  756. .show = c_show
  757. };