patch_hdmi.c 76 KB

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  1. /*
  2. *
  3. * patch_hdmi.c - routines for HDMI/DisplayPort codecs
  4. *
  5. * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
  6. * Copyright (c) 2006 ATI Technologies Inc.
  7. * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
  8. * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  9. *
  10. * Authors:
  11. * Wu Fengguang <wfg@linux.intel.com>
  12. *
  13. * Maintained by:
  14. * Wu Fengguang <wfg@linux.intel.com>
  15. *
  16. * This program is free software; you can redistribute it and/or modify it
  17. * under the terms of the GNU General Public License as published by the Free
  18. * Software Foundation; either version 2 of the License, or (at your option)
  19. * any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful, but
  22. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  24. * for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software Foundation,
  28. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  29. */
  30. #include <linux/init.h>
  31. #include <linux/delay.h>
  32. #include <linux/slab.h>
  33. #include <linux/module.h>
  34. #include <sound/core.h>
  35. #include <sound/jack.h>
  36. #include <sound/asoundef.h>
  37. #include <sound/tlv.h>
  38. #include "hda_codec.h"
  39. #include "hda_local.h"
  40. #include "hda_jack.h"
  41. static bool static_hdmi_pcm;
  42. module_param(static_hdmi_pcm, bool, 0644);
  43. MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  44. struct hdmi_spec_per_cvt {
  45. hda_nid_t cvt_nid;
  46. int assigned;
  47. unsigned int channels_min;
  48. unsigned int channels_max;
  49. u32 rates;
  50. u64 formats;
  51. unsigned int maxbps;
  52. };
  53. /* max. connections to a widget */
  54. #define HDA_MAX_CONNECTIONS 32
  55. struct hdmi_spec_per_pin {
  56. hda_nid_t pin_nid;
  57. int num_mux_nids;
  58. hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  59. struct hda_codec *codec;
  60. struct hdmi_eld sink_eld;
  61. struct delayed_work work;
  62. struct snd_kcontrol *eld_ctl;
  63. int repoll_count;
  64. bool non_pcm;
  65. bool chmap_set; /* channel-map override by ALSA API? */
  66. unsigned char chmap[8]; /* ALSA API channel-map */
  67. char pcm_name[8]; /* filled in build_pcm callbacks */
  68. };
  69. struct hdmi_spec {
  70. int num_cvts;
  71. struct snd_array cvts; /* struct hdmi_spec_per_cvt */
  72. hda_nid_t cvt_nids[4]; /* only for haswell fix */
  73. int num_pins;
  74. struct snd_array pins; /* struct hdmi_spec_per_pin */
  75. struct snd_array pcm_rec; /* struct hda_pcm */
  76. unsigned int channels_max; /* max over all cvts */
  77. struct hdmi_eld temp_eld;
  78. /*
  79. * Non-generic ATI/NVIDIA specific
  80. */
  81. struct hda_multi_out multiout;
  82. struct hda_pcm_stream pcm_playback;
  83. };
  84. struct hdmi_audio_infoframe {
  85. u8 type; /* 0x84 */
  86. u8 ver; /* 0x01 */
  87. u8 len; /* 0x0a */
  88. u8 checksum;
  89. u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
  90. u8 SS01_SF24;
  91. u8 CXT04;
  92. u8 CA;
  93. u8 LFEPBL01_LSV36_DM_INH7;
  94. };
  95. struct dp_audio_infoframe {
  96. u8 type; /* 0x84 */
  97. u8 len; /* 0x1b */
  98. u8 ver; /* 0x11 << 2 */
  99. u8 CC02_CT47; /* match with HDMI infoframe from this on */
  100. u8 SS01_SF24;
  101. u8 CXT04;
  102. u8 CA;
  103. u8 LFEPBL01_LSV36_DM_INH7;
  104. };
  105. union audio_infoframe {
  106. struct hdmi_audio_infoframe hdmi;
  107. struct dp_audio_infoframe dp;
  108. u8 bytes[0];
  109. };
  110. /*
  111. * CEA speaker placement:
  112. *
  113. * FLH FCH FRH
  114. * FLW FL FLC FC FRC FR FRW
  115. *
  116. * LFE
  117. * TC
  118. *
  119. * RL RLC RC RRC RR
  120. *
  121. * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
  122. * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
  123. */
  124. enum cea_speaker_placement {
  125. FL = (1 << 0), /* Front Left */
  126. FC = (1 << 1), /* Front Center */
  127. FR = (1 << 2), /* Front Right */
  128. FLC = (1 << 3), /* Front Left Center */
  129. FRC = (1 << 4), /* Front Right Center */
  130. RL = (1 << 5), /* Rear Left */
  131. RC = (1 << 6), /* Rear Center */
  132. RR = (1 << 7), /* Rear Right */
  133. RLC = (1 << 8), /* Rear Left Center */
  134. RRC = (1 << 9), /* Rear Right Center */
  135. LFE = (1 << 10), /* Low Frequency Effect */
  136. FLW = (1 << 11), /* Front Left Wide */
  137. FRW = (1 << 12), /* Front Right Wide */
  138. FLH = (1 << 13), /* Front Left High */
  139. FCH = (1 << 14), /* Front Center High */
  140. FRH = (1 << 15), /* Front Right High */
  141. TC = (1 << 16), /* Top Center */
  142. };
  143. /*
  144. * ELD SA bits in the CEA Speaker Allocation data block
  145. */
  146. static int eld_speaker_allocation_bits[] = {
  147. [0] = FL | FR,
  148. [1] = LFE,
  149. [2] = FC,
  150. [3] = RL | RR,
  151. [4] = RC,
  152. [5] = FLC | FRC,
  153. [6] = RLC | RRC,
  154. /* the following are not defined in ELD yet */
  155. [7] = FLW | FRW,
  156. [8] = FLH | FRH,
  157. [9] = TC,
  158. [10] = FCH,
  159. };
  160. struct cea_channel_speaker_allocation {
  161. int ca_index;
  162. int speakers[8];
  163. /* derived values, just for convenience */
  164. int channels;
  165. int spk_mask;
  166. };
  167. /*
  168. * ALSA sequence is:
  169. *
  170. * surround40 surround41 surround50 surround51 surround71
  171. * ch0 front left = = = =
  172. * ch1 front right = = = =
  173. * ch2 rear left = = = =
  174. * ch3 rear right = = = =
  175. * ch4 LFE center center center
  176. * ch5 LFE LFE
  177. * ch6 side left
  178. * ch7 side right
  179. *
  180. * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
  181. */
  182. static int hdmi_channel_mapping[0x32][8] = {
  183. /* stereo */
  184. [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  185. /* 2.1 */
  186. [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  187. /* Dolby Surround */
  188. [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
  189. /* surround40 */
  190. [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
  191. /* 4ch */
  192. [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
  193. /* surround41 */
  194. [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
  195. /* surround50 */
  196. [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
  197. /* surround51 */
  198. [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
  199. /* 7.1 */
  200. [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
  201. };
  202. /*
  203. * This is an ordered list!
  204. *
  205. * The preceding ones have better chances to be selected by
  206. * hdmi_channel_allocation().
  207. */
  208. static struct cea_channel_speaker_allocation channel_allocations[] = {
  209. /* channel: 7 6 5 4 3 2 1 0 */
  210. { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
  211. /* 2.1 */
  212. { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
  213. /* Dolby Surround */
  214. { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
  215. /* surround40 */
  216. { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
  217. /* surround41 */
  218. { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
  219. /* surround50 */
  220. { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
  221. /* surround51 */
  222. { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
  223. /* 6.1 */
  224. { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
  225. /* surround71 */
  226. { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
  227. { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
  228. { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
  229. { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
  230. { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
  231. { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
  232. { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
  233. { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
  234. { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
  235. { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
  236. { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
  237. { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
  238. { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
  239. { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
  240. { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
  241. { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
  242. { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
  243. { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
  244. { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
  245. { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
  246. { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
  247. { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
  248. { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
  249. { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
  250. { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
  251. { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
  252. { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
  253. { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
  254. { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
  255. { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
  256. { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
  257. { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
  258. { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
  259. { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
  260. { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
  261. { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
  262. { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
  263. { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
  264. { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
  265. { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
  266. { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
  267. { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
  268. };
  269. /*
  270. * HDMI routines
  271. */
  272. #define get_pin(spec, idx) \
  273. ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
  274. #define get_cvt(spec, idx) \
  275. ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
  276. #define get_pcm_rec(spec, idx) \
  277. ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
  278. static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
  279. {
  280. int pin_idx;
  281. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  282. if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
  283. return pin_idx;
  284. snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
  285. return -EINVAL;
  286. }
  287. static int hinfo_to_pin_index(struct hdmi_spec *spec,
  288. struct hda_pcm_stream *hinfo)
  289. {
  290. int pin_idx;
  291. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  292. if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
  293. return pin_idx;
  294. snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
  295. return -EINVAL;
  296. }
  297. static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
  298. {
  299. int cvt_idx;
  300. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
  301. if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
  302. return cvt_idx;
  303. snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
  304. return -EINVAL;
  305. }
  306. static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
  307. struct snd_ctl_elem_info *uinfo)
  308. {
  309. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  310. struct hdmi_spec *spec = codec->spec;
  311. struct hdmi_eld *eld;
  312. int pin_idx;
  313. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  314. pin_idx = kcontrol->private_value;
  315. eld = &get_pin(spec, pin_idx)->sink_eld;
  316. mutex_lock(&eld->lock);
  317. uinfo->count = eld->eld_valid ? eld->eld_size : 0;
  318. mutex_unlock(&eld->lock);
  319. return 0;
  320. }
  321. static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
  322. struct snd_ctl_elem_value *ucontrol)
  323. {
  324. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  325. struct hdmi_spec *spec = codec->spec;
  326. struct hdmi_eld *eld;
  327. int pin_idx;
  328. pin_idx = kcontrol->private_value;
  329. eld = &get_pin(spec, pin_idx)->sink_eld;
  330. mutex_lock(&eld->lock);
  331. if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
  332. mutex_unlock(&eld->lock);
  333. snd_BUG();
  334. return -EINVAL;
  335. }
  336. memset(ucontrol->value.bytes.data, 0,
  337. ARRAY_SIZE(ucontrol->value.bytes.data));
  338. if (eld->eld_valid)
  339. memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
  340. eld->eld_size);
  341. mutex_unlock(&eld->lock);
  342. return 0;
  343. }
  344. static struct snd_kcontrol_new eld_bytes_ctl = {
  345. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  346. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  347. .name = "ELD",
  348. .info = hdmi_eld_ctl_info,
  349. .get = hdmi_eld_ctl_get,
  350. };
  351. static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
  352. int device)
  353. {
  354. struct snd_kcontrol *kctl;
  355. struct hdmi_spec *spec = codec->spec;
  356. int err;
  357. kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
  358. if (!kctl)
  359. return -ENOMEM;
  360. kctl->private_value = pin_idx;
  361. kctl->id.device = device;
  362. err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
  363. if (err < 0)
  364. return err;
  365. get_pin(spec, pin_idx)->eld_ctl = kctl;
  366. return 0;
  367. }
  368. #ifdef BE_PARANOID
  369. static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  370. int *packet_index, int *byte_index)
  371. {
  372. int val;
  373. val = snd_hda_codec_read(codec, pin_nid, 0,
  374. AC_VERB_GET_HDMI_DIP_INDEX, 0);
  375. *packet_index = val >> 5;
  376. *byte_index = val & 0x1f;
  377. }
  378. #endif
  379. static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  380. int packet_index, int byte_index)
  381. {
  382. int val;
  383. val = (packet_index << 5) | (byte_index & 0x1f);
  384. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
  385. }
  386. static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
  387. unsigned char val)
  388. {
  389. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
  390. }
  391. static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  392. {
  393. /* Unmute */
  394. if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
  395. snd_hda_codec_write(codec, pin_nid, 0,
  396. AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
  397. /* Enable pin out: some machines with GM965 gets broken output when
  398. * the pin is disabled or changed while using with HDMI
  399. */
  400. snd_hda_codec_write(codec, pin_nid, 0,
  401. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  402. }
  403. static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
  404. {
  405. return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
  406. AC_VERB_GET_CVT_CHAN_COUNT, 0);
  407. }
  408. static void hdmi_set_channel_count(struct hda_codec *codec,
  409. hda_nid_t cvt_nid, int chs)
  410. {
  411. if (chs != hdmi_get_channel_count(codec, cvt_nid))
  412. snd_hda_codec_write(codec, cvt_nid, 0,
  413. AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
  414. }
  415. /*
  416. * Channel mapping routines
  417. */
  418. /*
  419. * Compute derived values in channel_allocations[].
  420. */
  421. static void init_channel_allocations(void)
  422. {
  423. int i, j;
  424. struct cea_channel_speaker_allocation *p;
  425. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  426. p = channel_allocations + i;
  427. p->channels = 0;
  428. p->spk_mask = 0;
  429. for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
  430. if (p->speakers[j]) {
  431. p->channels++;
  432. p->spk_mask |= p->speakers[j];
  433. }
  434. }
  435. }
  436. static int get_channel_allocation_order(int ca)
  437. {
  438. int i;
  439. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  440. if (channel_allocations[i].ca_index == ca)
  441. break;
  442. }
  443. return i;
  444. }
  445. /*
  446. * The transformation takes two steps:
  447. *
  448. * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
  449. * spk_mask => (channel_allocations[]) => ai->CA
  450. *
  451. * TODO: it could select the wrong CA from multiple candidates.
  452. */
  453. static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
  454. {
  455. int i;
  456. int ca = 0;
  457. int spk_mask = 0;
  458. char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
  459. /*
  460. * CA defaults to 0 for basic stereo audio
  461. */
  462. if (channels <= 2)
  463. return 0;
  464. /*
  465. * expand ELD's speaker allocation mask
  466. *
  467. * ELD tells the speaker mask in a compact(paired) form,
  468. * expand ELD's notions to match the ones used by Audio InfoFrame.
  469. */
  470. for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
  471. if (eld->info.spk_alloc & (1 << i))
  472. spk_mask |= eld_speaker_allocation_bits[i];
  473. }
  474. /* search for the first working match in the CA table */
  475. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  476. if (channels == channel_allocations[i].channels &&
  477. (spk_mask & channel_allocations[i].spk_mask) ==
  478. channel_allocations[i].spk_mask) {
  479. ca = channel_allocations[i].ca_index;
  480. break;
  481. }
  482. }
  483. if (!ca) {
  484. /* if there was no match, select the regular ALSA channel
  485. * allocation with the matching number of channels */
  486. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  487. if (channels == channel_allocations[i].channels) {
  488. ca = channel_allocations[i].ca_index;
  489. break;
  490. }
  491. }
  492. }
  493. snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
  494. snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
  495. ca, channels, buf);
  496. return ca;
  497. }
  498. static void hdmi_debug_channel_mapping(struct hda_codec *codec,
  499. hda_nid_t pin_nid)
  500. {
  501. #ifdef CONFIG_SND_DEBUG_VERBOSE
  502. int i;
  503. int slot;
  504. for (i = 0; i < 8; i++) {
  505. slot = snd_hda_codec_read(codec, pin_nid, 0,
  506. AC_VERB_GET_HDMI_CHAN_SLOT, i);
  507. printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
  508. slot >> 4, slot & 0xf);
  509. }
  510. #endif
  511. }
  512. static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
  513. hda_nid_t pin_nid,
  514. bool non_pcm,
  515. int ca)
  516. {
  517. int i;
  518. int err;
  519. int order;
  520. int non_pcm_mapping[8];
  521. order = get_channel_allocation_order(ca);
  522. if (hdmi_channel_mapping[ca][1] == 0) {
  523. for (i = 0; i < channel_allocations[order].channels; i++)
  524. hdmi_channel_mapping[ca][i] = i | (i << 4);
  525. for (; i < 8; i++)
  526. hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
  527. }
  528. if (non_pcm) {
  529. for (i = 0; i < channel_allocations[order].channels; i++)
  530. non_pcm_mapping[i] = i | (i << 4);
  531. for (; i < 8; i++)
  532. non_pcm_mapping[i] = 0xf | (i << 4);
  533. }
  534. for (i = 0; i < 8; i++) {
  535. err = snd_hda_codec_write(codec, pin_nid, 0,
  536. AC_VERB_SET_HDMI_CHAN_SLOT,
  537. non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
  538. if (err) {
  539. snd_printdd(KERN_NOTICE
  540. "HDMI: channel mapping failed\n");
  541. break;
  542. }
  543. }
  544. hdmi_debug_channel_mapping(codec, pin_nid);
  545. }
  546. struct channel_map_table {
  547. unsigned char map; /* ALSA API channel map position */
  548. unsigned char cea_slot; /* CEA slot value */
  549. int spk_mask; /* speaker position bit mask */
  550. };
  551. static struct channel_map_table map_tables[] = {
  552. { SNDRV_CHMAP_FL, 0x00, FL },
  553. { SNDRV_CHMAP_FR, 0x01, FR },
  554. { SNDRV_CHMAP_RL, 0x04, RL },
  555. { SNDRV_CHMAP_RR, 0x05, RR },
  556. { SNDRV_CHMAP_LFE, 0x02, LFE },
  557. { SNDRV_CHMAP_FC, 0x03, FC },
  558. { SNDRV_CHMAP_RLC, 0x06, RLC },
  559. { SNDRV_CHMAP_RRC, 0x07, RRC },
  560. {} /* terminator */
  561. };
  562. /* from ALSA API channel position to speaker bit mask */
  563. static int to_spk_mask(unsigned char c)
  564. {
  565. struct channel_map_table *t = map_tables;
  566. for (; t->map; t++) {
  567. if (t->map == c)
  568. return t->spk_mask;
  569. }
  570. return 0;
  571. }
  572. /* from ALSA API channel position to CEA slot */
  573. static int to_cea_slot(unsigned char c)
  574. {
  575. struct channel_map_table *t = map_tables;
  576. for (; t->map; t++) {
  577. if (t->map == c)
  578. return t->cea_slot;
  579. }
  580. return 0x0f;
  581. }
  582. /* from CEA slot to ALSA API channel position */
  583. static int from_cea_slot(unsigned char c)
  584. {
  585. struct channel_map_table *t = map_tables;
  586. for (; t->map; t++) {
  587. if (t->cea_slot == c)
  588. return t->map;
  589. }
  590. return 0;
  591. }
  592. /* from speaker bit mask to ALSA API channel position */
  593. static int spk_to_chmap(int spk)
  594. {
  595. struct channel_map_table *t = map_tables;
  596. for (; t->map; t++) {
  597. if (t->spk_mask == spk)
  598. return t->map;
  599. }
  600. return 0;
  601. }
  602. /* get the CA index corresponding to the given ALSA API channel map */
  603. static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
  604. {
  605. int i, spks = 0, spk_mask = 0;
  606. for (i = 0; i < chs; i++) {
  607. int mask = to_spk_mask(map[i]);
  608. if (mask) {
  609. spk_mask |= mask;
  610. spks++;
  611. }
  612. }
  613. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  614. if ((chs == channel_allocations[i].channels ||
  615. spks == channel_allocations[i].channels) &&
  616. (spk_mask & channel_allocations[i].spk_mask) ==
  617. channel_allocations[i].spk_mask)
  618. return channel_allocations[i].ca_index;
  619. }
  620. return -1;
  621. }
  622. /* set up the channel slots for the given ALSA API channel map */
  623. static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
  624. hda_nid_t pin_nid,
  625. int chs, unsigned char *map)
  626. {
  627. int i;
  628. for (i = 0; i < 8; i++) {
  629. int val, err;
  630. if (i < chs)
  631. val = to_cea_slot(map[i]);
  632. else
  633. val = 0xf;
  634. val |= (i << 4);
  635. err = snd_hda_codec_write(codec, pin_nid, 0,
  636. AC_VERB_SET_HDMI_CHAN_SLOT, val);
  637. if (err)
  638. return -EINVAL;
  639. }
  640. return 0;
  641. }
  642. /* store ALSA API channel map from the current default map */
  643. static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
  644. {
  645. int i;
  646. for (i = 0; i < 8; i++) {
  647. if (i < channel_allocations[ca].channels)
  648. map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
  649. else
  650. map[i] = 0;
  651. }
  652. }
  653. static void hdmi_setup_channel_mapping(struct hda_codec *codec,
  654. hda_nid_t pin_nid, bool non_pcm, int ca,
  655. int channels, unsigned char *map,
  656. bool chmap_set)
  657. {
  658. if (!non_pcm && chmap_set) {
  659. hdmi_manual_setup_channel_mapping(codec, pin_nid,
  660. channels, map);
  661. } else {
  662. hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
  663. hdmi_setup_fake_chmap(map, ca);
  664. }
  665. }
  666. /*
  667. * Audio InfoFrame routines
  668. */
  669. /*
  670. * Enable Audio InfoFrame Transmission
  671. */
  672. static void hdmi_start_infoframe_trans(struct hda_codec *codec,
  673. hda_nid_t pin_nid)
  674. {
  675. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  676. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  677. AC_DIPXMIT_BEST);
  678. }
  679. /*
  680. * Disable Audio InfoFrame Transmission
  681. */
  682. static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
  683. hda_nid_t pin_nid)
  684. {
  685. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  686. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  687. AC_DIPXMIT_DISABLE);
  688. }
  689. static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
  690. {
  691. #ifdef CONFIG_SND_DEBUG_VERBOSE
  692. int i;
  693. int size;
  694. size = snd_hdmi_get_eld_size(codec, pin_nid);
  695. printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
  696. for (i = 0; i < 8; i++) {
  697. size = snd_hda_codec_read(codec, pin_nid, 0,
  698. AC_VERB_GET_HDMI_DIP_SIZE, i);
  699. printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
  700. }
  701. #endif
  702. }
  703. static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
  704. {
  705. #ifdef BE_PARANOID
  706. int i, j;
  707. int size;
  708. int pi, bi;
  709. for (i = 0; i < 8; i++) {
  710. size = snd_hda_codec_read(codec, pin_nid, 0,
  711. AC_VERB_GET_HDMI_DIP_SIZE, i);
  712. if (size == 0)
  713. continue;
  714. hdmi_set_dip_index(codec, pin_nid, i, 0x0);
  715. for (j = 1; j < 1000; j++) {
  716. hdmi_write_dip_byte(codec, pin_nid, 0x0);
  717. hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
  718. if (pi != i)
  719. snd_printd(KERN_INFO "dip index %d: %d != %d\n",
  720. bi, pi, i);
  721. if (bi == 0) /* byte index wrapped around */
  722. break;
  723. }
  724. snd_printd(KERN_INFO
  725. "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
  726. i, size, j);
  727. }
  728. #endif
  729. }
  730. static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
  731. {
  732. u8 *bytes = (u8 *)hdmi_ai;
  733. u8 sum = 0;
  734. int i;
  735. hdmi_ai->checksum = 0;
  736. for (i = 0; i < sizeof(*hdmi_ai); i++)
  737. sum += bytes[i];
  738. hdmi_ai->checksum = -sum;
  739. }
  740. static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
  741. hda_nid_t pin_nid,
  742. u8 *dip, int size)
  743. {
  744. int i;
  745. hdmi_debug_dip_size(codec, pin_nid);
  746. hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
  747. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  748. for (i = 0; i < size; i++)
  749. hdmi_write_dip_byte(codec, pin_nid, dip[i]);
  750. }
  751. static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
  752. u8 *dip, int size)
  753. {
  754. u8 val;
  755. int i;
  756. if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
  757. != AC_DIPXMIT_BEST)
  758. return false;
  759. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  760. for (i = 0; i < size; i++) {
  761. val = snd_hda_codec_read(codec, pin_nid, 0,
  762. AC_VERB_GET_HDMI_DIP_DATA, 0);
  763. if (val != dip[i])
  764. return false;
  765. }
  766. return true;
  767. }
  768. static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
  769. bool non_pcm,
  770. struct snd_pcm_substream *substream)
  771. {
  772. struct hdmi_spec *spec = codec->spec;
  773. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  774. hda_nid_t pin_nid = per_pin->pin_nid;
  775. int channels = substream->runtime->channels;
  776. struct hdmi_eld *eld;
  777. int ca;
  778. union audio_infoframe ai;
  779. eld = &per_pin->sink_eld;
  780. if (!eld->monitor_present)
  781. return;
  782. if (!non_pcm && per_pin->chmap_set)
  783. ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
  784. else
  785. ca = hdmi_channel_allocation(eld, channels);
  786. if (ca < 0)
  787. ca = 0;
  788. memset(&ai, 0, sizeof(ai));
  789. if (eld->info.conn_type == 0) { /* HDMI */
  790. struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
  791. hdmi_ai->type = 0x84;
  792. hdmi_ai->ver = 0x01;
  793. hdmi_ai->len = 0x0a;
  794. hdmi_ai->CC02_CT47 = channels - 1;
  795. hdmi_ai->CA = ca;
  796. hdmi_checksum_audio_infoframe(hdmi_ai);
  797. } else if (eld->info.conn_type == 1) { /* DisplayPort */
  798. struct dp_audio_infoframe *dp_ai = &ai.dp;
  799. dp_ai->type = 0x84;
  800. dp_ai->len = 0x1b;
  801. dp_ai->ver = 0x11 << 2;
  802. dp_ai->CC02_CT47 = channels - 1;
  803. dp_ai->CA = ca;
  804. } else {
  805. snd_printd("HDMI: unknown connection type at pin %d\n",
  806. pin_nid);
  807. return;
  808. }
  809. /*
  810. * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
  811. * sizeof(*dp_ai) to avoid partial match/update problems when
  812. * the user switches between HDMI/DP monitors.
  813. */
  814. if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
  815. sizeof(ai))) {
  816. snd_printdd("hdmi_setup_audio_infoframe: "
  817. "pin=%d channels=%d\n",
  818. pin_nid,
  819. channels);
  820. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  821. channels, per_pin->chmap,
  822. per_pin->chmap_set);
  823. hdmi_stop_infoframe_trans(codec, pin_nid);
  824. hdmi_fill_audio_infoframe(codec, pin_nid,
  825. ai.bytes, sizeof(ai));
  826. hdmi_start_infoframe_trans(codec, pin_nid);
  827. } else {
  828. /* For non-pcm audio switch, setup new channel mapping
  829. * accordingly */
  830. if (per_pin->non_pcm != non_pcm)
  831. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  832. channels, per_pin->chmap,
  833. per_pin->chmap_set);
  834. }
  835. per_pin->non_pcm = non_pcm;
  836. }
  837. /*
  838. * Unsolicited events
  839. */
  840. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
  841. static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
  842. {
  843. struct hdmi_spec *spec = codec->spec;
  844. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  845. int pin_nid;
  846. int pin_idx;
  847. struct hda_jack_tbl *jack;
  848. int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
  849. jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
  850. if (!jack)
  851. return;
  852. pin_nid = jack->nid;
  853. jack->jack_dirty = 1;
  854. _snd_printd(SND_PR_VERBOSE,
  855. "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
  856. codec->addr, pin_nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
  857. !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
  858. pin_idx = pin_nid_to_pin_index(spec, pin_nid);
  859. if (pin_idx < 0)
  860. return;
  861. hdmi_present_sense(get_pin(spec, pin_idx), 1);
  862. snd_hda_jack_report_sync(codec);
  863. }
  864. static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
  865. {
  866. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  867. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  868. int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
  869. int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
  870. printk(KERN_INFO
  871. "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
  872. codec->addr,
  873. tag,
  874. subtag,
  875. cp_state,
  876. cp_ready);
  877. /* TODO */
  878. if (cp_state)
  879. ;
  880. if (cp_ready)
  881. ;
  882. }
  883. static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
  884. {
  885. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  886. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  887. if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
  888. snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
  889. return;
  890. }
  891. if (subtag == 0)
  892. hdmi_intrinsic_event(codec, res);
  893. else
  894. hdmi_non_intrinsic_event(codec, res);
  895. }
  896. static void haswell_verify_pin_D0(struct hda_codec *codec,
  897. hda_nid_t cvt_nid, hda_nid_t nid)
  898. {
  899. int pwr, lamp, ramp;
  900. /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
  901. * thus pins could only choose converter 0 for use. Make sure the
  902. * converters are in correct power state */
  903. if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
  904. snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
  905. if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
  906. snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
  907. AC_PWRST_D0);
  908. msleep(40);
  909. pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
  910. pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
  911. snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
  912. }
  913. lamp = snd_hda_codec_read(codec, nid, 0,
  914. AC_VERB_GET_AMP_GAIN_MUTE,
  915. AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
  916. ramp = snd_hda_codec_read(codec, nid, 0,
  917. AC_VERB_GET_AMP_GAIN_MUTE,
  918. AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
  919. if (lamp != ramp) {
  920. snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_AMP_GAIN_MUTE,
  921. AC_AMP_SET_RIGHT | AC_AMP_SET_OUTPUT | lamp);
  922. lamp = snd_hda_codec_read(codec, nid, 0,
  923. AC_VERB_GET_AMP_GAIN_MUTE,
  924. AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
  925. ramp = snd_hda_codec_read(codec, nid, 0,
  926. AC_VERB_GET_AMP_GAIN_MUTE,
  927. AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
  928. snd_printd("Haswell HDMI audio: Mute after set on pin 0x%x: [0x%x 0x%x]\n", nid, lamp, ramp);
  929. }
  930. }
  931. /*
  932. * Callbacks
  933. */
  934. /* HBR should be Non-PCM, 8 channels */
  935. #define is_hbr_format(format) \
  936. ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
  937. static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
  938. hda_nid_t pin_nid, u32 stream_tag, int format)
  939. {
  940. int pinctl;
  941. int new_pinctl = 0;
  942. if (codec->vendor_id == 0x80862807)
  943. haswell_verify_pin_D0(codec, cvt_nid, pin_nid);
  944. if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
  945. pinctl = snd_hda_codec_read(codec, pin_nid, 0,
  946. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  947. new_pinctl = pinctl & ~AC_PINCTL_EPT;
  948. if (is_hbr_format(format))
  949. new_pinctl |= AC_PINCTL_EPT_HBR;
  950. else
  951. new_pinctl |= AC_PINCTL_EPT_NATIVE;
  952. snd_printdd("hdmi_setup_stream: "
  953. "NID=0x%x, %spinctl=0x%x\n",
  954. pin_nid,
  955. pinctl == new_pinctl ? "" : "new-",
  956. new_pinctl);
  957. if (pinctl != new_pinctl)
  958. snd_hda_codec_write(codec, pin_nid, 0,
  959. AC_VERB_SET_PIN_WIDGET_CONTROL,
  960. new_pinctl);
  961. }
  962. if (is_hbr_format(format) && !new_pinctl) {
  963. snd_printdd("hdmi_setup_stream: HBR is not supported\n");
  964. return -EINVAL;
  965. }
  966. snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
  967. return 0;
  968. }
  969. static int hdmi_choose_cvt(struct hda_codec *codec,
  970. int pin_idx, int *cvt_id, int *mux_id)
  971. {
  972. struct hdmi_spec *spec = codec->spec;
  973. struct hdmi_spec_per_pin *per_pin;
  974. struct hdmi_spec_per_cvt *per_cvt = NULL;
  975. int cvt_idx, mux_idx = 0;
  976. per_pin = get_pin(spec, pin_idx);
  977. /* Dynamically assign converter to stream */
  978. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
  979. per_cvt = get_cvt(spec, cvt_idx);
  980. /* Must not already be assigned */
  981. if (per_cvt->assigned)
  982. continue;
  983. /* Must be in pin's mux's list of converters */
  984. for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
  985. if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
  986. break;
  987. /* Not in mux list */
  988. if (mux_idx == per_pin->num_mux_nids)
  989. continue;
  990. break;
  991. }
  992. /* No free converters */
  993. if (cvt_idx == spec->num_cvts)
  994. return -ENODEV;
  995. if (cvt_id)
  996. *cvt_id = cvt_idx;
  997. if (mux_id)
  998. *mux_id = mux_idx;
  999. return 0;
  1000. }
  1001. static void haswell_config_cvts(struct hda_codec *codec,
  1002. int pin_id, int mux_id)
  1003. {
  1004. struct hdmi_spec *spec = codec->spec;
  1005. struct hdmi_spec_per_pin *per_pin;
  1006. int pin_idx, mux_idx;
  1007. int curr;
  1008. int err;
  1009. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1010. per_pin = get_pin(spec, pin_idx);
  1011. if (pin_idx == pin_id)
  1012. continue;
  1013. curr = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
  1014. AC_VERB_GET_CONNECT_SEL, 0);
  1015. /* Choose another unused converter */
  1016. if (curr == mux_id) {
  1017. err = hdmi_choose_cvt(codec, pin_idx, NULL, &mux_idx);
  1018. if (err < 0)
  1019. return;
  1020. snd_printdd("HDMI: choose converter %d for pin %d\n", mux_idx, pin_idx);
  1021. snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
  1022. AC_VERB_SET_CONNECT_SEL,
  1023. mux_idx);
  1024. }
  1025. }
  1026. }
  1027. /*
  1028. * HDA PCM callbacks
  1029. */
  1030. static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
  1031. struct hda_codec *codec,
  1032. struct snd_pcm_substream *substream)
  1033. {
  1034. struct hdmi_spec *spec = codec->spec;
  1035. struct snd_pcm_runtime *runtime = substream->runtime;
  1036. int pin_idx, cvt_idx, mux_idx = 0;
  1037. struct hdmi_spec_per_pin *per_pin;
  1038. struct hdmi_eld *eld;
  1039. struct hdmi_spec_per_cvt *per_cvt = NULL;
  1040. int err;
  1041. /* Validate hinfo */
  1042. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1043. if (snd_BUG_ON(pin_idx < 0))
  1044. return -EINVAL;
  1045. per_pin = get_pin(spec, pin_idx);
  1046. eld = &per_pin->sink_eld;
  1047. err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
  1048. if (err < 0)
  1049. return err;
  1050. per_cvt = get_cvt(spec, cvt_idx);
  1051. /* Claim converter */
  1052. per_cvt->assigned = 1;
  1053. hinfo->nid = per_cvt->cvt_nid;
  1054. snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
  1055. AC_VERB_SET_CONNECT_SEL,
  1056. mux_idx);
  1057. /* configure unused pins to choose other converters */
  1058. if (codec->vendor_id == 0x80862807)
  1059. haswell_config_cvts(codec, pin_idx, mux_idx);
  1060. snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
  1061. /* Initially set the converter's capabilities */
  1062. hinfo->channels_min = per_cvt->channels_min;
  1063. hinfo->channels_max = per_cvt->channels_max;
  1064. hinfo->rates = per_cvt->rates;
  1065. hinfo->formats = per_cvt->formats;
  1066. hinfo->maxbps = per_cvt->maxbps;
  1067. /* Restrict capabilities by ELD if this isn't disabled */
  1068. if (!static_hdmi_pcm && eld->eld_valid) {
  1069. snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
  1070. if (hinfo->channels_min > hinfo->channels_max ||
  1071. !hinfo->rates || !hinfo->formats) {
  1072. per_cvt->assigned = 0;
  1073. hinfo->nid = 0;
  1074. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1075. return -ENODEV;
  1076. }
  1077. }
  1078. /* Store the updated parameters */
  1079. runtime->hw.channels_min = hinfo->channels_min;
  1080. runtime->hw.channels_max = hinfo->channels_max;
  1081. runtime->hw.formats = hinfo->formats;
  1082. runtime->hw.rates = hinfo->rates;
  1083. snd_pcm_hw_constraint_step(substream->runtime, 0,
  1084. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  1085. return 0;
  1086. }
  1087. /*
  1088. * HDA/HDMI auto parsing
  1089. */
  1090. static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
  1091. {
  1092. struct hdmi_spec *spec = codec->spec;
  1093. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1094. hda_nid_t pin_nid = per_pin->pin_nid;
  1095. if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
  1096. snd_printk(KERN_WARNING
  1097. "HDMI: pin %d wcaps %#x "
  1098. "does not support connection list\n",
  1099. pin_nid, get_wcaps(codec, pin_nid));
  1100. return -EINVAL;
  1101. }
  1102. per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
  1103. per_pin->mux_nids,
  1104. HDA_MAX_CONNECTIONS);
  1105. return 0;
  1106. }
  1107. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
  1108. {
  1109. struct hda_codec *codec = per_pin->codec;
  1110. struct hdmi_spec *spec = codec->spec;
  1111. struct hdmi_eld *eld = &spec->temp_eld;
  1112. struct hdmi_eld *pin_eld = &per_pin->sink_eld;
  1113. hda_nid_t pin_nid = per_pin->pin_nid;
  1114. /*
  1115. * Always execute a GetPinSense verb here, even when called from
  1116. * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
  1117. * response's PD bit is not the real PD value, but indicates that
  1118. * the real PD value changed. An older version of the HD-audio
  1119. * specification worked this way. Hence, we just ignore the data in
  1120. * the unsolicited response to avoid custom WARs.
  1121. */
  1122. int present = snd_hda_pin_sense(codec, pin_nid);
  1123. bool update_eld = false;
  1124. bool eld_changed = false;
  1125. pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
  1126. if (pin_eld->monitor_present)
  1127. eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
  1128. else
  1129. eld->eld_valid = false;
  1130. _snd_printd(SND_PR_VERBOSE,
  1131. "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  1132. codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
  1133. if (eld->eld_valid) {
  1134. if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer,
  1135. &eld->eld_size) < 0)
  1136. eld->eld_valid = false;
  1137. else {
  1138. memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
  1139. if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
  1140. eld->eld_size) < 0)
  1141. eld->eld_valid = false;
  1142. }
  1143. if (eld->eld_valid) {
  1144. snd_hdmi_show_eld(&eld->info);
  1145. update_eld = true;
  1146. }
  1147. else if (repoll) {
  1148. queue_delayed_work(codec->bus->workq,
  1149. &per_pin->work,
  1150. msecs_to_jiffies(300));
  1151. return;
  1152. }
  1153. }
  1154. mutex_lock(&pin_eld->lock);
  1155. if (pin_eld->eld_valid && !eld->eld_valid) {
  1156. update_eld = true;
  1157. eld_changed = true;
  1158. }
  1159. if (update_eld) {
  1160. pin_eld->eld_valid = eld->eld_valid;
  1161. eld_changed = pin_eld->eld_size != eld->eld_size ||
  1162. memcmp(pin_eld->eld_buffer, eld->eld_buffer,
  1163. eld->eld_size) != 0;
  1164. if (eld_changed)
  1165. memcpy(pin_eld->eld_buffer, eld->eld_buffer,
  1166. eld->eld_size);
  1167. pin_eld->eld_size = eld->eld_size;
  1168. pin_eld->info = eld->info;
  1169. }
  1170. mutex_unlock(&pin_eld->lock);
  1171. if (eld_changed)
  1172. snd_ctl_notify(codec->bus->card,
  1173. SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
  1174. &per_pin->eld_ctl->id);
  1175. }
  1176. static void hdmi_repoll_eld(struct work_struct *work)
  1177. {
  1178. struct hdmi_spec_per_pin *per_pin =
  1179. container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
  1180. if (per_pin->repoll_count++ > 6)
  1181. per_pin->repoll_count = 0;
  1182. hdmi_present_sense(per_pin, per_pin->repoll_count);
  1183. }
  1184. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1185. hda_nid_t nid);
  1186. static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  1187. {
  1188. struct hdmi_spec *spec = codec->spec;
  1189. unsigned int caps, config;
  1190. int pin_idx;
  1191. struct hdmi_spec_per_pin *per_pin;
  1192. int err;
  1193. caps = snd_hda_query_pin_caps(codec, pin_nid);
  1194. if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
  1195. return 0;
  1196. config = snd_hda_codec_get_pincfg(codec, pin_nid);
  1197. if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
  1198. return 0;
  1199. if (codec->vendor_id == 0x80862807)
  1200. intel_haswell_fixup_connect_list(codec, pin_nid);
  1201. pin_idx = spec->num_pins;
  1202. per_pin = snd_array_new(&spec->pins);
  1203. if (!per_pin)
  1204. return -ENOMEM;
  1205. per_pin->pin_nid = pin_nid;
  1206. per_pin->non_pcm = false;
  1207. err = hdmi_read_pin_conn(codec, pin_idx);
  1208. if (err < 0)
  1209. return err;
  1210. spec->num_pins++;
  1211. return 0;
  1212. }
  1213. static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1214. {
  1215. struct hdmi_spec *spec = codec->spec;
  1216. struct hdmi_spec_per_cvt *per_cvt;
  1217. unsigned int chans;
  1218. int err;
  1219. chans = get_wcaps(codec, cvt_nid);
  1220. chans = get_wcaps_channels(chans);
  1221. per_cvt = snd_array_new(&spec->cvts);
  1222. if (!per_cvt)
  1223. return -ENOMEM;
  1224. per_cvt->cvt_nid = cvt_nid;
  1225. per_cvt->channels_min = 2;
  1226. if (chans <= 16) {
  1227. per_cvt->channels_max = chans;
  1228. if (chans > spec->channels_max)
  1229. spec->channels_max = chans;
  1230. }
  1231. err = snd_hda_query_supported_pcm(codec, cvt_nid,
  1232. &per_cvt->rates,
  1233. &per_cvt->formats,
  1234. &per_cvt->maxbps);
  1235. if (err < 0)
  1236. return err;
  1237. if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
  1238. spec->cvt_nids[spec->num_cvts] = cvt_nid;
  1239. spec->num_cvts++;
  1240. return 0;
  1241. }
  1242. static int hdmi_parse_codec(struct hda_codec *codec)
  1243. {
  1244. hda_nid_t nid;
  1245. int i, nodes;
  1246. nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
  1247. if (!nid || nodes < 0) {
  1248. snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
  1249. return -EINVAL;
  1250. }
  1251. for (i = 0; i < nodes; i++, nid++) {
  1252. unsigned int caps;
  1253. unsigned int type;
  1254. caps = get_wcaps(codec, nid);
  1255. type = get_wcaps_type(caps);
  1256. if (!(caps & AC_WCAP_DIGITAL))
  1257. continue;
  1258. switch (type) {
  1259. case AC_WID_AUD_OUT:
  1260. hdmi_add_cvt(codec, nid);
  1261. break;
  1262. case AC_WID_PIN:
  1263. hdmi_add_pin(codec, nid);
  1264. break;
  1265. }
  1266. }
  1267. #ifdef CONFIG_PM
  1268. /* We're seeing some problems with unsolicited hot plug events on
  1269. * PantherPoint after S3, if this is not enabled */
  1270. if (codec->vendor_id == 0x80862806)
  1271. codec->bus->power_keep_link_on = 1;
  1272. /*
  1273. * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
  1274. * can be lost and presence sense verb will become inaccurate if the
  1275. * HDA link is powered off at hot plug or hw initialization time.
  1276. */
  1277. else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
  1278. AC_PWRST_EPSS))
  1279. codec->bus->power_keep_link_on = 1;
  1280. #endif
  1281. return 0;
  1282. }
  1283. /*
  1284. */
  1285. static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1286. {
  1287. struct hda_spdif_out *spdif;
  1288. bool non_pcm;
  1289. mutex_lock(&codec->spdif_mutex);
  1290. spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
  1291. non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
  1292. mutex_unlock(&codec->spdif_mutex);
  1293. return non_pcm;
  1294. }
  1295. /*
  1296. * HDMI callbacks
  1297. */
  1298. static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1299. struct hda_codec *codec,
  1300. unsigned int stream_tag,
  1301. unsigned int format,
  1302. struct snd_pcm_substream *substream)
  1303. {
  1304. hda_nid_t cvt_nid = hinfo->nid;
  1305. struct hdmi_spec *spec = codec->spec;
  1306. int pin_idx = hinfo_to_pin_index(spec, hinfo);
  1307. hda_nid_t pin_nid = get_pin(spec, pin_idx)->pin_nid;
  1308. bool non_pcm;
  1309. non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
  1310. hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
  1311. hdmi_setup_audio_infoframe(codec, pin_idx, non_pcm, substream);
  1312. return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
  1313. }
  1314. static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1315. struct hda_codec *codec,
  1316. struct snd_pcm_substream *substream)
  1317. {
  1318. snd_hda_codec_cleanup_stream(codec, hinfo->nid);
  1319. return 0;
  1320. }
  1321. static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
  1322. struct hda_codec *codec,
  1323. struct snd_pcm_substream *substream)
  1324. {
  1325. struct hdmi_spec *spec = codec->spec;
  1326. int cvt_idx, pin_idx;
  1327. struct hdmi_spec_per_cvt *per_cvt;
  1328. struct hdmi_spec_per_pin *per_pin;
  1329. if (hinfo->nid) {
  1330. cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
  1331. if (snd_BUG_ON(cvt_idx < 0))
  1332. return -EINVAL;
  1333. per_cvt = get_cvt(spec, cvt_idx);
  1334. snd_BUG_ON(!per_cvt->assigned);
  1335. per_cvt->assigned = 0;
  1336. hinfo->nid = 0;
  1337. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1338. if (snd_BUG_ON(pin_idx < 0))
  1339. return -EINVAL;
  1340. per_pin = get_pin(spec, pin_idx);
  1341. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1342. per_pin->chmap_set = false;
  1343. memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
  1344. }
  1345. return 0;
  1346. }
  1347. static const struct hda_pcm_ops generic_ops = {
  1348. .open = hdmi_pcm_open,
  1349. .close = hdmi_pcm_close,
  1350. .prepare = generic_hdmi_playback_pcm_prepare,
  1351. .cleanup = generic_hdmi_playback_pcm_cleanup,
  1352. };
  1353. /*
  1354. * ALSA API channel-map control callbacks
  1355. */
  1356. static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
  1357. struct snd_ctl_elem_info *uinfo)
  1358. {
  1359. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1360. struct hda_codec *codec = info->private_data;
  1361. struct hdmi_spec *spec = codec->spec;
  1362. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1363. uinfo->count = spec->channels_max;
  1364. uinfo->value.integer.min = 0;
  1365. uinfo->value.integer.max = SNDRV_CHMAP_LAST;
  1366. return 0;
  1367. }
  1368. static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
  1369. unsigned int size, unsigned int __user *tlv)
  1370. {
  1371. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1372. struct hda_codec *codec = info->private_data;
  1373. struct hdmi_spec *spec = codec->spec;
  1374. const unsigned int valid_mask =
  1375. FL | FR | RL | RR | LFE | FC | RLC | RRC;
  1376. unsigned int __user *dst;
  1377. int chs, count = 0;
  1378. if (size < 8)
  1379. return -ENOMEM;
  1380. if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
  1381. return -EFAULT;
  1382. size -= 8;
  1383. dst = tlv + 2;
  1384. for (chs = 2; chs <= spec->channels_max; chs++) {
  1385. int i, c;
  1386. struct cea_channel_speaker_allocation *cap;
  1387. cap = channel_allocations;
  1388. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
  1389. int chs_bytes = chs * 4;
  1390. if (cap->channels != chs)
  1391. continue;
  1392. if (cap->spk_mask & ~valid_mask)
  1393. continue;
  1394. if (size < 8)
  1395. return -ENOMEM;
  1396. if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
  1397. put_user(chs_bytes, dst + 1))
  1398. return -EFAULT;
  1399. dst += 2;
  1400. size -= 8;
  1401. count += 8;
  1402. if (size < chs_bytes)
  1403. return -ENOMEM;
  1404. size -= chs_bytes;
  1405. count += chs_bytes;
  1406. for (c = 7; c >= 0; c--) {
  1407. int spk = cap->speakers[c];
  1408. if (!spk)
  1409. continue;
  1410. if (put_user(spk_to_chmap(spk), dst))
  1411. return -EFAULT;
  1412. dst++;
  1413. }
  1414. }
  1415. }
  1416. if (put_user(count, tlv + 1))
  1417. return -EFAULT;
  1418. return 0;
  1419. }
  1420. static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
  1421. struct snd_ctl_elem_value *ucontrol)
  1422. {
  1423. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1424. struct hda_codec *codec = info->private_data;
  1425. struct hdmi_spec *spec = codec->spec;
  1426. int pin_idx = kcontrol->private_value;
  1427. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1428. int i;
  1429. for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
  1430. ucontrol->value.integer.value[i] = per_pin->chmap[i];
  1431. return 0;
  1432. }
  1433. static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
  1434. struct snd_ctl_elem_value *ucontrol)
  1435. {
  1436. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1437. struct hda_codec *codec = info->private_data;
  1438. struct hdmi_spec *spec = codec->spec;
  1439. int pin_idx = kcontrol->private_value;
  1440. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1441. unsigned int ctl_idx;
  1442. struct snd_pcm_substream *substream;
  1443. unsigned char chmap[8];
  1444. int i, ca, prepared = 0;
  1445. ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1446. substream = snd_pcm_chmap_substream(info, ctl_idx);
  1447. if (!substream || !substream->runtime)
  1448. return 0; /* just for avoiding error from alsactl restore */
  1449. switch (substream->runtime->status->state) {
  1450. case SNDRV_PCM_STATE_OPEN:
  1451. case SNDRV_PCM_STATE_SETUP:
  1452. break;
  1453. case SNDRV_PCM_STATE_PREPARED:
  1454. prepared = 1;
  1455. break;
  1456. default:
  1457. return -EBUSY;
  1458. }
  1459. memset(chmap, 0, sizeof(chmap));
  1460. for (i = 0; i < ARRAY_SIZE(chmap); i++)
  1461. chmap[i] = ucontrol->value.integer.value[i];
  1462. if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
  1463. return 0;
  1464. ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
  1465. if (ca < 0)
  1466. return -EINVAL;
  1467. per_pin->chmap_set = true;
  1468. memcpy(per_pin->chmap, chmap, sizeof(chmap));
  1469. if (prepared)
  1470. hdmi_setup_audio_infoframe(codec, pin_idx, per_pin->non_pcm,
  1471. substream);
  1472. return 0;
  1473. }
  1474. static int generic_hdmi_build_pcms(struct hda_codec *codec)
  1475. {
  1476. struct hdmi_spec *spec = codec->spec;
  1477. int pin_idx;
  1478. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1479. struct hda_pcm *info;
  1480. struct hda_pcm_stream *pstr;
  1481. struct hdmi_spec_per_pin *per_pin;
  1482. per_pin = get_pin(spec, pin_idx);
  1483. sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
  1484. info = snd_array_new(&spec->pcm_rec);
  1485. if (!info)
  1486. return -ENOMEM;
  1487. info->name = per_pin->pcm_name;
  1488. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1489. info->own_chmap = true;
  1490. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1491. pstr->substreams = 1;
  1492. pstr->ops = generic_ops;
  1493. /* other pstr fields are set in open */
  1494. }
  1495. codec->num_pcms = spec->num_pins;
  1496. codec->pcm_info = spec->pcm_rec.list;
  1497. return 0;
  1498. }
  1499. static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
  1500. {
  1501. char hdmi_str[32] = "HDMI/DP";
  1502. struct hdmi_spec *spec = codec->spec;
  1503. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1504. int pcmdev = get_pcm_rec(spec, pin_idx)->device;
  1505. if (pcmdev > 0)
  1506. sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
  1507. if (!is_jack_detectable(codec, per_pin->pin_nid))
  1508. strncat(hdmi_str, " Phantom",
  1509. sizeof(hdmi_str) - strlen(hdmi_str) - 1);
  1510. return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
  1511. }
  1512. static int generic_hdmi_build_controls(struct hda_codec *codec)
  1513. {
  1514. struct hdmi_spec *spec = codec->spec;
  1515. int err;
  1516. int pin_idx;
  1517. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1518. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1519. err = generic_hdmi_build_jack(codec, pin_idx);
  1520. if (err < 0)
  1521. return err;
  1522. err = snd_hda_create_dig_out_ctls(codec,
  1523. per_pin->pin_nid,
  1524. per_pin->mux_nids[0],
  1525. HDA_PCM_TYPE_HDMI);
  1526. if (err < 0)
  1527. return err;
  1528. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1529. /* add control for ELD Bytes */
  1530. err = hdmi_create_eld_ctl(codec, pin_idx,
  1531. get_pcm_rec(spec, pin_idx)->device);
  1532. if (err < 0)
  1533. return err;
  1534. hdmi_present_sense(per_pin, 0);
  1535. }
  1536. /* add channel maps */
  1537. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1538. struct snd_pcm_chmap *chmap;
  1539. struct snd_kcontrol *kctl;
  1540. int i;
  1541. err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
  1542. SNDRV_PCM_STREAM_PLAYBACK,
  1543. NULL, 0, pin_idx, &chmap);
  1544. if (err < 0)
  1545. return err;
  1546. /* override handlers */
  1547. chmap->private_data = codec;
  1548. kctl = chmap->kctl;
  1549. for (i = 0; i < kctl->count; i++)
  1550. kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
  1551. kctl->info = hdmi_chmap_ctl_info;
  1552. kctl->get = hdmi_chmap_ctl_get;
  1553. kctl->put = hdmi_chmap_ctl_put;
  1554. kctl->tlv.c = hdmi_chmap_ctl_tlv;
  1555. }
  1556. return 0;
  1557. }
  1558. static int generic_hdmi_init_per_pins(struct hda_codec *codec)
  1559. {
  1560. struct hdmi_spec *spec = codec->spec;
  1561. int pin_idx;
  1562. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1563. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1564. struct hdmi_eld *eld = &per_pin->sink_eld;
  1565. per_pin->codec = codec;
  1566. mutex_init(&eld->lock);
  1567. INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
  1568. snd_hda_eld_proc_new(codec, eld, pin_idx);
  1569. }
  1570. return 0;
  1571. }
  1572. static int generic_hdmi_init(struct hda_codec *codec)
  1573. {
  1574. struct hdmi_spec *spec = codec->spec;
  1575. int pin_idx;
  1576. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1577. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1578. hda_nid_t pin_nid = per_pin->pin_nid;
  1579. hdmi_init_pin(codec, pin_nid);
  1580. snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
  1581. }
  1582. return 0;
  1583. }
  1584. static void hdmi_array_init(struct hdmi_spec *spec, int nums)
  1585. {
  1586. snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
  1587. snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
  1588. snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
  1589. }
  1590. static void hdmi_array_free(struct hdmi_spec *spec)
  1591. {
  1592. snd_array_free(&spec->pins);
  1593. snd_array_free(&spec->cvts);
  1594. snd_array_free(&spec->pcm_rec);
  1595. }
  1596. static void generic_hdmi_free(struct hda_codec *codec)
  1597. {
  1598. struct hdmi_spec *spec = codec->spec;
  1599. int pin_idx;
  1600. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1601. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1602. struct hdmi_eld *eld = &per_pin->sink_eld;
  1603. cancel_delayed_work(&per_pin->work);
  1604. snd_hda_eld_proc_free(codec, eld);
  1605. }
  1606. flush_workqueue(codec->bus->workq);
  1607. hdmi_array_free(spec);
  1608. kfree(spec);
  1609. }
  1610. #ifdef CONFIG_PM
  1611. static int generic_hdmi_resume(struct hda_codec *codec)
  1612. {
  1613. struct hdmi_spec *spec = codec->spec;
  1614. int pin_idx;
  1615. generic_hdmi_init(codec);
  1616. snd_hda_codec_resume_amp(codec);
  1617. snd_hda_codec_resume_cache(codec);
  1618. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1619. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1620. hdmi_present_sense(per_pin, 1);
  1621. }
  1622. return 0;
  1623. }
  1624. #endif
  1625. static const struct hda_codec_ops generic_hdmi_patch_ops = {
  1626. .init = generic_hdmi_init,
  1627. .free = generic_hdmi_free,
  1628. .build_pcms = generic_hdmi_build_pcms,
  1629. .build_controls = generic_hdmi_build_controls,
  1630. .unsol_event = hdmi_unsol_event,
  1631. #ifdef CONFIG_PM
  1632. .resume = generic_hdmi_resume,
  1633. #endif
  1634. };
  1635. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1636. hda_nid_t nid)
  1637. {
  1638. struct hdmi_spec *spec = codec->spec;
  1639. hda_nid_t conns[4];
  1640. int nconns;
  1641. nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
  1642. if (nconns == spec->num_cvts &&
  1643. !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
  1644. return;
  1645. /* override pins connection list */
  1646. snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
  1647. snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
  1648. }
  1649. #define INTEL_VENDOR_NID 0x08
  1650. #define INTEL_GET_VENDOR_VERB 0xf81
  1651. #define INTEL_SET_VENDOR_VERB 0x781
  1652. #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
  1653. #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
  1654. static void intel_haswell_enable_all_pins(struct hda_codec *codec,
  1655. bool update_tree)
  1656. {
  1657. unsigned int vendor_param;
  1658. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1659. INTEL_GET_VENDOR_VERB, 0);
  1660. if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
  1661. return;
  1662. vendor_param |= INTEL_EN_ALL_PIN_CVTS;
  1663. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1664. INTEL_SET_VENDOR_VERB, vendor_param);
  1665. if (vendor_param == -1)
  1666. return;
  1667. if (update_tree)
  1668. snd_hda_codec_update_widgets(codec);
  1669. }
  1670. static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
  1671. {
  1672. unsigned int vendor_param;
  1673. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1674. INTEL_GET_VENDOR_VERB, 0);
  1675. if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
  1676. return;
  1677. /* enable DP1.2 mode */
  1678. vendor_param |= INTEL_EN_DP12;
  1679. snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
  1680. INTEL_SET_VENDOR_VERB, vendor_param);
  1681. }
  1682. /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
  1683. * Otherwise you may get severe h/w communication errors.
  1684. */
  1685. static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
  1686. unsigned int power_state)
  1687. {
  1688. if (power_state == AC_PWRST_D0) {
  1689. intel_haswell_enable_all_pins(codec, false);
  1690. intel_haswell_fixup_enable_dp12(codec);
  1691. }
  1692. snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
  1693. snd_hda_codec_set_power_to_all(codec, fg, power_state);
  1694. }
  1695. static int patch_generic_hdmi(struct hda_codec *codec)
  1696. {
  1697. struct hdmi_spec *spec;
  1698. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1699. if (spec == NULL)
  1700. return -ENOMEM;
  1701. codec->spec = spec;
  1702. hdmi_array_init(spec, 4);
  1703. if (codec->vendor_id == 0x80862807) {
  1704. intel_haswell_enable_all_pins(codec, true);
  1705. intel_haswell_fixup_enable_dp12(codec);
  1706. }
  1707. if (hdmi_parse_codec(codec) < 0) {
  1708. codec->spec = NULL;
  1709. kfree(spec);
  1710. return -EINVAL;
  1711. }
  1712. codec->patch_ops = generic_hdmi_patch_ops;
  1713. if (codec->vendor_id == 0x80862807) {
  1714. codec->patch_ops.set_power_state = haswell_set_power_state;
  1715. codec->dp_mst = true;
  1716. }
  1717. generic_hdmi_init_per_pins(codec);
  1718. init_channel_allocations();
  1719. return 0;
  1720. }
  1721. /*
  1722. * Shared non-generic implementations
  1723. */
  1724. static int simple_playback_build_pcms(struct hda_codec *codec)
  1725. {
  1726. struct hdmi_spec *spec = codec->spec;
  1727. struct hda_pcm *info;
  1728. unsigned int chans;
  1729. struct hda_pcm_stream *pstr;
  1730. struct hdmi_spec_per_cvt *per_cvt;
  1731. per_cvt = get_cvt(spec, 0);
  1732. chans = get_wcaps(codec, per_cvt->cvt_nid);
  1733. chans = get_wcaps_channels(chans);
  1734. info = snd_array_new(&spec->pcm_rec);
  1735. if (!info)
  1736. return -ENOMEM;
  1737. info->name = get_pin(spec, 0)->pcm_name;
  1738. sprintf(info->name, "HDMI 0");
  1739. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1740. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1741. *pstr = spec->pcm_playback;
  1742. pstr->nid = per_cvt->cvt_nid;
  1743. if (pstr->channels_max <= 2 && chans && chans <= 16)
  1744. pstr->channels_max = chans;
  1745. codec->num_pcms = 1;
  1746. codec->pcm_info = info;
  1747. return 0;
  1748. }
  1749. /* unsolicited event for jack sensing */
  1750. static void simple_hdmi_unsol_event(struct hda_codec *codec,
  1751. unsigned int res)
  1752. {
  1753. snd_hda_jack_set_dirty_all(codec);
  1754. snd_hda_jack_report_sync(codec);
  1755. }
  1756. /* generic_hdmi_build_jack can be used for simple_hdmi, too,
  1757. * as long as spec->pins[] is set correctly
  1758. */
  1759. #define simple_hdmi_build_jack generic_hdmi_build_jack
  1760. static int simple_playback_build_controls(struct hda_codec *codec)
  1761. {
  1762. struct hdmi_spec *spec = codec->spec;
  1763. struct hdmi_spec_per_cvt *per_cvt;
  1764. int err;
  1765. per_cvt = get_cvt(spec, 0);
  1766. err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
  1767. per_cvt->cvt_nid);
  1768. if (err < 0)
  1769. return err;
  1770. return simple_hdmi_build_jack(codec, 0);
  1771. }
  1772. static int simple_playback_init(struct hda_codec *codec)
  1773. {
  1774. struct hdmi_spec *spec = codec->spec;
  1775. struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
  1776. hda_nid_t pin = per_pin->pin_nid;
  1777. snd_hda_codec_write(codec, pin, 0,
  1778. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  1779. /* some codecs require to unmute the pin */
  1780. if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
  1781. snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
  1782. AMP_OUT_UNMUTE);
  1783. snd_hda_jack_detect_enable(codec, pin, pin);
  1784. return 0;
  1785. }
  1786. static void simple_playback_free(struct hda_codec *codec)
  1787. {
  1788. struct hdmi_spec *spec = codec->spec;
  1789. hdmi_array_free(spec);
  1790. kfree(spec);
  1791. }
  1792. /*
  1793. * Nvidia specific implementations
  1794. */
  1795. #define Nv_VERB_SET_Channel_Allocation 0xF79
  1796. #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
  1797. #define Nv_VERB_SET_Audio_Protection_On 0xF98
  1798. #define Nv_VERB_SET_Audio_Protection_Off 0xF99
  1799. #define nvhdmi_master_con_nid_7x 0x04
  1800. #define nvhdmi_master_pin_nid_7x 0x05
  1801. static const hda_nid_t nvhdmi_con_nids_7x[4] = {
  1802. /*front, rear, clfe, rear_surr */
  1803. 0x6, 0x8, 0xa, 0xc,
  1804. };
  1805. static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
  1806. /* set audio protect on */
  1807. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1808. /* enable digital output on pin widget */
  1809. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1810. {} /* terminator */
  1811. };
  1812. static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
  1813. /* set audio protect on */
  1814. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1815. /* enable digital output on pin widget */
  1816. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1817. { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1818. { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1819. { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1820. { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1821. {} /* terminator */
  1822. };
  1823. #ifdef LIMITED_RATE_FMT_SUPPORT
  1824. /* support only the safe format and rate */
  1825. #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
  1826. #define SUPPORTED_MAXBPS 16
  1827. #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
  1828. #else
  1829. /* support all rates and formats */
  1830. #define SUPPORTED_RATES \
  1831. (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  1832. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
  1833. SNDRV_PCM_RATE_192000)
  1834. #define SUPPORTED_MAXBPS 24
  1835. #define SUPPORTED_FORMATS \
  1836. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1837. #endif
  1838. static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
  1839. {
  1840. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
  1841. return 0;
  1842. }
  1843. static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
  1844. {
  1845. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
  1846. return 0;
  1847. }
  1848. static unsigned int channels_2_6_8[] = {
  1849. 2, 6, 8
  1850. };
  1851. static unsigned int channels_2_8[] = {
  1852. 2, 8
  1853. };
  1854. static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
  1855. .count = ARRAY_SIZE(channels_2_6_8),
  1856. .list = channels_2_6_8,
  1857. .mask = 0,
  1858. };
  1859. static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
  1860. .count = ARRAY_SIZE(channels_2_8),
  1861. .list = channels_2_8,
  1862. .mask = 0,
  1863. };
  1864. static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1865. struct hda_codec *codec,
  1866. struct snd_pcm_substream *substream)
  1867. {
  1868. struct hdmi_spec *spec = codec->spec;
  1869. struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
  1870. switch (codec->preset->id) {
  1871. case 0x10de0002:
  1872. case 0x10de0003:
  1873. case 0x10de0005:
  1874. case 0x10de0006:
  1875. hw_constraints_channels = &hw_constraints_2_8_channels;
  1876. break;
  1877. case 0x10de0007:
  1878. hw_constraints_channels = &hw_constraints_2_6_8_channels;
  1879. break;
  1880. default:
  1881. break;
  1882. }
  1883. if (hw_constraints_channels != NULL) {
  1884. snd_pcm_hw_constraint_list(substream->runtime, 0,
  1885. SNDRV_PCM_HW_PARAM_CHANNELS,
  1886. hw_constraints_channels);
  1887. } else {
  1888. snd_pcm_hw_constraint_step(substream->runtime, 0,
  1889. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  1890. }
  1891. return snd_hda_multi_out_dig_open(codec, &spec->multiout);
  1892. }
  1893. static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
  1894. struct hda_codec *codec,
  1895. struct snd_pcm_substream *substream)
  1896. {
  1897. struct hdmi_spec *spec = codec->spec;
  1898. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1899. }
  1900. static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1901. struct hda_codec *codec,
  1902. unsigned int stream_tag,
  1903. unsigned int format,
  1904. struct snd_pcm_substream *substream)
  1905. {
  1906. struct hdmi_spec *spec = codec->spec;
  1907. return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
  1908. stream_tag, format, substream);
  1909. }
  1910. static const struct hda_pcm_stream simple_pcm_playback = {
  1911. .substreams = 1,
  1912. .channels_min = 2,
  1913. .channels_max = 2,
  1914. .ops = {
  1915. .open = simple_playback_pcm_open,
  1916. .close = simple_playback_pcm_close,
  1917. .prepare = simple_playback_pcm_prepare
  1918. },
  1919. };
  1920. static const struct hda_codec_ops simple_hdmi_patch_ops = {
  1921. .build_controls = simple_playback_build_controls,
  1922. .build_pcms = simple_playback_build_pcms,
  1923. .init = simple_playback_init,
  1924. .free = simple_playback_free,
  1925. .unsol_event = simple_hdmi_unsol_event,
  1926. };
  1927. static int patch_simple_hdmi(struct hda_codec *codec,
  1928. hda_nid_t cvt_nid, hda_nid_t pin_nid)
  1929. {
  1930. struct hdmi_spec *spec;
  1931. struct hdmi_spec_per_cvt *per_cvt;
  1932. struct hdmi_spec_per_pin *per_pin;
  1933. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1934. if (!spec)
  1935. return -ENOMEM;
  1936. codec->spec = spec;
  1937. hdmi_array_init(spec, 1);
  1938. spec->multiout.num_dacs = 0; /* no analog */
  1939. spec->multiout.max_channels = 2;
  1940. spec->multiout.dig_out_nid = cvt_nid;
  1941. spec->num_cvts = 1;
  1942. spec->num_pins = 1;
  1943. per_pin = snd_array_new(&spec->pins);
  1944. per_cvt = snd_array_new(&spec->cvts);
  1945. if (!per_pin || !per_cvt) {
  1946. simple_playback_free(codec);
  1947. return -ENOMEM;
  1948. }
  1949. per_cvt->cvt_nid = cvt_nid;
  1950. per_pin->pin_nid = pin_nid;
  1951. spec->pcm_playback = simple_pcm_playback;
  1952. codec->patch_ops = simple_hdmi_patch_ops;
  1953. return 0;
  1954. }
  1955. static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
  1956. int channels)
  1957. {
  1958. unsigned int chanmask;
  1959. int chan = channels ? (channels - 1) : 1;
  1960. switch (channels) {
  1961. default:
  1962. case 0:
  1963. case 2:
  1964. chanmask = 0x00;
  1965. break;
  1966. case 4:
  1967. chanmask = 0x08;
  1968. break;
  1969. case 6:
  1970. chanmask = 0x0b;
  1971. break;
  1972. case 8:
  1973. chanmask = 0x13;
  1974. break;
  1975. }
  1976. /* Set the audio infoframe channel allocation and checksum fields. The
  1977. * channel count is computed implicitly by the hardware. */
  1978. snd_hda_codec_write(codec, 0x1, 0,
  1979. Nv_VERB_SET_Channel_Allocation, chanmask);
  1980. snd_hda_codec_write(codec, 0x1, 0,
  1981. Nv_VERB_SET_Info_Frame_Checksum,
  1982. (0x71 - chan - chanmask));
  1983. }
  1984. static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
  1985. struct hda_codec *codec,
  1986. struct snd_pcm_substream *substream)
  1987. {
  1988. struct hdmi_spec *spec = codec->spec;
  1989. int i;
  1990. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
  1991. 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
  1992. for (i = 0; i < 4; i++) {
  1993. /* set the stream id */
  1994. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  1995. AC_VERB_SET_CHANNEL_STREAMID, 0);
  1996. /* set the stream format */
  1997. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  1998. AC_VERB_SET_STREAM_FORMAT, 0);
  1999. }
  2000. /* The audio hardware sends a channel count of 0x7 (8ch) when all the
  2001. * streams are disabled. */
  2002. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  2003. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  2004. }
  2005. static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
  2006. struct hda_codec *codec,
  2007. unsigned int stream_tag,
  2008. unsigned int format,
  2009. struct snd_pcm_substream *substream)
  2010. {
  2011. int chs;
  2012. unsigned int dataDCC2, channel_id;
  2013. int i;
  2014. struct hdmi_spec *spec = codec->spec;
  2015. struct hda_spdif_out *spdif;
  2016. struct hdmi_spec_per_cvt *per_cvt;
  2017. mutex_lock(&codec->spdif_mutex);
  2018. per_cvt = get_cvt(spec, 0);
  2019. spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
  2020. chs = substream->runtime->channels;
  2021. dataDCC2 = 0x2;
  2022. /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
  2023. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
  2024. snd_hda_codec_write(codec,
  2025. nvhdmi_master_con_nid_7x,
  2026. 0,
  2027. AC_VERB_SET_DIGI_CONVERT_1,
  2028. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  2029. /* set the stream id */
  2030. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  2031. AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
  2032. /* set the stream format */
  2033. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  2034. AC_VERB_SET_STREAM_FORMAT, format);
  2035. /* turn on again (if needed) */
  2036. /* enable and set the channel status audio/data flag */
  2037. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
  2038. snd_hda_codec_write(codec,
  2039. nvhdmi_master_con_nid_7x,
  2040. 0,
  2041. AC_VERB_SET_DIGI_CONVERT_1,
  2042. spdif->ctls & 0xff);
  2043. snd_hda_codec_write(codec,
  2044. nvhdmi_master_con_nid_7x,
  2045. 0,
  2046. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  2047. }
  2048. for (i = 0; i < 4; i++) {
  2049. if (chs == 2)
  2050. channel_id = 0;
  2051. else
  2052. channel_id = i * 2;
  2053. /* turn off SPDIF once;
  2054. *otherwise the IEC958 bits won't be updated
  2055. */
  2056. if (codec->spdif_status_reset &&
  2057. (spdif->ctls & AC_DIG1_ENABLE))
  2058. snd_hda_codec_write(codec,
  2059. nvhdmi_con_nids_7x[i],
  2060. 0,
  2061. AC_VERB_SET_DIGI_CONVERT_1,
  2062. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  2063. /* set the stream id */
  2064. snd_hda_codec_write(codec,
  2065. nvhdmi_con_nids_7x[i],
  2066. 0,
  2067. AC_VERB_SET_CHANNEL_STREAMID,
  2068. (stream_tag << 4) | channel_id);
  2069. /* set the stream format */
  2070. snd_hda_codec_write(codec,
  2071. nvhdmi_con_nids_7x[i],
  2072. 0,
  2073. AC_VERB_SET_STREAM_FORMAT,
  2074. format);
  2075. /* turn on again (if needed) */
  2076. /* enable and set the channel status audio/data flag */
  2077. if (codec->spdif_status_reset &&
  2078. (spdif->ctls & AC_DIG1_ENABLE)) {
  2079. snd_hda_codec_write(codec,
  2080. nvhdmi_con_nids_7x[i],
  2081. 0,
  2082. AC_VERB_SET_DIGI_CONVERT_1,
  2083. spdif->ctls & 0xff);
  2084. snd_hda_codec_write(codec,
  2085. nvhdmi_con_nids_7x[i],
  2086. 0,
  2087. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  2088. }
  2089. }
  2090. nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
  2091. mutex_unlock(&codec->spdif_mutex);
  2092. return 0;
  2093. }
  2094. static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
  2095. .substreams = 1,
  2096. .channels_min = 2,
  2097. .channels_max = 8,
  2098. .nid = nvhdmi_master_con_nid_7x,
  2099. .rates = SUPPORTED_RATES,
  2100. .maxbps = SUPPORTED_MAXBPS,
  2101. .formats = SUPPORTED_FORMATS,
  2102. .ops = {
  2103. .open = simple_playback_pcm_open,
  2104. .close = nvhdmi_8ch_7x_pcm_close,
  2105. .prepare = nvhdmi_8ch_7x_pcm_prepare
  2106. },
  2107. };
  2108. static int patch_nvhdmi_2ch(struct hda_codec *codec)
  2109. {
  2110. struct hdmi_spec *spec;
  2111. int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
  2112. nvhdmi_master_pin_nid_7x);
  2113. if (err < 0)
  2114. return err;
  2115. codec->patch_ops.init = nvhdmi_7x_init_2ch;
  2116. /* override the PCM rates, etc, as the codec doesn't give full list */
  2117. spec = codec->spec;
  2118. spec->pcm_playback.rates = SUPPORTED_RATES;
  2119. spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
  2120. spec->pcm_playback.formats = SUPPORTED_FORMATS;
  2121. return 0;
  2122. }
  2123. static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
  2124. {
  2125. struct hdmi_spec *spec = codec->spec;
  2126. int err = simple_playback_build_pcms(codec);
  2127. if (!err) {
  2128. struct hda_pcm *info = get_pcm_rec(spec, 0);
  2129. info->own_chmap = true;
  2130. }
  2131. return err;
  2132. }
  2133. static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
  2134. {
  2135. struct hdmi_spec *spec = codec->spec;
  2136. struct hda_pcm *info;
  2137. struct snd_pcm_chmap *chmap;
  2138. int err;
  2139. err = simple_playback_build_controls(codec);
  2140. if (err < 0)
  2141. return err;
  2142. /* add channel maps */
  2143. info = get_pcm_rec(spec, 0);
  2144. err = snd_pcm_add_chmap_ctls(info->pcm,
  2145. SNDRV_PCM_STREAM_PLAYBACK,
  2146. snd_pcm_alt_chmaps, 8, 0, &chmap);
  2147. if (err < 0)
  2148. return err;
  2149. switch (codec->preset->id) {
  2150. case 0x10de0002:
  2151. case 0x10de0003:
  2152. case 0x10de0005:
  2153. case 0x10de0006:
  2154. chmap->channel_mask = (1U << 2) | (1U << 8);
  2155. break;
  2156. case 0x10de0007:
  2157. chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
  2158. }
  2159. return 0;
  2160. }
  2161. static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
  2162. {
  2163. struct hdmi_spec *spec;
  2164. int err = patch_nvhdmi_2ch(codec);
  2165. if (err < 0)
  2166. return err;
  2167. spec = codec->spec;
  2168. spec->multiout.max_channels = 8;
  2169. spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
  2170. codec->patch_ops.init = nvhdmi_7x_init_8ch;
  2171. codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
  2172. codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
  2173. /* Initialize the audio infoframe channel mask and checksum to something
  2174. * valid */
  2175. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  2176. return 0;
  2177. }
  2178. /*
  2179. * ATI-specific implementations
  2180. *
  2181. * FIXME: we may omit the whole this and use the generic code once after
  2182. * it's confirmed to work.
  2183. */
  2184. #define ATIHDMI_CVT_NID 0x02 /* audio converter */
  2185. #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
  2186. static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  2187. struct hda_codec *codec,
  2188. unsigned int stream_tag,
  2189. unsigned int format,
  2190. struct snd_pcm_substream *substream)
  2191. {
  2192. struct hdmi_spec *spec = codec->spec;
  2193. struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0);
  2194. int chans = substream->runtime->channels;
  2195. int i, err;
  2196. err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
  2197. substream);
  2198. if (err < 0)
  2199. return err;
  2200. snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
  2201. AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
  2202. /* FIXME: XXX */
  2203. for (i = 0; i < chans; i++) {
  2204. snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
  2205. AC_VERB_SET_HDMI_CHAN_SLOT,
  2206. (i << 4) | i);
  2207. }
  2208. return 0;
  2209. }
  2210. static int patch_atihdmi(struct hda_codec *codec)
  2211. {
  2212. struct hdmi_spec *spec;
  2213. int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
  2214. if (err < 0)
  2215. return err;
  2216. spec = codec->spec;
  2217. spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
  2218. return 0;
  2219. }
  2220. /* VIA HDMI Implementation */
  2221. #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
  2222. #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
  2223. static int patch_via_hdmi(struct hda_codec *codec)
  2224. {
  2225. return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
  2226. }
  2227. /*
  2228. * patch entries
  2229. */
  2230. static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
  2231. { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2232. { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2233. { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
  2234. { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
  2235. { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
  2236. { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
  2237. { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
  2238. { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2239. { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2240. { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2241. { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2242. { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
  2243. { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
  2244. { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
  2245. { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
  2246. { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
  2247. { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
  2248. { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
  2249. { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
  2250. { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
  2251. { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
  2252. { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
  2253. { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
  2254. /* 17 is known to be absent */
  2255. { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
  2256. { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
  2257. { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
  2258. { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
  2259. { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
  2260. { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
  2261. { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
  2262. { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
  2263. { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
  2264. { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
  2265. { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
  2266. { .id = 0x10de0060, .name = "GPU 60 HDMI/DP", .patch = patch_generic_hdmi },
  2267. { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
  2268. { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
  2269. { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2270. { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2271. { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2272. { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2273. { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2274. { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
  2275. { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
  2276. { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
  2277. { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2278. { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
  2279. { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
  2280. { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
  2281. { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
  2282. { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
  2283. {} /* terminator */
  2284. };
  2285. MODULE_ALIAS("snd-hda-codec-id:1002793c");
  2286. MODULE_ALIAS("snd-hda-codec-id:10027919");
  2287. MODULE_ALIAS("snd-hda-codec-id:1002791a");
  2288. MODULE_ALIAS("snd-hda-codec-id:1002aa01");
  2289. MODULE_ALIAS("snd-hda-codec-id:10951390");
  2290. MODULE_ALIAS("snd-hda-codec-id:10951392");
  2291. MODULE_ALIAS("snd-hda-codec-id:10de0002");
  2292. MODULE_ALIAS("snd-hda-codec-id:10de0003");
  2293. MODULE_ALIAS("snd-hda-codec-id:10de0005");
  2294. MODULE_ALIAS("snd-hda-codec-id:10de0006");
  2295. MODULE_ALIAS("snd-hda-codec-id:10de0007");
  2296. MODULE_ALIAS("snd-hda-codec-id:10de000a");
  2297. MODULE_ALIAS("snd-hda-codec-id:10de000b");
  2298. MODULE_ALIAS("snd-hda-codec-id:10de000c");
  2299. MODULE_ALIAS("snd-hda-codec-id:10de000d");
  2300. MODULE_ALIAS("snd-hda-codec-id:10de0010");
  2301. MODULE_ALIAS("snd-hda-codec-id:10de0011");
  2302. MODULE_ALIAS("snd-hda-codec-id:10de0012");
  2303. MODULE_ALIAS("snd-hda-codec-id:10de0013");
  2304. MODULE_ALIAS("snd-hda-codec-id:10de0014");
  2305. MODULE_ALIAS("snd-hda-codec-id:10de0015");
  2306. MODULE_ALIAS("snd-hda-codec-id:10de0016");
  2307. MODULE_ALIAS("snd-hda-codec-id:10de0018");
  2308. MODULE_ALIAS("snd-hda-codec-id:10de0019");
  2309. MODULE_ALIAS("snd-hda-codec-id:10de001a");
  2310. MODULE_ALIAS("snd-hda-codec-id:10de001b");
  2311. MODULE_ALIAS("snd-hda-codec-id:10de001c");
  2312. MODULE_ALIAS("snd-hda-codec-id:10de0040");
  2313. MODULE_ALIAS("snd-hda-codec-id:10de0041");
  2314. MODULE_ALIAS("snd-hda-codec-id:10de0042");
  2315. MODULE_ALIAS("snd-hda-codec-id:10de0043");
  2316. MODULE_ALIAS("snd-hda-codec-id:10de0044");
  2317. MODULE_ALIAS("snd-hda-codec-id:10de0051");
  2318. MODULE_ALIAS("snd-hda-codec-id:10de0060");
  2319. MODULE_ALIAS("snd-hda-codec-id:10de0067");
  2320. MODULE_ALIAS("snd-hda-codec-id:10de8001");
  2321. MODULE_ALIAS("snd-hda-codec-id:11069f80");
  2322. MODULE_ALIAS("snd-hda-codec-id:11069f81");
  2323. MODULE_ALIAS("snd-hda-codec-id:11069f84");
  2324. MODULE_ALIAS("snd-hda-codec-id:11069f85");
  2325. MODULE_ALIAS("snd-hda-codec-id:17e80047");
  2326. MODULE_ALIAS("snd-hda-codec-id:80860054");
  2327. MODULE_ALIAS("snd-hda-codec-id:80862801");
  2328. MODULE_ALIAS("snd-hda-codec-id:80862802");
  2329. MODULE_ALIAS("snd-hda-codec-id:80862803");
  2330. MODULE_ALIAS("snd-hda-codec-id:80862804");
  2331. MODULE_ALIAS("snd-hda-codec-id:80862805");
  2332. MODULE_ALIAS("snd-hda-codec-id:80862806");
  2333. MODULE_ALIAS("snd-hda-codec-id:80862807");
  2334. MODULE_ALIAS("snd-hda-codec-id:80862880");
  2335. MODULE_ALIAS("snd-hda-codec-id:808629fb");
  2336. MODULE_LICENSE("GPL");
  2337. MODULE_DESCRIPTION("HDMI HD-audio codec");
  2338. MODULE_ALIAS("snd-hda-codec-intelhdmi");
  2339. MODULE_ALIAS("snd-hda-codec-nvhdmi");
  2340. MODULE_ALIAS("snd-hda-codec-atihdmi");
  2341. static struct hda_codec_preset_list intel_list = {
  2342. .preset = snd_hda_preset_hdmi,
  2343. .owner = THIS_MODULE,
  2344. };
  2345. static int __init patch_hdmi_init(void)
  2346. {
  2347. return snd_hda_add_codec_preset(&intel_list);
  2348. }
  2349. static void __exit patch_hdmi_exit(void)
  2350. {
  2351. snd_hda_delete_codec_preset(&intel_list);
  2352. }
  2353. module_init(patch_hdmi_init)
  2354. module_exit(patch_hdmi_exit)