fimc-lite.c 42 KB

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  1. /*
  2. * Samsung EXYNOS FIMC-LITE (camera host interface) driver
  3. *
  4. * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd.
  5. * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
  12. #include <linux/bug.h>
  13. #include <linux/clk.h>
  14. #include <linux/device.h>
  15. #include <linux/errno.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/kernel.h>
  18. #include <linux/list.h>
  19. #include <linux/module.h>
  20. #include <linux/of.h>
  21. #include <linux/types.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/slab.h>
  25. #include <linux/videodev2.h>
  26. #include <media/v4l2-device.h>
  27. #include <media/v4l2-ioctl.h>
  28. #include <media/v4l2-mem2mem.h>
  29. #include <media/videobuf2-core.h>
  30. #include <media/videobuf2-dma-contig.h>
  31. #include <media/s5p_fimc.h>
  32. #include "common.h"
  33. #include "fimc-core.h"
  34. #include "fimc-lite.h"
  35. #include "fimc-lite-reg.h"
  36. static int debug;
  37. module_param(debug, int, 0644);
  38. static const struct fimc_fmt fimc_lite_formats[] = {
  39. {
  40. .name = "YUV 4:2:2 packed, YCbYCr",
  41. .fourcc = V4L2_PIX_FMT_YUYV,
  42. .depth = { 16 },
  43. .color = FIMC_FMT_YCBYCR422,
  44. .memplanes = 1,
  45. .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
  46. .flags = FMT_FLAGS_YUV,
  47. }, {
  48. .name = "YUV 4:2:2 packed, CbYCrY",
  49. .fourcc = V4L2_PIX_FMT_UYVY,
  50. .depth = { 16 },
  51. .color = FIMC_FMT_CBYCRY422,
  52. .memplanes = 1,
  53. .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8,
  54. .flags = FMT_FLAGS_YUV,
  55. }, {
  56. .name = "YUV 4:2:2 packed, CrYCbY",
  57. .fourcc = V4L2_PIX_FMT_VYUY,
  58. .depth = { 16 },
  59. .color = FIMC_FMT_CRYCBY422,
  60. .memplanes = 1,
  61. .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8,
  62. .flags = FMT_FLAGS_YUV,
  63. }, {
  64. .name = "YUV 4:2:2 packed, YCrYCb",
  65. .fourcc = V4L2_PIX_FMT_YVYU,
  66. .depth = { 16 },
  67. .color = FIMC_FMT_YCRYCB422,
  68. .memplanes = 1,
  69. .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8,
  70. .flags = FMT_FLAGS_YUV,
  71. }, {
  72. .name = "RAW8 (GRBG)",
  73. .fourcc = V4L2_PIX_FMT_SGRBG8,
  74. .depth = { 8 },
  75. .color = FIMC_FMT_RAW8,
  76. .memplanes = 1,
  77. .mbus_code = V4L2_MBUS_FMT_SGRBG8_1X8,
  78. .flags = FMT_FLAGS_RAW_BAYER,
  79. }, {
  80. .name = "RAW10 (GRBG)",
  81. .fourcc = V4L2_PIX_FMT_SGRBG10,
  82. .depth = { 10 },
  83. .color = FIMC_FMT_RAW10,
  84. .memplanes = 1,
  85. .mbus_code = V4L2_MBUS_FMT_SGRBG10_1X10,
  86. .flags = FMT_FLAGS_RAW_BAYER,
  87. }, {
  88. .name = "RAW12 (GRBG)",
  89. .fourcc = V4L2_PIX_FMT_SGRBG12,
  90. .depth = { 12 },
  91. .color = FIMC_FMT_RAW12,
  92. .memplanes = 1,
  93. .mbus_code = V4L2_MBUS_FMT_SGRBG12_1X12,
  94. .flags = FMT_FLAGS_RAW_BAYER,
  95. },
  96. };
  97. /**
  98. * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code
  99. * @pixelformat: fourcc to match, ignored if null
  100. * @mbus_code: media bus code to match, ignored if null
  101. * @mask: the color format flags to match
  102. * @index: index to the fimc_lite_formats array, ignored if negative
  103. */
  104. static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,
  105. const u32 *mbus_code, unsigned int mask, int index)
  106. {
  107. const struct fimc_fmt *fmt, *def_fmt = NULL;
  108. unsigned int i;
  109. int id = 0;
  110. if (index >= (int)ARRAY_SIZE(fimc_lite_formats))
  111. return NULL;
  112. for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) {
  113. fmt = &fimc_lite_formats[i];
  114. if (mask && !(fmt->flags & mask))
  115. continue;
  116. if (pixelformat && fmt->fourcc == *pixelformat)
  117. return fmt;
  118. if (mbus_code && fmt->mbus_code == *mbus_code)
  119. return fmt;
  120. if (index == id)
  121. def_fmt = fmt;
  122. id++;
  123. }
  124. return def_fmt;
  125. }
  126. static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output)
  127. {
  128. struct fimc_source_info *si;
  129. unsigned long flags;
  130. if (fimc->sensor == NULL)
  131. return -ENXIO;
  132. if (fimc->inp_frame.fmt == NULL || fimc->out_frame.fmt == NULL)
  133. return -EINVAL;
  134. /* Get sensor configuration data from the sensor subdev */
  135. si = v4l2_get_subdev_hostdata(fimc->sensor);
  136. if (!si)
  137. return -EINVAL;
  138. spin_lock_irqsave(&fimc->slock, flags);
  139. flite_hw_set_camera_bus(fimc, si);
  140. flite_hw_set_source_format(fimc, &fimc->inp_frame);
  141. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  142. flite_hw_set_output_dma(fimc, &fimc->out_frame, !isp_output);
  143. flite_hw_set_interrupt_mask(fimc);
  144. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  145. if (debug > 0)
  146. flite_hw_dump_regs(fimc, __func__);
  147. spin_unlock_irqrestore(&fimc->slock, flags);
  148. return 0;
  149. }
  150. /*
  151. * Reinitialize the driver so it is ready to start the streaming again.
  152. * Set fimc->state to indicate stream off and the hardware shut down state.
  153. * If not suspending (@suspend is false), return any buffers to videobuf2.
  154. * Otherwise put any owned buffers onto the pending buffers queue, so they
  155. * can be re-spun when the device is being resumed. Also perform FIMC
  156. * software reset and disable streaming on the whole pipeline if required.
  157. */
  158. static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)
  159. {
  160. struct flite_buffer *buf;
  161. unsigned long flags;
  162. bool streaming;
  163. spin_lock_irqsave(&fimc->slock, flags);
  164. streaming = fimc->state & (1 << ST_SENSOR_STREAM);
  165. fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF |
  166. 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM);
  167. if (suspend)
  168. fimc->state |= (1 << ST_FLITE_SUSPENDED);
  169. else
  170. fimc->state &= ~(1 << ST_FLITE_PENDING |
  171. 1 << ST_FLITE_SUSPENDED);
  172. /* Release unused buffers */
  173. while (!suspend && !list_empty(&fimc->pending_buf_q)) {
  174. buf = fimc_lite_pending_queue_pop(fimc);
  175. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  176. }
  177. /* If suspending put unused buffers onto pending queue */
  178. while (!list_empty(&fimc->active_buf_q)) {
  179. buf = fimc_lite_active_queue_pop(fimc);
  180. if (suspend)
  181. fimc_lite_pending_queue_add(fimc, buf);
  182. else
  183. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  184. }
  185. spin_unlock_irqrestore(&fimc->slock, flags);
  186. flite_hw_reset(fimc);
  187. if (!streaming)
  188. return 0;
  189. return fimc_pipeline_call(&fimc->ve, set_stream, 0);
  190. }
  191. static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)
  192. {
  193. unsigned long flags;
  194. if (!fimc_lite_active(fimc))
  195. return 0;
  196. spin_lock_irqsave(&fimc->slock, flags);
  197. set_bit(ST_FLITE_OFF, &fimc->state);
  198. flite_hw_capture_stop(fimc);
  199. spin_unlock_irqrestore(&fimc->slock, flags);
  200. wait_event_timeout(fimc->irq_queue,
  201. !test_bit(ST_FLITE_OFF, &fimc->state),
  202. (2*HZ/10)); /* 200 ms */
  203. return fimc_lite_reinit(fimc, suspend);
  204. }
  205. /* Must be called with fimc.slock spinlock held. */
  206. static void fimc_lite_config_update(struct fimc_lite *fimc)
  207. {
  208. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  209. flite_hw_set_dma_window(fimc, &fimc->out_frame);
  210. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  211. clear_bit(ST_FLITE_CONFIG, &fimc->state);
  212. }
  213. static irqreturn_t flite_irq_handler(int irq, void *priv)
  214. {
  215. struct fimc_lite *fimc = priv;
  216. struct flite_buffer *vbuf;
  217. unsigned long flags;
  218. struct timeval *tv;
  219. struct timespec ts;
  220. u32 intsrc;
  221. spin_lock_irqsave(&fimc->slock, flags);
  222. intsrc = flite_hw_get_interrupt_source(fimc);
  223. flite_hw_clear_pending_irq(fimc);
  224. if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) {
  225. wake_up(&fimc->irq_queue);
  226. goto done;
  227. }
  228. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {
  229. clear_bit(ST_FLITE_RUN, &fimc->state);
  230. fimc->events.data_overflow++;
  231. }
  232. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {
  233. flite_hw_clear_last_capture_end(fimc);
  234. clear_bit(ST_FLITE_STREAM, &fimc->state);
  235. wake_up(&fimc->irq_queue);
  236. }
  237. if (atomic_read(&fimc->out_path) != FIMC_IO_DMA)
  238. goto done;
  239. if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &&
  240. test_bit(ST_FLITE_RUN, &fimc->state) &&
  241. !list_empty(&fimc->active_buf_q) &&
  242. !list_empty(&fimc->pending_buf_q)) {
  243. vbuf = fimc_lite_active_queue_pop(fimc);
  244. ktime_get_ts(&ts);
  245. tv = &vbuf->vb.v4l2_buf.timestamp;
  246. tv->tv_sec = ts.tv_sec;
  247. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  248. vbuf->vb.v4l2_buf.sequence = fimc->frame_count++;
  249. vb2_buffer_done(&vbuf->vb, VB2_BUF_STATE_DONE);
  250. vbuf = fimc_lite_pending_queue_pop(fimc);
  251. flite_hw_set_output_addr(fimc, vbuf->paddr);
  252. fimc_lite_active_queue_add(fimc, vbuf);
  253. }
  254. if (test_bit(ST_FLITE_CONFIG, &fimc->state))
  255. fimc_lite_config_update(fimc);
  256. if (list_empty(&fimc->pending_buf_q)) {
  257. flite_hw_capture_stop(fimc);
  258. clear_bit(ST_FLITE_STREAM, &fimc->state);
  259. }
  260. done:
  261. set_bit(ST_FLITE_RUN, &fimc->state);
  262. spin_unlock_irqrestore(&fimc->slock, flags);
  263. return IRQ_HANDLED;
  264. }
  265. static int start_streaming(struct vb2_queue *q, unsigned int count)
  266. {
  267. struct fimc_lite *fimc = q->drv_priv;
  268. int ret;
  269. fimc->frame_count = 0;
  270. ret = fimc_lite_hw_init(fimc, false);
  271. if (ret) {
  272. fimc_lite_reinit(fimc, false);
  273. return ret;
  274. }
  275. set_bit(ST_FLITE_PENDING, &fimc->state);
  276. if (!list_empty(&fimc->active_buf_q) &&
  277. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  278. flite_hw_capture_start(fimc);
  279. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  280. fimc_pipeline_call(&fimc->ve, set_stream, 1);
  281. }
  282. if (debug > 0)
  283. flite_hw_dump_regs(fimc, __func__);
  284. return 0;
  285. }
  286. static int stop_streaming(struct vb2_queue *q)
  287. {
  288. struct fimc_lite *fimc = q->drv_priv;
  289. if (!fimc_lite_active(fimc))
  290. return -EINVAL;
  291. return fimc_lite_stop_capture(fimc, false);
  292. }
  293. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  294. unsigned int *num_buffers, unsigned int *num_planes,
  295. unsigned int sizes[], void *allocators[])
  296. {
  297. const struct v4l2_pix_format_mplane *pixm = NULL;
  298. struct fimc_lite *fimc = vq->drv_priv;
  299. struct flite_frame *frame = &fimc->out_frame;
  300. const struct fimc_fmt *fmt = frame->fmt;
  301. unsigned long wh;
  302. int i;
  303. if (pfmt) {
  304. pixm = &pfmt->fmt.pix_mp;
  305. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, 0, -1);
  306. wh = pixm->width * pixm->height;
  307. } else {
  308. wh = frame->f_width * frame->f_height;
  309. }
  310. if (fmt == NULL)
  311. return -EINVAL;
  312. *num_planes = fmt->memplanes;
  313. for (i = 0; i < fmt->memplanes; i++) {
  314. unsigned int size = (wh * fmt->depth[i]) / 8;
  315. if (pixm)
  316. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  317. else
  318. sizes[i] = size;
  319. allocators[i] = fimc->alloc_ctx;
  320. }
  321. return 0;
  322. }
  323. static int buffer_prepare(struct vb2_buffer *vb)
  324. {
  325. struct vb2_queue *vq = vb->vb2_queue;
  326. struct fimc_lite *fimc = vq->drv_priv;
  327. int i;
  328. if (fimc->out_frame.fmt == NULL)
  329. return -EINVAL;
  330. for (i = 0; i < fimc->out_frame.fmt->memplanes; i++) {
  331. unsigned long size = fimc->payload[i];
  332. if (vb2_plane_size(vb, i) < size) {
  333. v4l2_err(&fimc->ve.vdev,
  334. "User buffer too small (%ld < %ld)\n",
  335. vb2_plane_size(vb, i), size);
  336. return -EINVAL;
  337. }
  338. vb2_set_plane_payload(vb, i, size);
  339. }
  340. return 0;
  341. }
  342. static void buffer_queue(struct vb2_buffer *vb)
  343. {
  344. struct flite_buffer *buf
  345. = container_of(vb, struct flite_buffer, vb);
  346. struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue);
  347. unsigned long flags;
  348. spin_lock_irqsave(&fimc->slock, flags);
  349. buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0);
  350. if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) &&
  351. !test_bit(ST_FLITE_STREAM, &fimc->state) &&
  352. list_empty(&fimc->active_buf_q)) {
  353. flite_hw_set_output_addr(fimc, buf->paddr);
  354. fimc_lite_active_queue_add(fimc, buf);
  355. } else {
  356. fimc_lite_pending_queue_add(fimc, buf);
  357. }
  358. if (vb2_is_streaming(&fimc->vb_queue) &&
  359. !list_empty(&fimc->pending_buf_q) &&
  360. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  361. flite_hw_capture_start(fimc);
  362. spin_unlock_irqrestore(&fimc->slock, flags);
  363. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  364. fimc_pipeline_call(&fimc->ve, set_stream, 1);
  365. return;
  366. }
  367. spin_unlock_irqrestore(&fimc->slock, flags);
  368. }
  369. static const struct vb2_ops fimc_lite_qops = {
  370. .queue_setup = queue_setup,
  371. .buf_prepare = buffer_prepare,
  372. .buf_queue = buffer_queue,
  373. .wait_prepare = vb2_ops_wait_prepare,
  374. .wait_finish = vb2_ops_wait_finish,
  375. .start_streaming = start_streaming,
  376. .stop_streaming = stop_streaming,
  377. };
  378. static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)
  379. {
  380. unsigned long flags;
  381. spin_lock_irqsave(&fimc->slock, flags);
  382. memset(&fimc->events, 0, sizeof(fimc->events));
  383. spin_unlock_irqrestore(&fimc->slock, flags);
  384. }
  385. static int fimc_lite_open(struct file *file)
  386. {
  387. struct fimc_lite *fimc = video_drvdata(file);
  388. struct media_entity *me = &fimc->ve.vdev.entity;
  389. int ret;
  390. mutex_lock(&fimc->lock);
  391. if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) {
  392. ret = -EBUSY;
  393. goto unlock;
  394. }
  395. set_bit(ST_FLITE_IN_USE, &fimc->state);
  396. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  397. if (ret < 0)
  398. goto unlock;
  399. ret = v4l2_fh_open(file);
  400. if (ret < 0)
  401. goto err_pm;
  402. if (!v4l2_fh_is_singular_file(file) ||
  403. atomic_read(&fimc->out_path) != FIMC_IO_DMA)
  404. goto unlock;
  405. mutex_lock(&me->parent->graph_mutex);
  406. ret = fimc_pipeline_call(&fimc->ve, open, me, true);
  407. /* Mark video pipeline ending at this video node as in use. */
  408. if (ret == 0)
  409. me->use_count++;
  410. mutex_unlock(&me->parent->graph_mutex);
  411. if (!ret) {
  412. fimc_lite_clear_event_counters(fimc);
  413. goto unlock;
  414. }
  415. v4l2_fh_release(file);
  416. err_pm:
  417. pm_runtime_put_sync(&fimc->pdev->dev);
  418. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  419. unlock:
  420. mutex_unlock(&fimc->lock);
  421. return ret;
  422. }
  423. static int fimc_lite_release(struct file *file)
  424. {
  425. struct fimc_lite *fimc = video_drvdata(file);
  426. struct media_entity *entity = &fimc->ve.vdev.entity;
  427. mutex_lock(&fimc->lock);
  428. if (v4l2_fh_is_singular_file(file) &&
  429. atomic_read(&fimc->out_path) == FIMC_IO_DMA) {
  430. if (fimc->streaming) {
  431. media_entity_pipeline_stop(entity);
  432. fimc->streaming = false;
  433. }
  434. fimc_lite_stop_capture(fimc, false);
  435. fimc_pipeline_call(&fimc->ve, close);
  436. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  437. mutex_lock(&entity->parent->graph_mutex);
  438. entity->use_count--;
  439. mutex_unlock(&entity->parent->graph_mutex);
  440. }
  441. vb2_fop_release(file);
  442. pm_runtime_put(&fimc->pdev->dev);
  443. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  444. mutex_unlock(&fimc->lock);
  445. return 0;
  446. }
  447. static const struct v4l2_file_operations fimc_lite_fops = {
  448. .owner = THIS_MODULE,
  449. .open = fimc_lite_open,
  450. .release = fimc_lite_release,
  451. .poll = vb2_fop_poll,
  452. .unlocked_ioctl = video_ioctl2,
  453. .mmap = vb2_fop_mmap,
  454. };
  455. /*
  456. * Format and crop negotiation helpers
  457. */
  458. static const struct fimc_fmt *fimc_lite_try_format(struct fimc_lite *fimc,
  459. u32 *width, u32 *height,
  460. u32 *code, u32 *fourcc, int pad)
  461. {
  462. struct flite_drvdata *dd = fimc->dd;
  463. const struct fimc_fmt *fmt;
  464. unsigned int flags = 0;
  465. if (pad == FLITE_SD_PAD_SINK) {
  466. v4l_bound_align_image(width, 8, dd->max_width,
  467. ffs(dd->out_width_align) - 1,
  468. height, 0, dd->max_height, 0, 0);
  469. } else {
  470. v4l_bound_align_image(width, 8, fimc->inp_frame.rect.width,
  471. ffs(dd->out_width_align) - 1,
  472. height, 0, fimc->inp_frame.rect.height,
  473. 0, 0);
  474. flags = fimc->inp_frame.fmt->flags;
  475. }
  476. fmt = fimc_lite_find_format(fourcc, code, flags, 0);
  477. if (WARN_ON(!fmt))
  478. return NULL;
  479. if (code)
  480. *code = fmt->mbus_code;
  481. if (fourcc)
  482. *fourcc = fmt->fourcc;
  483. v4l2_dbg(1, debug, &fimc->subdev, "code: 0x%x, %dx%d\n",
  484. code ? *code : 0, *width, *height);
  485. return fmt;
  486. }
  487. static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)
  488. {
  489. struct flite_frame *frame = &fimc->inp_frame;
  490. v4l_bound_align_image(&r->width, 0, frame->f_width, 0,
  491. &r->height, 0, frame->f_height, 0, 0);
  492. /* Adjust left/top if cropping rectangle got out of bounds */
  493. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  494. r->left = round_down(r->left, fimc->dd->win_hor_offs_align);
  495. r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height);
  496. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d\n",
  497. r->left, r->top, r->width, r->height,
  498. frame->f_width, frame->f_height);
  499. }
  500. static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)
  501. {
  502. struct flite_frame *frame = &fimc->out_frame;
  503. struct v4l2_rect *crop_rect = &fimc->inp_frame.rect;
  504. /* Scaling is not supported so we enforce compose rectangle size
  505. same as size of the sink crop rectangle. */
  506. r->width = crop_rect->width;
  507. r->height = crop_rect->height;
  508. /* Adjust left/top if the composing rectangle got out of bounds */
  509. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  510. r->left = round_down(r->left, fimc->dd->out_hor_offs_align);
  511. r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height);
  512. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d\n",
  513. r->left, r->top, r->width, r->height,
  514. frame->f_width, frame->f_height);
  515. }
  516. /*
  517. * Video node ioctl operations
  518. */
  519. static int fimc_lite_querycap(struct file *file, void *priv,
  520. struct v4l2_capability *cap)
  521. {
  522. struct fimc_lite *fimc = video_drvdata(file);
  523. strlcpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver));
  524. strlcpy(cap->card, FIMC_LITE_DRV_NAME, sizeof(cap->card));
  525. snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
  526. dev_name(&fimc->pdev->dev));
  527. cap->device_caps = V4L2_CAP_STREAMING;
  528. cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
  529. return 0;
  530. }
  531. static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv,
  532. struct v4l2_fmtdesc *f)
  533. {
  534. const struct fimc_fmt *fmt;
  535. if (f->index >= ARRAY_SIZE(fimc_lite_formats))
  536. return -EINVAL;
  537. fmt = &fimc_lite_formats[f->index];
  538. strlcpy(f->description, fmt->name, sizeof(f->description));
  539. f->pixelformat = fmt->fourcc;
  540. return 0;
  541. }
  542. static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,
  543. struct v4l2_format *f)
  544. {
  545. struct fimc_lite *fimc = video_drvdata(file);
  546. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  547. struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
  548. struct flite_frame *frame = &fimc->out_frame;
  549. const struct fimc_fmt *fmt = frame->fmt;
  550. plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8;
  551. plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height;
  552. pixm->num_planes = fmt->memplanes;
  553. pixm->pixelformat = fmt->fourcc;
  554. pixm->width = frame->f_width;
  555. pixm->height = frame->f_height;
  556. pixm->field = V4L2_FIELD_NONE;
  557. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  558. return 0;
  559. }
  560. static int fimc_lite_try_fmt(struct fimc_lite *fimc,
  561. struct v4l2_pix_format_mplane *pixm,
  562. const struct fimc_fmt **ffmt)
  563. {
  564. u32 bpl = pixm->plane_fmt[0].bytesperline;
  565. struct flite_drvdata *dd = fimc->dd;
  566. const struct fimc_fmt *inp_fmt = fimc->inp_frame.fmt;
  567. const struct fimc_fmt *fmt;
  568. if (WARN_ON(inp_fmt == NULL))
  569. return -EINVAL;
  570. /*
  571. * We allow some flexibility only for YUV formats. In case of raw
  572. * raw Bayer the FIMC-LITE's output format must match its camera
  573. * interface input format.
  574. */
  575. if (inp_fmt->flags & FMT_FLAGS_YUV)
  576. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL,
  577. inp_fmt->flags, 0);
  578. else
  579. fmt = inp_fmt;
  580. if (WARN_ON(fmt == NULL))
  581. return -EINVAL;
  582. if (ffmt)
  583. *ffmt = fmt;
  584. v4l_bound_align_image(&pixm->width, 8, dd->max_width,
  585. ffs(dd->out_width_align) - 1,
  586. &pixm->height, 0, dd->max_height, 0, 0);
  587. if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width))
  588. pixm->plane_fmt[0].bytesperline = (pixm->width *
  589. fmt->depth[0]) / 8;
  590. if (pixm->plane_fmt[0].sizeimage == 0)
  591. pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height *
  592. fmt->depth[0]) / 8;
  593. pixm->num_planes = fmt->memplanes;
  594. pixm->pixelformat = fmt->fourcc;
  595. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  596. pixm->field = V4L2_FIELD_NONE;
  597. return 0;
  598. }
  599. static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,
  600. struct v4l2_format *f)
  601. {
  602. struct fimc_lite *fimc = video_drvdata(file);
  603. return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL);
  604. }
  605. static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,
  606. struct v4l2_format *f)
  607. {
  608. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  609. struct fimc_lite *fimc = video_drvdata(file);
  610. struct flite_frame *frame = &fimc->out_frame;
  611. const struct fimc_fmt *fmt = NULL;
  612. int ret;
  613. if (vb2_is_busy(&fimc->vb_queue))
  614. return -EBUSY;
  615. ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt);
  616. if (ret < 0)
  617. return ret;
  618. frame->fmt = fmt;
  619. fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8,
  620. pixm->plane_fmt[0].sizeimage);
  621. frame->f_width = pixm->width;
  622. frame->f_height = pixm->height;
  623. return 0;
  624. }
  625. static int fimc_pipeline_validate(struct fimc_lite *fimc)
  626. {
  627. struct v4l2_subdev *sd = &fimc->subdev;
  628. struct v4l2_subdev_format sink_fmt, src_fmt;
  629. struct media_pad *pad;
  630. int ret;
  631. while (1) {
  632. /* Retrieve format at the sink pad */
  633. pad = &sd->entity.pads[0];
  634. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  635. break;
  636. /* Don't call FIMC subdev operation to avoid nested locking */
  637. if (sd == &fimc->subdev) {
  638. struct flite_frame *ff = &fimc->out_frame;
  639. sink_fmt.format.width = ff->f_width;
  640. sink_fmt.format.height = ff->f_height;
  641. sink_fmt.format.code = fimc->inp_frame.fmt->mbus_code;
  642. } else {
  643. sink_fmt.pad = pad->index;
  644. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  645. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,
  646. &sink_fmt);
  647. if (ret < 0 && ret != -ENOIOCTLCMD)
  648. return -EPIPE;
  649. }
  650. /* Retrieve format at the source pad */
  651. pad = media_entity_remote_pad(pad);
  652. if (pad == NULL ||
  653. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  654. break;
  655. sd = media_entity_to_v4l2_subdev(pad->entity);
  656. src_fmt.pad = pad->index;
  657. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  658. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  659. if (ret < 0 && ret != -ENOIOCTLCMD)
  660. return -EPIPE;
  661. if (src_fmt.format.width != sink_fmt.format.width ||
  662. src_fmt.format.height != sink_fmt.format.height ||
  663. src_fmt.format.code != sink_fmt.format.code)
  664. return -EPIPE;
  665. }
  666. return 0;
  667. }
  668. static int fimc_lite_streamon(struct file *file, void *priv,
  669. enum v4l2_buf_type type)
  670. {
  671. struct fimc_lite *fimc = video_drvdata(file);
  672. struct media_entity *entity = &fimc->ve.vdev.entity;
  673. int ret;
  674. if (fimc_lite_active(fimc))
  675. return -EBUSY;
  676. ret = media_entity_pipeline_start(entity, &fimc->ve.pipe->mp);
  677. if (ret < 0)
  678. return ret;
  679. ret = fimc_pipeline_validate(fimc);
  680. if (ret < 0)
  681. goto err_p_stop;
  682. fimc->sensor = fimc_find_remote_sensor(&fimc->subdev.entity);
  683. ret = vb2_ioctl_streamon(file, priv, type);
  684. if (!ret) {
  685. fimc->streaming = true;
  686. return ret;
  687. }
  688. err_p_stop:
  689. media_entity_pipeline_stop(entity);
  690. return 0;
  691. }
  692. static int fimc_lite_streamoff(struct file *file, void *priv,
  693. enum v4l2_buf_type type)
  694. {
  695. struct fimc_lite *fimc = video_drvdata(file);
  696. int ret;
  697. ret = vb2_ioctl_streamoff(file, priv, type);
  698. if (ret < 0)
  699. return ret;
  700. media_entity_pipeline_stop(&fimc->ve.vdev.entity);
  701. fimc->streaming = false;
  702. return 0;
  703. }
  704. static int fimc_lite_reqbufs(struct file *file, void *priv,
  705. struct v4l2_requestbuffers *reqbufs)
  706. {
  707. struct fimc_lite *fimc = video_drvdata(file);
  708. int ret;
  709. reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count);
  710. ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
  711. if (!ret)
  712. fimc->reqbufs_count = reqbufs->count;
  713. return ret;
  714. }
  715. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  716. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  717. {
  718. if (a->left < b->left || a->top < b->top)
  719. return 0;
  720. if (a->left + a->width > b->left + b->width)
  721. return 0;
  722. if (a->top + a->height > b->top + b->height)
  723. return 0;
  724. return 1;
  725. }
  726. static int fimc_lite_g_selection(struct file *file, void *fh,
  727. struct v4l2_selection *sel)
  728. {
  729. struct fimc_lite *fimc = video_drvdata(file);
  730. struct flite_frame *f = &fimc->out_frame;
  731. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  732. return -EINVAL;
  733. switch (sel->target) {
  734. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  735. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  736. sel->r.left = 0;
  737. sel->r.top = 0;
  738. sel->r.width = f->f_width;
  739. sel->r.height = f->f_height;
  740. return 0;
  741. case V4L2_SEL_TGT_COMPOSE:
  742. sel->r = f->rect;
  743. return 0;
  744. }
  745. return -EINVAL;
  746. }
  747. static int fimc_lite_s_selection(struct file *file, void *fh,
  748. struct v4l2_selection *sel)
  749. {
  750. struct fimc_lite *fimc = video_drvdata(file);
  751. struct flite_frame *f = &fimc->out_frame;
  752. struct v4l2_rect rect = sel->r;
  753. unsigned long flags;
  754. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE ||
  755. sel->target != V4L2_SEL_TGT_COMPOSE)
  756. return -EINVAL;
  757. fimc_lite_try_compose(fimc, &rect);
  758. if ((sel->flags & V4L2_SEL_FLAG_LE) &&
  759. !enclosed_rectangle(&rect, &sel->r))
  760. return -ERANGE;
  761. if ((sel->flags & V4L2_SEL_FLAG_GE) &&
  762. !enclosed_rectangle(&sel->r, &rect))
  763. return -ERANGE;
  764. sel->r = rect;
  765. spin_lock_irqsave(&fimc->slock, flags);
  766. f->rect = rect;
  767. set_bit(ST_FLITE_CONFIG, &fimc->state);
  768. spin_unlock_irqrestore(&fimc->slock, flags);
  769. return 0;
  770. }
  771. static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
  772. .vidioc_querycap = fimc_lite_querycap,
  773. .vidioc_enum_fmt_vid_cap_mplane = fimc_lite_enum_fmt_mplane,
  774. .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane,
  775. .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane,
  776. .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane,
  777. .vidioc_g_selection = fimc_lite_g_selection,
  778. .vidioc_s_selection = fimc_lite_s_selection,
  779. .vidioc_reqbufs = fimc_lite_reqbufs,
  780. .vidioc_querybuf = vb2_ioctl_querybuf,
  781. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  782. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  783. .vidioc_qbuf = vb2_ioctl_qbuf,
  784. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  785. .vidioc_streamon = fimc_lite_streamon,
  786. .vidioc_streamoff = fimc_lite_streamoff,
  787. };
  788. /* Capture subdev media entity operations */
  789. static int fimc_lite_link_setup(struct media_entity *entity,
  790. const struct media_pad *local,
  791. const struct media_pad *remote, u32 flags)
  792. {
  793. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  794. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  795. unsigned int remote_ent_type = media_entity_type(remote->entity);
  796. int ret = 0;
  797. if (WARN_ON(fimc == NULL))
  798. return 0;
  799. v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x\n",
  800. __func__, remote->entity->name, local->entity->name,
  801. flags, fimc->source_subdev_grp_id);
  802. switch (local->index) {
  803. case FLITE_SD_PAD_SINK:
  804. if (remote_ent_type != MEDIA_ENT_T_V4L2_SUBDEV) {
  805. ret = -EINVAL;
  806. break;
  807. }
  808. if (flags & MEDIA_LNK_FL_ENABLED) {
  809. if (fimc->source_subdev_grp_id == 0)
  810. fimc->source_subdev_grp_id = sd->grp_id;
  811. else
  812. ret = -EBUSY;
  813. } else {
  814. fimc->source_subdev_grp_id = 0;
  815. fimc->sensor = NULL;
  816. }
  817. break;
  818. case FLITE_SD_PAD_SOURCE_DMA:
  819. if (!(flags & MEDIA_LNK_FL_ENABLED))
  820. atomic_set(&fimc->out_path, FIMC_IO_NONE);
  821. else if (remote_ent_type == MEDIA_ENT_T_DEVNODE)
  822. atomic_set(&fimc->out_path, FIMC_IO_DMA);
  823. else
  824. ret = -EINVAL;
  825. break;
  826. case FLITE_SD_PAD_SOURCE_ISP:
  827. if (!(flags & MEDIA_LNK_FL_ENABLED))
  828. atomic_set(&fimc->out_path, FIMC_IO_NONE);
  829. else if (remote_ent_type == MEDIA_ENT_T_V4L2_SUBDEV)
  830. atomic_set(&fimc->out_path, FIMC_IO_ISP);
  831. else
  832. ret = -EINVAL;
  833. break;
  834. default:
  835. v4l2_err(sd, "Invalid pad index\n");
  836. ret = -EINVAL;
  837. }
  838. mb();
  839. return ret;
  840. }
  841. static const struct media_entity_operations fimc_lite_subdev_media_ops = {
  842. .link_setup = fimc_lite_link_setup,
  843. };
  844. static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  845. struct v4l2_subdev_fh *fh,
  846. struct v4l2_subdev_mbus_code_enum *code)
  847. {
  848. const struct fimc_fmt *fmt;
  849. fmt = fimc_lite_find_format(NULL, NULL, 0, code->index);
  850. if (!fmt)
  851. return -EINVAL;
  852. code->code = fmt->mbus_code;
  853. return 0;
  854. }
  855. static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,
  856. struct v4l2_subdev_fh *fh,
  857. struct v4l2_subdev_format *fmt)
  858. {
  859. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  860. struct v4l2_mbus_framefmt *mf = &fmt->format;
  861. struct flite_frame *f = &fimc->inp_frame;
  862. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  863. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  864. fmt->format = *mf;
  865. return 0;
  866. }
  867. mf->colorspace = V4L2_COLORSPACE_JPEG;
  868. mutex_lock(&fimc->lock);
  869. mf->code = f->fmt->mbus_code;
  870. if (fmt->pad == FLITE_SD_PAD_SINK) {
  871. /* full camera input frame size */
  872. mf->width = f->f_width;
  873. mf->height = f->f_height;
  874. } else {
  875. /* crop size */
  876. mf->width = f->rect.width;
  877. mf->height = f->rect.height;
  878. }
  879. mutex_unlock(&fimc->lock);
  880. return 0;
  881. }
  882. static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,
  883. struct v4l2_subdev_fh *fh,
  884. struct v4l2_subdev_format *fmt)
  885. {
  886. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  887. struct v4l2_mbus_framefmt *mf = &fmt->format;
  888. struct flite_frame *sink = &fimc->inp_frame;
  889. struct flite_frame *source = &fimc->out_frame;
  890. const struct fimc_fmt *ffmt;
  891. v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d\n",
  892. fmt->pad, mf->code, mf->width, mf->height);
  893. mf->colorspace = V4L2_COLORSPACE_JPEG;
  894. mutex_lock(&fimc->lock);
  895. if ((atomic_read(&fimc->out_path) == FIMC_IO_ISP &&
  896. sd->entity.stream_count > 0) ||
  897. (atomic_read(&fimc->out_path) == FIMC_IO_DMA &&
  898. vb2_is_busy(&fimc->vb_queue))) {
  899. mutex_unlock(&fimc->lock);
  900. return -EBUSY;
  901. }
  902. ffmt = fimc_lite_try_format(fimc, &mf->width, &mf->height,
  903. &mf->code, NULL, fmt->pad);
  904. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  905. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  906. *mf = fmt->format;
  907. mutex_unlock(&fimc->lock);
  908. return 0;
  909. }
  910. if (fmt->pad == FLITE_SD_PAD_SINK) {
  911. sink->f_width = mf->width;
  912. sink->f_height = mf->height;
  913. sink->fmt = ffmt;
  914. /* Set sink crop rectangle */
  915. sink->rect.width = mf->width;
  916. sink->rect.height = mf->height;
  917. sink->rect.left = 0;
  918. sink->rect.top = 0;
  919. /* Reset source format and crop rectangle */
  920. source->rect = sink->rect;
  921. source->f_width = mf->width;
  922. source->f_height = mf->height;
  923. } else {
  924. /* Allow changing format only on sink pad */
  925. mf->code = sink->fmt->mbus_code;
  926. mf->width = sink->rect.width;
  927. mf->height = sink->rect.height;
  928. }
  929. mutex_unlock(&fimc->lock);
  930. return 0;
  931. }
  932. static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,
  933. struct v4l2_subdev_fh *fh,
  934. struct v4l2_subdev_selection *sel)
  935. {
  936. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  937. struct flite_frame *f = &fimc->inp_frame;
  938. if ((sel->target != V4L2_SEL_TGT_CROP &&
  939. sel->target != V4L2_SEL_TGT_CROP_BOUNDS) ||
  940. sel->pad != FLITE_SD_PAD_SINK)
  941. return -EINVAL;
  942. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  943. sel->r = *v4l2_subdev_get_try_crop(fh, sel->pad);
  944. return 0;
  945. }
  946. mutex_lock(&fimc->lock);
  947. if (sel->target == V4L2_SEL_TGT_CROP) {
  948. sel->r = f->rect;
  949. } else {
  950. sel->r.left = 0;
  951. sel->r.top = 0;
  952. sel->r.width = f->f_width;
  953. sel->r.height = f->f_height;
  954. }
  955. mutex_unlock(&fimc->lock);
  956. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
  957. __func__, f->rect.left, f->rect.top, f->rect.width,
  958. f->rect.height, f->f_width, f->f_height);
  959. return 0;
  960. }
  961. static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,
  962. struct v4l2_subdev_fh *fh,
  963. struct v4l2_subdev_selection *sel)
  964. {
  965. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  966. struct flite_frame *f = &fimc->inp_frame;
  967. int ret = 0;
  968. if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK)
  969. return -EINVAL;
  970. mutex_lock(&fimc->lock);
  971. fimc_lite_try_crop(fimc, &sel->r);
  972. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  973. *v4l2_subdev_get_try_crop(fh, sel->pad) = sel->r;
  974. } else {
  975. unsigned long flags;
  976. spin_lock_irqsave(&fimc->slock, flags);
  977. f->rect = sel->r;
  978. /* Same crop rectangle on the source pad */
  979. fimc->out_frame.rect = sel->r;
  980. set_bit(ST_FLITE_CONFIG, &fimc->state);
  981. spin_unlock_irqrestore(&fimc->slock, flags);
  982. }
  983. mutex_unlock(&fimc->lock);
  984. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d\n",
  985. __func__, f->rect.left, f->rect.top, f->rect.width,
  986. f->rect.height, f->f_width, f->f_height);
  987. return ret;
  988. }
  989. static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)
  990. {
  991. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  992. unsigned long flags;
  993. int ret;
  994. /*
  995. * Find sensor subdev linked to FIMC-LITE directly or through
  996. * MIPI-CSIS. This is required for configuration where FIMC-LITE
  997. * is used as a subdev only and feeds data internally to FIMC-IS.
  998. * The pipeline links are protected through entity.stream_count
  999. * so there is no need to take the media graph mutex here.
  1000. */
  1001. fimc->sensor = fimc_find_remote_sensor(&sd->entity);
  1002. if (atomic_read(&fimc->out_path) != FIMC_IO_ISP)
  1003. return -ENOIOCTLCMD;
  1004. mutex_lock(&fimc->lock);
  1005. if (on) {
  1006. flite_hw_reset(fimc);
  1007. ret = fimc_lite_hw_init(fimc, true);
  1008. if (!ret) {
  1009. spin_lock_irqsave(&fimc->slock, flags);
  1010. flite_hw_capture_start(fimc);
  1011. spin_unlock_irqrestore(&fimc->slock, flags);
  1012. }
  1013. } else {
  1014. set_bit(ST_FLITE_OFF, &fimc->state);
  1015. spin_lock_irqsave(&fimc->slock, flags);
  1016. flite_hw_capture_stop(fimc);
  1017. spin_unlock_irqrestore(&fimc->slock, flags);
  1018. ret = wait_event_timeout(fimc->irq_queue,
  1019. !test_bit(ST_FLITE_OFF, &fimc->state),
  1020. msecs_to_jiffies(200));
  1021. if (ret == 0)
  1022. v4l2_err(sd, "s_stream(0) timeout\n");
  1023. clear_bit(ST_FLITE_RUN, &fimc->state);
  1024. }
  1025. mutex_unlock(&fimc->lock);
  1026. return ret;
  1027. }
  1028. static int fimc_lite_log_status(struct v4l2_subdev *sd)
  1029. {
  1030. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1031. flite_hw_dump_regs(fimc, __func__);
  1032. return 0;
  1033. }
  1034. static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
  1035. {
  1036. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1037. struct vb2_queue *q = &fimc->vb_queue;
  1038. struct video_device *vfd = &fimc->ve.vdev;
  1039. int ret;
  1040. memset(vfd, 0, sizeof(*vfd));
  1041. fimc->inp_frame.fmt = &fimc_lite_formats[0];
  1042. fimc->out_frame.fmt = &fimc_lite_formats[0];
  1043. atomic_set(&fimc->out_path, FIMC_IO_DMA);
  1044. snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture",
  1045. fimc->index);
  1046. vfd->fops = &fimc_lite_fops;
  1047. vfd->ioctl_ops = &fimc_lite_ioctl_ops;
  1048. vfd->v4l2_dev = sd->v4l2_dev;
  1049. vfd->minor = -1;
  1050. vfd->release = video_device_release_empty;
  1051. vfd->queue = q;
  1052. fimc->reqbufs_count = 0;
  1053. INIT_LIST_HEAD(&fimc->pending_buf_q);
  1054. INIT_LIST_HEAD(&fimc->active_buf_q);
  1055. memset(q, 0, sizeof(*q));
  1056. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1057. q->io_modes = VB2_MMAP | VB2_USERPTR;
  1058. q->ops = &fimc_lite_qops;
  1059. q->mem_ops = &vb2_dma_contig_memops;
  1060. q->buf_struct_size = sizeof(struct flite_buffer);
  1061. q->drv_priv = fimc;
  1062. q->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1063. q->lock = &fimc->lock;
  1064. ret = vb2_queue_init(q);
  1065. if (ret < 0)
  1066. return ret;
  1067. fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1068. ret = media_entity_init(&vfd->entity, 1, &fimc->vd_pad, 0);
  1069. if (ret < 0)
  1070. return ret;
  1071. video_set_drvdata(vfd, fimc);
  1072. fimc->ve.pipe = v4l2_get_subdev_hostdata(sd);
  1073. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1074. if (ret < 0) {
  1075. media_entity_cleanup(&vfd->entity);
  1076. fimc->ve.pipe = NULL;
  1077. return ret;
  1078. }
  1079. v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
  1080. vfd->name, video_device_node_name(vfd));
  1081. return 0;
  1082. }
  1083. static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)
  1084. {
  1085. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1086. if (fimc == NULL)
  1087. return;
  1088. mutex_lock(&fimc->lock);
  1089. if (video_is_registered(&fimc->ve.vdev)) {
  1090. video_unregister_device(&fimc->ve.vdev);
  1091. media_entity_cleanup(&fimc->ve.vdev.entity);
  1092. fimc->ve.pipe = NULL;
  1093. }
  1094. mutex_unlock(&fimc->lock);
  1095. }
  1096. static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {
  1097. .registered = fimc_lite_subdev_registered,
  1098. .unregistered = fimc_lite_subdev_unregistered,
  1099. };
  1100. static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {
  1101. .enum_mbus_code = fimc_lite_subdev_enum_mbus_code,
  1102. .get_selection = fimc_lite_subdev_get_selection,
  1103. .set_selection = fimc_lite_subdev_set_selection,
  1104. .get_fmt = fimc_lite_subdev_get_fmt,
  1105. .set_fmt = fimc_lite_subdev_set_fmt,
  1106. };
  1107. static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {
  1108. .s_stream = fimc_lite_subdev_s_stream,
  1109. };
  1110. static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {
  1111. .log_status = fimc_lite_log_status,
  1112. };
  1113. static struct v4l2_subdev_ops fimc_lite_subdev_ops = {
  1114. .core = &fimc_lite_core_ops,
  1115. .video = &fimc_lite_subdev_video_ops,
  1116. .pad = &fimc_lite_subdev_pad_ops,
  1117. };
  1118. static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)
  1119. {
  1120. struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite,
  1121. ctrl_handler);
  1122. set_bit(ST_FLITE_CONFIG, &fimc->state);
  1123. return 0;
  1124. }
  1125. static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {
  1126. .s_ctrl = fimc_lite_s_ctrl,
  1127. };
  1128. static const struct v4l2_ctrl_config fimc_lite_ctrl = {
  1129. .ops = &fimc_lite_ctrl_ops,
  1130. .id = V4L2_CTRL_CLASS_USER | 0x1001,
  1131. .type = V4L2_CTRL_TYPE_BOOLEAN,
  1132. .name = "Test Pattern 640x480",
  1133. .step = 1,
  1134. };
  1135. static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)
  1136. {
  1137. struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler;
  1138. struct v4l2_subdev *sd = &fimc->subdev;
  1139. int ret;
  1140. v4l2_subdev_init(sd, &fimc_lite_subdev_ops);
  1141. sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  1142. snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index);
  1143. fimc->subdev_pads[FLITE_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1144. fimc->subdev_pads[FLITE_SD_PAD_SOURCE_DMA].flags = MEDIA_PAD_FL_SOURCE;
  1145. fimc->subdev_pads[FLITE_SD_PAD_SOURCE_ISP].flags = MEDIA_PAD_FL_SOURCE;
  1146. ret = media_entity_init(&sd->entity, FLITE_SD_PADS_NUM,
  1147. fimc->subdev_pads, 0);
  1148. if (ret)
  1149. return ret;
  1150. v4l2_ctrl_handler_init(handler, 1);
  1151. fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl,
  1152. NULL);
  1153. if (handler->error) {
  1154. media_entity_cleanup(&sd->entity);
  1155. return handler->error;
  1156. }
  1157. sd->ctrl_handler = handler;
  1158. sd->internal_ops = &fimc_lite_subdev_internal_ops;
  1159. sd->entity.ops = &fimc_lite_subdev_media_ops;
  1160. sd->owner = THIS_MODULE;
  1161. v4l2_set_subdevdata(sd, fimc);
  1162. return 0;
  1163. }
  1164. static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)
  1165. {
  1166. struct v4l2_subdev *sd = &fimc->subdev;
  1167. v4l2_device_unregister_subdev(sd);
  1168. media_entity_cleanup(&sd->entity);
  1169. v4l2_ctrl_handler_free(&fimc->ctrl_handler);
  1170. v4l2_set_subdevdata(sd, NULL);
  1171. }
  1172. static void fimc_lite_clk_put(struct fimc_lite *fimc)
  1173. {
  1174. if (IS_ERR(fimc->clock))
  1175. return;
  1176. clk_unprepare(fimc->clock);
  1177. clk_put(fimc->clock);
  1178. fimc->clock = ERR_PTR(-EINVAL);
  1179. }
  1180. static int fimc_lite_clk_get(struct fimc_lite *fimc)
  1181. {
  1182. int ret;
  1183. fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);
  1184. if (IS_ERR(fimc->clock))
  1185. return PTR_ERR(fimc->clock);
  1186. ret = clk_prepare(fimc->clock);
  1187. if (ret < 0) {
  1188. clk_put(fimc->clock);
  1189. fimc->clock = ERR_PTR(-EINVAL);
  1190. }
  1191. return ret;
  1192. }
  1193. static const struct of_device_id flite_of_match[];
  1194. static int fimc_lite_probe(struct platform_device *pdev)
  1195. {
  1196. struct flite_drvdata *drv_data = NULL;
  1197. struct device *dev = &pdev->dev;
  1198. const struct of_device_id *of_id;
  1199. struct fimc_lite *fimc;
  1200. struct resource *res;
  1201. int ret;
  1202. fimc = devm_kzalloc(dev, sizeof(*fimc), GFP_KERNEL);
  1203. if (!fimc)
  1204. return -ENOMEM;
  1205. if (dev->of_node) {
  1206. of_id = of_match_node(flite_of_match, dev->of_node);
  1207. if (of_id)
  1208. drv_data = (struct flite_drvdata *)of_id->data;
  1209. fimc->index = of_alias_get_id(dev->of_node, "fimc-lite");
  1210. } else {
  1211. drv_data = fimc_lite_get_drvdata(pdev);
  1212. fimc->index = pdev->id;
  1213. }
  1214. if (!drv_data || fimc->index < 0 || fimc->index >= FIMC_LITE_MAX_DEVS)
  1215. return -EINVAL;
  1216. fimc->dd = drv_data;
  1217. fimc->pdev = pdev;
  1218. init_waitqueue_head(&fimc->irq_queue);
  1219. spin_lock_init(&fimc->slock);
  1220. mutex_init(&fimc->lock);
  1221. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1222. fimc->regs = devm_ioremap_resource(dev, res);
  1223. if (IS_ERR(fimc->regs))
  1224. return PTR_ERR(fimc->regs);
  1225. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1226. if (res == NULL) {
  1227. dev_err(dev, "Failed to get IRQ resource\n");
  1228. return -ENXIO;
  1229. }
  1230. ret = fimc_lite_clk_get(fimc);
  1231. if (ret)
  1232. return ret;
  1233. ret = devm_request_irq(dev, res->start, flite_irq_handler,
  1234. 0, dev_name(dev), fimc);
  1235. if (ret) {
  1236. dev_err(dev, "Failed to install irq (%d)\n", ret);
  1237. goto err_clk;
  1238. }
  1239. /* The video node will be created within the subdev's registered() op */
  1240. ret = fimc_lite_create_capture_subdev(fimc);
  1241. if (ret)
  1242. goto err_clk;
  1243. platform_set_drvdata(pdev, fimc);
  1244. pm_runtime_enable(dev);
  1245. ret = pm_runtime_get_sync(dev);
  1246. if (ret < 0)
  1247. goto err_sd;
  1248. fimc->alloc_ctx = vb2_dma_contig_init_ctx(dev);
  1249. if (IS_ERR(fimc->alloc_ctx)) {
  1250. ret = PTR_ERR(fimc->alloc_ctx);
  1251. goto err_pm;
  1252. }
  1253. pm_runtime_put(dev);
  1254. dev_dbg(dev, "FIMC-LITE.%d registered successfully\n",
  1255. fimc->index);
  1256. return 0;
  1257. err_pm:
  1258. pm_runtime_put(dev);
  1259. err_sd:
  1260. fimc_lite_unregister_capture_subdev(fimc);
  1261. err_clk:
  1262. fimc_lite_clk_put(fimc);
  1263. return ret;
  1264. }
  1265. static int fimc_lite_runtime_resume(struct device *dev)
  1266. {
  1267. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1268. clk_enable(fimc->clock);
  1269. return 0;
  1270. }
  1271. static int fimc_lite_runtime_suspend(struct device *dev)
  1272. {
  1273. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1274. clk_disable(fimc->clock);
  1275. return 0;
  1276. }
  1277. #ifdef CONFIG_PM_SLEEP
  1278. static int fimc_lite_resume(struct device *dev)
  1279. {
  1280. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1281. struct flite_buffer *buf;
  1282. unsigned long flags;
  1283. int i;
  1284. spin_lock_irqsave(&fimc->slock, flags);
  1285. if (!test_and_clear_bit(ST_LPM, &fimc->state) ||
  1286. !test_bit(ST_FLITE_IN_USE, &fimc->state)) {
  1287. spin_unlock_irqrestore(&fimc->slock, flags);
  1288. return 0;
  1289. }
  1290. flite_hw_reset(fimc);
  1291. spin_unlock_irqrestore(&fimc->slock, flags);
  1292. if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state))
  1293. return 0;
  1294. INIT_LIST_HEAD(&fimc->active_buf_q);
  1295. fimc_pipeline_call(&fimc->ve, open,
  1296. &fimc->ve.vdev.entity, false);
  1297. fimc_lite_hw_init(fimc, atomic_read(&fimc->out_path) == FIMC_IO_ISP);
  1298. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  1299. for (i = 0; i < fimc->reqbufs_count; i++) {
  1300. if (list_empty(&fimc->pending_buf_q))
  1301. break;
  1302. buf = fimc_lite_pending_queue_pop(fimc);
  1303. buffer_queue(&buf->vb);
  1304. }
  1305. return 0;
  1306. }
  1307. static int fimc_lite_suspend(struct device *dev)
  1308. {
  1309. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1310. bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state);
  1311. int ret;
  1312. if (test_and_set_bit(ST_LPM, &fimc->state))
  1313. return 0;
  1314. ret = fimc_lite_stop_capture(fimc, suspend);
  1315. if (ret < 0 || !fimc_lite_active(fimc))
  1316. return ret;
  1317. return fimc_pipeline_call(&fimc->ve, close);
  1318. }
  1319. #endif /* CONFIG_PM_SLEEP */
  1320. static int fimc_lite_remove(struct platform_device *pdev)
  1321. {
  1322. struct fimc_lite *fimc = platform_get_drvdata(pdev);
  1323. struct device *dev = &pdev->dev;
  1324. pm_runtime_disable(dev);
  1325. pm_runtime_set_suspended(dev);
  1326. fimc_lite_unregister_capture_subdev(fimc);
  1327. vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx);
  1328. fimc_lite_clk_put(fimc);
  1329. dev_info(dev, "Driver unloaded\n");
  1330. return 0;
  1331. }
  1332. static const struct dev_pm_ops fimc_lite_pm_ops = {
  1333. SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)
  1334. SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,
  1335. NULL)
  1336. };
  1337. /* EXYNOS4212, EXYNOS4412 */
  1338. static struct flite_drvdata fimc_lite_drvdata_exynos4 = {
  1339. .max_width = 8192,
  1340. .max_height = 8192,
  1341. .out_width_align = 8,
  1342. .win_hor_offs_align = 2,
  1343. .out_hor_offs_align = 8,
  1344. };
  1345. static const struct of_device_id flite_of_match[] = {
  1346. {
  1347. .compatible = "samsung,exynos4212-fimc-lite",
  1348. .data = &fimc_lite_drvdata_exynos4,
  1349. },
  1350. { /* sentinel */ },
  1351. };
  1352. MODULE_DEVICE_TABLE(of, flite_of_match);
  1353. static struct platform_driver fimc_lite_driver = {
  1354. .probe = fimc_lite_probe,
  1355. .remove = fimc_lite_remove,
  1356. .driver = {
  1357. .of_match_table = flite_of_match,
  1358. .name = FIMC_LITE_DRV_NAME,
  1359. .owner = THIS_MODULE,
  1360. .pm = &fimc_lite_pm_ops,
  1361. }
  1362. };
  1363. module_platform_driver(fimc_lite_driver);
  1364. MODULE_LICENSE("GPL");
  1365. MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME);