rt2x00queue.c 24 KB

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  1. /*
  2. Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
  4. <http://rt2x00.serialmonkey.com>
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the
  15. Free Software Foundation, Inc.,
  16. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  17. */
  18. /*
  19. Module: rt2x00lib
  20. Abstract: rt2x00 queue specific routines.
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/dma-mapping.h>
  25. #include "rt2x00.h"
  26. #include "rt2x00lib.h"
  27. struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
  28. struct queue_entry *entry)
  29. {
  30. struct sk_buff *skb;
  31. struct skb_frame_desc *skbdesc;
  32. unsigned int frame_size;
  33. unsigned int head_size = 0;
  34. unsigned int tail_size = 0;
  35. /*
  36. * The frame size includes descriptor size, because the
  37. * hardware directly receive the frame into the skbuffer.
  38. */
  39. frame_size = entry->queue->data_size + entry->queue->desc_size;
  40. /*
  41. * The payload should be aligned to a 4-byte boundary,
  42. * this means we need at least 3 bytes for moving the frame
  43. * into the correct offset.
  44. */
  45. head_size = 4;
  46. /*
  47. * For IV/EIV/ICV assembly we must make sure there is
  48. * at least 8 bytes bytes available in headroom for IV/EIV
  49. * and 8 bytes for ICV data as tailroon.
  50. */
  51. if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
  52. head_size += 8;
  53. tail_size += 8;
  54. }
  55. /*
  56. * Allocate skbuffer.
  57. */
  58. skb = dev_alloc_skb(frame_size + head_size + tail_size);
  59. if (!skb)
  60. return NULL;
  61. /*
  62. * Make sure we not have a frame with the requested bytes
  63. * available in the head and tail.
  64. */
  65. skb_reserve(skb, head_size);
  66. skb_put(skb, frame_size);
  67. /*
  68. * Populate skbdesc.
  69. */
  70. skbdesc = get_skb_frame_desc(skb);
  71. memset(skbdesc, 0, sizeof(*skbdesc));
  72. skbdesc->entry = entry;
  73. if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
  74. skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
  75. skb->data,
  76. skb->len,
  77. DMA_FROM_DEVICE);
  78. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  79. }
  80. return skb;
  81. }
  82. void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  83. {
  84. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  85. /*
  86. * If device has requested headroom, we should make sure that
  87. * is also mapped to the DMA so it can be used for transfering
  88. * additional descriptor information to the hardware.
  89. */
  90. skb_push(skb, rt2x00dev->ops->extra_tx_headroom);
  91. skbdesc->skb_dma =
  92. dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
  93. /*
  94. * Restore data pointer to original location again.
  95. */
  96. skb_pull(skb, rt2x00dev->ops->extra_tx_headroom);
  97. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  98. }
  99. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  100. void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  101. {
  102. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  103. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  104. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
  105. DMA_FROM_DEVICE);
  106. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  107. }
  108. if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  109. /*
  110. * Add headroom to the skb length, it has been removed
  111. * by the driver, but it was actually mapped to DMA.
  112. */
  113. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma,
  114. skb->len + rt2x00dev->ops->extra_tx_headroom,
  115. DMA_TO_DEVICE);
  116. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  117. }
  118. }
  119. void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  120. {
  121. if (!skb)
  122. return;
  123. rt2x00queue_unmap_skb(rt2x00dev, skb);
  124. dev_kfree_skb_any(skb);
  125. }
  126. void rt2x00queue_align_frame(struct sk_buff *skb)
  127. {
  128. unsigned int frame_length = skb->len;
  129. unsigned int align = ALIGN_SIZE(skb, 0);
  130. if (!align)
  131. return;
  132. skb_push(skb, align);
  133. memmove(skb->data, skb->data + align, frame_length);
  134. skb_trim(skb, frame_length);
  135. }
  136. void rt2x00queue_align_payload(struct sk_buff *skb, unsigned int header_length)
  137. {
  138. unsigned int frame_length = skb->len;
  139. unsigned int align = ALIGN_SIZE(skb, header_length);
  140. if (!align)
  141. return;
  142. skb_push(skb, align);
  143. memmove(skb->data, skb->data + align, frame_length);
  144. skb_trim(skb, frame_length);
  145. }
  146. void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
  147. {
  148. unsigned int payload_length = skb->len - header_length;
  149. unsigned int header_align = ALIGN_SIZE(skb, 0);
  150. unsigned int payload_align = ALIGN_SIZE(skb, header_length);
  151. unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
  152. /*
  153. * Adjust the header alignment if the payload needs to be moved more
  154. * than the header.
  155. */
  156. if (payload_align > header_align)
  157. header_align += 4;
  158. /* There is nothing to do if no alignment is needed */
  159. if (!header_align)
  160. return;
  161. /* Reserve the amount of space needed in front of the frame */
  162. skb_push(skb, header_align);
  163. /*
  164. * Move the header.
  165. */
  166. memmove(skb->data, skb->data + header_align, header_length);
  167. /* Move the payload, if present and if required */
  168. if (payload_length && payload_align)
  169. memmove(skb->data + header_length + l2pad,
  170. skb->data + header_length + l2pad + payload_align,
  171. payload_length);
  172. /* Trim the skb to the correct size */
  173. skb_trim(skb, header_length + l2pad + payload_length);
  174. }
  175. void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
  176. {
  177. unsigned int l2pad = L2PAD_SIZE(header_length);
  178. if (!l2pad)
  179. return;
  180. memmove(skb->data + l2pad, skb->data, header_length);
  181. skb_pull(skb, l2pad);
  182. }
  183. static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
  184. struct txentry_desc *txdesc)
  185. {
  186. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  187. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  188. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  189. unsigned long irqflags;
  190. if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) ||
  191. unlikely(!tx_info->control.vif))
  192. return;
  193. /*
  194. * Hardware should insert sequence counter.
  195. * FIXME: We insert a software sequence counter first for
  196. * hardware that doesn't support hardware sequence counting.
  197. *
  198. * This is wrong because beacons are not getting sequence
  199. * numbers assigned properly.
  200. *
  201. * A secondary problem exists for drivers that cannot toggle
  202. * sequence counting per-frame, since those will override the
  203. * sequence counter given by mac80211.
  204. */
  205. spin_lock_irqsave(&intf->seqlock, irqflags);
  206. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  207. intf->seqno += 0x10;
  208. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  209. hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
  210. spin_unlock_irqrestore(&intf->seqlock, irqflags);
  211. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  212. }
  213. static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
  214. struct txentry_desc *txdesc,
  215. const struct rt2x00_rate *hwrate)
  216. {
  217. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  218. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  219. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  220. unsigned int data_length;
  221. unsigned int duration;
  222. unsigned int residual;
  223. /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
  224. data_length = entry->skb->len + 4;
  225. data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
  226. /*
  227. * PLCP setup
  228. * Length calculation depends on OFDM/CCK rate.
  229. */
  230. txdesc->signal = hwrate->plcp;
  231. txdesc->service = 0x04;
  232. if (hwrate->flags & DEV_RATE_OFDM) {
  233. txdesc->length_high = (data_length >> 6) & 0x3f;
  234. txdesc->length_low = data_length & 0x3f;
  235. } else {
  236. /*
  237. * Convert length to microseconds.
  238. */
  239. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  240. duration = GET_DURATION(data_length, hwrate->bitrate);
  241. if (residual != 0) {
  242. duration++;
  243. /*
  244. * Check if we need to set the Length Extension
  245. */
  246. if (hwrate->bitrate == 110 && residual <= 30)
  247. txdesc->service |= 0x80;
  248. }
  249. txdesc->length_high = (duration >> 8) & 0xff;
  250. txdesc->length_low = duration & 0xff;
  251. /*
  252. * When preamble is enabled we should set the
  253. * preamble bit for the signal.
  254. */
  255. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  256. txdesc->signal |= 0x08;
  257. }
  258. }
  259. static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
  260. struct txentry_desc *txdesc)
  261. {
  262. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  263. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  264. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  265. struct ieee80211_rate *rate =
  266. ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  267. const struct rt2x00_rate *hwrate;
  268. memset(txdesc, 0, sizeof(*txdesc));
  269. /*
  270. * Initialize information from queue
  271. */
  272. txdesc->queue = entry->queue->qid;
  273. txdesc->cw_min = entry->queue->cw_min;
  274. txdesc->cw_max = entry->queue->cw_max;
  275. txdesc->aifs = entry->queue->aifs;
  276. /*
  277. * Header and frame information.
  278. */
  279. txdesc->length = entry->skb->len;
  280. txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
  281. /*
  282. * Check whether this frame is to be acked.
  283. */
  284. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  285. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  286. /*
  287. * Check if this is a RTS/CTS frame
  288. */
  289. if (ieee80211_is_rts(hdr->frame_control) ||
  290. ieee80211_is_cts(hdr->frame_control)) {
  291. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  292. if (ieee80211_is_rts(hdr->frame_control))
  293. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  294. else
  295. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  296. if (tx_info->control.rts_cts_rate_idx >= 0)
  297. rate =
  298. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  299. }
  300. /*
  301. * Determine retry information.
  302. */
  303. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  304. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  305. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  306. /*
  307. * Check if more fragments are pending
  308. */
  309. if (ieee80211_has_morefrags(hdr->frame_control) ||
  310. (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)) {
  311. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  312. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  313. }
  314. /*
  315. * Beacons and probe responses require the tsf timestamp
  316. * to be inserted into the frame, except for a frame that has been injected
  317. * through a monitor interface. This latter is needed for testing a
  318. * monitor interface.
  319. */
  320. if ((ieee80211_is_beacon(hdr->frame_control) ||
  321. ieee80211_is_probe_resp(hdr->frame_control)) &&
  322. (!(tx_info->flags & IEEE80211_TX_CTL_INJECTED)))
  323. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  324. /*
  325. * Determine with what IFS priority this frame should be send.
  326. * Set ifs to IFS_SIFS when the this is not the first fragment,
  327. * or this fragment came after RTS/CTS.
  328. */
  329. if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
  330. !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
  331. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  332. txdesc->ifs = IFS_BACKOFF;
  333. } else
  334. txdesc->ifs = IFS_SIFS;
  335. /*
  336. * Determine rate modulation.
  337. */
  338. hwrate = rt2x00_get_rate(rate->hw_value);
  339. txdesc->rate_mode = RATE_MODE_CCK;
  340. if (hwrate->flags & DEV_RATE_OFDM)
  341. txdesc->rate_mode = RATE_MODE_OFDM;
  342. /*
  343. * Apply TX descriptor handling by components
  344. */
  345. rt2x00crypto_create_tx_descriptor(entry, txdesc);
  346. rt2x00ht_create_tx_descriptor(entry, txdesc, hwrate);
  347. rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
  348. rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
  349. }
  350. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  351. struct txentry_desc *txdesc)
  352. {
  353. struct data_queue *queue = entry->queue;
  354. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  355. enum rt2x00_dump_type dump_type;
  356. rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
  357. /*
  358. * All processing on the frame has been completed, this means
  359. * it is now ready to be dumped to userspace through debugfs.
  360. */
  361. dump_type = (txdesc->queue == QID_BEACON) ?
  362. DUMP_FRAME_BEACON : DUMP_FRAME_TX;
  363. rt2x00debug_dump_frame(rt2x00dev, dump_type, entry->skb);
  364. }
  365. static void rt2x00queue_kick_tx_queue(struct queue_entry *entry,
  366. struct txentry_desc *txdesc)
  367. {
  368. struct data_queue *queue = entry->queue;
  369. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  370. /*
  371. * Check if we need to kick the queue, there are however a few rules
  372. * 1) Don't kick unless this is the last in frame in a burst.
  373. * When the burst flag is set, this frame is always followed
  374. * by another frame which in some way are related to eachother.
  375. * This is true for fragments, RTS or CTS-to-self frames.
  376. * 2) Rule 1 can be broken when the available entries
  377. * in the queue are less then a certain threshold.
  378. */
  379. if (rt2x00queue_threshold(queue) ||
  380. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  381. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
  382. }
  383. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
  384. bool local)
  385. {
  386. struct ieee80211_tx_info *tx_info;
  387. struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
  388. struct txentry_desc txdesc;
  389. struct skb_frame_desc *skbdesc;
  390. u8 rate_idx, rate_flags;
  391. if (unlikely(rt2x00queue_full(queue)))
  392. return -ENOBUFS;
  393. if (test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
  394. ERROR(queue->rt2x00dev,
  395. "Arrived at non-free entry in the non-full queue %d.\n"
  396. "Please file bug report to %s.\n",
  397. queue->qid, DRV_PROJECT);
  398. return -EINVAL;
  399. }
  400. /*
  401. * Copy all TX descriptor information into txdesc,
  402. * after that we are free to use the skb->cb array
  403. * for our information.
  404. */
  405. entry->skb = skb;
  406. rt2x00queue_create_tx_descriptor(entry, &txdesc);
  407. /*
  408. * All information is retrieved from the skb->cb array,
  409. * now we should claim ownership of the driver part of that
  410. * array, preserving the bitrate index and flags.
  411. */
  412. tx_info = IEEE80211_SKB_CB(skb);
  413. rate_idx = tx_info->control.rates[0].idx;
  414. rate_flags = tx_info->control.rates[0].flags;
  415. skbdesc = get_skb_frame_desc(skb);
  416. memset(skbdesc, 0, sizeof(*skbdesc));
  417. skbdesc->entry = entry;
  418. skbdesc->tx_rate_idx = rate_idx;
  419. skbdesc->tx_rate_flags = rate_flags;
  420. if (local)
  421. skbdesc->flags |= SKBDESC_NOT_MAC80211;
  422. /*
  423. * When hardware encryption is supported, and this frame
  424. * is to be encrypted, we should strip the IV/EIV data from
  425. * the frame so we can provide it to the driver seperately.
  426. */
  427. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  428. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  429. if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags))
  430. rt2x00crypto_tx_copy_iv(skb, &txdesc);
  431. else
  432. rt2x00crypto_tx_remove_iv(skb, &txdesc);
  433. }
  434. /*
  435. * When DMA allocation is required we should guarentee to the
  436. * driver that the DMA is aligned to a 4-byte boundary.
  437. * However some drivers require L2 padding to pad the payload
  438. * rather then the header. This could be a requirement for
  439. * PCI and USB devices, while header alignment only is valid
  440. * for PCI devices.
  441. */
  442. if (test_bit(DRIVER_REQUIRE_L2PAD, &queue->rt2x00dev->flags))
  443. rt2x00queue_insert_l2pad(entry->skb, txdesc.header_length);
  444. else if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
  445. rt2x00queue_align_frame(entry->skb);
  446. /*
  447. * It could be possible that the queue was corrupted and this
  448. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  449. * this frame will simply be dropped.
  450. */
  451. if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry,
  452. &txdesc))) {
  453. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  454. entry->skb = NULL;
  455. return -EIO;
  456. }
  457. if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
  458. rt2x00queue_map_txskb(queue->rt2x00dev, skb);
  459. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  460. rt2x00queue_index_inc(queue, Q_INDEX);
  461. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  462. rt2x00queue_kick_tx_queue(entry, &txdesc);
  463. return 0;
  464. }
  465. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  466. struct ieee80211_vif *vif,
  467. const bool enable_beacon)
  468. {
  469. struct rt2x00_intf *intf = vif_to_intf(vif);
  470. struct skb_frame_desc *skbdesc;
  471. struct txentry_desc txdesc;
  472. if (unlikely(!intf->beacon))
  473. return -ENOBUFS;
  474. mutex_lock(&intf->beacon_skb_mutex);
  475. /*
  476. * Clean up the beacon skb.
  477. */
  478. rt2x00queue_free_skb(rt2x00dev, intf->beacon->skb);
  479. intf->beacon->skb = NULL;
  480. if (!enable_beacon) {
  481. rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, QID_BEACON);
  482. mutex_unlock(&intf->beacon_skb_mutex);
  483. return 0;
  484. }
  485. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  486. if (!intf->beacon->skb) {
  487. mutex_unlock(&intf->beacon_skb_mutex);
  488. return -ENOMEM;
  489. }
  490. /*
  491. * Copy all TX descriptor information into txdesc,
  492. * after that we are free to use the skb->cb array
  493. * for our information.
  494. */
  495. rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
  496. /*
  497. * Fill in skb descriptor
  498. */
  499. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  500. memset(skbdesc, 0, sizeof(*skbdesc));
  501. skbdesc->entry = intf->beacon;
  502. /*
  503. * Write TX descriptor into reserved room in front of the beacon.
  504. */
  505. rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
  506. /*
  507. * Send beacon to hardware and enable beacon genaration..
  508. */
  509. rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
  510. mutex_unlock(&intf->beacon_skb_mutex);
  511. return 0;
  512. }
  513. struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
  514. const enum data_queue_qid queue)
  515. {
  516. int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  517. if (queue == QID_RX)
  518. return rt2x00dev->rx;
  519. if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
  520. return &rt2x00dev->tx[queue];
  521. if (!rt2x00dev->bcn)
  522. return NULL;
  523. if (queue == QID_BEACON)
  524. return &rt2x00dev->bcn[0];
  525. else if (queue == QID_ATIM && atim)
  526. return &rt2x00dev->bcn[1];
  527. return NULL;
  528. }
  529. EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
  530. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  531. enum queue_index index)
  532. {
  533. struct queue_entry *entry;
  534. unsigned long irqflags;
  535. if (unlikely(index >= Q_INDEX_MAX)) {
  536. ERROR(queue->rt2x00dev,
  537. "Entry requested from invalid index type (%d)\n", index);
  538. return NULL;
  539. }
  540. spin_lock_irqsave(&queue->lock, irqflags);
  541. entry = &queue->entries[queue->index[index]];
  542. spin_unlock_irqrestore(&queue->lock, irqflags);
  543. return entry;
  544. }
  545. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  546. void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
  547. {
  548. unsigned long irqflags;
  549. if (unlikely(index >= Q_INDEX_MAX)) {
  550. ERROR(queue->rt2x00dev,
  551. "Index change on invalid index type (%d)\n", index);
  552. return;
  553. }
  554. spin_lock_irqsave(&queue->lock, irqflags);
  555. queue->index[index]++;
  556. if (queue->index[index] >= queue->limit)
  557. queue->index[index] = 0;
  558. if (index == Q_INDEX) {
  559. queue->length++;
  560. } else if (index == Q_INDEX_DONE) {
  561. queue->length--;
  562. queue->count++;
  563. }
  564. spin_unlock_irqrestore(&queue->lock, irqflags);
  565. }
  566. static void rt2x00queue_reset(struct data_queue *queue)
  567. {
  568. unsigned long irqflags;
  569. spin_lock_irqsave(&queue->lock, irqflags);
  570. queue->count = 0;
  571. queue->length = 0;
  572. memset(queue->index, 0, sizeof(queue->index));
  573. spin_unlock_irqrestore(&queue->lock, irqflags);
  574. }
  575. void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
  576. {
  577. struct data_queue *queue;
  578. txall_queue_for_each(rt2x00dev, queue)
  579. rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, queue->qid);
  580. }
  581. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  582. {
  583. struct data_queue *queue;
  584. unsigned int i;
  585. queue_for_each(rt2x00dev, queue) {
  586. rt2x00queue_reset(queue);
  587. for (i = 0; i < queue->limit; i++) {
  588. queue->entries[i].flags = 0;
  589. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  590. }
  591. }
  592. }
  593. static int rt2x00queue_alloc_entries(struct data_queue *queue,
  594. const struct data_queue_desc *qdesc)
  595. {
  596. struct queue_entry *entries;
  597. unsigned int entry_size;
  598. unsigned int i;
  599. rt2x00queue_reset(queue);
  600. queue->limit = qdesc->entry_num;
  601. queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
  602. queue->data_size = qdesc->data_size;
  603. queue->desc_size = qdesc->desc_size;
  604. /*
  605. * Allocate all queue entries.
  606. */
  607. entry_size = sizeof(*entries) + qdesc->priv_size;
  608. entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
  609. if (!entries)
  610. return -ENOMEM;
  611. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  612. ( ((char *)(__base)) + ((__limit) * (__esize)) + \
  613. ((__index) * (__psize)) )
  614. for (i = 0; i < queue->limit; i++) {
  615. entries[i].flags = 0;
  616. entries[i].queue = queue;
  617. entries[i].skb = NULL;
  618. entries[i].entry_idx = i;
  619. entries[i].priv_data =
  620. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  621. sizeof(*entries), qdesc->priv_size);
  622. }
  623. #undef QUEUE_ENTRY_PRIV_OFFSET
  624. queue->entries = entries;
  625. return 0;
  626. }
  627. static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
  628. struct data_queue *queue)
  629. {
  630. unsigned int i;
  631. if (!queue->entries)
  632. return;
  633. for (i = 0; i < queue->limit; i++) {
  634. if (queue->entries[i].skb)
  635. rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
  636. }
  637. }
  638. static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
  639. struct data_queue *queue)
  640. {
  641. unsigned int i;
  642. struct sk_buff *skb;
  643. for (i = 0; i < queue->limit; i++) {
  644. skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
  645. if (!skb)
  646. return -ENOMEM;
  647. queue->entries[i].skb = skb;
  648. }
  649. return 0;
  650. }
  651. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  652. {
  653. struct data_queue *queue;
  654. int status;
  655. status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
  656. if (status)
  657. goto exit;
  658. tx_queue_for_each(rt2x00dev, queue) {
  659. status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
  660. if (status)
  661. goto exit;
  662. }
  663. status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
  664. if (status)
  665. goto exit;
  666. if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
  667. status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
  668. rt2x00dev->ops->atim);
  669. if (status)
  670. goto exit;
  671. }
  672. status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
  673. if (status)
  674. goto exit;
  675. return 0;
  676. exit:
  677. ERROR(rt2x00dev, "Queue entries allocation failed.\n");
  678. rt2x00queue_uninitialize(rt2x00dev);
  679. return status;
  680. }
  681. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  682. {
  683. struct data_queue *queue;
  684. rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
  685. queue_for_each(rt2x00dev, queue) {
  686. kfree(queue->entries);
  687. queue->entries = NULL;
  688. }
  689. }
  690. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  691. struct data_queue *queue, enum data_queue_qid qid)
  692. {
  693. spin_lock_init(&queue->lock);
  694. queue->rt2x00dev = rt2x00dev;
  695. queue->qid = qid;
  696. queue->txop = 0;
  697. queue->aifs = 2;
  698. queue->cw_min = 5;
  699. queue->cw_max = 10;
  700. }
  701. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  702. {
  703. struct data_queue *queue;
  704. enum data_queue_qid qid;
  705. unsigned int req_atim =
  706. !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  707. /*
  708. * We need the following queues:
  709. * RX: 1
  710. * TX: ops->tx_queues
  711. * Beacon: 1
  712. * Atim: 1 (if required)
  713. */
  714. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  715. queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
  716. if (!queue) {
  717. ERROR(rt2x00dev, "Queue allocation failed.\n");
  718. return -ENOMEM;
  719. }
  720. /*
  721. * Initialize pointers
  722. */
  723. rt2x00dev->rx = queue;
  724. rt2x00dev->tx = &queue[1];
  725. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  726. /*
  727. * Initialize queue parameters.
  728. * RX: qid = QID_RX
  729. * TX: qid = QID_AC_BE + index
  730. * TX: cw_min: 2^5 = 32.
  731. * TX: cw_max: 2^10 = 1024.
  732. * BCN: qid = QID_BEACON
  733. * ATIM: qid = QID_ATIM
  734. */
  735. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  736. qid = QID_AC_BE;
  737. tx_queue_for_each(rt2x00dev, queue)
  738. rt2x00queue_init(rt2x00dev, queue, qid++);
  739. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
  740. if (req_atim)
  741. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
  742. return 0;
  743. }
  744. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  745. {
  746. kfree(rt2x00dev->rx);
  747. rt2x00dev->rx = NULL;
  748. rt2x00dev->tx = NULL;
  749. rt2x00dev->bcn = NULL;
  750. }