i915_gem_gtt.c 3.2 KB

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  1. /*
  2. * Copyright © 2010 Daniel Vetter
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. */
  24. #include "drmP.h"
  25. #include "drm.h"
  26. #include "i915_drm.h"
  27. #include "i915_drv.h"
  28. #include "i915_trace.h"
  29. #include "intel_drv.h"
  30. void i915_gem_restore_gtt_mappings(struct drm_device *dev)
  31. {
  32. struct drm_i915_private *dev_priv = dev->dev_private;
  33. struct drm_i915_gem_object *obj_priv;
  34. list_for_each_entry(obj_priv,
  35. &dev_priv->mm.gtt_list,
  36. gtt_list) {
  37. if (dev_priv->mm.gtt->needs_dmar) {
  38. BUG_ON(!obj_priv->sg_list);
  39. intel_gtt_insert_sg_entries(obj_priv->sg_list,
  40. obj_priv->num_sg,
  41. obj_priv->gtt_space->start
  42. >> PAGE_SHIFT,
  43. obj_priv->agp_type);
  44. } else
  45. intel_gtt_insert_pages(obj_priv->gtt_space->start
  46. >> PAGE_SHIFT,
  47. obj_priv->base.size >> PAGE_SHIFT,
  48. obj_priv->pages,
  49. obj_priv->agp_type);
  50. }
  51. /* Be paranoid and flush the chipset cache. */
  52. intel_gtt_chipset_flush();
  53. }
  54. int i915_gem_gtt_bind_object(struct drm_gem_object *obj)
  55. {
  56. struct drm_device *dev = obj->dev;
  57. struct drm_i915_private *dev_priv = dev->dev_private;
  58. struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
  59. int ret;
  60. if (dev_priv->mm.gtt->needs_dmar) {
  61. ret = intel_gtt_map_memory(obj_priv->pages,
  62. obj->size >> PAGE_SHIFT,
  63. &obj_priv->sg_list,
  64. &obj_priv->num_sg);
  65. if (ret != 0)
  66. return ret;
  67. intel_gtt_insert_sg_entries(obj_priv->sg_list, obj_priv->num_sg,
  68. obj_priv->gtt_space->start
  69. >> PAGE_SHIFT,
  70. obj_priv->agp_type);
  71. } else
  72. intel_gtt_insert_pages(obj_priv->gtt_space->start >> PAGE_SHIFT,
  73. obj->size >> PAGE_SHIFT,
  74. obj_priv->pages,
  75. obj_priv->agp_type);
  76. return 0;
  77. }
  78. void i915_gem_gtt_unbind_object(struct drm_gem_object *obj)
  79. {
  80. struct drm_device *dev = obj->dev;
  81. struct drm_i915_private *dev_priv = dev->dev_private;
  82. struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
  83. if (dev_priv->mm.gtt->needs_dmar) {
  84. intel_gtt_unmap_memory(obj_priv->sg_list, obj_priv->num_sg);
  85. obj_priv->sg_list = NULL;
  86. obj_priv->num_sg = 0;
  87. }
  88. intel_gtt_clear_range(obj_priv->gtt_space->start >> PAGE_SHIFT,
  89. obj->size >> PAGE_SHIFT);
  90. }