iwl4965-base.c 232 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-eeprom.h"
  45. #include "iwl-4965.h"
  46. #include "iwl-core.h"
  47. #include "iwl-io.h"
  48. #include "iwl-helpers.h"
  49. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  50. struct iwl4965_tx_queue *txq);
  51. /******************************************************************************
  52. *
  53. * module boiler plate
  54. *
  55. ******************************************************************************/
  56. /*
  57. * module name, copyright, version, etc.
  58. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  59. */
  60. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  61. #ifdef CONFIG_IWLWIFI_DEBUG
  62. #define VD "d"
  63. #else
  64. #define VD
  65. #endif
  66. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  67. #define VS "s"
  68. #else
  69. #define VS
  70. #endif
  71. #define DRV_VERSION IWLWIFI_VERSION VD VS
  72. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  73. MODULE_VERSION(DRV_VERSION);
  74. MODULE_AUTHOR(DRV_COPYRIGHT);
  75. MODULE_LICENSE("GPL");
  76. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  77. {
  78. u16 fc = le16_to_cpu(hdr->frame_control);
  79. int hdr_len = ieee80211_get_hdrlen(fc);
  80. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  81. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  82. return NULL;
  83. }
  84. static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
  85. struct iwl_priv *priv, enum ieee80211_band band)
  86. {
  87. return priv->hw->wiphy->bands[band];
  88. }
  89. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  90. {
  91. /* Single white space is for Linksys APs */
  92. if (essid_len == 1 && essid[0] == ' ')
  93. return 1;
  94. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  95. while (essid_len) {
  96. essid_len--;
  97. if (essid[essid_len] != '\0')
  98. return 0;
  99. }
  100. return 1;
  101. }
  102. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  103. {
  104. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  105. const char *s = essid;
  106. char *d = escaped;
  107. if (iwl4965_is_empty_essid(essid, essid_len)) {
  108. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  109. return escaped;
  110. }
  111. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  112. while (essid_len--) {
  113. if (*s == '\0') {
  114. *d++ = '\\';
  115. *d++ = '0';
  116. s++;
  117. } else
  118. *d++ = *s++;
  119. }
  120. *d = '\0';
  121. return escaped;
  122. }
  123. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  124. * DMA services
  125. *
  126. * Theory of operation
  127. *
  128. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  129. * of buffer descriptors, each of which points to one or more data buffers for
  130. * the device to read from or fill. Driver and device exchange status of each
  131. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  132. * entries in each circular buffer, to protect against confusing empty and full
  133. * queue states.
  134. *
  135. * The device reads or writes the data in the queues via the device's several
  136. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  137. *
  138. * For Tx queue, there are low mark and high mark limits. If, after queuing
  139. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  140. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  141. * Tx queue resumed.
  142. *
  143. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  144. * queue (#4) for sending commands to the device firmware, and 15 other
  145. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  146. *
  147. * See more detailed info in iwl-4965-hw.h.
  148. ***************************************************/
  149. int iwl4965_queue_space(const struct iwl4965_queue *q)
  150. {
  151. int s = q->read_ptr - q->write_ptr;
  152. if (q->read_ptr > q->write_ptr)
  153. s -= q->n_bd;
  154. if (s <= 0)
  155. s += q->n_window;
  156. /* keep some reserve to not confuse empty and full situations */
  157. s -= 2;
  158. if (s < 0)
  159. s = 0;
  160. return s;
  161. }
  162. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  163. {
  164. return q->write_ptr > q->read_ptr ?
  165. (i >= q->read_ptr && i < q->write_ptr) :
  166. !(i < q->read_ptr && i >= q->write_ptr);
  167. }
  168. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  169. {
  170. /* This is for scan command, the big buffer at end of command array */
  171. if (is_huge)
  172. return q->n_window; /* must be power of 2 */
  173. /* Otherwise, use normal size buffers */
  174. return index & (q->n_window - 1);
  175. }
  176. /**
  177. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  178. */
  179. static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
  180. int count, int slots_num, u32 id)
  181. {
  182. q->n_bd = count;
  183. q->n_window = slots_num;
  184. q->id = id;
  185. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  186. * and iwl_queue_dec_wrap are broken. */
  187. BUG_ON(!is_power_of_2(count));
  188. /* slots_num must be power-of-two size, otherwise
  189. * get_cmd_index is broken. */
  190. BUG_ON(!is_power_of_2(slots_num));
  191. q->low_mark = q->n_window / 4;
  192. if (q->low_mark < 4)
  193. q->low_mark = 4;
  194. q->high_mark = q->n_window / 8;
  195. if (q->high_mark < 2)
  196. q->high_mark = 2;
  197. q->write_ptr = q->read_ptr = 0;
  198. return 0;
  199. }
  200. /**
  201. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  202. */
  203. static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
  204. struct iwl4965_tx_queue *txq, u32 id)
  205. {
  206. struct pci_dev *dev = priv->pci_dev;
  207. /* Driver private data, only for Tx (not command) queues,
  208. * not shared with device. */
  209. if (id != IWL_CMD_QUEUE_NUM) {
  210. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  211. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  212. if (!txq->txb) {
  213. IWL_ERROR("kmalloc for auxiliary BD "
  214. "structures failed\n");
  215. goto error;
  216. }
  217. } else
  218. txq->txb = NULL;
  219. /* Circular buffer of transmit frame descriptors (TFDs),
  220. * shared with device */
  221. txq->bd = pci_alloc_consistent(dev,
  222. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  223. &txq->q.dma_addr);
  224. if (!txq->bd) {
  225. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  226. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  227. goto error;
  228. }
  229. txq->q.id = id;
  230. return 0;
  231. error:
  232. if (txq->txb) {
  233. kfree(txq->txb);
  234. txq->txb = NULL;
  235. }
  236. return -ENOMEM;
  237. }
  238. /**
  239. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  240. */
  241. int iwl4965_tx_queue_init(struct iwl_priv *priv,
  242. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  243. {
  244. struct pci_dev *dev = priv->pci_dev;
  245. int len;
  246. int rc = 0;
  247. /*
  248. * Alloc buffer array for commands (Tx or other types of commands).
  249. * For the command queue (#4), allocate command space + one big
  250. * command for scan, since scan command is very huge; the system will
  251. * not have two scans at the same time, so only one is needed.
  252. * For normal Tx queues (all other queues), no super-size command
  253. * space is needed.
  254. */
  255. len = sizeof(struct iwl_cmd) * slots_num;
  256. if (txq_id == IWL_CMD_QUEUE_NUM)
  257. len += IWL_MAX_SCAN_SIZE;
  258. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  259. if (!txq->cmd)
  260. return -ENOMEM;
  261. /* Alloc driver data array and TFD circular buffer */
  262. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  263. if (rc) {
  264. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  265. return -ENOMEM;
  266. }
  267. txq->need_update = 0;
  268. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  269. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  270. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  271. /* Initialize queue's high/low-water marks, and head/tail indexes */
  272. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  273. /* Tell device where to find queue */
  274. iwl4965_hw_tx_queue_init(priv, txq);
  275. return 0;
  276. }
  277. /**
  278. * iwl4965_tx_queue_free - Deallocate DMA queue.
  279. * @txq: Transmit queue to deallocate.
  280. *
  281. * Empty queue by removing and destroying all BD's.
  282. * Free all buffers.
  283. * 0-fill, but do not free "txq" descriptor structure.
  284. */
  285. void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
  286. {
  287. struct iwl4965_queue *q = &txq->q;
  288. struct pci_dev *dev = priv->pci_dev;
  289. int len;
  290. if (q->n_bd == 0)
  291. return;
  292. /* first, empty all BD's */
  293. for (; q->write_ptr != q->read_ptr;
  294. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  295. iwl4965_hw_txq_free_tfd(priv, txq);
  296. len = sizeof(struct iwl_cmd) * q->n_window;
  297. if (q->id == IWL_CMD_QUEUE_NUM)
  298. len += IWL_MAX_SCAN_SIZE;
  299. /* De-alloc array of command/tx buffers */
  300. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  301. /* De-alloc circular buffer of TFDs */
  302. if (txq->q.n_bd)
  303. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  304. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  305. /* De-alloc array of per-TFD driver data */
  306. if (txq->txb) {
  307. kfree(txq->txb);
  308. txq->txb = NULL;
  309. }
  310. /* 0-fill queue descriptor structure */
  311. memset(txq, 0, sizeof(*txq));
  312. }
  313. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  314. /*************** STATION TABLE MANAGEMENT ****
  315. * mac80211 should be examined to determine if sta_info is duplicating
  316. * the functionality provided here
  317. */
  318. /**************************************************************/
  319. #if 0 /* temporary disable till we add real remove station */
  320. /**
  321. * iwl4965_remove_station - Remove driver's knowledge of station.
  322. *
  323. * NOTE: This does not remove station from device's station table.
  324. */
  325. static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  326. {
  327. int index = IWL_INVALID_STATION;
  328. int i;
  329. unsigned long flags;
  330. spin_lock_irqsave(&priv->sta_lock, flags);
  331. if (is_ap)
  332. index = IWL_AP_ID;
  333. else if (is_broadcast_ether_addr(addr))
  334. index = priv->hw_setting.bcast_sta_id;
  335. else
  336. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  337. if (priv->stations[i].used &&
  338. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  339. addr)) {
  340. index = i;
  341. break;
  342. }
  343. if (unlikely(index == IWL_INVALID_STATION))
  344. goto out;
  345. if (priv->stations[index].used) {
  346. priv->stations[index].used = 0;
  347. priv->num_stations--;
  348. }
  349. BUG_ON(priv->num_stations < 0);
  350. out:
  351. spin_unlock_irqrestore(&priv->sta_lock, flags);
  352. return 0;
  353. }
  354. #endif
  355. /**
  356. * iwl4965_add_station_flags - Add station to tables in driver and device
  357. */
  358. u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
  359. int is_ap, u8 flags, void *ht_data)
  360. {
  361. int i;
  362. int index = IWL_INVALID_STATION;
  363. struct iwl4965_station_entry *station;
  364. unsigned long flags_spin;
  365. DECLARE_MAC_BUF(mac);
  366. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  367. if (is_ap)
  368. index = IWL_AP_ID;
  369. else if (is_broadcast_ether_addr(addr))
  370. index = priv->hw_setting.bcast_sta_id;
  371. else
  372. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  373. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  374. addr)) {
  375. index = i;
  376. break;
  377. }
  378. if (!priv->stations[i].used &&
  379. index == IWL_INVALID_STATION)
  380. index = i;
  381. }
  382. /* These two conditions have the same outcome, but keep them separate
  383. since they have different meanings */
  384. if (unlikely(index == IWL_INVALID_STATION)) {
  385. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  386. return index;
  387. }
  388. if (priv->stations[index].used &&
  389. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  390. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  391. return index;
  392. }
  393. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  394. station = &priv->stations[index];
  395. station->used = 1;
  396. priv->num_stations++;
  397. /* Set up the REPLY_ADD_STA command to send to device */
  398. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  399. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  400. station->sta.mode = 0;
  401. station->sta.sta.sta_id = index;
  402. station->sta.station_flags = 0;
  403. #ifdef CONFIG_IWL4965_HT
  404. /* BCAST station and IBSS stations do not work in HT mode */
  405. if (index != priv->hw_setting.bcast_sta_id &&
  406. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  407. iwl4965_set_ht_add_station(priv, index,
  408. (struct ieee80211_ht_info *) ht_data);
  409. #endif /*CONFIG_IWL4965_HT*/
  410. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  411. /* Add station to device's station table */
  412. iwl4965_send_add_station(priv, &station->sta, flags);
  413. return index;
  414. }
  415. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  416. /**
  417. * iwl4965_enqueue_hcmd - enqueue a uCode command
  418. * @priv: device private data point
  419. * @cmd: a point to the ucode command structure
  420. *
  421. * The function returns < 0 values to indicate the operation is
  422. * failed. On success, it turns the index (> 0) of command in the
  423. * command queue.
  424. */
  425. int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  426. {
  427. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  428. struct iwl4965_queue *q = &txq->q;
  429. struct iwl4965_tfd_frame *tfd;
  430. u32 *control_flags;
  431. struct iwl_cmd *out_cmd;
  432. u32 idx;
  433. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  434. dma_addr_t phys_addr;
  435. int ret;
  436. unsigned long flags;
  437. /* If any of the command structures end up being larger than
  438. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  439. * we will need to increase the size of the TFD entries */
  440. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  441. !(cmd->meta.flags & CMD_SIZE_HUGE));
  442. if (iwl_is_rfkill(priv)) {
  443. IWL_DEBUG_INFO("Not sending command - RF KILL");
  444. return -EIO;
  445. }
  446. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  447. IWL_ERROR("No space for Tx\n");
  448. return -ENOSPC;
  449. }
  450. spin_lock_irqsave(&priv->hcmd_lock, flags);
  451. tfd = &txq->bd[q->write_ptr];
  452. memset(tfd, 0, sizeof(*tfd));
  453. control_flags = (u32 *) tfd;
  454. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  455. out_cmd = &txq->cmd[idx];
  456. out_cmd->hdr.cmd = cmd->id;
  457. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  458. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  459. /* At this point, the out_cmd now has all of the incoming cmd
  460. * information */
  461. out_cmd->hdr.flags = 0;
  462. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  463. INDEX_TO_SEQ(q->write_ptr));
  464. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  465. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  466. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  467. offsetof(struct iwl_cmd, hdr);
  468. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  469. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  470. "%d bytes at %d[%d]:%d\n",
  471. get_cmd_string(out_cmd->hdr.cmd),
  472. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  473. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  474. txq->need_update = 1;
  475. /* Set up entry in queue's byte count circular buffer */
  476. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  477. /* Increment and update queue's write index */
  478. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  479. iwl4965_tx_queue_update_write_ptr(priv, txq);
  480. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  481. return ret ? ret : idx;
  482. }
  483. static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  484. {
  485. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  486. if (hw_decrypt)
  487. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  488. else
  489. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  490. }
  491. int iwl4965_send_statistics_request(struct iwl_priv *priv)
  492. {
  493. u32 flags = 0;
  494. return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
  495. sizeof(flags), &flags);
  496. }
  497. /**
  498. * iwl4965_rxon_add_station - add station into station table.
  499. *
  500. * there is only one AP station with id= IWL_AP_ID
  501. * NOTE: mutex must be held before calling this fnction
  502. */
  503. static int iwl4965_rxon_add_station(struct iwl_priv *priv,
  504. const u8 *addr, int is_ap)
  505. {
  506. u8 sta_id;
  507. /* Add station to device's station table */
  508. #ifdef CONFIG_IWL4965_HT
  509. struct ieee80211_conf *conf = &priv->hw->conf;
  510. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  511. if ((is_ap) &&
  512. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  513. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  514. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  515. 0, cur_ht_config);
  516. else
  517. #endif /* CONFIG_IWL4965_HT */
  518. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  519. 0, NULL);
  520. /* Set up default rate scaling table in device's station table */
  521. iwl4965_add_station(priv, addr, is_ap);
  522. return sta_id;
  523. }
  524. /**
  525. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  526. *
  527. * NOTE: This is really only useful during development and can eventually
  528. * be #ifdef'd out once the driver is stable and folks aren't actively
  529. * making changes
  530. */
  531. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  532. {
  533. int error = 0;
  534. int counter = 1;
  535. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  536. error |= le32_to_cpu(rxon->flags &
  537. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  538. RXON_FLG_RADAR_DETECT_MSK));
  539. if (error)
  540. IWL_WARNING("check 24G fields %d | %d\n",
  541. counter++, error);
  542. } else {
  543. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  544. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  545. if (error)
  546. IWL_WARNING("check 52 fields %d | %d\n",
  547. counter++, error);
  548. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  549. if (error)
  550. IWL_WARNING("check 52 CCK %d | %d\n",
  551. counter++, error);
  552. }
  553. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  554. if (error)
  555. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  556. /* make sure basic rates 6Mbps and 1Mbps are supported */
  557. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  558. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  559. if (error)
  560. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  561. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  562. if (error)
  563. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  564. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  565. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  566. if (error)
  567. IWL_WARNING("check CCK and short slot %d | %d\n",
  568. counter++, error);
  569. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  570. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  571. if (error)
  572. IWL_WARNING("check CCK & auto detect %d | %d\n",
  573. counter++, error);
  574. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  575. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  576. if (error)
  577. IWL_WARNING("check TGG and auto detect %d | %d\n",
  578. counter++, error);
  579. if (error)
  580. IWL_WARNING("Tuning to channel %d\n",
  581. le16_to_cpu(rxon->channel));
  582. if (error) {
  583. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  584. return -1;
  585. }
  586. return 0;
  587. }
  588. /**
  589. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  590. * @priv: staging_rxon is compared to active_rxon
  591. *
  592. * If the RXON structure is changing enough to require a new tune,
  593. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  594. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  595. */
  596. static int iwl4965_full_rxon_required(struct iwl_priv *priv)
  597. {
  598. /* These items are only settable from the full RXON command */
  599. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  600. compare_ether_addr(priv->staging_rxon.bssid_addr,
  601. priv->active_rxon.bssid_addr) ||
  602. compare_ether_addr(priv->staging_rxon.node_addr,
  603. priv->active_rxon.node_addr) ||
  604. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  605. priv->active_rxon.wlap_bssid_addr) ||
  606. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  607. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  608. (priv->staging_rxon.air_propagation !=
  609. priv->active_rxon.air_propagation) ||
  610. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  611. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  612. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  613. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  614. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  615. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  616. return 1;
  617. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  618. * be updated with the RXON_ASSOC command -- however only some
  619. * flag transitions are allowed using RXON_ASSOC */
  620. /* Check if we are not switching bands */
  621. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  622. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  623. return 1;
  624. /* Check if we are switching association toggle */
  625. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  626. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  627. return 1;
  628. return 0;
  629. }
  630. static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
  631. {
  632. int rc = 0;
  633. struct iwl4965_rx_packet *res = NULL;
  634. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  635. struct iwl_host_cmd cmd = {
  636. .id = REPLY_RXON_ASSOC,
  637. .len = sizeof(rxon_assoc),
  638. .meta.flags = CMD_WANT_SKB,
  639. .data = &rxon_assoc,
  640. };
  641. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  642. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  643. if ((rxon1->flags == rxon2->flags) &&
  644. (rxon1->filter_flags == rxon2->filter_flags) &&
  645. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  646. (rxon1->ofdm_ht_single_stream_basic_rates ==
  647. rxon2->ofdm_ht_single_stream_basic_rates) &&
  648. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  649. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  650. (rxon1->rx_chain == rxon2->rx_chain) &&
  651. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  652. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  653. return 0;
  654. }
  655. rxon_assoc.flags = priv->staging_rxon.flags;
  656. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  657. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  658. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  659. rxon_assoc.reserved = 0;
  660. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  661. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  662. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  663. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  664. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  665. rc = iwl_send_cmd_sync(priv, &cmd);
  666. if (rc)
  667. return rc;
  668. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  669. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  670. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  671. rc = -EIO;
  672. }
  673. priv->alloc_rxb_skb--;
  674. dev_kfree_skb_any(cmd.meta.u.skb);
  675. return rc;
  676. }
  677. /**
  678. * iwl4965_commit_rxon - commit staging_rxon to hardware
  679. *
  680. * The RXON command in staging_rxon is committed to the hardware and
  681. * the active_rxon structure is updated with the new data. This
  682. * function correctly transitions out of the RXON_ASSOC_MSK state if
  683. * a HW tune is required based on the RXON structure changes.
  684. */
  685. static int iwl4965_commit_rxon(struct iwl_priv *priv)
  686. {
  687. /* cast away the const for active_rxon in this function */
  688. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  689. DECLARE_MAC_BUF(mac);
  690. int rc = 0;
  691. if (!iwl_is_alive(priv))
  692. return -1;
  693. /* always get timestamp with Rx frame */
  694. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  695. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  696. if (rc) {
  697. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  698. return -EINVAL;
  699. }
  700. /* If we don't need to send a full RXON, we can use
  701. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  702. * and other flags for the current radio configuration. */
  703. if (!iwl4965_full_rxon_required(priv)) {
  704. rc = iwl4965_send_rxon_assoc(priv);
  705. if (rc) {
  706. IWL_ERROR("Error setting RXON_ASSOC "
  707. "configuration (%d).\n", rc);
  708. return rc;
  709. }
  710. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  711. return 0;
  712. }
  713. /* station table will be cleared */
  714. priv->assoc_station_added = 0;
  715. #ifdef CONFIG_IWL4965_SENSITIVITY
  716. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  717. if (!priv->error_recovering)
  718. priv->start_calib = 0;
  719. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  720. #endif /* CONFIG_IWL4965_SENSITIVITY */
  721. /* If we are currently associated and the new config requires
  722. * an RXON_ASSOC and the new config wants the associated mask enabled,
  723. * we must clear the associated from the active configuration
  724. * before we apply the new config */
  725. if (iwl_is_associated(priv) &&
  726. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  727. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  728. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  729. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  730. sizeof(struct iwl4965_rxon_cmd),
  731. &priv->active_rxon);
  732. /* If the mask clearing failed then we set
  733. * active_rxon back to what it was previously */
  734. if (rc) {
  735. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  736. IWL_ERROR("Error clearing ASSOC_MSK on current "
  737. "configuration (%d).\n", rc);
  738. return rc;
  739. }
  740. }
  741. IWL_DEBUG_INFO("Sending RXON\n"
  742. "* with%s RXON_FILTER_ASSOC_MSK\n"
  743. "* channel = %d\n"
  744. "* bssid = %s\n",
  745. ((priv->staging_rxon.filter_flags &
  746. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  747. le16_to_cpu(priv->staging_rxon.channel),
  748. print_mac(mac, priv->staging_rxon.bssid_addr));
  749. iwl4965_set_rxon_hwcrypto(priv, priv->cfg->mod_params->hw_crypto);
  750. /* Apply the new configuration */
  751. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  752. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  753. if (rc) {
  754. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  755. return rc;
  756. }
  757. iwlcore_clear_stations_table(priv);
  758. #ifdef CONFIG_IWL4965_SENSITIVITY
  759. if (!priv->error_recovering)
  760. priv->start_calib = 0;
  761. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  762. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  763. #endif /* CONFIG_IWL4965_SENSITIVITY */
  764. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  765. /* If we issue a new RXON command which required a tune then we must
  766. * send a new TXPOWER command or we won't be able to Tx any frames */
  767. rc = iwl4965_hw_reg_send_txpower(priv);
  768. if (rc) {
  769. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  770. return rc;
  771. }
  772. /* Add the broadcast address so we can send broadcast frames */
  773. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  774. IWL_INVALID_STATION) {
  775. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  776. return -EIO;
  777. }
  778. /* If we have set the ASSOC_MSK and we are in BSS mode then
  779. * add the IWL_AP_ID to the station rate table */
  780. if (iwl_is_associated(priv) &&
  781. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  782. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  783. == IWL_INVALID_STATION) {
  784. IWL_ERROR("Error adding AP address for transmit.\n");
  785. return -EIO;
  786. }
  787. priv->assoc_station_added = 1;
  788. }
  789. return 0;
  790. }
  791. static int iwl4965_send_bt_config(struct iwl_priv *priv)
  792. {
  793. struct iwl4965_bt_cmd bt_cmd = {
  794. .flags = 3,
  795. .lead_time = 0xAA,
  796. .max_kill = 1,
  797. .kill_ack_mask = 0,
  798. .kill_cts_mask = 0,
  799. };
  800. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  801. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  802. }
  803. static int iwl4965_send_scan_abort(struct iwl_priv *priv)
  804. {
  805. int rc = 0;
  806. struct iwl4965_rx_packet *res;
  807. struct iwl_host_cmd cmd = {
  808. .id = REPLY_SCAN_ABORT_CMD,
  809. .meta.flags = CMD_WANT_SKB,
  810. };
  811. /* If there isn't a scan actively going on in the hardware
  812. * then we are in between scan bands and not actually
  813. * actively scanning, so don't send the abort command */
  814. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  815. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  816. return 0;
  817. }
  818. rc = iwl_send_cmd_sync(priv, &cmd);
  819. if (rc) {
  820. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  821. return rc;
  822. }
  823. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  824. if (res->u.status != CAN_ABORT_STATUS) {
  825. /* The scan abort will return 1 for success or
  826. * 2 for "failure". A failure condition can be
  827. * due to simply not being in an active scan which
  828. * can occur if we send the scan abort before we
  829. * the microcode has notified us that a scan is
  830. * completed. */
  831. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  832. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  833. clear_bit(STATUS_SCAN_HW, &priv->status);
  834. }
  835. dev_kfree_skb_any(cmd.meta.u.skb);
  836. return rc;
  837. }
  838. static int iwl4965_card_state_sync_callback(struct iwl_priv *priv,
  839. struct iwl_cmd *cmd,
  840. struct sk_buff *skb)
  841. {
  842. return 1;
  843. }
  844. /*
  845. * CARD_STATE_CMD
  846. *
  847. * Use: Sets the device's internal card state to enable, disable, or halt
  848. *
  849. * When in the 'enable' state the card operates as normal.
  850. * When in the 'disable' state, the card enters into a low power mode.
  851. * When in the 'halt' state, the card is shut down and must be fully
  852. * restarted to come back on.
  853. */
  854. static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  855. {
  856. struct iwl_host_cmd cmd = {
  857. .id = REPLY_CARD_STATE_CMD,
  858. .len = sizeof(u32),
  859. .data = &flags,
  860. .meta.flags = meta_flag,
  861. };
  862. if (meta_flag & CMD_ASYNC)
  863. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  864. return iwl_send_cmd(priv, &cmd);
  865. }
  866. static int iwl4965_add_sta_sync_callback(struct iwl_priv *priv,
  867. struct iwl_cmd *cmd, struct sk_buff *skb)
  868. {
  869. struct iwl4965_rx_packet *res = NULL;
  870. if (!skb) {
  871. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  872. return 1;
  873. }
  874. res = (struct iwl4965_rx_packet *)skb->data;
  875. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  876. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  877. res->hdr.flags);
  878. return 1;
  879. }
  880. switch (res->u.add_sta.status) {
  881. case ADD_STA_SUCCESS_MSK:
  882. break;
  883. default:
  884. break;
  885. }
  886. /* We didn't cache the SKB; let the caller free it */
  887. return 1;
  888. }
  889. int iwl4965_send_add_station(struct iwl_priv *priv,
  890. struct iwl4965_addsta_cmd *sta, u8 flags)
  891. {
  892. struct iwl4965_rx_packet *res = NULL;
  893. int rc = 0;
  894. struct iwl_host_cmd cmd = {
  895. .id = REPLY_ADD_STA,
  896. .len = sizeof(struct iwl4965_addsta_cmd),
  897. .meta.flags = flags,
  898. .data = sta,
  899. };
  900. if (flags & CMD_ASYNC)
  901. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  902. else
  903. cmd.meta.flags |= CMD_WANT_SKB;
  904. rc = iwl_send_cmd(priv, &cmd);
  905. if (rc || (flags & CMD_ASYNC))
  906. return rc;
  907. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  908. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  909. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  910. res->hdr.flags);
  911. rc = -EIO;
  912. }
  913. if (rc == 0) {
  914. switch (res->u.add_sta.status) {
  915. case ADD_STA_SUCCESS_MSK:
  916. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  917. break;
  918. default:
  919. rc = -EIO;
  920. IWL_WARNING("REPLY_ADD_STA failed\n");
  921. break;
  922. }
  923. }
  924. priv->alloc_rxb_skb--;
  925. dev_kfree_skb_any(cmd.meta.u.skb);
  926. return rc;
  927. }
  928. static int iwl4965_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  929. struct ieee80211_key_conf *keyconf,
  930. u8 sta_id)
  931. {
  932. unsigned long flags;
  933. __le16 key_flags = 0;
  934. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  935. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  936. if (sta_id == priv->hw_setting.bcast_sta_id)
  937. key_flags |= STA_KEY_MULTICAST_MSK;
  938. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  939. keyconf->hw_key_idx = keyconf->keyidx;
  940. key_flags &= ~STA_KEY_FLG_INVALID;
  941. spin_lock_irqsave(&priv->sta_lock, flags);
  942. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  943. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  944. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  945. keyconf->keylen);
  946. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  947. keyconf->keylen);
  948. priv->stations[sta_id].sta.key.key_offset
  949. = (sta_id % STA_KEY_MAX_NUM);/*FIXME*/
  950. priv->stations[sta_id].sta.key.key_flags = key_flags;
  951. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  952. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  953. spin_unlock_irqrestore(&priv->sta_lock, flags);
  954. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  955. return iwl4965_send_add_station(priv,
  956. &priv->stations[sta_id].sta, CMD_ASYNC);
  957. }
  958. static int iwl4965_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  959. struct ieee80211_key_conf *keyconf,
  960. u8 sta_id)
  961. {
  962. unsigned long flags;
  963. int ret = 0;
  964. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  965. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  966. keyconf->hw_key_idx = keyconf->keyidx;
  967. spin_lock_irqsave(&priv->sta_lock, flags);
  968. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  969. priv->stations[sta_id].keyinfo.conf = keyconf;
  970. priv->stations[sta_id].keyinfo.keylen = 16;
  971. /* This copy is acutally not needed: we get the key with each TX */
  972. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key, 16);
  973. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key, 16);
  974. spin_unlock_irqrestore(&priv->sta_lock, flags);
  975. return ret;
  976. }
  977. static int iwl4965_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  978. {
  979. unsigned long flags;
  980. spin_lock_irqsave(&priv->sta_lock, flags);
  981. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  982. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  983. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  984. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  985. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  986. spin_unlock_irqrestore(&priv->sta_lock, flags);
  987. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  988. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  989. return 0;
  990. }
  991. static int iwl4965_set_dynamic_key(struct iwl_priv *priv,
  992. struct ieee80211_key_conf *key, u8 sta_id)
  993. {
  994. int ret;
  995. switch (key->alg) {
  996. case ALG_CCMP:
  997. ret = iwl4965_set_ccmp_dynamic_key_info(priv, key, sta_id);
  998. break;
  999. case ALG_TKIP:
  1000. ret = iwl4965_set_tkip_dynamic_key_info(priv, key, sta_id);
  1001. break;
  1002. case ALG_WEP:
  1003. ret = -EOPNOTSUPP;
  1004. break;
  1005. default:
  1006. IWL_ERROR("Unknown alg: %s alg = %d\n", __func__, key->alg);
  1007. ret = -EINVAL;
  1008. }
  1009. return ret;
  1010. }
  1011. static int iwl4965_remove_static_key(struct iwl_priv *priv)
  1012. {
  1013. int ret = -EOPNOTSUPP;
  1014. return ret;
  1015. }
  1016. static int iwl4965_set_static_key(struct iwl_priv *priv,
  1017. struct ieee80211_key_conf *key)
  1018. {
  1019. if (key->alg == ALG_WEP)
  1020. return -EOPNOTSUPP;
  1021. IWL_ERROR("Static key invalid: alg %d\n", key->alg);
  1022. return -EINVAL;
  1023. }
  1024. static void iwl4965_clear_free_frames(struct iwl_priv *priv)
  1025. {
  1026. struct list_head *element;
  1027. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1028. priv->frames_count);
  1029. while (!list_empty(&priv->free_frames)) {
  1030. element = priv->free_frames.next;
  1031. list_del(element);
  1032. kfree(list_entry(element, struct iwl4965_frame, list));
  1033. priv->frames_count--;
  1034. }
  1035. if (priv->frames_count) {
  1036. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1037. priv->frames_count);
  1038. priv->frames_count = 0;
  1039. }
  1040. }
  1041. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
  1042. {
  1043. struct iwl4965_frame *frame;
  1044. struct list_head *element;
  1045. if (list_empty(&priv->free_frames)) {
  1046. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1047. if (!frame) {
  1048. IWL_ERROR("Could not allocate frame!\n");
  1049. return NULL;
  1050. }
  1051. priv->frames_count++;
  1052. return frame;
  1053. }
  1054. element = priv->free_frames.next;
  1055. list_del(element);
  1056. return list_entry(element, struct iwl4965_frame, list);
  1057. }
  1058. static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
  1059. {
  1060. memset(frame, 0, sizeof(*frame));
  1061. list_add(&frame->list, &priv->free_frames);
  1062. }
  1063. unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
  1064. struct ieee80211_hdr *hdr,
  1065. const u8 *dest, int left)
  1066. {
  1067. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  1068. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1069. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1070. return 0;
  1071. if (priv->ibss_beacon->len > left)
  1072. return 0;
  1073. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1074. return priv->ibss_beacon->len;
  1075. }
  1076. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1077. {
  1078. u8 i;
  1079. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1080. i = iwl4965_rates[i].next_ieee) {
  1081. if (rate_mask & (1 << i))
  1082. return iwl4965_rates[i].plcp;
  1083. }
  1084. return IWL_RATE_INVALID;
  1085. }
  1086. static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
  1087. {
  1088. struct iwl4965_frame *frame;
  1089. unsigned int frame_size;
  1090. int rc;
  1091. u8 rate;
  1092. frame = iwl4965_get_free_frame(priv);
  1093. if (!frame) {
  1094. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1095. "command.\n");
  1096. return -ENOMEM;
  1097. }
  1098. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1099. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1100. 0xFF0);
  1101. if (rate == IWL_INVALID_RATE)
  1102. rate = IWL_RATE_6M_PLCP;
  1103. } else {
  1104. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1105. if (rate == IWL_INVALID_RATE)
  1106. rate = IWL_RATE_1M_PLCP;
  1107. }
  1108. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1109. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1110. &frame->u.cmd[0]);
  1111. iwl4965_free_frame(priv, frame);
  1112. return rc;
  1113. }
  1114. /******************************************************************************
  1115. *
  1116. * Misc. internal state and helper functions
  1117. *
  1118. ******************************************************************************/
  1119. static void iwl4965_unset_hw_setting(struct iwl_priv *priv)
  1120. {
  1121. if (priv->hw_setting.shared_virt)
  1122. pci_free_consistent(priv->pci_dev,
  1123. sizeof(struct iwl4965_shared),
  1124. priv->hw_setting.shared_virt,
  1125. priv->hw_setting.shared_phys);
  1126. }
  1127. /**
  1128. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1129. *
  1130. * return : set the bit for each supported rate insert in ie
  1131. */
  1132. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1133. u16 basic_rate, int *left)
  1134. {
  1135. u16 ret_rates = 0, bit;
  1136. int i;
  1137. u8 *cnt = ie;
  1138. u8 *rates = ie + 1;
  1139. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1140. if (bit & supported_rate) {
  1141. ret_rates |= bit;
  1142. rates[*cnt] = iwl4965_rates[i].ieee |
  1143. ((bit & basic_rate) ? 0x80 : 0x00);
  1144. (*cnt)++;
  1145. (*left)--;
  1146. if ((*left <= 0) ||
  1147. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1148. break;
  1149. }
  1150. }
  1151. return ret_rates;
  1152. }
  1153. /**
  1154. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1155. */
  1156. static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
  1157. enum ieee80211_band band,
  1158. struct ieee80211_mgmt *frame,
  1159. int left, int is_direct)
  1160. {
  1161. int len = 0;
  1162. u8 *pos = NULL;
  1163. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1164. #ifdef CONFIG_IWL4965_HT
  1165. const struct ieee80211_supported_band *sband =
  1166. iwl4965_get_hw_mode(priv, band);
  1167. #endif /* CONFIG_IWL4965_HT */
  1168. /* Make sure there is enough space for the probe request,
  1169. * two mandatory IEs and the data */
  1170. left -= 24;
  1171. if (left < 0)
  1172. return 0;
  1173. len += 24;
  1174. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1175. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1176. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1177. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1178. frame->seq_ctrl = 0;
  1179. /* fill in our indirect SSID IE */
  1180. /* ...next IE... */
  1181. left -= 2;
  1182. if (left < 0)
  1183. return 0;
  1184. len += 2;
  1185. pos = &(frame->u.probe_req.variable[0]);
  1186. *pos++ = WLAN_EID_SSID;
  1187. *pos++ = 0;
  1188. /* fill in our direct SSID IE... */
  1189. if (is_direct) {
  1190. /* ...next IE... */
  1191. left -= 2 + priv->essid_len;
  1192. if (left < 0)
  1193. return 0;
  1194. /* ... fill it in... */
  1195. *pos++ = WLAN_EID_SSID;
  1196. *pos++ = priv->essid_len;
  1197. memcpy(pos, priv->essid, priv->essid_len);
  1198. pos += priv->essid_len;
  1199. len += 2 + priv->essid_len;
  1200. }
  1201. /* fill in supported rate */
  1202. /* ...next IE... */
  1203. left -= 2;
  1204. if (left < 0)
  1205. return 0;
  1206. /* ... fill it in... */
  1207. *pos++ = WLAN_EID_SUPP_RATES;
  1208. *pos = 0;
  1209. /* exclude 60M rate */
  1210. active_rates = priv->rates_mask;
  1211. active_rates &= ~IWL_RATE_60M_MASK;
  1212. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1213. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1214. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1215. active_rate_basic, &left);
  1216. active_rates &= ~ret_rates;
  1217. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1218. active_rate_basic, &left);
  1219. active_rates &= ~ret_rates;
  1220. len += 2 + *pos;
  1221. pos += (*pos) + 1;
  1222. if (active_rates == 0)
  1223. goto fill_end;
  1224. /* fill in supported extended rate */
  1225. /* ...next IE... */
  1226. left -= 2;
  1227. if (left < 0)
  1228. return 0;
  1229. /* ... fill it in... */
  1230. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1231. *pos = 0;
  1232. iwl4965_supported_rate_to_ie(pos, active_rates,
  1233. active_rate_basic, &left);
  1234. if (*pos > 0)
  1235. len += 2 + *pos;
  1236. #ifdef CONFIG_IWL4965_HT
  1237. if (sband && sband->ht_info.ht_supported) {
  1238. struct ieee80211_ht_cap *ht_cap;
  1239. pos += (*pos) + 1;
  1240. *pos++ = WLAN_EID_HT_CAPABILITY;
  1241. *pos++ = sizeof(struct ieee80211_ht_cap);
  1242. ht_cap = (struct ieee80211_ht_cap *)pos;
  1243. ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
  1244. memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
  1245. ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
  1246. IEEE80211_HT_CAP_AMPDU_FACTOR) |
  1247. ((sband->ht_info.ampdu_density << 2) &
  1248. IEEE80211_HT_CAP_AMPDU_DENSITY);
  1249. len += 2 + sizeof(struct ieee80211_ht_cap);
  1250. }
  1251. #endif /*CONFIG_IWL4965_HT */
  1252. fill_end:
  1253. return (u16)len;
  1254. }
  1255. /*
  1256. * QoS support
  1257. */
  1258. static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
  1259. struct iwl4965_qosparam_cmd *qos)
  1260. {
  1261. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1262. sizeof(struct iwl4965_qosparam_cmd), qos);
  1263. }
  1264. static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
  1265. {
  1266. unsigned long flags;
  1267. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1268. return;
  1269. if (!priv->qos_data.qos_enable)
  1270. return;
  1271. spin_lock_irqsave(&priv->lock, flags);
  1272. priv->qos_data.def_qos_parm.qos_flags = 0;
  1273. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1274. !priv->qos_data.qos_cap.q_AP.txop_request)
  1275. priv->qos_data.def_qos_parm.qos_flags |=
  1276. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1277. if (priv->qos_data.qos_active)
  1278. priv->qos_data.def_qos_parm.qos_flags |=
  1279. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1280. #ifdef CONFIG_IWL4965_HT
  1281. if (priv->current_ht_config.is_ht)
  1282. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1283. #endif /* CONFIG_IWL4965_HT */
  1284. spin_unlock_irqrestore(&priv->lock, flags);
  1285. if (force || iwl_is_associated(priv)) {
  1286. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1287. priv->qos_data.qos_active,
  1288. priv->qos_data.def_qos_parm.qos_flags);
  1289. iwl4965_send_qos_params_command(priv,
  1290. &(priv->qos_data.def_qos_parm));
  1291. }
  1292. }
  1293. /*
  1294. * Power management (not Tx power!) functions
  1295. */
  1296. #define MSEC_TO_USEC 1024
  1297. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1298. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1299. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1300. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1301. __constant_cpu_to_le32(X1), \
  1302. __constant_cpu_to_le32(X2), \
  1303. __constant_cpu_to_le32(X3), \
  1304. __constant_cpu_to_le32(X4)}
  1305. /* default power management (not Tx power) table values */
  1306. /* for tim 0-10 */
  1307. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1308. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1309. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1310. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1311. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1312. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1313. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1314. };
  1315. /* for tim > 10 */
  1316. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1317. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1318. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1319. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1320. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1321. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1322. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1323. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1324. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1325. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1326. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1327. };
  1328. int iwl4965_power_init_handle(struct iwl_priv *priv)
  1329. {
  1330. int rc = 0, i;
  1331. struct iwl4965_power_mgr *pow_data;
  1332. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1333. u16 pci_pm;
  1334. IWL_DEBUG_POWER("Initialize power \n");
  1335. pow_data = &(priv->power_data);
  1336. memset(pow_data, 0, sizeof(*pow_data));
  1337. pow_data->active_index = IWL_POWER_RANGE_0;
  1338. pow_data->dtim_val = 0xffff;
  1339. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1340. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1341. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1342. if (rc != 0)
  1343. return 0;
  1344. else {
  1345. struct iwl4965_powertable_cmd *cmd;
  1346. IWL_DEBUG_POWER("adjust power command flags\n");
  1347. for (i = 0; i < IWL_POWER_AC; i++) {
  1348. cmd = &pow_data->pwr_range_0[i].cmd;
  1349. if (pci_pm & 0x1)
  1350. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1351. else
  1352. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1353. }
  1354. }
  1355. return rc;
  1356. }
  1357. static int iwl4965_update_power_cmd(struct iwl_priv *priv,
  1358. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1359. {
  1360. int rc = 0, i;
  1361. u8 skip;
  1362. u32 max_sleep = 0;
  1363. struct iwl4965_power_vec_entry *range;
  1364. u8 period = 0;
  1365. struct iwl4965_power_mgr *pow_data;
  1366. if (mode > IWL_POWER_INDEX_5) {
  1367. IWL_DEBUG_POWER("Error invalid power mode \n");
  1368. return -1;
  1369. }
  1370. pow_data = &(priv->power_data);
  1371. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1372. range = &pow_data->pwr_range_0[0];
  1373. else
  1374. range = &pow_data->pwr_range_1[1];
  1375. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1376. #ifdef IWL_MAC80211_DISABLE
  1377. if (priv->assoc_network != NULL) {
  1378. unsigned long flags;
  1379. period = priv->assoc_network->tim.tim_period;
  1380. }
  1381. #endif /*IWL_MAC80211_DISABLE */
  1382. skip = range[mode].no_dtim;
  1383. if (period == 0) {
  1384. period = 1;
  1385. skip = 0;
  1386. }
  1387. if (skip == 0) {
  1388. max_sleep = period;
  1389. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1390. } else {
  1391. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1392. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1393. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1394. }
  1395. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1396. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1397. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1398. }
  1399. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1400. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1401. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1402. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1403. le32_to_cpu(cmd->sleep_interval[0]),
  1404. le32_to_cpu(cmd->sleep_interval[1]),
  1405. le32_to_cpu(cmd->sleep_interval[2]),
  1406. le32_to_cpu(cmd->sleep_interval[3]),
  1407. le32_to_cpu(cmd->sleep_interval[4]));
  1408. return rc;
  1409. }
  1410. static int iwl4965_send_power_mode(struct iwl_priv *priv, u32 mode)
  1411. {
  1412. u32 uninitialized_var(final_mode);
  1413. int rc;
  1414. struct iwl4965_powertable_cmd cmd;
  1415. /* If on battery, set to 3,
  1416. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1417. * else user level */
  1418. switch (mode) {
  1419. case IWL_POWER_BATTERY:
  1420. final_mode = IWL_POWER_INDEX_3;
  1421. break;
  1422. case IWL_POWER_AC:
  1423. final_mode = IWL_POWER_MODE_CAM;
  1424. break;
  1425. default:
  1426. final_mode = mode;
  1427. break;
  1428. }
  1429. cmd.keep_alive_beacons = 0;
  1430. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1431. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1432. if (final_mode == IWL_POWER_MODE_CAM)
  1433. clear_bit(STATUS_POWER_PMI, &priv->status);
  1434. else
  1435. set_bit(STATUS_POWER_PMI, &priv->status);
  1436. return rc;
  1437. }
  1438. int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1439. {
  1440. /* Filter incoming packets to determine if they are targeted toward
  1441. * this network, discarding packets coming from ourselves */
  1442. switch (priv->iw_mode) {
  1443. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1444. /* packets from our adapter are dropped (echo) */
  1445. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1446. return 0;
  1447. /* {broad,multi}cast packets to our IBSS go through */
  1448. if (is_multicast_ether_addr(header->addr1))
  1449. return !compare_ether_addr(header->addr3, priv->bssid);
  1450. /* packets to our adapter go through */
  1451. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1452. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1453. /* packets from our adapter are dropped (echo) */
  1454. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1455. return 0;
  1456. /* {broad,multi}cast packets to our BSS go through */
  1457. if (is_multicast_ether_addr(header->addr1))
  1458. return !compare_ether_addr(header->addr2, priv->bssid);
  1459. /* packets to our adapter go through */
  1460. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1461. default:
  1462. break;
  1463. }
  1464. return 1;
  1465. }
  1466. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1467. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1468. {
  1469. switch (status & TX_STATUS_MSK) {
  1470. case TX_STATUS_SUCCESS:
  1471. return "SUCCESS";
  1472. TX_STATUS_ENTRY(SHORT_LIMIT);
  1473. TX_STATUS_ENTRY(LONG_LIMIT);
  1474. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1475. TX_STATUS_ENTRY(MGMNT_ABORT);
  1476. TX_STATUS_ENTRY(NEXT_FRAG);
  1477. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1478. TX_STATUS_ENTRY(DEST_PS);
  1479. TX_STATUS_ENTRY(ABORTED);
  1480. TX_STATUS_ENTRY(BT_RETRY);
  1481. TX_STATUS_ENTRY(STA_INVALID);
  1482. TX_STATUS_ENTRY(FRAG_DROPPED);
  1483. TX_STATUS_ENTRY(TID_DISABLE);
  1484. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1485. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1486. TX_STATUS_ENTRY(TX_LOCKED);
  1487. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1488. }
  1489. return "UNKNOWN";
  1490. }
  1491. /**
  1492. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1493. *
  1494. * NOTE: priv->mutex is not required before calling this function
  1495. */
  1496. static int iwl4965_scan_cancel(struct iwl_priv *priv)
  1497. {
  1498. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1499. clear_bit(STATUS_SCANNING, &priv->status);
  1500. return 0;
  1501. }
  1502. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1503. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1504. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1505. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1506. queue_work(priv->workqueue, &priv->abort_scan);
  1507. } else
  1508. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1509. return test_bit(STATUS_SCANNING, &priv->status);
  1510. }
  1511. return 0;
  1512. }
  1513. /**
  1514. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  1515. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1516. *
  1517. * NOTE: priv->mutex must be held before calling this function
  1518. */
  1519. static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1520. {
  1521. unsigned long now = jiffies;
  1522. int ret;
  1523. ret = iwl4965_scan_cancel(priv);
  1524. if (ret && ms) {
  1525. mutex_unlock(&priv->mutex);
  1526. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1527. test_bit(STATUS_SCANNING, &priv->status))
  1528. msleep(1);
  1529. mutex_lock(&priv->mutex);
  1530. return test_bit(STATUS_SCANNING, &priv->status);
  1531. }
  1532. return ret;
  1533. }
  1534. static void iwl4965_sequence_reset(struct iwl_priv *priv)
  1535. {
  1536. /* Reset ieee stats */
  1537. /* We don't reset the net_device_stats (ieee->stats) on
  1538. * re-association */
  1539. priv->last_seq_num = -1;
  1540. priv->last_frag_num = -1;
  1541. priv->last_packet_time = 0;
  1542. iwl4965_scan_cancel(priv);
  1543. }
  1544. #define MAX_UCODE_BEACON_INTERVAL 4096
  1545. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1546. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  1547. {
  1548. u16 new_val = 0;
  1549. u16 beacon_factor = 0;
  1550. beacon_factor =
  1551. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1552. / MAX_UCODE_BEACON_INTERVAL;
  1553. new_val = beacon_val / beacon_factor;
  1554. return cpu_to_le16(new_val);
  1555. }
  1556. static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
  1557. {
  1558. u64 interval_tm_unit;
  1559. u64 tsf, result;
  1560. unsigned long flags;
  1561. struct ieee80211_conf *conf = NULL;
  1562. u16 beacon_int = 0;
  1563. conf = ieee80211_get_hw_conf(priv->hw);
  1564. spin_lock_irqsave(&priv->lock, flags);
  1565. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32);
  1566. priv->rxon_timing.timestamp.dw[0] =
  1567. cpu_to_le32(priv->timestamp & 0xFFFFFFFF);
  1568. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1569. tsf = priv->timestamp;
  1570. beacon_int = priv->beacon_int;
  1571. spin_unlock_irqrestore(&priv->lock, flags);
  1572. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1573. if (beacon_int == 0) {
  1574. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1575. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1576. } else {
  1577. priv->rxon_timing.beacon_interval =
  1578. cpu_to_le16(beacon_int);
  1579. priv->rxon_timing.beacon_interval =
  1580. iwl4965_adjust_beacon_interval(
  1581. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1582. }
  1583. priv->rxon_timing.atim_window = 0;
  1584. } else {
  1585. priv->rxon_timing.beacon_interval =
  1586. iwl4965_adjust_beacon_interval(conf->beacon_int);
  1587. /* TODO: we need to get atim_window from upper stack
  1588. * for now we set to 0 */
  1589. priv->rxon_timing.atim_window = 0;
  1590. }
  1591. interval_tm_unit =
  1592. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1593. result = do_div(tsf, interval_tm_unit);
  1594. priv->rxon_timing.beacon_init_val =
  1595. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1596. IWL_DEBUG_ASSOC
  1597. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1598. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1599. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1600. le16_to_cpu(priv->rxon_timing.atim_window));
  1601. }
  1602. static int iwl4965_scan_initiate(struct iwl_priv *priv)
  1603. {
  1604. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1605. IWL_ERROR("APs don't scan.\n");
  1606. return 0;
  1607. }
  1608. if (!iwl_is_ready_rf(priv)) {
  1609. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1610. return -EIO;
  1611. }
  1612. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1613. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1614. return -EAGAIN;
  1615. }
  1616. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1617. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1618. "Queuing.\n");
  1619. return -EAGAIN;
  1620. }
  1621. IWL_DEBUG_INFO("Starting scan...\n");
  1622. priv->scan_bands = 2;
  1623. set_bit(STATUS_SCANNING, &priv->status);
  1624. priv->scan_start = jiffies;
  1625. priv->scan_pass_start = priv->scan_start;
  1626. queue_work(priv->workqueue, &priv->request_scan);
  1627. return 0;
  1628. }
  1629. static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
  1630. enum ieee80211_band band)
  1631. {
  1632. if (band == IEEE80211_BAND_5GHZ) {
  1633. priv->staging_rxon.flags &=
  1634. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1635. | RXON_FLG_CCK_MSK);
  1636. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1637. } else {
  1638. /* Copied from iwl4965_bg_post_associate() */
  1639. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1640. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1641. else
  1642. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1643. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  1644. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1645. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1646. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1647. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1648. }
  1649. }
  1650. /*
  1651. * initialize rxon structure with default values from eeprom
  1652. */
  1653. static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
  1654. {
  1655. const struct iwl_channel_info *ch_info;
  1656. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  1657. switch (priv->iw_mode) {
  1658. case IEEE80211_IF_TYPE_AP:
  1659. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  1660. break;
  1661. case IEEE80211_IF_TYPE_STA:
  1662. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1663. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1664. break;
  1665. case IEEE80211_IF_TYPE_IBSS:
  1666. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1667. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1668. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1669. RXON_FILTER_ACCEPT_GRP_MSK;
  1670. break;
  1671. case IEEE80211_IF_TYPE_MNTR:
  1672. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1673. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1674. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1675. break;
  1676. default:
  1677. IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
  1678. break;
  1679. }
  1680. #if 0
  1681. /* TODO: Figure out when short_preamble would be set and cache from
  1682. * that */
  1683. if (!hw_to_local(priv->hw)->short_preamble)
  1684. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1685. else
  1686. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1687. #endif
  1688. ch_info = iwl_get_channel_info(priv, priv->band,
  1689. le16_to_cpu(priv->staging_rxon.channel));
  1690. if (!ch_info)
  1691. ch_info = &priv->channel_info[0];
  1692. /*
  1693. * in some case A channels are all non IBSS
  1694. * in this case force B/G channel
  1695. */
  1696. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  1697. !(is_channel_ibss(ch_info)))
  1698. ch_info = &priv->channel_info[0];
  1699. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  1700. priv->band = ch_info->band;
  1701. iwl4965_set_flags_for_phymode(priv, priv->band);
  1702. priv->staging_rxon.ofdm_basic_rates =
  1703. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1704. priv->staging_rxon.cck_basic_rates =
  1705. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1706. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  1707. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  1708. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1709. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  1710. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  1711. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  1712. iwl4965_set_rxon_chain(priv);
  1713. }
  1714. static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
  1715. {
  1716. if (mode == IEEE80211_IF_TYPE_IBSS) {
  1717. const struct iwl_channel_info *ch_info;
  1718. ch_info = iwl_get_channel_info(priv,
  1719. priv->band,
  1720. le16_to_cpu(priv->staging_rxon.channel));
  1721. if (!ch_info || !is_channel_ibss(ch_info)) {
  1722. IWL_ERROR("channel %d not IBSS channel\n",
  1723. le16_to_cpu(priv->staging_rxon.channel));
  1724. return -EINVAL;
  1725. }
  1726. }
  1727. priv->iw_mode = mode;
  1728. iwl4965_connection_init_rx_config(priv);
  1729. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1730. iwlcore_clear_stations_table(priv);
  1731. /* dont commit rxon if rf-kill is on*/
  1732. if (!iwl_is_ready_rf(priv))
  1733. return -EAGAIN;
  1734. cancel_delayed_work(&priv->scan_check);
  1735. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  1736. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  1737. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  1738. return -EAGAIN;
  1739. }
  1740. iwl4965_commit_rxon(priv);
  1741. return 0;
  1742. }
  1743. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  1744. struct ieee80211_tx_control *ctl,
  1745. struct iwl_cmd *cmd,
  1746. struct sk_buff *skb_frag,
  1747. int sta_id)
  1748. {
  1749. struct iwl4965_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  1750. switch (keyinfo->alg) {
  1751. case ALG_CCMP:
  1752. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  1753. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  1754. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  1755. cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
  1756. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  1757. break;
  1758. case ALG_TKIP:
  1759. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  1760. ieee80211_get_tkip_key(keyinfo->conf, skb_frag,
  1761. IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key);
  1762. IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n");
  1763. break;
  1764. case ALG_WEP:
  1765. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  1766. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  1767. if (keyinfo->keylen == 13)
  1768. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  1769. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  1770. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  1771. "with key %d\n", ctl->key_idx);
  1772. break;
  1773. default:
  1774. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  1775. break;
  1776. }
  1777. }
  1778. /*
  1779. * handle build REPLY_TX command notification.
  1780. */
  1781. static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
  1782. struct iwl_cmd *cmd,
  1783. struct ieee80211_tx_control *ctrl,
  1784. struct ieee80211_hdr *hdr,
  1785. int is_unicast, u8 std_id)
  1786. {
  1787. __le16 *qc;
  1788. u16 fc = le16_to_cpu(hdr->frame_control);
  1789. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  1790. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  1791. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  1792. tx_flags |= TX_CMD_FLG_ACK_MSK;
  1793. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  1794. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1795. if (ieee80211_is_probe_response(fc) &&
  1796. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  1797. tx_flags |= TX_CMD_FLG_TSF_MSK;
  1798. } else {
  1799. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  1800. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1801. }
  1802. if (ieee80211_is_back_request(fc))
  1803. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  1804. cmd->cmd.tx.sta_id = std_id;
  1805. if (ieee80211_get_morefrag(hdr))
  1806. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  1807. qc = ieee80211_get_qos_ctrl(hdr);
  1808. if (qc) {
  1809. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  1810. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  1811. } else
  1812. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1813. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  1814. tx_flags |= TX_CMD_FLG_RTS_MSK;
  1815. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  1816. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  1817. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  1818. tx_flags |= TX_CMD_FLG_CTS_MSK;
  1819. }
  1820. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  1821. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  1822. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  1823. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  1824. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  1825. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  1826. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  1827. else
  1828. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  1829. } else {
  1830. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  1831. }
  1832. cmd->cmd.tx.driver_txop = 0;
  1833. cmd->cmd.tx.tx_flags = tx_flags;
  1834. cmd->cmd.tx.next_frame_len = 0;
  1835. }
  1836. static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len)
  1837. {
  1838. /* 0 - mgmt, 1 - cnt, 2 - data */
  1839. int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
  1840. priv->tx_stats[idx].cnt++;
  1841. priv->tx_stats[idx].bytes += len;
  1842. }
  1843. /**
  1844. * iwl4965_get_sta_id - Find station's index within station table
  1845. *
  1846. * If new IBSS station, create new entry in station table
  1847. */
  1848. static int iwl4965_get_sta_id(struct iwl_priv *priv,
  1849. struct ieee80211_hdr *hdr)
  1850. {
  1851. int sta_id;
  1852. u16 fc = le16_to_cpu(hdr->frame_control);
  1853. DECLARE_MAC_BUF(mac);
  1854. /* If this frame is broadcast or management, use broadcast station id */
  1855. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  1856. is_multicast_ether_addr(hdr->addr1))
  1857. return priv->hw_setting.bcast_sta_id;
  1858. switch (priv->iw_mode) {
  1859. /* If we are a client station in a BSS network, use the special
  1860. * AP station entry (that's the only station we communicate with) */
  1861. case IEEE80211_IF_TYPE_STA:
  1862. return IWL_AP_ID;
  1863. /* If we are an AP, then find the station, or use BCAST */
  1864. case IEEE80211_IF_TYPE_AP:
  1865. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  1866. if (sta_id != IWL_INVALID_STATION)
  1867. return sta_id;
  1868. return priv->hw_setting.bcast_sta_id;
  1869. /* If this frame is going out to an IBSS network, find the station,
  1870. * or create a new station table entry */
  1871. case IEEE80211_IF_TYPE_IBSS:
  1872. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  1873. if (sta_id != IWL_INVALID_STATION)
  1874. return sta_id;
  1875. /* Create new station table entry */
  1876. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  1877. 0, CMD_ASYNC, NULL);
  1878. if (sta_id != IWL_INVALID_STATION)
  1879. return sta_id;
  1880. IWL_DEBUG_DROP("Station %s not in station map. "
  1881. "Defaulting to broadcast...\n",
  1882. print_mac(mac, hdr->addr1));
  1883. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  1884. return priv->hw_setting.bcast_sta_id;
  1885. default:
  1886. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  1887. return priv->hw_setting.bcast_sta_id;
  1888. }
  1889. }
  1890. /*
  1891. * start REPLY_TX command process
  1892. */
  1893. static int iwl4965_tx_skb(struct iwl_priv *priv,
  1894. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  1895. {
  1896. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1897. struct iwl4965_tfd_frame *tfd;
  1898. u32 *control_flags;
  1899. int txq_id = ctl->queue;
  1900. struct iwl4965_tx_queue *txq = NULL;
  1901. struct iwl4965_queue *q = NULL;
  1902. dma_addr_t phys_addr;
  1903. dma_addr_t txcmd_phys;
  1904. dma_addr_t scratch_phys;
  1905. struct iwl_cmd *out_cmd = NULL;
  1906. u16 len, idx, len_org;
  1907. u8 id, hdr_len, unicast;
  1908. u8 sta_id;
  1909. u16 seq_number = 0;
  1910. u16 fc;
  1911. __le16 *qc;
  1912. u8 wait_write_ptr = 0;
  1913. unsigned long flags;
  1914. int rc;
  1915. spin_lock_irqsave(&priv->lock, flags);
  1916. if (iwl_is_rfkill(priv)) {
  1917. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  1918. goto drop_unlock;
  1919. }
  1920. if (!priv->vif) {
  1921. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  1922. goto drop_unlock;
  1923. }
  1924. if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
  1925. IWL_ERROR("ERROR: No TX rate available.\n");
  1926. goto drop_unlock;
  1927. }
  1928. unicast = !is_multicast_ether_addr(hdr->addr1);
  1929. id = 0;
  1930. fc = le16_to_cpu(hdr->frame_control);
  1931. #ifdef CONFIG_IWLWIFI_DEBUG
  1932. if (ieee80211_is_auth(fc))
  1933. IWL_DEBUG_TX("Sending AUTH frame\n");
  1934. else if (ieee80211_is_assoc_request(fc))
  1935. IWL_DEBUG_TX("Sending ASSOC frame\n");
  1936. else if (ieee80211_is_reassoc_request(fc))
  1937. IWL_DEBUG_TX("Sending REASSOC frame\n");
  1938. #endif
  1939. /* drop all data frame if we are not associated */
  1940. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  1941. (!iwl_is_associated(priv) ||
  1942. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  1943. !priv->assoc_station_added)) {
  1944. IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
  1945. goto drop_unlock;
  1946. }
  1947. spin_unlock_irqrestore(&priv->lock, flags);
  1948. hdr_len = ieee80211_get_hdrlen(fc);
  1949. /* Find (or create) index into station table for destination station */
  1950. sta_id = iwl4965_get_sta_id(priv, hdr);
  1951. if (sta_id == IWL_INVALID_STATION) {
  1952. DECLARE_MAC_BUF(mac);
  1953. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  1954. print_mac(mac, hdr->addr1));
  1955. goto drop;
  1956. }
  1957. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  1958. qc = ieee80211_get_qos_ctrl(hdr);
  1959. if (qc) {
  1960. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  1961. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  1962. IEEE80211_SCTL_SEQ;
  1963. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  1964. (hdr->seq_ctrl &
  1965. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  1966. seq_number += 0x10;
  1967. #ifdef CONFIG_IWL4965_HT
  1968. /* aggregation is on for this <sta,tid> */
  1969. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  1970. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  1971. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  1972. #endif /* CONFIG_IWL4965_HT */
  1973. }
  1974. /* Descriptor for chosen Tx queue */
  1975. txq = &priv->txq[txq_id];
  1976. q = &txq->q;
  1977. spin_lock_irqsave(&priv->lock, flags);
  1978. /* Set up first empty TFD within this queue's circular TFD buffer */
  1979. tfd = &txq->bd[q->write_ptr];
  1980. memset(tfd, 0, sizeof(*tfd));
  1981. control_flags = (u32 *) tfd;
  1982. idx = get_cmd_index(q, q->write_ptr, 0);
  1983. /* Set up driver data for this TFD */
  1984. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  1985. txq->txb[q->write_ptr].skb[0] = skb;
  1986. memcpy(&(txq->txb[q->write_ptr].status.control),
  1987. ctl, sizeof(struct ieee80211_tx_control));
  1988. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  1989. out_cmd = &txq->cmd[idx];
  1990. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  1991. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  1992. /*
  1993. * Set up the Tx-command (not MAC!) header.
  1994. * Store the chosen Tx queue and TFD index within the sequence field;
  1995. * after Tx, uCode's Tx response will return this value so driver can
  1996. * locate the frame within the tx queue and do post-tx processing.
  1997. */
  1998. out_cmd->hdr.cmd = REPLY_TX;
  1999. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2000. INDEX_TO_SEQ(q->write_ptr)));
  2001. /* Copy MAC header from skb into command buffer */
  2002. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2003. /*
  2004. * Use the first empty entry in this queue's command buffer array
  2005. * to contain the Tx command and MAC header concatenated together
  2006. * (payload data will be in another buffer).
  2007. * Size of this varies, due to varying MAC header length.
  2008. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2009. * of the MAC header (device reads on dword boundaries).
  2010. * We'll tell device about this padding later.
  2011. */
  2012. len = priv->hw_setting.tx_cmd_len +
  2013. sizeof(struct iwl_cmd_header) + hdr_len;
  2014. len_org = len;
  2015. len = (len + 3) & ~3;
  2016. if (len_org != len)
  2017. len_org = 1;
  2018. else
  2019. len_org = 0;
  2020. /* Physical address of this Tx command's header (not MAC header!),
  2021. * within command buffer array. */
  2022. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
  2023. offsetof(struct iwl_cmd, hdr);
  2024. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2025. * first entry */
  2026. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2027. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2028. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id);
  2029. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2030. * if any (802.11 null frames have no payload). */
  2031. len = skb->len - hdr_len;
  2032. if (len) {
  2033. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2034. len, PCI_DMA_TODEVICE);
  2035. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2036. }
  2037. /* Tell 4965 about any 2-byte padding after MAC header */
  2038. if (len_org)
  2039. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2040. /* Total # bytes to be transmitted */
  2041. len = (u16)skb->len;
  2042. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2043. /* TODO need this for burst mode later on */
  2044. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2045. /* set is_hcca to 0; it probably will never be implemented */
  2046. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2047. iwl_update_tx_stats(priv, fc, len);
  2048. scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
  2049. offsetof(struct iwl4965_tx_cmd, scratch);
  2050. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2051. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2052. if (!ieee80211_get_morefrag(hdr)) {
  2053. txq->need_update = 1;
  2054. if (qc) {
  2055. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2056. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2057. }
  2058. } else {
  2059. wait_write_ptr = 1;
  2060. txq->need_update = 0;
  2061. }
  2062. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2063. sizeof(out_cmd->cmd.tx));
  2064. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2065. ieee80211_get_hdrlen(fc));
  2066. /* Set up entry for this TFD in Tx byte-count array */
  2067. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2068. /* Tell device the write index *just past* this latest filled TFD */
  2069. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  2070. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2071. spin_unlock_irqrestore(&priv->lock, flags);
  2072. if (rc)
  2073. return rc;
  2074. if ((iwl4965_queue_space(q) < q->high_mark)
  2075. && priv->mac80211_registered) {
  2076. if (wait_write_ptr) {
  2077. spin_lock_irqsave(&priv->lock, flags);
  2078. txq->need_update = 1;
  2079. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2080. spin_unlock_irqrestore(&priv->lock, flags);
  2081. }
  2082. ieee80211_stop_queue(priv->hw, ctl->queue);
  2083. }
  2084. return 0;
  2085. drop_unlock:
  2086. spin_unlock_irqrestore(&priv->lock, flags);
  2087. drop:
  2088. return -1;
  2089. }
  2090. static void iwl4965_set_rate(struct iwl_priv *priv)
  2091. {
  2092. const struct ieee80211_supported_band *hw = NULL;
  2093. struct ieee80211_rate *rate;
  2094. int i;
  2095. hw = iwl4965_get_hw_mode(priv, priv->band);
  2096. if (!hw) {
  2097. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2098. return;
  2099. }
  2100. priv->active_rate = 0;
  2101. priv->active_rate_basic = 0;
  2102. for (i = 0; i < hw->n_bitrates; i++) {
  2103. rate = &(hw->bitrates[i]);
  2104. if (rate->hw_value < IWL_RATE_COUNT)
  2105. priv->active_rate |= (1 << rate->hw_value);
  2106. }
  2107. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2108. priv->active_rate, priv->active_rate_basic);
  2109. /*
  2110. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2111. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2112. * OFDM
  2113. */
  2114. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2115. priv->staging_rxon.cck_basic_rates =
  2116. ((priv->active_rate_basic &
  2117. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2118. else
  2119. priv->staging_rxon.cck_basic_rates =
  2120. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2121. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2122. priv->staging_rxon.ofdm_basic_rates =
  2123. ((priv->active_rate_basic &
  2124. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2125. IWL_FIRST_OFDM_RATE) & 0xFF;
  2126. else
  2127. priv->staging_rxon.ofdm_basic_rates =
  2128. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2129. }
  2130. void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2131. {
  2132. unsigned long flags;
  2133. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2134. return;
  2135. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2136. disable_radio ? "OFF" : "ON");
  2137. if (disable_radio) {
  2138. iwl4965_scan_cancel(priv);
  2139. /* FIXME: This is a workaround for AP */
  2140. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2141. spin_lock_irqsave(&priv->lock, flags);
  2142. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2143. CSR_UCODE_SW_BIT_RFKILL);
  2144. spin_unlock_irqrestore(&priv->lock, flags);
  2145. /* call the host command only if no hw rf-kill set */
  2146. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  2147. iwl4965_send_card_state(priv,
  2148. CARD_STATE_CMD_DISABLE,
  2149. 0);
  2150. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2151. /* make sure mac80211 stop sending Tx frame */
  2152. if (priv->mac80211_registered)
  2153. ieee80211_stop_queues(priv->hw);
  2154. }
  2155. return;
  2156. }
  2157. spin_lock_irqsave(&priv->lock, flags);
  2158. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2159. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2160. spin_unlock_irqrestore(&priv->lock, flags);
  2161. /* wake up ucode */
  2162. msleep(10);
  2163. spin_lock_irqsave(&priv->lock, flags);
  2164. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2165. if (!iwl_grab_nic_access(priv))
  2166. iwl_release_nic_access(priv);
  2167. spin_unlock_irqrestore(&priv->lock, flags);
  2168. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2169. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2170. "disabled by HW switch\n");
  2171. return;
  2172. }
  2173. queue_work(priv->workqueue, &priv->restart);
  2174. return;
  2175. }
  2176. void iwl4965_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2177. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2178. {
  2179. u16 fc =
  2180. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2181. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2182. return;
  2183. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2184. return;
  2185. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2186. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2187. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2188. /* The uCode has got a bad phase 1 Key, pushes the packet.
  2189. * Decryption will be done in SW. */
  2190. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2191. RX_RES_STATUS_BAD_KEY_TTAK)
  2192. break;
  2193. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2194. RX_RES_STATUS_BAD_ICV_MIC)
  2195. stats->flag |= RX_FLAG_MMIC_ERROR;
  2196. case RX_RES_STATUS_SEC_TYPE_WEP:
  2197. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2198. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2199. RX_RES_STATUS_DECRYPT_OK) {
  2200. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2201. stats->flag |= RX_FLAG_DECRYPTED;
  2202. }
  2203. break;
  2204. default:
  2205. break;
  2206. }
  2207. }
  2208. #define IWL_PACKET_RETRY_TIME HZ
  2209. int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2210. {
  2211. u16 sc = le16_to_cpu(header->seq_ctrl);
  2212. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2213. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2214. u16 *last_seq, *last_frag;
  2215. unsigned long *last_time;
  2216. switch (priv->iw_mode) {
  2217. case IEEE80211_IF_TYPE_IBSS:{
  2218. struct list_head *p;
  2219. struct iwl4965_ibss_seq *entry = NULL;
  2220. u8 *mac = header->addr2;
  2221. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2222. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2223. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2224. if (!compare_ether_addr(entry->mac, mac))
  2225. break;
  2226. }
  2227. if (p == &priv->ibss_mac_hash[index]) {
  2228. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2229. if (!entry) {
  2230. IWL_ERROR("Cannot malloc new mac entry\n");
  2231. return 0;
  2232. }
  2233. memcpy(entry->mac, mac, ETH_ALEN);
  2234. entry->seq_num = seq;
  2235. entry->frag_num = frag;
  2236. entry->packet_time = jiffies;
  2237. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2238. return 0;
  2239. }
  2240. last_seq = &entry->seq_num;
  2241. last_frag = &entry->frag_num;
  2242. last_time = &entry->packet_time;
  2243. break;
  2244. }
  2245. case IEEE80211_IF_TYPE_STA:
  2246. last_seq = &priv->last_seq_num;
  2247. last_frag = &priv->last_frag_num;
  2248. last_time = &priv->last_packet_time;
  2249. break;
  2250. default:
  2251. return 0;
  2252. }
  2253. if ((*last_seq == seq) &&
  2254. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2255. if (*last_frag == frag)
  2256. goto drop;
  2257. if (*last_frag + 1 != frag)
  2258. /* out-of-order fragment */
  2259. goto drop;
  2260. } else
  2261. *last_seq = seq;
  2262. *last_frag = frag;
  2263. *last_time = jiffies;
  2264. return 0;
  2265. drop:
  2266. return 1;
  2267. }
  2268. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2269. #include "iwl-spectrum.h"
  2270. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2271. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2272. #define TIME_UNIT 1024
  2273. /*
  2274. * extended beacon time format
  2275. * time in usec will be changed into a 32-bit value in 8:24 format
  2276. * the high 1 byte is the beacon counts
  2277. * the lower 3 bytes is the time in usec within one beacon interval
  2278. */
  2279. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2280. {
  2281. u32 quot;
  2282. u32 rem;
  2283. u32 interval = beacon_interval * 1024;
  2284. if (!interval || !usec)
  2285. return 0;
  2286. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2287. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2288. return (quot << 24) + rem;
  2289. }
  2290. /* base is usually what we get from ucode with each received frame,
  2291. * the same as HW timer counter counting down
  2292. */
  2293. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2294. {
  2295. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2296. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2297. u32 interval = beacon_interval * TIME_UNIT;
  2298. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2299. (addon & BEACON_TIME_MASK_HIGH);
  2300. if (base_low > addon_low)
  2301. res += base_low - addon_low;
  2302. else if (base_low < addon_low) {
  2303. res += interval + base_low - addon_low;
  2304. res += (1 << 24);
  2305. } else
  2306. res += (1 << 24);
  2307. return cpu_to_le32(res);
  2308. }
  2309. static int iwl4965_get_measurement(struct iwl_priv *priv,
  2310. struct ieee80211_measurement_params *params,
  2311. u8 type)
  2312. {
  2313. struct iwl4965_spectrum_cmd spectrum;
  2314. struct iwl4965_rx_packet *res;
  2315. struct iwl_host_cmd cmd = {
  2316. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2317. .data = (void *)&spectrum,
  2318. .meta.flags = CMD_WANT_SKB,
  2319. };
  2320. u32 add_time = le64_to_cpu(params->start_time);
  2321. int rc;
  2322. int spectrum_resp_status;
  2323. int duration = le16_to_cpu(params->duration);
  2324. if (iwl_is_associated(priv))
  2325. add_time =
  2326. iwl4965_usecs_to_beacons(
  2327. le64_to_cpu(params->start_time) - priv->last_tsf,
  2328. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2329. memset(&spectrum, 0, sizeof(spectrum));
  2330. spectrum.channel_count = cpu_to_le16(1);
  2331. spectrum.flags =
  2332. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2333. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2334. cmd.len = sizeof(spectrum);
  2335. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2336. if (iwl_is_associated(priv))
  2337. spectrum.start_time =
  2338. iwl4965_add_beacon_time(priv->last_beacon_time,
  2339. add_time,
  2340. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2341. else
  2342. spectrum.start_time = 0;
  2343. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2344. spectrum.channels[0].channel = params->channel;
  2345. spectrum.channels[0].type = type;
  2346. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2347. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2348. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2349. rc = iwl_send_cmd_sync(priv, &cmd);
  2350. if (rc)
  2351. return rc;
  2352. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2353. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2354. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2355. rc = -EIO;
  2356. }
  2357. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2358. switch (spectrum_resp_status) {
  2359. case 0: /* Command will be handled */
  2360. if (res->u.spectrum.id != 0xff) {
  2361. IWL_DEBUG_INFO
  2362. ("Replaced existing measurement: %d\n",
  2363. res->u.spectrum.id);
  2364. priv->measurement_status &= ~MEASUREMENT_READY;
  2365. }
  2366. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2367. rc = 0;
  2368. break;
  2369. case 1: /* Command will not be handled */
  2370. rc = -EAGAIN;
  2371. break;
  2372. }
  2373. dev_kfree_skb_any(cmd.meta.u.skb);
  2374. return rc;
  2375. }
  2376. #endif
  2377. static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
  2378. struct iwl4965_tx_info *tx_sta)
  2379. {
  2380. tx_sta->status.ack_signal = 0;
  2381. tx_sta->status.excessive_retries = 0;
  2382. tx_sta->status.queue_length = 0;
  2383. tx_sta->status.queue_number = 0;
  2384. if (in_interrupt())
  2385. ieee80211_tx_status_irqsafe(priv->hw,
  2386. tx_sta->skb[0], &(tx_sta->status));
  2387. else
  2388. ieee80211_tx_status(priv->hw,
  2389. tx_sta->skb[0], &(tx_sta->status));
  2390. tx_sta->skb[0] = NULL;
  2391. }
  2392. /**
  2393. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2394. *
  2395. * When FW advances 'R' index, all entries between old and new 'R' index
  2396. * need to be reclaimed. As result, some free space forms. If there is
  2397. * enough free space (> low mark), wake the stack that feeds us.
  2398. */
  2399. int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2400. {
  2401. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2402. struct iwl4965_queue *q = &txq->q;
  2403. int nfreed = 0;
  2404. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2405. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2406. "is out of range [0-%d] %d %d.\n", txq_id,
  2407. index, q->n_bd, q->write_ptr, q->read_ptr);
  2408. return 0;
  2409. }
  2410. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2411. q->read_ptr != index;
  2412. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2413. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2414. iwl4965_txstatus_to_ieee(priv,
  2415. &(txq->txb[txq->q.read_ptr]));
  2416. iwl4965_hw_txq_free_tfd(priv, txq);
  2417. } else if (nfreed > 1) {
  2418. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2419. q->write_ptr, q->read_ptr);
  2420. queue_work(priv->workqueue, &priv->restart);
  2421. }
  2422. nfreed++;
  2423. }
  2424. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2425. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2426. priv->mac80211_registered)
  2427. ieee80211_wake_queue(priv->hw, txq_id); */
  2428. return nfreed;
  2429. }
  2430. static int iwl4965_is_tx_success(u32 status)
  2431. {
  2432. status &= TX_STATUS_MSK;
  2433. return (status == TX_STATUS_SUCCESS)
  2434. || (status == TX_STATUS_DIRECT_DONE);
  2435. }
  2436. /******************************************************************************
  2437. *
  2438. * Generic RX handler implementations
  2439. *
  2440. ******************************************************************************/
  2441. #ifdef CONFIG_IWL4965_HT
  2442. static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
  2443. struct ieee80211_hdr *hdr)
  2444. {
  2445. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2446. return IWL_AP_ID;
  2447. else {
  2448. u8 *da = ieee80211_get_DA(hdr);
  2449. return iwl4965_hw_find_station(priv, da);
  2450. }
  2451. }
  2452. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2453. struct iwl_priv *priv, int txq_id, int idx)
  2454. {
  2455. if (priv->txq[txq_id].txb[idx].skb[0])
  2456. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2457. txb[idx].skb[0]->data;
  2458. return NULL;
  2459. }
  2460. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2461. {
  2462. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2463. tx_resp->frame_count);
  2464. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2465. }
  2466. /**
  2467. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2468. */
  2469. static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
  2470. struct iwl4965_ht_agg *agg,
  2471. struct iwl4965_tx_resp_agg *tx_resp,
  2472. u16 start_idx)
  2473. {
  2474. u16 status;
  2475. struct agg_tx_status *frame_status = &tx_resp->status;
  2476. struct ieee80211_tx_status *tx_status = NULL;
  2477. struct ieee80211_hdr *hdr = NULL;
  2478. int i, sh;
  2479. int txq_id, idx;
  2480. u16 seq;
  2481. if (agg->wait_for_ba)
  2482. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2483. agg->frame_count = tx_resp->frame_count;
  2484. agg->start_idx = start_idx;
  2485. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2486. agg->bitmap = 0;
  2487. /* # frames attempted by Tx command */
  2488. if (agg->frame_count == 1) {
  2489. /* Only one frame was attempted; no block-ack will arrive */
  2490. status = le16_to_cpu(frame_status[0].status);
  2491. seq = le16_to_cpu(frame_status[0].sequence);
  2492. idx = SEQ_TO_INDEX(seq);
  2493. txq_id = SEQ_TO_QUEUE(seq);
  2494. /* FIXME: code repetition */
  2495. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  2496. agg->frame_count, agg->start_idx, idx);
  2497. tx_status = &(priv->txq[txq_id].txb[idx].status);
  2498. tx_status->retry_count = tx_resp->failure_frame;
  2499. tx_status->queue_number = status & 0xff;
  2500. tx_status->queue_length = tx_resp->failure_rts;
  2501. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  2502. tx_status->flags = iwl4965_is_tx_success(status)?
  2503. IEEE80211_TX_STATUS_ACK : 0;
  2504. iwl4965_hwrate_to_tx_control(priv,
  2505. le32_to_cpu(tx_resp->rate_n_flags),
  2506. &tx_status->control);
  2507. /* FIXME: code repetition end */
  2508. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2509. status & 0xff, tx_resp->failure_frame);
  2510. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2511. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2512. agg->wait_for_ba = 0;
  2513. } else {
  2514. /* Two or more frames were attempted; expect block-ack */
  2515. u64 bitmap = 0;
  2516. int start = agg->start_idx;
  2517. /* Construct bit-map of pending frames within Tx window */
  2518. for (i = 0; i < agg->frame_count; i++) {
  2519. u16 sc;
  2520. status = le16_to_cpu(frame_status[i].status);
  2521. seq = le16_to_cpu(frame_status[i].sequence);
  2522. idx = SEQ_TO_INDEX(seq);
  2523. txq_id = SEQ_TO_QUEUE(seq);
  2524. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2525. AGG_TX_STATE_ABORT_MSK))
  2526. continue;
  2527. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2528. agg->frame_count, txq_id, idx);
  2529. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  2530. sc = le16_to_cpu(hdr->seq_ctrl);
  2531. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  2532. IWL_ERROR("BUG_ON idx doesn't match seq control"
  2533. " idx=%d, seq_idx=%d, seq=%d\n",
  2534. idx, SEQ_TO_SN(sc),
  2535. hdr->seq_ctrl);
  2536. return -1;
  2537. }
  2538. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  2539. i, idx, SEQ_TO_SN(sc));
  2540. sh = idx - start;
  2541. if (sh > 64) {
  2542. sh = (start - idx) + 0xff;
  2543. bitmap = bitmap << sh;
  2544. sh = 0;
  2545. start = idx;
  2546. } else if (sh < -64)
  2547. sh = 0xff - (start - idx);
  2548. else if (sh < 0) {
  2549. sh = start - idx;
  2550. start = idx;
  2551. bitmap = bitmap << sh;
  2552. sh = 0;
  2553. }
  2554. bitmap |= (1 << sh);
  2555. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  2556. start, (u32)(bitmap & 0xFFFFFFFF));
  2557. }
  2558. agg->bitmap = bitmap;
  2559. agg->start_idx = start;
  2560. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2561. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  2562. agg->frame_count, agg->start_idx,
  2563. (unsigned long long)agg->bitmap);
  2564. if (bitmap)
  2565. agg->wait_for_ba = 1;
  2566. }
  2567. return 0;
  2568. }
  2569. #endif
  2570. /**
  2571. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  2572. */
  2573. static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
  2574. struct iwl4965_rx_mem_buffer *rxb)
  2575. {
  2576. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2577. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2578. int txq_id = SEQ_TO_QUEUE(sequence);
  2579. int index = SEQ_TO_INDEX(sequence);
  2580. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2581. struct ieee80211_tx_status *tx_status;
  2582. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2583. u32 status = le32_to_cpu(tx_resp->status);
  2584. #ifdef CONFIG_IWL4965_HT
  2585. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  2586. struct ieee80211_hdr *hdr;
  2587. __le16 *qc;
  2588. #endif
  2589. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2590. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2591. "is out of range [0-%d] %d %d\n", txq_id,
  2592. index, txq->q.n_bd, txq->q.write_ptr,
  2593. txq->q.read_ptr);
  2594. return;
  2595. }
  2596. #ifdef CONFIG_IWL4965_HT
  2597. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  2598. qc = ieee80211_get_qos_ctrl(hdr);
  2599. if (qc)
  2600. tid = le16_to_cpu(*qc) & 0xf;
  2601. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  2602. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  2603. IWL_ERROR("Station not known\n");
  2604. return;
  2605. }
  2606. if (txq->sched_retry) {
  2607. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  2608. struct iwl4965_ht_agg *agg = NULL;
  2609. if (!qc)
  2610. return;
  2611. agg = &priv->stations[sta_id].tid[tid].agg;
  2612. iwl4965_tx_status_reply_tx(priv, agg,
  2613. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  2614. if ((tx_resp->frame_count == 1) &&
  2615. !iwl4965_is_tx_success(status)) {
  2616. /* TODO: send BAR */
  2617. }
  2618. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  2619. int freed;
  2620. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  2621. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  2622. "%d index %d\n", scd_ssn , index);
  2623. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2624. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2625. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2626. txq_id >= 0 && priv->mac80211_registered &&
  2627. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2628. ieee80211_wake_queue(priv->hw, txq_id);
  2629. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2630. }
  2631. } else {
  2632. #endif /* CONFIG_IWL4965_HT */
  2633. tx_status = &(txq->txb[txq->q.read_ptr].status);
  2634. tx_status->retry_count = tx_resp->failure_frame;
  2635. tx_status->queue_number = status;
  2636. tx_status->queue_length = tx_resp->bt_kill_count;
  2637. tx_status->queue_length |= tx_resp->failure_rts;
  2638. tx_status->flags =
  2639. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2640. iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
  2641. &tx_status->control);
  2642. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  2643. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  2644. status, le32_to_cpu(tx_resp->rate_n_flags),
  2645. tx_resp->failure_frame);
  2646. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2647. if (index != -1) {
  2648. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2649. #ifdef CONFIG_IWL4965_HT
  2650. if (tid != MAX_TID_COUNT)
  2651. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2652. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2653. (txq_id >= 0) &&
  2654. priv->mac80211_registered)
  2655. ieee80211_wake_queue(priv->hw, txq_id);
  2656. if (tid != MAX_TID_COUNT)
  2657. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2658. #endif
  2659. }
  2660. #ifdef CONFIG_IWL4965_HT
  2661. }
  2662. #endif /* CONFIG_IWL4965_HT */
  2663. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2664. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2665. }
  2666. static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
  2667. struct iwl4965_rx_mem_buffer *rxb)
  2668. {
  2669. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2670. struct iwl4965_alive_resp *palive;
  2671. struct delayed_work *pwork;
  2672. palive = &pkt->u.alive_frame;
  2673. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2674. "0x%01X 0x%01X\n",
  2675. palive->is_valid, palive->ver_type,
  2676. palive->ver_subtype);
  2677. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2678. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2679. memcpy(&priv->card_alive_init,
  2680. &pkt->u.alive_frame,
  2681. sizeof(struct iwl4965_init_alive_resp));
  2682. pwork = &priv->init_alive_start;
  2683. } else {
  2684. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2685. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2686. sizeof(struct iwl4965_alive_resp));
  2687. pwork = &priv->alive_start;
  2688. }
  2689. /* We delay the ALIVE response by 5ms to
  2690. * give the HW RF Kill time to activate... */
  2691. if (palive->is_valid == UCODE_VALID_OK)
  2692. queue_delayed_work(priv->workqueue, pwork,
  2693. msecs_to_jiffies(5));
  2694. else
  2695. IWL_WARNING("uCode did not respond OK.\n");
  2696. }
  2697. static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
  2698. struct iwl4965_rx_mem_buffer *rxb)
  2699. {
  2700. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2701. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2702. return;
  2703. }
  2704. static void iwl4965_rx_reply_error(struct iwl_priv *priv,
  2705. struct iwl4965_rx_mem_buffer *rxb)
  2706. {
  2707. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2708. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  2709. "seq 0x%04X ser 0x%08X\n",
  2710. le32_to_cpu(pkt->u.err_resp.error_type),
  2711. get_cmd_string(pkt->u.err_resp.cmd_id),
  2712. pkt->u.err_resp.cmd_id,
  2713. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2714. le32_to_cpu(pkt->u.err_resp.error_info));
  2715. }
  2716. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2717. static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  2718. {
  2719. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2720. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  2721. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  2722. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2723. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2724. rxon->channel = csa->channel;
  2725. priv->staging_rxon.channel = csa->channel;
  2726. }
  2727. static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2728. struct iwl4965_rx_mem_buffer *rxb)
  2729. {
  2730. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2731. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2732. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2733. if (!report->state) {
  2734. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2735. "Spectrum Measure Notification: Start\n");
  2736. return;
  2737. }
  2738. memcpy(&priv->measure_report, report, sizeof(*report));
  2739. priv->measurement_status |= MEASUREMENT_READY;
  2740. #endif
  2741. }
  2742. static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
  2743. struct iwl4965_rx_mem_buffer *rxb)
  2744. {
  2745. #ifdef CONFIG_IWLWIFI_DEBUG
  2746. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2747. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  2748. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  2749. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  2750. #endif
  2751. }
  2752. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  2753. struct iwl4965_rx_mem_buffer *rxb)
  2754. {
  2755. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2756. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  2757. "notification for %s:\n",
  2758. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  2759. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  2760. }
  2761. static void iwl4965_bg_beacon_update(struct work_struct *work)
  2762. {
  2763. struct iwl_priv *priv =
  2764. container_of(work, struct iwl_priv, beacon_update);
  2765. struct sk_buff *beacon;
  2766. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  2767. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  2768. if (!beacon) {
  2769. IWL_ERROR("update beacon failed\n");
  2770. return;
  2771. }
  2772. mutex_lock(&priv->mutex);
  2773. /* new beacon skb is allocated every time; dispose previous.*/
  2774. if (priv->ibss_beacon)
  2775. dev_kfree_skb(priv->ibss_beacon);
  2776. priv->ibss_beacon = beacon;
  2777. mutex_unlock(&priv->mutex);
  2778. iwl4965_send_beacon_cmd(priv);
  2779. }
  2780. static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
  2781. struct iwl4965_rx_mem_buffer *rxb)
  2782. {
  2783. #ifdef CONFIG_IWLWIFI_DEBUG
  2784. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2785. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  2786. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  2787. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  2788. "tsf %d %d rate %d\n",
  2789. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  2790. beacon->beacon_notify_hdr.failure_frame,
  2791. le32_to_cpu(beacon->ibss_mgr_status),
  2792. le32_to_cpu(beacon->high_tsf),
  2793. le32_to_cpu(beacon->low_tsf), rate);
  2794. #endif
  2795. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  2796. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  2797. queue_work(priv->workqueue, &priv->beacon_update);
  2798. }
  2799. /* Service response to REPLY_SCAN_CMD (0x80) */
  2800. static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
  2801. struct iwl4965_rx_mem_buffer *rxb)
  2802. {
  2803. #ifdef CONFIG_IWLWIFI_DEBUG
  2804. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2805. struct iwl4965_scanreq_notification *notif =
  2806. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  2807. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  2808. #endif
  2809. }
  2810. /* Service SCAN_START_NOTIFICATION (0x82) */
  2811. static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
  2812. struct iwl4965_rx_mem_buffer *rxb)
  2813. {
  2814. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2815. struct iwl4965_scanstart_notification *notif =
  2816. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  2817. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  2818. IWL_DEBUG_SCAN("Scan start: "
  2819. "%d [802.11%s] "
  2820. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  2821. notif->channel,
  2822. notif->band ? "bg" : "a",
  2823. notif->tsf_high,
  2824. notif->tsf_low, notif->status, notif->beacon_timer);
  2825. }
  2826. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  2827. static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
  2828. struct iwl4965_rx_mem_buffer *rxb)
  2829. {
  2830. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2831. struct iwl4965_scanresults_notification *notif =
  2832. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  2833. IWL_DEBUG_SCAN("Scan ch.res: "
  2834. "%d [802.11%s] "
  2835. "(TSF: 0x%08X:%08X) - %d "
  2836. "elapsed=%lu usec (%dms since last)\n",
  2837. notif->channel,
  2838. notif->band ? "bg" : "a",
  2839. le32_to_cpu(notif->tsf_high),
  2840. le32_to_cpu(notif->tsf_low),
  2841. le32_to_cpu(notif->statistics[0]),
  2842. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  2843. jiffies_to_msecs(elapsed_jiffies
  2844. (priv->last_scan_jiffies, jiffies)));
  2845. priv->last_scan_jiffies = jiffies;
  2846. priv->next_scan_jiffies = 0;
  2847. }
  2848. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  2849. static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
  2850. struct iwl4965_rx_mem_buffer *rxb)
  2851. {
  2852. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2853. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  2854. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  2855. scan_notif->scanned_channels,
  2856. scan_notif->tsf_low,
  2857. scan_notif->tsf_high, scan_notif->status);
  2858. /* The HW is no longer scanning */
  2859. clear_bit(STATUS_SCAN_HW, &priv->status);
  2860. /* The scan completion notification came in, so kill that timer... */
  2861. cancel_delayed_work(&priv->scan_check);
  2862. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  2863. (priv->scan_bands == 2) ? "2.4" : "5.2",
  2864. jiffies_to_msecs(elapsed_jiffies
  2865. (priv->scan_pass_start, jiffies)));
  2866. /* Remove this scanned band from the list
  2867. * of pending bands to scan */
  2868. priv->scan_bands--;
  2869. /* If a request to abort was given, or the scan did not succeed
  2870. * then we reset the scan state machine and terminate,
  2871. * re-queuing another scan if one has been requested */
  2872. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2873. IWL_DEBUG_INFO("Aborted scan completed.\n");
  2874. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  2875. } else {
  2876. /* If there are more bands on this scan pass reschedule */
  2877. if (priv->scan_bands > 0)
  2878. goto reschedule;
  2879. }
  2880. priv->last_scan_jiffies = jiffies;
  2881. priv->next_scan_jiffies = 0;
  2882. IWL_DEBUG_INFO("Setting scan to off\n");
  2883. clear_bit(STATUS_SCANNING, &priv->status);
  2884. IWL_DEBUG_INFO("Scan took %dms\n",
  2885. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  2886. queue_work(priv->workqueue, &priv->scan_completed);
  2887. return;
  2888. reschedule:
  2889. priv->scan_pass_start = jiffies;
  2890. queue_work(priv->workqueue, &priv->request_scan);
  2891. }
  2892. /* Handle notification from uCode that card's power state is changing
  2893. * due to software, hardware, or critical temperature RFKILL */
  2894. static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
  2895. struct iwl4965_rx_mem_buffer *rxb)
  2896. {
  2897. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2898. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  2899. unsigned long status = priv->status;
  2900. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  2901. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  2902. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  2903. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  2904. RF_CARD_DISABLED)) {
  2905. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2906. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2907. if (!iwl_grab_nic_access(priv)) {
  2908. iwl_write_direct32(
  2909. priv, HBUS_TARG_MBX_C,
  2910. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  2911. iwl_release_nic_access(priv);
  2912. }
  2913. if (!(flags & RXON_CARD_DISABLED)) {
  2914. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2915. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2916. if (!iwl_grab_nic_access(priv)) {
  2917. iwl_write_direct32(
  2918. priv, HBUS_TARG_MBX_C,
  2919. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  2920. iwl_release_nic_access(priv);
  2921. }
  2922. }
  2923. if (flags & RF_CARD_DISABLED) {
  2924. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2925. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  2926. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2927. if (!iwl_grab_nic_access(priv))
  2928. iwl_release_nic_access(priv);
  2929. }
  2930. }
  2931. if (flags & HW_CARD_DISABLED)
  2932. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2933. else
  2934. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2935. if (flags & SW_CARD_DISABLED)
  2936. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2937. else
  2938. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2939. if (!(flags & RXON_CARD_DISABLED))
  2940. iwl4965_scan_cancel(priv);
  2941. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  2942. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  2943. (test_bit(STATUS_RF_KILL_SW, &status) !=
  2944. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  2945. queue_work(priv->workqueue, &priv->rf_kill);
  2946. else
  2947. wake_up_interruptible(&priv->wait_command_queue);
  2948. }
  2949. /**
  2950. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  2951. *
  2952. * Setup the RX handlers for each of the reply types sent from the uCode
  2953. * to the host.
  2954. *
  2955. * This function chains into the hardware specific files for them to setup
  2956. * any hardware specific handlers as well.
  2957. */
  2958. static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
  2959. {
  2960. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  2961. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  2962. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  2963. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  2964. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  2965. iwl4965_rx_spectrum_measure_notif;
  2966. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  2967. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  2968. iwl4965_rx_pm_debug_statistics_notif;
  2969. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  2970. /*
  2971. * The same handler is used for both the REPLY to a discrete
  2972. * statistics request from the host as well as for the periodic
  2973. * statistics notifications (after received beacons) from the uCode.
  2974. */
  2975. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  2976. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  2977. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  2978. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  2979. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  2980. iwl4965_rx_scan_results_notif;
  2981. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  2982. iwl4965_rx_scan_complete_notif;
  2983. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  2984. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  2985. /* Set up hardware specific Rx handlers */
  2986. iwl4965_hw_rx_handler_setup(priv);
  2987. }
  2988. /**
  2989. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  2990. * @rxb: Rx buffer to reclaim
  2991. *
  2992. * If an Rx buffer has an async callback associated with it the callback
  2993. * will be executed. The attached skb (if present) will only be freed
  2994. * if the callback returns 1
  2995. */
  2996. static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
  2997. struct iwl4965_rx_mem_buffer *rxb)
  2998. {
  2999. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3000. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3001. int txq_id = SEQ_TO_QUEUE(sequence);
  3002. int index = SEQ_TO_INDEX(sequence);
  3003. int huge = sequence & SEQ_HUGE_FRAME;
  3004. int cmd_index;
  3005. struct iwl_cmd *cmd;
  3006. /* If a Tx command is being handled and it isn't in the actual
  3007. * command queue then there a command routing bug has been introduced
  3008. * in the queue management code. */
  3009. if (txq_id != IWL_CMD_QUEUE_NUM)
  3010. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3011. txq_id, pkt->hdr.cmd);
  3012. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3013. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3014. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3015. /* Input error checking is done when commands are added to queue. */
  3016. if (cmd->meta.flags & CMD_WANT_SKB) {
  3017. cmd->meta.source->u.skb = rxb->skb;
  3018. rxb->skb = NULL;
  3019. } else if (cmd->meta.u.callback &&
  3020. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3021. rxb->skb = NULL;
  3022. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3023. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3024. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3025. wake_up_interruptible(&priv->wait_command_queue);
  3026. }
  3027. }
  3028. /************************** RX-FUNCTIONS ****************************/
  3029. /*
  3030. * Rx theory of operation
  3031. *
  3032. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3033. * each of which point to Receive Buffers to be filled by 4965. These get
  3034. * used not only for Rx frames, but for any command response or notification
  3035. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3036. * of indexes into the circular buffer.
  3037. *
  3038. * Rx Queue Indexes
  3039. * The host/firmware share two index registers for managing the Rx buffers.
  3040. *
  3041. * The READ index maps to the first position that the firmware may be writing
  3042. * to -- the driver can read up to (but not including) this position and get
  3043. * good data.
  3044. * The READ index is managed by the firmware once the card is enabled.
  3045. *
  3046. * The WRITE index maps to the last position the driver has read from -- the
  3047. * position preceding WRITE is the last slot the firmware can place a packet.
  3048. *
  3049. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3050. * WRITE = READ.
  3051. *
  3052. * During initialization, the host sets up the READ queue position to the first
  3053. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3054. *
  3055. * When the firmware places a packet in a buffer, it will advance the READ index
  3056. * and fire the RX interrupt. The driver can then query the READ index and
  3057. * process as many packets as possible, moving the WRITE index forward as it
  3058. * resets the Rx queue buffers with new memory.
  3059. *
  3060. * The management in the driver is as follows:
  3061. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3062. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3063. * to replenish the iwl->rxq->rx_free.
  3064. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3065. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3066. * 'processed' and 'read' driver indexes as well)
  3067. * + A received packet is processed and handed to the kernel network stack,
  3068. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3069. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3070. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3071. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3072. * were enough free buffers and RX_STALLED is set it is cleared.
  3073. *
  3074. *
  3075. * Driver sequence:
  3076. *
  3077. * iwl4965_rx_queue_alloc() Allocates rx_free
  3078. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3079. * iwl4965_rx_queue_restock
  3080. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3081. * queue, updates firmware pointers, and updates
  3082. * the WRITE index. If insufficient rx_free buffers
  3083. * are available, schedules iwl4965_rx_replenish
  3084. *
  3085. * -- enable interrupts --
  3086. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3087. * READ INDEX, detaching the SKB from the pool.
  3088. * Moves the packet buffer from queue to rx_used.
  3089. * Calls iwl4965_rx_queue_restock to refill any empty
  3090. * slots.
  3091. * ...
  3092. *
  3093. */
  3094. /**
  3095. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3096. */
  3097. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3098. {
  3099. int s = q->read - q->write;
  3100. if (s <= 0)
  3101. s += RX_QUEUE_SIZE;
  3102. /* keep some buffer to not confuse full and empty queue */
  3103. s -= 2;
  3104. if (s < 0)
  3105. s = 0;
  3106. return s;
  3107. }
  3108. /**
  3109. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3110. */
  3111. int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
  3112. {
  3113. u32 reg = 0;
  3114. int rc = 0;
  3115. unsigned long flags;
  3116. spin_lock_irqsave(&q->lock, flags);
  3117. if (q->need_update == 0)
  3118. goto exit_unlock;
  3119. /* If power-saving is in use, make sure device is awake */
  3120. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3121. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3122. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3123. iwl_set_bit(priv, CSR_GP_CNTRL,
  3124. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3125. goto exit_unlock;
  3126. }
  3127. rc = iwl_grab_nic_access(priv);
  3128. if (rc)
  3129. goto exit_unlock;
  3130. /* Device expects a multiple of 8 */
  3131. iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3132. q->write & ~0x7);
  3133. iwl_release_nic_access(priv);
  3134. /* Else device is assumed to be awake */
  3135. } else
  3136. /* Device expects a multiple of 8 */
  3137. iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3138. q->need_update = 0;
  3139. exit_unlock:
  3140. spin_unlock_irqrestore(&q->lock, flags);
  3141. return rc;
  3142. }
  3143. /**
  3144. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3145. */
  3146. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3147. dma_addr_t dma_addr)
  3148. {
  3149. return cpu_to_le32((u32)(dma_addr >> 8));
  3150. }
  3151. /**
  3152. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3153. *
  3154. * If there are slots in the RX queue that need to be restocked,
  3155. * and we have free pre-allocated buffers, fill the ranks as much
  3156. * as we can, pulling from rx_free.
  3157. *
  3158. * This moves the 'write' index forward to catch up with 'processed', and
  3159. * also updates the memory address in the firmware to reference the new
  3160. * target buffer.
  3161. */
  3162. static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
  3163. {
  3164. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3165. struct list_head *element;
  3166. struct iwl4965_rx_mem_buffer *rxb;
  3167. unsigned long flags;
  3168. int write, rc;
  3169. spin_lock_irqsave(&rxq->lock, flags);
  3170. write = rxq->write & ~0x7;
  3171. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3172. /* Get next free Rx buffer, remove from free list */
  3173. element = rxq->rx_free.next;
  3174. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3175. list_del(element);
  3176. /* Point to Rx buffer via next RBD in circular buffer */
  3177. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3178. rxq->queue[rxq->write] = rxb;
  3179. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3180. rxq->free_count--;
  3181. }
  3182. spin_unlock_irqrestore(&rxq->lock, flags);
  3183. /* If the pre-allocated buffer pool is dropping low, schedule to
  3184. * refill it */
  3185. if (rxq->free_count <= RX_LOW_WATERMARK)
  3186. queue_work(priv->workqueue, &priv->rx_replenish);
  3187. /* If we've added more space for the firmware to place data, tell it.
  3188. * Increment device's write pointer in multiples of 8. */
  3189. if ((write != (rxq->write & ~0x7))
  3190. || (abs(rxq->write - rxq->read) > 7)) {
  3191. spin_lock_irqsave(&rxq->lock, flags);
  3192. rxq->need_update = 1;
  3193. spin_unlock_irqrestore(&rxq->lock, flags);
  3194. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3195. if (rc)
  3196. return rc;
  3197. }
  3198. return 0;
  3199. }
  3200. /**
  3201. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3202. *
  3203. * When moving to rx_free an SKB is allocated for the slot.
  3204. *
  3205. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3206. * This is called as a scheduled work item (except for during initialization)
  3207. */
  3208. static void iwl4965_rx_allocate(struct iwl_priv *priv)
  3209. {
  3210. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3211. struct list_head *element;
  3212. struct iwl4965_rx_mem_buffer *rxb;
  3213. unsigned long flags;
  3214. spin_lock_irqsave(&rxq->lock, flags);
  3215. while (!list_empty(&rxq->rx_used)) {
  3216. element = rxq->rx_used.next;
  3217. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3218. /* Alloc a new receive buffer */
  3219. rxb->skb =
  3220. alloc_skb(priv->hw_setting.rx_buf_size,
  3221. __GFP_NOWARN | GFP_ATOMIC);
  3222. if (!rxb->skb) {
  3223. if (net_ratelimit())
  3224. printk(KERN_CRIT DRV_NAME
  3225. ": Can not allocate SKB buffers\n");
  3226. /* We don't reschedule replenish work here -- we will
  3227. * call the restock method and if it still needs
  3228. * more buffers it will schedule replenish */
  3229. break;
  3230. }
  3231. priv->alloc_rxb_skb++;
  3232. list_del(element);
  3233. /* Get physical address of RB/SKB */
  3234. rxb->dma_addr =
  3235. pci_map_single(priv->pci_dev, rxb->skb->data,
  3236. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3237. list_add_tail(&rxb->list, &rxq->rx_free);
  3238. rxq->free_count++;
  3239. }
  3240. spin_unlock_irqrestore(&rxq->lock, flags);
  3241. }
  3242. /*
  3243. * this should be called while priv->lock is locked
  3244. */
  3245. static void __iwl4965_rx_replenish(void *data)
  3246. {
  3247. struct iwl_priv *priv = data;
  3248. iwl4965_rx_allocate(priv);
  3249. iwl4965_rx_queue_restock(priv);
  3250. }
  3251. void iwl4965_rx_replenish(void *data)
  3252. {
  3253. struct iwl_priv *priv = data;
  3254. unsigned long flags;
  3255. iwl4965_rx_allocate(priv);
  3256. spin_lock_irqsave(&priv->lock, flags);
  3257. iwl4965_rx_queue_restock(priv);
  3258. spin_unlock_irqrestore(&priv->lock, flags);
  3259. }
  3260. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3261. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3262. * This free routine walks the list of POOL entries and if SKB is set to
  3263. * non NULL it is unmapped and freed
  3264. */
  3265. static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3266. {
  3267. int i;
  3268. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3269. if (rxq->pool[i].skb != NULL) {
  3270. pci_unmap_single(priv->pci_dev,
  3271. rxq->pool[i].dma_addr,
  3272. priv->hw_setting.rx_buf_size,
  3273. PCI_DMA_FROMDEVICE);
  3274. dev_kfree_skb(rxq->pool[i].skb);
  3275. }
  3276. }
  3277. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3278. rxq->dma_addr);
  3279. rxq->bd = NULL;
  3280. }
  3281. int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
  3282. {
  3283. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3284. struct pci_dev *dev = priv->pci_dev;
  3285. int i;
  3286. spin_lock_init(&rxq->lock);
  3287. INIT_LIST_HEAD(&rxq->rx_free);
  3288. INIT_LIST_HEAD(&rxq->rx_used);
  3289. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3290. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3291. if (!rxq->bd)
  3292. return -ENOMEM;
  3293. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3294. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3295. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3296. /* Set us so that we have processed and used all buffers, but have
  3297. * not restocked the Rx queue with fresh buffers */
  3298. rxq->read = rxq->write = 0;
  3299. rxq->free_count = 0;
  3300. rxq->need_update = 0;
  3301. return 0;
  3302. }
  3303. void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3304. {
  3305. unsigned long flags;
  3306. int i;
  3307. spin_lock_irqsave(&rxq->lock, flags);
  3308. INIT_LIST_HEAD(&rxq->rx_free);
  3309. INIT_LIST_HEAD(&rxq->rx_used);
  3310. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3311. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3312. /* In the reset function, these buffers may have been allocated
  3313. * to an SKB, so we need to unmap and free potential storage */
  3314. if (rxq->pool[i].skb != NULL) {
  3315. pci_unmap_single(priv->pci_dev,
  3316. rxq->pool[i].dma_addr,
  3317. priv->hw_setting.rx_buf_size,
  3318. PCI_DMA_FROMDEVICE);
  3319. priv->alloc_rxb_skb--;
  3320. dev_kfree_skb(rxq->pool[i].skb);
  3321. rxq->pool[i].skb = NULL;
  3322. }
  3323. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3324. }
  3325. /* Set us so that we have processed and used all buffers, but have
  3326. * not restocked the Rx queue with fresh buffers */
  3327. rxq->read = rxq->write = 0;
  3328. rxq->free_count = 0;
  3329. spin_unlock_irqrestore(&rxq->lock, flags);
  3330. }
  3331. /* Convert linear signal-to-noise ratio into dB */
  3332. static u8 ratio2dB[100] = {
  3333. /* 0 1 2 3 4 5 6 7 8 9 */
  3334. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3335. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3336. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3337. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3338. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3339. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3340. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3341. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3342. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3343. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3344. };
  3345. /* Calculates a relative dB value from a ratio of linear
  3346. * (i.e. not dB) signal levels.
  3347. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3348. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3349. {
  3350. /* 1000:1 or higher just report as 60 dB */
  3351. if (sig_ratio >= 1000)
  3352. return 60;
  3353. /* 100:1 or higher, divide by 10 and use table,
  3354. * add 20 dB to make up for divide by 10 */
  3355. if (sig_ratio >= 100)
  3356. return (20 + (int)ratio2dB[sig_ratio/10]);
  3357. /* We shouldn't see this */
  3358. if (sig_ratio < 1)
  3359. return 0;
  3360. /* Use table for ratios 1:1 - 99:1 */
  3361. return (int)ratio2dB[sig_ratio];
  3362. }
  3363. #define PERFECT_RSSI (-20) /* dBm */
  3364. #define WORST_RSSI (-95) /* dBm */
  3365. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3366. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3367. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3368. * about formulas used below. */
  3369. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3370. {
  3371. int sig_qual;
  3372. int degradation = PERFECT_RSSI - rssi_dbm;
  3373. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3374. * as indicator; formula is (signal dbm - noise dbm).
  3375. * SNR at or above 40 is a great signal (100%).
  3376. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3377. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3378. if (noise_dbm) {
  3379. if (rssi_dbm - noise_dbm >= 40)
  3380. return 100;
  3381. else if (rssi_dbm < noise_dbm)
  3382. return 0;
  3383. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3384. /* Else use just the signal level.
  3385. * This formula is a least squares fit of data points collected and
  3386. * compared with a reference system that had a percentage (%) display
  3387. * for signal quality. */
  3388. } else
  3389. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3390. (15 * RSSI_RANGE + 62 * degradation)) /
  3391. (RSSI_RANGE * RSSI_RANGE);
  3392. if (sig_qual > 100)
  3393. sig_qual = 100;
  3394. else if (sig_qual < 1)
  3395. sig_qual = 0;
  3396. return sig_qual;
  3397. }
  3398. /**
  3399. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3400. *
  3401. * Uses the priv->rx_handlers callback function array to invoke
  3402. * the appropriate handlers, including command responses,
  3403. * frame-received notifications, and other notifications.
  3404. */
  3405. static void iwl4965_rx_handle(struct iwl_priv *priv)
  3406. {
  3407. struct iwl4965_rx_mem_buffer *rxb;
  3408. struct iwl4965_rx_packet *pkt;
  3409. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3410. u32 r, i;
  3411. int reclaim;
  3412. unsigned long flags;
  3413. u8 fill_rx = 0;
  3414. u32 count = 8;
  3415. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3416. * buffer that the driver may process (last buffer filled by ucode). */
  3417. r = iwl4965_hw_get_rx_read(priv);
  3418. i = rxq->read;
  3419. /* Rx interrupt, but nothing sent from uCode */
  3420. if (i == r)
  3421. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3422. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3423. fill_rx = 1;
  3424. while (i != r) {
  3425. rxb = rxq->queue[i];
  3426. /* If an RXB doesn't have a Rx queue slot associated with it,
  3427. * then a bug has been introduced in the queue refilling
  3428. * routines -- catch it here */
  3429. BUG_ON(rxb == NULL);
  3430. rxq->queue[i] = NULL;
  3431. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3432. priv->hw_setting.rx_buf_size,
  3433. PCI_DMA_FROMDEVICE);
  3434. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3435. /* Reclaim a command buffer only if this packet is a response
  3436. * to a (driver-originated) command.
  3437. * If the packet (e.g. Rx frame) originated from uCode,
  3438. * there is no command buffer to reclaim.
  3439. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3440. * but apparently a few don't get set; catch them here. */
  3441. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3442. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3443. (pkt->hdr.cmd != REPLY_RX) &&
  3444. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3445. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3446. (pkt->hdr.cmd != REPLY_TX);
  3447. /* Based on type of command response or notification,
  3448. * handle those that need handling via function in
  3449. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3450. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3451. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3452. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3453. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3454. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3455. } else {
  3456. /* No handling needed */
  3457. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3458. "r %d i %d No handler needed for %s, 0x%02x\n",
  3459. r, i, get_cmd_string(pkt->hdr.cmd),
  3460. pkt->hdr.cmd);
  3461. }
  3462. if (reclaim) {
  3463. /* Invoke any callbacks, transfer the skb to caller, and
  3464. * fire off the (possibly) blocking iwl_send_cmd()
  3465. * as we reclaim the driver command queue */
  3466. if (rxb && rxb->skb)
  3467. iwl4965_tx_cmd_complete(priv, rxb);
  3468. else
  3469. IWL_WARNING("Claim null rxb?\n");
  3470. }
  3471. /* For now we just don't re-use anything. We can tweak this
  3472. * later to try and re-use notification packets and SKBs that
  3473. * fail to Rx correctly */
  3474. if (rxb->skb != NULL) {
  3475. priv->alloc_rxb_skb--;
  3476. dev_kfree_skb_any(rxb->skb);
  3477. rxb->skb = NULL;
  3478. }
  3479. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3480. priv->hw_setting.rx_buf_size,
  3481. PCI_DMA_FROMDEVICE);
  3482. spin_lock_irqsave(&rxq->lock, flags);
  3483. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3484. spin_unlock_irqrestore(&rxq->lock, flags);
  3485. i = (i + 1) & RX_QUEUE_MASK;
  3486. /* If there are a lot of unused frames,
  3487. * restock the Rx queue so ucode wont assert. */
  3488. if (fill_rx) {
  3489. count++;
  3490. if (count >= 8) {
  3491. priv->rxq.read = i;
  3492. __iwl4965_rx_replenish(priv);
  3493. count = 0;
  3494. }
  3495. }
  3496. }
  3497. /* Backtrack one entry */
  3498. priv->rxq.read = i;
  3499. iwl4965_rx_queue_restock(priv);
  3500. }
  3501. /**
  3502. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  3503. */
  3504. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3505. struct iwl4965_tx_queue *txq)
  3506. {
  3507. u32 reg = 0;
  3508. int rc = 0;
  3509. int txq_id = txq->q.id;
  3510. if (txq->need_update == 0)
  3511. return rc;
  3512. /* if we're trying to save power */
  3513. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3514. /* wake up nic if it's powered down ...
  3515. * uCode will wake up, and interrupt us again, so next
  3516. * time we'll skip this part. */
  3517. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3518. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3519. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3520. iwl_set_bit(priv, CSR_GP_CNTRL,
  3521. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3522. return rc;
  3523. }
  3524. /* restore this queue's parameters in nic hardware. */
  3525. rc = iwl_grab_nic_access(priv);
  3526. if (rc)
  3527. return rc;
  3528. iwl_write_direct32(priv, HBUS_TARG_WRPTR,
  3529. txq->q.write_ptr | (txq_id << 8));
  3530. iwl_release_nic_access(priv);
  3531. /* else not in power-save mode, uCode will never sleep when we're
  3532. * trying to tx (during RFKILL, we're not trying to tx). */
  3533. } else
  3534. iwl_write32(priv, HBUS_TARG_WRPTR,
  3535. txq->q.write_ptr | (txq_id << 8));
  3536. txq->need_update = 0;
  3537. return rc;
  3538. }
  3539. #ifdef CONFIG_IWLWIFI_DEBUG
  3540. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  3541. {
  3542. DECLARE_MAC_BUF(mac);
  3543. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3544. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3545. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3546. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3547. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3548. le32_to_cpu(rxon->filter_flags));
  3549. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3550. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3551. rxon->ofdm_basic_rates);
  3552. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3553. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3554. print_mac(mac, rxon->node_addr));
  3555. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3556. print_mac(mac, rxon->bssid_addr));
  3557. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3558. }
  3559. #endif
  3560. static void iwl4965_enable_interrupts(struct iwl_priv *priv)
  3561. {
  3562. IWL_DEBUG_ISR("Enabling interrupts\n");
  3563. set_bit(STATUS_INT_ENABLED, &priv->status);
  3564. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3565. }
  3566. /* call this function to flush any scheduled tasklet */
  3567. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  3568. {
  3569. /* wait to make sure we flush pedding tasklet*/
  3570. synchronize_irq(priv->pci_dev->irq);
  3571. tasklet_kill(&priv->irq_tasklet);
  3572. }
  3573. static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
  3574. {
  3575. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3576. /* disable interrupts from uCode/NIC to host */
  3577. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3578. /* acknowledge/clear/reset any interrupts still pending
  3579. * from uCode or flow handler (Rx/Tx DMA) */
  3580. iwl_write32(priv, CSR_INT, 0xffffffff);
  3581. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3582. IWL_DEBUG_ISR("Disabled interrupts\n");
  3583. }
  3584. static const char *desc_lookup(int i)
  3585. {
  3586. switch (i) {
  3587. case 1:
  3588. return "FAIL";
  3589. case 2:
  3590. return "BAD_PARAM";
  3591. case 3:
  3592. return "BAD_CHECKSUM";
  3593. case 4:
  3594. return "NMI_INTERRUPT";
  3595. case 5:
  3596. return "SYSASSERT";
  3597. case 6:
  3598. return "FATAL_ERROR";
  3599. }
  3600. return "UNKNOWN";
  3601. }
  3602. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3603. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3604. static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
  3605. {
  3606. u32 data2, line;
  3607. u32 desc, time, count, base, data1;
  3608. u32 blink1, blink2, ilink1, ilink2;
  3609. int rc;
  3610. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3611. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3612. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3613. return;
  3614. }
  3615. rc = iwl_grab_nic_access(priv);
  3616. if (rc) {
  3617. IWL_WARNING("Can not read from adapter at this time.\n");
  3618. return;
  3619. }
  3620. count = iwl_read_targ_mem(priv, base);
  3621. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3622. IWL_ERROR("Start IWL Error Log Dump:\n");
  3623. IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
  3624. }
  3625. desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
  3626. blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
  3627. blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
  3628. ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
  3629. ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
  3630. data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
  3631. data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
  3632. line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
  3633. time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
  3634. IWL_ERROR("Desc Time "
  3635. "data1 data2 line\n");
  3636. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  3637. desc_lookup(desc), desc, time, data1, data2, line);
  3638. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  3639. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  3640. ilink1, ilink2);
  3641. iwl_release_nic_access(priv);
  3642. }
  3643. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3644. /**
  3645. * iwl4965_print_event_log - Dump error event log to syslog
  3646. *
  3647. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  3648. */
  3649. static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
  3650. u32 num_events, u32 mode)
  3651. {
  3652. u32 i;
  3653. u32 base; /* SRAM byte address of event log header */
  3654. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3655. u32 ptr; /* SRAM byte address of log data */
  3656. u32 ev, time, data; /* event log data */
  3657. if (num_events == 0)
  3658. return;
  3659. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3660. if (mode == 0)
  3661. event_size = 2 * sizeof(u32);
  3662. else
  3663. event_size = 3 * sizeof(u32);
  3664. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3665. /* "time" is actually "data" for mode 0 (no timestamp).
  3666. * place event id # at far right for easier visual parsing. */
  3667. for (i = 0; i < num_events; i++) {
  3668. ev = iwl_read_targ_mem(priv, ptr);
  3669. ptr += sizeof(u32);
  3670. time = iwl_read_targ_mem(priv, ptr);
  3671. ptr += sizeof(u32);
  3672. if (mode == 0)
  3673. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  3674. else {
  3675. data = iwl_read_targ_mem(priv, ptr);
  3676. ptr += sizeof(u32);
  3677. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  3678. }
  3679. }
  3680. }
  3681. static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
  3682. {
  3683. int rc;
  3684. u32 base; /* SRAM byte address of event log header */
  3685. u32 capacity; /* event log capacity in # entries */
  3686. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3687. u32 num_wraps; /* # times uCode wrapped to top of log */
  3688. u32 next_entry; /* index of next entry to be written by uCode */
  3689. u32 size; /* # entries that we'll print */
  3690. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3691. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3692. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  3693. return;
  3694. }
  3695. rc = iwl_grab_nic_access(priv);
  3696. if (rc) {
  3697. IWL_WARNING("Can not read from adapter at this time.\n");
  3698. return;
  3699. }
  3700. /* event log header */
  3701. capacity = iwl_read_targ_mem(priv, base);
  3702. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  3703. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  3704. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  3705. size = num_wraps ? capacity : next_entry;
  3706. /* bail out if nothing in log */
  3707. if (size == 0) {
  3708. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  3709. iwl_release_nic_access(priv);
  3710. return;
  3711. }
  3712. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  3713. size, num_wraps);
  3714. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3715. * i.e the next one that uCode would fill. */
  3716. if (num_wraps)
  3717. iwl4965_print_event_log(priv, next_entry,
  3718. capacity - next_entry, mode);
  3719. /* (then/else) start at top of log */
  3720. iwl4965_print_event_log(priv, 0, next_entry, mode);
  3721. iwl_release_nic_access(priv);
  3722. }
  3723. /**
  3724. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  3725. */
  3726. static void iwl4965_irq_handle_error(struct iwl_priv *priv)
  3727. {
  3728. /* Set the FW error flag -- cleared on iwl4965_down */
  3729. set_bit(STATUS_FW_ERROR, &priv->status);
  3730. /* Cancel currently queued command. */
  3731. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3732. #ifdef CONFIG_IWLWIFI_DEBUG
  3733. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  3734. iwl4965_dump_nic_error_log(priv);
  3735. iwl4965_dump_nic_event_log(priv);
  3736. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  3737. }
  3738. #endif
  3739. wake_up_interruptible(&priv->wait_command_queue);
  3740. /* Keep the restart process from trying to send host
  3741. * commands by clearing the INIT status bit */
  3742. clear_bit(STATUS_READY, &priv->status);
  3743. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3744. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  3745. "Restarting adapter due to uCode error.\n");
  3746. if (iwl_is_associated(priv)) {
  3747. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  3748. sizeof(priv->recovery_rxon));
  3749. priv->error_recovering = 1;
  3750. }
  3751. queue_work(priv->workqueue, &priv->restart);
  3752. }
  3753. }
  3754. static void iwl4965_error_recovery(struct iwl_priv *priv)
  3755. {
  3756. unsigned long flags;
  3757. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  3758. sizeof(priv->staging_rxon));
  3759. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3760. iwl4965_commit_rxon(priv);
  3761. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  3762. spin_lock_irqsave(&priv->lock, flags);
  3763. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  3764. priv->error_recovering = 0;
  3765. spin_unlock_irqrestore(&priv->lock, flags);
  3766. }
  3767. static void iwl4965_irq_tasklet(struct iwl_priv *priv)
  3768. {
  3769. u32 inta, handled = 0;
  3770. u32 inta_fh;
  3771. unsigned long flags;
  3772. #ifdef CONFIG_IWLWIFI_DEBUG
  3773. u32 inta_mask;
  3774. #endif
  3775. spin_lock_irqsave(&priv->lock, flags);
  3776. /* Ack/clear/reset pending uCode interrupts.
  3777. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  3778. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  3779. inta = iwl_read32(priv, CSR_INT);
  3780. iwl_write32(priv, CSR_INT, inta);
  3781. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  3782. * Any new interrupts that happen after this, either while we're
  3783. * in this tasklet, or later, will show up in next ISR/tasklet. */
  3784. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3785. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  3786. #ifdef CONFIG_IWLWIFI_DEBUG
  3787. if (iwl_debug_level & IWL_DL_ISR) {
  3788. /* just for debug */
  3789. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3790. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3791. inta, inta_mask, inta_fh);
  3792. }
  3793. #endif
  3794. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  3795. * atomic, make sure that inta covers all the interrupts that
  3796. * we've discovered, even if FH interrupt came in just after
  3797. * reading CSR_INT. */
  3798. if (inta_fh & CSR49_FH_INT_RX_MASK)
  3799. inta |= CSR_INT_BIT_FH_RX;
  3800. if (inta_fh & CSR49_FH_INT_TX_MASK)
  3801. inta |= CSR_INT_BIT_FH_TX;
  3802. /* Now service all interrupt bits discovered above. */
  3803. if (inta & CSR_INT_BIT_HW_ERR) {
  3804. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  3805. /* Tell the device to stop sending interrupts */
  3806. iwl4965_disable_interrupts(priv);
  3807. iwl4965_irq_handle_error(priv);
  3808. handled |= CSR_INT_BIT_HW_ERR;
  3809. spin_unlock_irqrestore(&priv->lock, flags);
  3810. return;
  3811. }
  3812. #ifdef CONFIG_IWLWIFI_DEBUG
  3813. if (iwl_debug_level & (IWL_DL_ISR)) {
  3814. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  3815. if (inta & CSR_INT_BIT_SCD)
  3816. IWL_DEBUG_ISR("Scheduler finished to transmit "
  3817. "the frame/frames.\n");
  3818. /* Alive notification via Rx interrupt will do the real work */
  3819. if (inta & CSR_INT_BIT_ALIVE)
  3820. IWL_DEBUG_ISR("Alive interrupt\n");
  3821. }
  3822. #endif
  3823. /* Safely ignore these bits for debug checks below */
  3824. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  3825. /* HW RF KILL switch toggled */
  3826. if (inta & CSR_INT_BIT_RF_KILL) {
  3827. int hw_rf_kill = 0;
  3828. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  3829. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  3830. hw_rf_kill = 1;
  3831. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  3832. "RF_KILL bit toggled to %s.\n",
  3833. hw_rf_kill ? "disable radio":"enable radio");
  3834. /* Queue restart only if RF_KILL switch was set to "kill"
  3835. * when we loaded driver, and is now set to "enable".
  3836. * After we're Alive, RF_KILL gets handled by
  3837. * iwl4965_rx_card_state_notif() */
  3838. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  3839. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3840. queue_work(priv->workqueue, &priv->restart);
  3841. }
  3842. handled |= CSR_INT_BIT_RF_KILL;
  3843. }
  3844. /* Chip got too hot and stopped itself */
  3845. if (inta & CSR_INT_BIT_CT_KILL) {
  3846. IWL_ERROR("Microcode CT kill error detected.\n");
  3847. handled |= CSR_INT_BIT_CT_KILL;
  3848. }
  3849. /* Error detected by uCode */
  3850. if (inta & CSR_INT_BIT_SW_ERR) {
  3851. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  3852. inta);
  3853. iwl4965_irq_handle_error(priv);
  3854. handled |= CSR_INT_BIT_SW_ERR;
  3855. }
  3856. /* uCode wakes up after power-down sleep */
  3857. if (inta & CSR_INT_BIT_WAKEUP) {
  3858. IWL_DEBUG_ISR("Wakeup interrupt\n");
  3859. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  3860. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  3861. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  3862. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  3863. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  3864. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  3865. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  3866. handled |= CSR_INT_BIT_WAKEUP;
  3867. }
  3868. /* All uCode command responses, including Tx command responses,
  3869. * Rx "responses" (frame-received notification), and other
  3870. * notifications from uCode come through here*/
  3871. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  3872. iwl4965_rx_handle(priv);
  3873. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  3874. }
  3875. if (inta & CSR_INT_BIT_FH_TX) {
  3876. IWL_DEBUG_ISR("Tx interrupt\n");
  3877. handled |= CSR_INT_BIT_FH_TX;
  3878. }
  3879. if (inta & ~handled)
  3880. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  3881. if (inta & ~CSR_INI_SET_MASK) {
  3882. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  3883. inta & ~CSR_INI_SET_MASK);
  3884. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  3885. }
  3886. /* Re-enable all interrupts */
  3887. /* only Re-enable if diabled by irq */
  3888. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3889. iwl4965_enable_interrupts(priv);
  3890. #ifdef CONFIG_IWLWIFI_DEBUG
  3891. if (iwl_debug_level & (IWL_DL_ISR)) {
  3892. inta = iwl_read32(priv, CSR_INT);
  3893. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3894. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3895. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  3896. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  3897. }
  3898. #endif
  3899. spin_unlock_irqrestore(&priv->lock, flags);
  3900. }
  3901. static irqreturn_t iwl4965_isr(int irq, void *data)
  3902. {
  3903. struct iwl_priv *priv = data;
  3904. u32 inta, inta_mask;
  3905. u32 inta_fh;
  3906. if (!priv)
  3907. return IRQ_NONE;
  3908. spin_lock(&priv->lock);
  3909. /* Disable (but don't clear!) interrupts here to avoid
  3910. * back-to-back ISRs and sporadic interrupts from our NIC.
  3911. * If we have something to service, the tasklet will re-enable ints.
  3912. * If we *don't* have something, we'll re-enable before leaving here. */
  3913. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  3914. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3915. /* Discover which interrupts are active/pending */
  3916. inta = iwl_read32(priv, CSR_INT);
  3917. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3918. /* Ignore interrupt if there's nothing in NIC to service.
  3919. * This may be due to IRQ shared with another device,
  3920. * or due to sporadic interrupts thrown from our NIC. */
  3921. if (!inta && !inta_fh) {
  3922. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  3923. goto none;
  3924. }
  3925. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  3926. /* Hardware disappeared. It might have already raised
  3927. * an interrupt */
  3928. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  3929. goto unplugged;
  3930. }
  3931. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3932. inta, inta_mask, inta_fh);
  3933. inta &= ~CSR_INT_BIT_SCD;
  3934. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  3935. if (likely(inta || inta_fh))
  3936. tasklet_schedule(&priv->irq_tasklet);
  3937. unplugged:
  3938. spin_unlock(&priv->lock);
  3939. return IRQ_HANDLED;
  3940. none:
  3941. /* re-enable interrupts here since we don't have anything to service. */
  3942. /* only Re-enable if diabled by irq */
  3943. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3944. iwl4965_enable_interrupts(priv);
  3945. spin_unlock(&priv->lock);
  3946. return IRQ_NONE;
  3947. }
  3948. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  3949. * sending probe req. This should be set long enough to hear probe responses
  3950. * from more than one AP. */
  3951. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  3952. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  3953. /* For faster active scanning, scan will move to the next channel if fewer than
  3954. * PLCP_QUIET_THRESH packets are heard on this channel within
  3955. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  3956. * time if it's a quiet channel (nothing responded to our probe, and there's
  3957. * no other traffic).
  3958. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  3959. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  3960. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  3961. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  3962. * Must be set longer than active dwell time.
  3963. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  3964. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  3965. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  3966. #define IWL_PASSIVE_DWELL_BASE (100)
  3967. #define IWL_CHANNEL_TUNE_TIME 5
  3968. static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
  3969. enum ieee80211_band band)
  3970. {
  3971. if (band == IEEE80211_BAND_5GHZ)
  3972. return IWL_ACTIVE_DWELL_TIME_52;
  3973. else
  3974. return IWL_ACTIVE_DWELL_TIME_24;
  3975. }
  3976. static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
  3977. enum ieee80211_band band)
  3978. {
  3979. u16 active = iwl4965_get_active_dwell_time(priv, band);
  3980. u16 passive = (band != IEEE80211_BAND_5GHZ) ?
  3981. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  3982. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  3983. if (iwl_is_associated(priv)) {
  3984. /* If we're associated, we clamp the maximum passive
  3985. * dwell time to be 98% of the beacon interval (minus
  3986. * 2 * channel tune time) */
  3987. passive = priv->beacon_int;
  3988. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  3989. passive = IWL_PASSIVE_DWELL_BASE;
  3990. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  3991. }
  3992. if (passive <= active)
  3993. passive = active + 1;
  3994. return passive;
  3995. }
  3996. static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
  3997. enum ieee80211_band band,
  3998. u8 is_active, u8 direct_mask,
  3999. struct iwl4965_scan_channel *scan_ch)
  4000. {
  4001. const struct ieee80211_channel *channels = NULL;
  4002. const struct ieee80211_supported_band *sband;
  4003. const struct iwl_channel_info *ch_info;
  4004. u16 passive_dwell = 0;
  4005. u16 active_dwell = 0;
  4006. int added, i;
  4007. sband = iwl4965_get_hw_mode(priv, band);
  4008. if (!sband)
  4009. return 0;
  4010. channels = sband->channels;
  4011. active_dwell = iwl4965_get_active_dwell_time(priv, band);
  4012. passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
  4013. for (i = 0, added = 0; i < sband->n_channels; i++) {
  4014. if (channels[i].flags & IEEE80211_CHAN_DISABLED)
  4015. continue;
  4016. if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
  4017. le16_to_cpu(priv->active_rxon.channel)) {
  4018. if (iwl_is_associated(priv)) {
  4019. IWL_DEBUG_SCAN
  4020. ("Skipping current channel %d\n",
  4021. le16_to_cpu(priv->active_rxon.channel));
  4022. continue;
  4023. }
  4024. } else if (priv->only_active_channel)
  4025. continue;
  4026. scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
  4027. ch_info = iwl_get_channel_info(priv, band,
  4028. scan_ch->channel);
  4029. if (!is_channel_valid(ch_info)) {
  4030. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4031. scan_ch->channel);
  4032. continue;
  4033. }
  4034. if (!is_active || is_channel_passive(ch_info) ||
  4035. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
  4036. scan_ch->type = 0; /* passive */
  4037. else
  4038. scan_ch->type = 1; /* active */
  4039. if (scan_ch->type & 1)
  4040. scan_ch->type |= (direct_mask << 1);
  4041. if (is_channel_narrow(ch_info))
  4042. scan_ch->type |= (1 << 7);
  4043. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4044. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4045. /* Set txpower levels to defaults */
  4046. scan_ch->tpc.dsp_atten = 110;
  4047. /* scan_pwr_info->tpc.dsp_atten; */
  4048. /*scan_pwr_info->tpc.tx_gain; */
  4049. if (band == IEEE80211_BAND_5GHZ)
  4050. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4051. else {
  4052. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4053. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4054. * power level:
  4055. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4056. */
  4057. }
  4058. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4059. scan_ch->channel,
  4060. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4061. (scan_ch->type & 1) ?
  4062. active_dwell : passive_dwell);
  4063. scan_ch++;
  4064. added++;
  4065. }
  4066. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4067. return added;
  4068. }
  4069. static void iwl4965_init_hw_rates(struct iwl_priv *priv,
  4070. struct ieee80211_rate *rates)
  4071. {
  4072. int i;
  4073. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4074. rates[i].bitrate = iwl4965_rates[i].ieee * 5;
  4075. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  4076. rates[i].hw_value_short = i;
  4077. rates[i].flags = 0;
  4078. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  4079. /*
  4080. * If CCK != 1M then set short preamble rate flag.
  4081. */
  4082. rates[i].flags |=
  4083. (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  4084. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  4085. }
  4086. }
  4087. }
  4088. /**
  4089. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4090. */
  4091. int iwl4965_init_geos(struct iwl_priv *priv)
  4092. {
  4093. struct iwl_channel_info *ch;
  4094. struct ieee80211_supported_band *sband;
  4095. struct ieee80211_channel *channels;
  4096. struct ieee80211_channel *geo_ch;
  4097. struct ieee80211_rate *rates;
  4098. int i = 0;
  4099. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  4100. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  4101. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4102. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4103. return 0;
  4104. }
  4105. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4106. priv->channel_count, GFP_KERNEL);
  4107. if (!channels)
  4108. return -ENOMEM;
  4109. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  4110. GFP_KERNEL);
  4111. if (!rates) {
  4112. kfree(channels);
  4113. return -ENOMEM;
  4114. }
  4115. /* 5.2GHz channels start after the 2.4GHz channels */
  4116. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4117. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4118. /* just OFDM */
  4119. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  4120. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  4121. iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_5GHZ);
  4122. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4123. sband->channels = channels;
  4124. /* OFDM & CCK */
  4125. sband->bitrates = rates;
  4126. sband->n_bitrates = IWL_RATE_COUNT;
  4127. iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_2GHZ);
  4128. priv->ieee_channels = channels;
  4129. priv->ieee_rates = rates;
  4130. iwl4965_init_hw_rates(priv, rates);
  4131. for (i = 0; i < priv->channel_count; i++) {
  4132. ch = &priv->channel_info[i];
  4133. /* FIXME: might be removed if scan is OK */
  4134. if (!is_channel_valid(ch))
  4135. continue;
  4136. if (is_channel_a_band(ch))
  4137. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4138. else
  4139. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4140. geo_ch = &sband->channels[sband->n_channels++];
  4141. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  4142. geo_ch->max_power = ch->max_power_avg;
  4143. geo_ch->max_antenna_gain = 0xff;
  4144. geo_ch->hw_value = ch->channel;
  4145. if (is_channel_valid(ch)) {
  4146. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  4147. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  4148. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  4149. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  4150. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4151. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  4152. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4153. priv->max_channel_txpower_limit =
  4154. ch->max_power_avg;
  4155. } else {
  4156. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  4157. }
  4158. /* Save flags for reg domain usage */
  4159. geo_ch->orig_flags = geo_ch->flags;
  4160. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  4161. ch->channel, geo_ch->center_freq,
  4162. is_channel_a_band(ch) ? "5.2" : "2.4",
  4163. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  4164. "restricted" : "valid",
  4165. geo_ch->flags);
  4166. }
  4167. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  4168. priv->cfg->sku & IWL_SKU_A) {
  4169. printk(KERN_INFO DRV_NAME
  4170. ": Incorrectly detected BG card as ABG. Please send "
  4171. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4172. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4173. priv->cfg->sku &= ~IWL_SKU_A;
  4174. }
  4175. printk(KERN_INFO DRV_NAME
  4176. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4177. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  4178. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  4179. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  4180. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  4181. &priv->bands[IEEE80211_BAND_2GHZ];
  4182. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  4183. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  4184. &priv->bands[IEEE80211_BAND_5GHZ];
  4185. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4186. return 0;
  4187. }
  4188. /*
  4189. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  4190. */
  4191. void iwl4965_free_geos(struct iwl_priv *priv)
  4192. {
  4193. kfree(priv->ieee_channels);
  4194. kfree(priv->ieee_rates);
  4195. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4196. }
  4197. /******************************************************************************
  4198. *
  4199. * uCode download functions
  4200. *
  4201. ******************************************************************************/
  4202. static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
  4203. {
  4204. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4205. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4206. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4207. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4208. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4209. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4210. }
  4211. /**
  4212. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4213. * looking at all data.
  4214. */
  4215. static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  4216. u32 len)
  4217. {
  4218. u32 val;
  4219. u32 save_len = len;
  4220. int rc = 0;
  4221. u32 errcnt;
  4222. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4223. rc = iwl_grab_nic_access(priv);
  4224. if (rc)
  4225. return rc;
  4226. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4227. errcnt = 0;
  4228. for (; len > 0; len -= sizeof(u32), image++) {
  4229. /* read data comes through single port, auto-incr addr */
  4230. /* NOTE: Use the debugless read so we don't flood kernel log
  4231. * if IWL_DL_IO is set */
  4232. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4233. if (val != le32_to_cpu(*image)) {
  4234. IWL_ERROR("uCode INST section is invalid at "
  4235. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4236. save_len - len, val, le32_to_cpu(*image));
  4237. rc = -EIO;
  4238. errcnt++;
  4239. if (errcnt >= 20)
  4240. break;
  4241. }
  4242. }
  4243. iwl_release_nic_access(priv);
  4244. if (!errcnt)
  4245. IWL_DEBUG_INFO
  4246. ("ucode image in INSTRUCTION memory is good\n");
  4247. return rc;
  4248. }
  4249. /**
  4250. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4251. * using sample data 100 bytes apart. If these sample points are good,
  4252. * it's a pretty good bet that everything between them is good, too.
  4253. */
  4254. static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4255. {
  4256. u32 val;
  4257. int rc = 0;
  4258. u32 errcnt = 0;
  4259. u32 i;
  4260. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4261. rc = iwl_grab_nic_access(priv);
  4262. if (rc)
  4263. return rc;
  4264. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4265. /* read data comes through single port, auto-incr addr */
  4266. /* NOTE: Use the debugless read so we don't flood kernel log
  4267. * if IWL_DL_IO is set */
  4268. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  4269. i + RTC_INST_LOWER_BOUND);
  4270. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4271. if (val != le32_to_cpu(*image)) {
  4272. #if 0 /* Enable this if you want to see details */
  4273. IWL_ERROR("uCode INST section is invalid at "
  4274. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4275. i, val, *image);
  4276. #endif
  4277. rc = -EIO;
  4278. errcnt++;
  4279. if (errcnt >= 3)
  4280. break;
  4281. }
  4282. }
  4283. iwl_release_nic_access(priv);
  4284. return rc;
  4285. }
  4286. /**
  4287. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  4288. * and verify its contents
  4289. */
  4290. static int iwl4965_verify_ucode(struct iwl_priv *priv)
  4291. {
  4292. __le32 *image;
  4293. u32 len;
  4294. int rc = 0;
  4295. /* Try bootstrap */
  4296. image = (__le32 *)priv->ucode_boot.v_addr;
  4297. len = priv->ucode_boot.len;
  4298. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4299. if (rc == 0) {
  4300. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4301. return 0;
  4302. }
  4303. /* Try initialize */
  4304. image = (__le32 *)priv->ucode_init.v_addr;
  4305. len = priv->ucode_init.len;
  4306. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4307. if (rc == 0) {
  4308. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4309. return 0;
  4310. }
  4311. /* Try runtime/protocol */
  4312. image = (__le32 *)priv->ucode_code.v_addr;
  4313. len = priv->ucode_code.len;
  4314. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4315. if (rc == 0) {
  4316. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4317. return 0;
  4318. }
  4319. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4320. /* Since nothing seems to match, show first several data entries in
  4321. * instruction SRAM, so maybe visual inspection will give a clue.
  4322. * Selection of bootstrap image (vs. other images) is arbitrary. */
  4323. image = (__le32 *)priv->ucode_boot.v_addr;
  4324. len = priv->ucode_boot.len;
  4325. rc = iwl4965_verify_inst_full(priv, image, len);
  4326. return rc;
  4327. }
  4328. /* check contents of special bootstrap uCode SRAM */
  4329. static int iwl4965_verify_bsm(struct iwl_priv *priv)
  4330. {
  4331. __le32 *image = priv->ucode_boot.v_addr;
  4332. u32 len = priv->ucode_boot.len;
  4333. u32 reg;
  4334. u32 val;
  4335. IWL_DEBUG_INFO("Begin verify bsm\n");
  4336. /* verify BSM SRAM contents */
  4337. val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  4338. for (reg = BSM_SRAM_LOWER_BOUND;
  4339. reg < BSM_SRAM_LOWER_BOUND + len;
  4340. reg += sizeof(u32), image ++) {
  4341. val = iwl_read_prph(priv, reg);
  4342. if (val != le32_to_cpu(*image)) {
  4343. IWL_ERROR("BSM uCode verification failed at "
  4344. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  4345. BSM_SRAM_LOWER_BOUND,
  4346. reg - BSM_SRAM_LOWER_BOUND, len,
  4347. val, le32_to_cpu(*image));
  4348. return -EIO;
  4349. }
  4350. }
  4351. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  4352. return 0;
  4353. }
  4354. /**
  4355. * iwl4965_load_bsm - Load bootstrap instructions
  4356. *
  4357. * BSM operation:
  4358. *
  4359. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  4360. * in special SRAM that does not power down during RFKILL. When powering back
  4361. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  4362. * the bootstrap program into the on-board processor, and starts it.
  4363. *
  4364. * The bootstrap program loads (via DMA) instructions and data for a new
  4365. * program from host DRAM locations indicated by the host driver in the
  4366. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  4367. * automatically.
  4368. *
  4369. * When initializing the NIC, the host driver points the BSM to the
  4370. * "initialize" uCode image. This uCode sets up some internal data, then
  4371. * notifies host via "initialize alive" that it is complete.
  4372. *
  4373. * The host then replaces the BSM_DRAM_* pointer values to point to the
  4374. * normal runtime uCode instructions and a backup uCode data cache buffer
  4375. * (filled initially with starting data values for the on-board processor),
  4376. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  4377. * which begins normal operation.
  4378. *
  4379. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  4380. * the backup data cache in DRAM before SRAM is powered down.
  4381. *
  4382. * When powering back up, the BSM loads the bootstrap program. This reloads
  4383. * the runtime uCode instructions and the backup data cache into SRAM,
  4384. * and re-launches the runtime uCode from where it left off.
  4385. */
  4386. static int iwl4965_load_bsm(struct iwl_priv *priv)
  4387. {
  4388. __le32 *image = priv->ucode_boot.v_addr;
  4389. u32 len = priv->ucode_boot.len;
  4390. dma_addr_t pinst;
  4391. dma_addr_t pdata;
  4392. u32 inst_len;
  4393. u32 data_len;
  4394. int rc;
  4395. int i;
  4396. u32 done;
  4397. u32 reg_offset;
  4398. IWL_DEBUG_INFO("Begin load bsm\n");
  4399. /* make sure bootstrap program is no larger than BSM's SRAM size */
  4400. if (len > IWL_MAX_BSM_SIZE)
  4401. return -EINVAL;
  4402. /* Tell bootstrap uCode where to find the "Initialize" uCode
  4403. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  4404. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  4405. * after the "initialize" uCode has run, to point to
  4406. * runtime/protocol instructions and backup data cache. */
  4407. pinst = priv->ucode_init.p_addr >> 4;
  4408. pdata = priv->ucode_init_data.p_addr >> 4;
  4409. inst_len = priv->ucode_init.len;
  4410. data_len = priv->ucode_init_data.len;
  4411. rc = iwl_grab_nic_access(priv);
  4412. if (rc)
  4413. return rc;
  4414. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4415. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4416. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  4417. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  4418. /* Fill BSM memory with bootstrap instructions */
  4419. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  4420. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  4421. reg_offset += sizeof(u32), image++)
  4422. _iwl_write_prph(priv, reg_offset,
  4423. le32_to_cpu(*image));
  4424. rc = iwl4965_verify_bsm(priv);
  4425. if (rc) {
  4426. iwl_release_nic_access(priv);
  4427. return rc;
  4428. }
  4429. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  4430. iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  4431. iwl_write_prph(priv, BSM_WR_MEM_DST_REG,
  4432. RTC_INST_LOWER_BOUND);
  4433. iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  4434. /* Load bootstrap code into instruction SRAM now,
  4435. * to prepare to load "initialize" uCode */
  4436. iwl_write_prph(priv, BSM_WR_CTRL_REG,
  4437. BSM_WR_CTRL_REG_BIT_START);
  4438. /* Wait for load of bootstrap uCode to finish */
  4439. for (i = 0; i < 100; i++) {
  4440. done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
  4441. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  4442. break;
  4443. udelay(10);
  4444. }
  4445. if (i < 100)
  4446. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  4447. else {
  4448. IWL_ERROR("BSM write did not complete!\n");
  4449. return -EIO;
  4450. }
  4451. /* Enable future boot loads whenever power management unit triggers it
  4452. * (e.g. when powering back up after power-save shutdown) */
  4453. iwl_write_prph(priv, BSM_WR_CTRL_REG,
  4454. BSM_WR_CTRL_REG_BIT_START_EN);
  4455. iwl_release_nic_access(priv);
  4456. return 0;
  4457. }
  4458. static void iwl4965_nic_start(struct iwl_priv *priv)
  4459. {
  4460. /* Remove all resets to allow NIC to operate */
  4461. iwl_write32(priv, CSR_RESET, 0);
  4462. }
  4463. /**
  4464. * iwl4965_read_ucode - Read uCode images from disk file.
  4465. *
  4466. * Copy into buffers for card to fetch via bus-mastering
  4467. */
  4468. static int iwl4965_read_ucode(struct iwl_priv *priv)
  4469. {
  4470. struct iwl4965_ucode *ucode;
  4471. int ret;
  4472. const struct firmware *ucode_raw;
  4473. const char *name = priv->cfg->fw_name;
  4474. u8 *src;
  4475. size_t len;
  4476. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  4477. /* Ask kernel firmware_class module to get the boot firmware off disk.
  4478. * request_firmware() is synchronous, file is in memory on return. */
  4479. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  4480. if (ret < 0) {
  4481. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  4482. name, ret);
  4483. goto error;
  4484. }
  4485. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  4486. name, ucode_raw->size);
  4487. /* Make sure that we got at least our header! */
  4488. if (ucode_raw->size < sizeof(*ucode)) {
  4489. IWL_ERROR("File size way too small!\n");
  4490. ret = -EINVAL;
  4491. goto err_release;
  4492. }
  4493. /* Data from ucode file: header followed by uCode images */
  4494. ucode = (void *)ucode_raw->data;
  4495. ver = le32_to_cpu(ucode->ver);
  4496. inst_size = le32_to_cpu(ucode->inst_size);
  4497. data_size = le32_to_cpu(ucode->data_size);
  4498. init_size = le32_to_cpu(ucode->init_size);
  4499. init_data_size = le32_to_cpu(ucode->init_data_size);
  4500. boot_size = le32_to_cpu(ucode->boot_size);
  4501. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  4502. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  4503. inst_size);
  4504. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  4505. data_size);
  4506. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  4507. init_size);
  4508. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  4509. init_data_size);
  4510. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  4511. boot_size);
  4512. /* Verify size of file vs. image size info in file's header */
  4513. if (ucode_raw->size < sizeof(*ucode) +
  4514. inst_size + data_size + init_size +
  4515. init_data_size + boot_size) {
  4516. IWL_DEBUG_INFO("uCode file size %d too small\n",
  4517. (int)ucode_raw->size);
  4518. ret = -EINVAL;
  4519. goto err_release;
  4520. }
  4521. /* Verify that uCode images will fit in card's SRAM */
  4522. if (inst_size > IWL_MAX_INST_SIZE) {
  4523. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  4524. inst_size);
  4525. ret = -EINVAL;
  4526. goto err_release;
  4527. }
  4528. if (data_size > IWL_MAX_DATA_SIZE) {
  4529. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  4530. data_size);
  4531. ret = -EINVAL;
  4532. goto err_release;
  4533. }
  4534. if (init_size > IWL_MAX_INST_SIZE) {
  4535. IWL_DEBUG_INFO
  4536. ("uCode init instr len %d too large to fit in\n",
  4537. init_size);
  4538. ret = -EINVAL;
  4539. goto err_release;
  4540. }
  4541. if (init_data_size > IWL_MAX_DATA_SIZE) {
  4542. IWL_DEBUG_INFO
  4543. ("uCode init data len %d too large to fit in\n",
  4544. init_data_size);
  4545. ret = -EINVAL;
  4546. goto err_release;
  4547. }
  4548. if (boot_size > IWL_MAX_BSM_SIZE) {
  4549. IWL_DEBUG_INFO
  4550. ("uCode boot instr len %d too large to fit in\n",
  4551. boot_size);
  4552. ret = -EINVAL;
  4553. goto err_release;
  4554. }
  4555. /* Allocate ucode buffers for card's bus-master loading ... */
  4556. /* Runtime instructions and 2 copies of data:
  4557. * 1) unmodified from disk
  4558. * 2) backup cache for save/restore during power-downs */
  4559. priv->ucode_code.len = inst_size;
  4560. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  4561. priv->ucode_data.len = data_size;
  4562. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  4563. priv->ucode_data_backup.len = data_size;
  4564. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4565. /* Initialization instructions and data */
  4566. if (init_size && init_data_size) {
  4567. priv->ucode_init.len = init_size;
  4568. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  4569. priv->ucode_init_data.len = init_data_size;
  4570. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4571. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  4572. goto err_pci_alloc;
  4573. }
  4574. /* Bootstrap (instructions only, no data) */
  4575. if (boot_size) {
  4576. priv->ucode_boot.len = boot_size;
  4577. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4578. if (!priv->ucode_boot.v_addr)
  4579. goto err_pci_alloc;
  4580. }
  4581. /* Copy images into buffers for card's bus-master reads ... */
  4582. /* Runtime instructions (first block of data in file) */
  4583. src = &ucode->data[0];
  4584. len = priv->ucode_code.len;
  4585. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  4586. memcpy(priv->ucode_code.v_addr, src, len);
  4587. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  4588. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  4589. /* Runtime data (2nd block)
  4590. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  4591. src = &ucode->data[inst_size];
  4592. len = priv->ucode_data.len;
  4593. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  4594. memcpy(priv->ucode_data.v_addr, src, len);
  4595. memcpy(priv->ucode_data_backup.v_addr, src, len);
  4596. /* Initialization instructions (3rd block) */
  4597. if (init_size) {
  4598. src = &ucode->data[inst_size + data_size];
  4599. len = priv->ucode_init.len;
  4600. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  4601. len);
  4602. memcpy(priv->ucode_init.v_addr, src, len);
  4603. }
  4604. /* Initialization data (4th block) */
  4605. if (init_data_size) {
  4606. src = &ucode->data[inst_size + data_size + init_size];
  4607. len = priv->ucode_init_data.len;
  4608. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  4609. len);
  4610. memcpy(priv->ucode_init_data.v_addr, src, len);
  4611. }
  4612. /* Bootstrap instructions (5th block) */
  4613. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  4614. len = priv->ucode_boot.len;
  4615. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  4616. memcpy(priv->ucode_boot.v_addr, src, len);
  4617. /* We have our copies now, allow OS release its copies */
  4618. release_firmware(ucode_raw);
  4619. return 0;
  4620. err_pci_alloc:
  4621. IWL_ERROR("failed to allocate pci memory\n");
  4622. ret = -ENOMEM;
  4623. iwl4965_dealloc_ucode_pci(priv);
  4624. err_release:
  4625. release_firmware(ucode_raw);
  4626. error:
  4627. return ret;
  4628. }
  4629. /**
  4630. * iwl4965_set_ucode_ptrs - Set uCode address location
  4631. *
  4632. * Tell initialization uCode where to find runtime uCode.
  4633. *
  4634. * BSM registers initially contain pointers to initialization uCode.
  4635. * We need to replace them to load runtime uCode inst and data,
  4636. * and to save runtime data when powering down.
  4637. */
  4638. static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
  4639. {
  4640. dma_addr_t pinst;
  4641. dma_addr_t pdata;
  4642. int rc = 0;
  4643. unsigned long flags;
  4644. /* bits 35:4 for 4965 */
  4645. pinst = priv->ucode_code.p_addr >> 4;
  4646. pdata = priv->ucode_data_backup.p_addr >> 4;
  4647. spin_lock_irqsave(&priv->lock, flags);
  4648. rc = iwl_grab_nic_access(priv);
  4649. if (rc) {
  4650. spin_unlock_irqrestore(&priv->lock, flags);
  4651. return rc;
  4652. }
  4653. /* Tell bootstrap uCode where to find image to load */
  4654. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4655. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4656. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  4657. priv->ucode_data.len);
  4658. /* Inst bytecount must be last to set up, bit 31 signals uCode
  4659. * that all new ptr/size info is in place */
  4660. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  4661. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  4662. iwl_release_nic_access(priv);
  4663. spin_unlock_irqrestore(&priv->lock, flags);
  4664. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  4665. return rc;
  4666. }
  4667. /**
  4668. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  4669. *
  4670. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  4671. *
  4672. * The 4965 "initialize" ALIVE reply contains calibration data for:
  4673. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  4674. * (3945 does not contain this data).
  4675. *
  4676. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  4677. */
  4678. static void iwl4965_init_alive_start(struct iwl_priv *priv)
  4679. {
  4680. /* Check alive response for "valid" sign from uCode */
  4681. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  4682. /* We had an error bringing up the hardware, so take it
  4683. * all the way back down so we can try again */
  4684. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  4685. goto restart;
  4686. }
  4687. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  4688. * This is a paranoid check, because we would not have gotten the
  4689. * "initialize" alive if code weren't properly loaded. */
  4690. if (iwl4965_verify_ucode(priv)) {
  4691. /* Runtime instruction load was bad;
  4692. * take it all the way back down so we can try again */
  4693. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  4694. goto restart;
  4695. }
  4696. /* Calculate temperature */
  4697. priv->temperature = iwl4965_get_temperature(priv);
  4698. /* Send pointers to protocol/runtime uCode image ... init code will
  4699. * load and launch runtime uCode, which will send us another "Alive"
  4700. * notification. */
  4701. IWL_DEBUG_INFO("Initialization Alive received.\n");
  4702. if (iwl4965_set_ucode_ptrs(priv)) {
  4703. /* Runtime instruction load won't happen;
  4704. * take it all the way back down so we can try again */
  4705. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  4706. goto restart;
  4707. }
  4708. return;
  4709. restart:
  4710. queue_work(priv->workqueue, &priv->restart);
  4711. }
  4712. /**
  4713. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  4714. * from protocol/runtime uCode (initialization uCode's
  4715. * Alive gets handled by iwl4965_init_alive_start()).
  4716. */
  4717. static void iwl4965_alive_start(struct iwl_priv *priv)
  4718. {
  4719. int rc = 0;
  4720. IWL_DEBUG_INFO("Runtime Alive received.\n");
  4721. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  4722. /* We had an error bringing up the hardware, so take it
  4723. * all the way back down so we can try again */
  4724. IWL_DEBUG_INFO("Alive failed.\n");
  4725. goto restart;
  4726. }
  4727. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  4728. * This is a paranoid check, because we would not have gotten the
  4729. * "runtime" alive if code weren't properly loaded. */
  4730. if (iwl4965_verify_ucode(priv)) {
  4731. /* Runtime instruction load was bad;
  4732. * take it all the way back down so we can try again */
  4733. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  4734. goto restart;
  4735. }
  4736. iwlcore_clear_stations_table(priv);
  4737. rc = iwl4965_alive_notify(priv);
  4738. if (rc) {
  4739. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  4740. rc);
  4741. goto restart;
  4742. }
  4743. /* After the ALIVE response, we can send host commands to 4965 uCode */
  4744. set_bit(STATUS_ALIVE, &priv->status);
  4745. /* Clear out the uCode error bit if it is set */
  4746. clear_bit(STATUS_FW_ERROR, &priv->status);
  4747. if (iwl_is_rfkill(priv))
  4748. return;
  4749. ieee80211_start_queues(priv->hw);
  4750. priv->active_rate = priv->rates_mask;
  4751. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  4752. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  4753. if (iwl_is_associated(priv)) {
  4754. struct iwl4965_rxon_cmd *active_rxon =
  4755. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  4756. memcpy(&priv->staging_rxon, &priv->active_rxon,
  4757. sizeof(priv->staging_rxon));
  4758. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4759. } else {
  4760. /* Initialize our rx_config data */
  4761. iwl4965_connection_init_rx_config(priv);
  4762. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  4763. }
  4764. /* Configure Bluetooth device coexistence support */
  4765. iwl4965_send_bt_config(priv);
  4766. /* Configure the adapter for unassociated operation */
  4767. iwl4965_commit_rxon(priv);
  4768. /* At this point, the NIC is initialized and operational */
  4769. priv->notif_missed_beacons = 0;
  4770. iwl4965_rf_kill_ct_config(priv);
  4771. iwl_leds_register(priv);
  4772. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  4773. set_bit(STATUS_READY, &priv->status);
  4774. wake_up_interruptible(&priv->wait_command_queue);
  4775. if (priv->error_recovering)
  4776. iwl4965_error_recovery(priv);
  4777. iwlcore_low_level_notify(priv, IWLCORE_START_EVT);
  4778. return;
  4779. restart:
  4780. queue_work(priv->workqueue, &priv->restart);
  4781. }
  4782. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
  4783. static void __iwl4965_down(struct iwl_priv *priv)
  4784. {
  4785. unsigned long flags;
  4786. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  4787. struct ieee80211_conf *conf = NULL;
  4788. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  4789. conf = ieee80211_get_hw_conf(priv->hw);
  4790. if (!exit_pending)
  4791. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4792. iwl_leds_unregister(priv);
  4793. iwlcore_low_level_notify(priv, IWLCORE_STOP_EVT);
  4794. iwlcore_clear_stations_table(priv);
  4795. /* Unblock any waiting calls */
  4796. wake_up_interruptible_all(&priv->wait_command_queue);
  4797. /* Wipe out the EXIT_PENDING status bit if we are not actually
  4798. * exiting the module */
  4799. if (!exit_pending)
  4800. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  4801. /* stop and reset the on-board processor */
  4802. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  4803. /* tell the device to stop sending interrupts */
  4804. spin_lock_irqsave(&priv->lock, flags);
  4805. iwl4965_disable_interrupts(priv);
  4806. spin_unlock_irqrestore(&priv->lock, flags);
  4807. iwl_synchronize_irq(priv);
  4808. if (priv->mac80211_registered)
  4809. ieee80211_stop_queues(priv->hw);
  4810. /* If we have not previously called iwl4965_init() then
  4811. * clear all bits but the RF Kill and SUSPEND bits and return */
  4812. if (!iwl_is_init(priv)) {
  4813. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4814. STATUS_RF_KILL_HW |
  4815. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4816. STATUS_RF_KILL_SW |
  4817. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4818. STATUS_GEO_CONFIGURED |
  4819. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4820. STATUS_IN_SUSPEND;
  4821. goto exit;
  4822. }
  4823. /* ...otherwise clear out all the status bits but the RF Kill and
  4824. * SUSPEND bits and continue taking the NIC down. */
  4825. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4826. STATUS_RF_KILL_HW |
  4827. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4828. STATUS_RF_KILL_SW |
  4829. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4830. STATUS_GEO_CONFIGURED |
  4831. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4832. STATUS_IN_SUSPEND |
  4833. test_bit(STATUS_FW_ERROR, &priv->status) <<
  4834. STATUS_FW_ERROR;
  4835. spin_lock_irqsave(&priv->lock, flags);
  4836. iwl_clear_bit(priv, CSR_GP_CNTRL,
  4837. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4838. spin_unlock_irqrestore(&priv->lock, flags);
  4839. iwl4965_hw_txq_ctx_stop(priv);
  4840. iwl4965_hw_rxq_stop(priv);
  4841. spin_lock_irqsave(&priv->lock, flags);
  4842. if (!iwl_grab_nic_access(priv)) {
  4843. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  4844. APMG_CLK_VAL_DMA_CLK_RQT);
  4845. iwl_release_nic_access(priv);
  4846. }
  4847. spin_unlock_irqrestore(&priv->lock, flags);
  4848. udelay(5);
  4849. iwl4965_hw_nic_stop_master(priv);
  4850. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  4851. iwl4965_hw_nic_reset(priv);
  4852. exit:
  4853. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  4854. if (priv->ibss_beacon)
  4855. dev_kfree_skb(priv->ibss_beacon);
  4856. priv->ibss_beacon = NULL;
  4857. /* clear out any free frames */
  4858. iwl4965_clear_free_frames(priv);
  4859. }
  4860. static void iwl4965_down(struct iwl_priv *priv)
  4861. {
  4862. mutex_lock(&priv->mutex);
  4863. __iwl4965_down(priv);
  4864. mutex_unlock(&priv->mutex);
  4865. iwl4965_cancel_deferred_work(priv);
  4866. }
  4867. #define MAX_HW_RESTARTS 5
  4868. static int __iwl4965_up(struct iwl_priv *priv)
  4869. {
  4870. int rc, i;
  4871. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4872. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  4873. return -EIO;
  4874. }
  4875. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  4876. IWL_WARNING("Radio disabled by SW RF kill (module "
  4877. "parameter)\n");
  4878. iwl_rfkill_set_hw_state(priv);
  4879. return -ENODEV;
  4880. }
  4881. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  4882. IWL_ERROR("ucode not available for device bringup\n");
  4883. return -EIO;
  4884. }
  4885. /* If platform's RF_KILL switch is NOT set to KILL */
  4886. if (iwl_read32(priv, CSR_GP_CNTRL) &
  4887. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  4888. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4889. else {
  4890. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4891. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  4892. iwl_rfkill_set_hw_state(priv);
  4893. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  4894. return -ENODEV;
  4895. }
  4896. }
  4897. iwl_rfkill_set_hw_state(priv);
  4898. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4899. rc = iwl4965_hw_nic_init(priv);
  4900. if (rc) {
  4901. IWL_ERROR("Unable to int nic\n");
  4902. return rc;
  4903. }
  4904. /* make sure rfkill handshake bits are cleared */
  4905. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4906. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  4907. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  4908. /* clear (again), then enable host interrupts */
  4909. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4910. iwl4965_enable_interrupts(priv);
  4911. /* really make sure rfkill handshake bits are cleared */
  4912. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4913. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4914. /* Copy original ucode data image from disk into backup cache.
  4915. * This will be used to initialize the on-board processor's
  4916. * data SRAM for a clean start when the runtime program first loads. */
  4917. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  4918. priv->ucode_data.len);
  4919. /* We return success when we resume from suspend and rf_kill is on. */
  4920. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  4921. return 0;
  4922. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  4923. iwlcore_clear_stations_table(priv);
  4924. /* load bootstrap state machine,
  4925. * load bootstrap program into processor's memory,
  4926. * prepare to load the "initialize" uCode */
  4927. rc = iwl4965_load_bsm(priv);
  4928. if (rc) {
  4929. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  4930. continue;
  4931. }
  4932. /* start card; "initialize" will load runtime ucode */
  4933. iwl4965_nic_start(priv);
  4934. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  4935. return 0;
  4936. }
  4937. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4938. __iwl4965_down(priv);
  4939. /* tried to restart and config the device for as long as our
  4940. * patience could withstand */
  4941. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  4942. return -EIO;
  4943. }
  4944. /*****************************************************************************
  4945. *
  4946. * Workqueue callbacks
  4947. *
  4948. *****************************************************************************/
  4949. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  4950. {
  4951. struct iwl_priv *priv =
  4952. container_of(data, struct iwl_priv, init_alive_start.work);
  4953. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4954. return;
  4955. mutex_lock(&priv->mutex);
  4956. iwl4965_init_alive_start(priv);
  4957. mutex_unlock(&priv->mutex);
  4958. }
  4959. static void iwl4965_bg_alive_start(struct work_struct *data)
  4960. {
  4961. struct iwl_priv *priv =
  4962. container_of(data, struct iwl_priv, alive_start.work);
  4963. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4964. return;
  4965. mutex_lock(&priv->mutex);
  4966. iwl4965_alive_start(priv);
  4967. mutex_unlock(&priv->mutex);
  4968. }
  4969. static void iwl4965_bg_rf_kill(struct work_struct *work)
  4970. {
  4971. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  4972. wake_up_interruptible(&priv->wait_command_queue);
  4973. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4974. return;
  4975. mutex_lock(&priv->mutex);
  4976. if (!iwl_is_rfkill(priv)) {
  4977. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  4978. "HW and/or SW RF Kill no longer active, restarting "
  4979. "device\n");
  4980. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  4981. queue_work(priv->workqueue, &priv->restart);
  4982. } else {
  4983. /* make sure mac80211 stop sending Tx frame */
  4984. if (priv->mac80211_registered)
  4985. ieee80211_stop_queues(priv->hw);
  4986. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  4987. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  4988. "disabled by SW switch\n");
  4989. else
  4990. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  4991. "Kill switch must be turned off for "
  4992. "wireless networking to work.\n");
  4993. }
  4994. iwl_rfkill_set_hw_state(priv);
  4995. mutex_unlock(&priv->mutex);
  4996. }
  4997. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  4998. static void iwl4965_bg_scan_check(struct work_struct *data)
  4999. {
  5000. struct iwl_priv *priv =
  5001. container_of(data, struct iwl_priv, scan_check.work);
  5002. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5003. return;
  5004. mutex_lock(&priv->mutex);
  5005. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5006. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5007. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5008. "Scan completion watchdog resetting adapter (%dms)\n",
  5009. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5010. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5011. iwl4965_send_scan_abort(priv);
  5012. }
  5013. mutex_unlock(&priv->mutex);
  5014. }
  5015. static void iwl4965_bg_request_scan(struct work_struct *data)
  5016. {
  5017. struct iwl_priv *priv =
  5018. container_of(data, struct iwl_priv, request_scan);
  5019. struct iwl_host_cmd cmd = {
  5020. .id = REPLY_SCAN_CMD,
  5021. .len = sizeof(struct iwl4965_scan_cmd),
  5022. .meta.flags = CMD_SIZE_HUGE,
  5023. };
  5024. struct iwl4965_scan_cmd *scan;
  5025. struct ieee80211_conf *conf = NULL;
  5026. u16 cmd_len;
  5027. enum ieee80211_band band;
  5028. u8 direct_mask;
  5029. int ret = 0;
  5030. conf = ieee80211_get_hw_conf(priv->hw);
  5031. mutex_lock(&priv->mutex);
  5032. if (!iwl_is_ready(priv)) {
  5033. IWL_WARNING("request scan called when driver not ready.\n");
  5034. goto done;
  5035. }
  5036. /* Make sure the scan wasn't cancelled before this queued work
  5037. * was given the chance to run... */
  5038. if (!test_bit(STATUS_SCANNING, &priv->status))
  5039. goto done;
  5040. /* This should never be called or scheduled if there is currently
  5041. * a scan active in the hardware. */
  5042. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5043. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5044. "Ignoring second request.\n");
  5045. ret = -EIO;
  5046. goto done;
  5047. }
  5048. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5049. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5050. goto done;
  5051. }
  5052. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5053. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5054. goto done;
  5055. }
  5056. if (iwl_is_rfkill(priv)) {
  5057. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5058. goto done;
  5059. }
  5060. if (!test_bit(STATUS_READY, &priv->status)) {
  5061. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5062. goto done;
  5063. }
  5064. if (!priv->scan_bands) {
  5065. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5066. goto done;
  5067. }
  5068. if (!priv->scan) {
  5069. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5070. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5071. if (!priv->scan) {
  5072. ret = -ENOMEM;
  5073. goto done;
  5074. }
  5075. }
  5076. scan = priv->scan;
  5077. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5078. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5079. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5080. if (iwl_is_associated(priv)) {
  5081. u16 interval = 0;
  5082. u32 extra;
  5083. u32 suspend_time = 100;
  5084. u32 scan_suspend_time = 100;
  5085. unsigned long flags;
  5086. IWL_DEBUG_INFO("Scanning while associated...\n");
  5087. spin_lock_irqsave(&priv->lock, flags);
  5088. interval = priv->beacon_int;
  5089. spin_unlock_irqrestore(&priv->lock, flags);
  5090. scan->suspend_time = 0;
  5091. scan->max_out_time = cpu_to_le32(200 * 1024);
  5092. if (!interval)
  5093. interval = suspend_time;
  5094. extra = (suspend_time / interval) << 22;
  5095. scan_suspend_time = (extra |
  5096. ((suspend_time % interval) * 1024));
  5097. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5098. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5099. scan_suspend_time, interval);
  5100. }
  5101. /* We should add the ability for user to lock to PASSIVE ONLY */
  5102. if (priv->one_direct_scan) {
  5103. IWL_DEBUG_SCAN
  5104. ("Kicking off one direct scan for '%s'\n",
  5105. iwl4965_escape_essid(priv->direct_ssid,
  5106. priv->direct_ssid_len));
  5107. scan->direct_scan[0].id = WLAN_EID_SSID;
  5108. scan->direct_scan[0].len = priv->direct_ssid_len;
  5109. memcpy(scan->direct_scan[0].ssid,
  5110. priv->direct_ssid, priv->direct_ssid_len);
  5111. direct_mask = 1;
  5112. } else if (!iwl_is_associated(priv) && priv->essid_len) {
  5113. scan->direct_scan[0].id = WLAN_EID_SSID;
  5114. scan->direct_scan[0].len = priv->essid_len;
  5115. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5116. direct_mask = 1;
  5117. } else {
  5118. direct_mask = 0;
  5119. }
  5120. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5121. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5122. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5123. switch (priv->scan_bands) {
  5124. case 2:
  5125. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5126. scan->tx_cmd.rate_n_flags =
  5127. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5128. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5129. scan->good_CRC_th = 0;
  5130. band = IEEE80211_BAND_2GHZ;
  5131. break;
  5132. case 1:
  5133. scan->tx_cmd.rate_n_flags =
  5134. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5135. RATE_MCS_ANT_B_MSK);
  5136. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5137. band = IEEE80211_BAND_5GHZ;
  5138. break;
  5139. default:
  5140. IWL_WARNING("Invalid scan band count\n");
  5141. goto done;
  5142. }
  5143. /* We don't build a direct scan probe request; the uCode will do
  5144. * that based on the direct_mask added to each channel entry */
  5145. cmd_len = iwl4965_fill_probe_req(priv, band,
  5146. (struct ieee80211_mgmt *)scan->data,
  5147. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
  5148. scan->tx_cmd.len = cpu_to_le16(cmd_len);
  5149. /* select Rx chains */
  5150. /* Force use of chains B and C (0x6) for scan Rx.
  5151. * Avoid A (0x1) because of its off-channel reception on A-band.
  5152. * MIMO is not used here, but value is required to make uCode happy. */
  5153. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5154. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5155. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5156. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5157. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5158. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5159. if (direct_mask) {
  5160. IWL_DEBUG_SCAN
  5161. ("Initiating direct scan for %s.\n",
  5162. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5163. scan->channel_count =
  5164. iwl4965_get_channels_for_scan(
  5165. priv, band, 1, /* active */
  5166. direct_mask,
  5167. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5168. } else {
  5169. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5170. scan->channel_count =
  5171. iwl4965_get_channels_for_scan(
  5172. priv, band, 0, /* passive */
  5173. direct_mask,
  5174. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5175. }
  5176. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5177. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5178. cmd.data = scan;
  5179. scan->len = cpu_to_le16(cmd.len);
  5180. set_bit(STATUS_SCAN_HW, &priv->status);
  5181. ret = iwl_send_cmd_sync(priv, &cmd);
  5182. if (ret)
  5183. goto done;
  5184. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5185. IWL_SCAN_CHECK_WATCHDOG);
  5186. mutex_unlock(&priv->mutex);
  5187. return;
  5188. done:
  5189. /* inform mac80211 scan aborted */
  5190. queue_work(priv->workqueue, &priv->scan_completed);
  5191. mutex_unlock(&priv->mutex);
  5192. }
  5193. static void iwl4965_bg_up(struct work_struct *data)
  5194. {
  5195. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  5196. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5197. return;
  5198. mutex_lock(&priv->mutex);
  5199. __iwl4965_up(priv);
  5200. mutex_unlock(&priv->mutex);
  5201. }
  5202. static void iwl4965_bg_restart(struct work_struct *data)
  5203. {
  5204. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  5205. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5206. return;
  5207. iwl4965_down(priv);
  5208. queue_work(priv->workqueue, &priv->up);
  5209. }
  5210. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  5211. {
  5212. struct iwl_priv *priv =
  5213. container_of(data, struct iwl_priv, rx_replenish);
  5214. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5215. return;
  5216. mutex_lock(&priv->mutex);
  5217. iwl4965_rx_replenish(priv);
  5218. mutex_unlock(&priv->mutex);
  5219. }
  5220. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  5221. static void iwl4965_bg_post_associate(struct work_struct *data)
  5222. {
  5223. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5224. post_associate.work);
  5225. struct ieee80211_conf *conf = NULL;
  5226. int ret = 0;
  5227. DECLARE_MAC_BUF(mac);
  5228. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5229. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5230. return;
  5231. }
  5232. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5233. priv->assoc_id,
  5234. print_mac(mac, priv->active_rxon.bssid_addr));
  5235. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5236. return;
  5237. mutex_lock(&priv->mutex);
  5238. if (!priv->vif || !priv->is_open) {
  5239. mutex_unlock(&priv->mutex);
  5240. return;
  5241. }
  5242. iwl4965_scan_cancel_timeout(priv, 200);
  5243. conf = ieee80211_get_hw_conf(priv->hw);
  5244. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5245. iwl4965_commit_rxon(priv);
  5246. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5247. iwl4965_setup_rxon_timing(priv);
  5248. ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5249. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5250. if (ret)
  5251. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5252. "Attempting to continue.\n");
  5253. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5254. #ifdef CONFIG_IWL4965_HT
  5255. if (priv->current_ht_config.is_ht)
  5256. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  5257. #endif /* CONFIG_IWL4965_HT*/
  5258. iwl4965_set_rxon_chain(priv);
  5259. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5260. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5261. priv->assoc_id, priv->beacon_int);
  5262. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5263. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5264. else
  5265. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5266. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5267. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5268. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5269. else
  5270. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5271. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5272. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5273. }
  5274. iwl4965_commit_rxon(priv);
  5275. switch (priv->iw_mode) {
  5276. case IEEE80211_IF_TYPE_STA:
  5277. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  5278. break;
  5279. case IEEE80211_IF_TYPE_IBSS:
  5280. /* clear out the station table */
  5281. iwlcore_clear_stations_table(priv);
  5282. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5283. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  5284. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  5285. iwl4965_send_beacon_cmd(priv);
  5286. break;
  5287. default:
  5288. IWL_ERROR("%s Should not be called in %d mode\n",
  5289. __FUNCTION__, priv->iw_mode);
  5290. break;
  5291. }
  5292. iwl4965_sequence_reset(priv);
  5293. #ifdef CONFIG_IWL4965_SENSITIVITY
  5294. /* Enable Rx differential gain and sensitivity calibrations */
  5295. iwl4965_chain_noise_reset(priv);
  5296. priv->start_calib = 1;
  5297. #endif /* CONFIG_IWL4965_SENSITIVITY */
  5298. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5299. priv->assoc_station_added = 1;
  5300. iwl4965_activate_qos(priv, 0);
  5301. /* we have just associated, don't start scan too early */
  5302. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  5303. mutex_unlock(&priv->mutex);
  5304. }
  5305. static void iwl4965_bg_abort_scan(struct work_struct *work)
  5306. {
  5307. struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
  5308. if (!iwl_is_ready(priv))
  5309. return;
  5310. mutex_lock(&priv->mutex);
  5311. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5312. iwl4965_send_scan_abort(priv);
  5313. mutex_unlock(&priv->mutex);
  5314. }
  5315. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  5316. static void iwl4965_bg_scan_completed(struct work_struct *work)
  5317. {
  5318. struct iwl_priv *priv =
  5319. container_of(work, struct iwl_priv, scan_completed);
  5320. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5321. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5322. return;
  5323. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  5324. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  5325. ieee80211_scan_completed(priv->hw);
  5326. /* Since setting the TXPOWER may have been deferred while
  5327. * performing the scan, fire one off */
  5328. mutex_lock(&priv->mutex);
  5329. iwl4965_hw_reg_send_txpower(priv);
  5330. mutex_unlock(&priv->mutex);
  5331. }
  5332. /*****************************************************************************
  5333. *
  5334. * mac80211 entry point functions
  5335. *
  5336. *****************************************************************************/
  5337. #define UCODE_READY_TIMEOUT (2 * HZ)
  5338. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  5339. {
  5340. struct iwl_priv *priv = hw->priv;
  5341. int ret;
  5342. IWL_DEBUG_MAC80211("enter\n");
  5343. if (pci_enable_device(priv->pci_dev)) {
  5344. IWL_ERROR("Fail to pci_enable_device\n");
  5345. return -ENODEV;
  5346. }
  5347. pci_restore_state(priv->pci_dev);
  5348. pci_enable_msi(priv->pci_dev);
  5349. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  5350. DRV_NAME, priv);
  5351. if (ret) {
  5352. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  5353. goto out_disable_msi;
  5354. }
  5355. /* we should be verifying the device is ready to be opened */
  5356. mutex_lock(&priv->mutex);
  5357. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  5358. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  5359. * ucode filename and max sizes are card-specific. */
  5360. if (!priv->ucode_code.len) {
  5361. ret = iwl4965_read_ucode(priv);
  5362. if (ret) {
  5363. IWL_ERROR("Could not read microcode: %d\n", ret);
  5364. mutex_unlock(&priv->mutex);
  5365. goto out_release_irq;
  5366. }
  5367. }
  5368. ret = __iwl4965_up(priv);
  5369. mutex_unlock(&priv->mutex);
  5370. if (ret)
  5371. goto out_release_irq;
  5372. IWL_DEBUG_INFO("Start UP work done.\n");
  5373. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  5374. return 0;
  5375. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  5376. * mac80211 will not be run successfully. */
  5377. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  5378. test_bit(STATUS_READY, &priv->status),
  5379. UCODE_READY_TIMEOUT);
  5380. if (!ret) {
  5381. if (!test_bit(STATUS_READY, &priv->status)) {
  5382. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  5383. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  5384. ret = -ETIMEDOUT;
  5385. goto out_release_irq;
  5386. }
  5387. }
  5388. priv->is_open = 1;
  5389. IWL_DEBUG_MAC80211("leave\n");
  5390. return 0;
  5391. out_release_irq:
  5392. free_irq(priv->pci_dev->irq, priv);
  5393. out_disable_msi:
  5394. pci_disable_msi(priv->pci_dev);
  5395. pci_disable_device(priv->pci_dev);
  5396. priv->is_open = 0;
  5397. IWL_DEBUG_MAC80211("leave - failed\n");
  5398. return ret;
  5399. }
  5400. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  5401. {
  5402. struct iwl_priv *priv = hw->priv;
  5403. IWL_DEBUG_MAC80211("enter\n");
  5404. if (!priv->is_open) {
  5405. IWL_DEBUG_MAC80211("leave - skip\n");
  5406. return;
  5407. }
  5408. priv->is_open = 0;
  5409. if (iwl_is_ready_rf(priv)) {
  5410. /* stop mac, cancel any scan request and clear
  5411. * RXON_FILTER_ASSOC_MSK BIT
  5412. */
  5413. mutex_lock(&priv->mutex);
  5414. iwl4965_scan_cancel_timeout(priv, 100);
  5415. cancel_delayed_work(&priv->post_associate);
  5416. mutex_unlock(&priv->mutex);
  5417. }
  5418. iwl4965_down(priv);
  5419. flush_workqueue(priv->workqueue);
  5420. free_irq(priv->pci_dev->irq, priv);
  5421. pci_disable_msi(priv->pci_dev);
  5422. pci_save_state(priv->pci_dev);
  5423. pci_disable_device(priv->pci_dev);
  5424. IWL_DEBUG_MAC80211("leave\n");
  5425. }
  5426. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5427. struct ieee80211_tx_control *ctl)
  5428. {
  5429. struct iwl_priv *priv = hw->priv;
  5430. IWL_DEBUG_MAC80211("enter\n");
  5431. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5432. IWL_DEBUG_MAC80211("leave - monitor\n");
  5433. return -1;
  5434. }
  5435. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5436. ctl->tx_rate->bitrate);
  5437. if (iwl4965_tx_skb(priv, skb, ctl))
  5438. dev_kfree_skb_any(skb);
  5439. IWL_DEBUG_MAC80211("leave\n");
  5440. return 0;
  5441. }
  5442. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  5443. struct ieee80211_if_init_conf *conf)
  5444. {
  5445. struct iwl_priv *priv = hw->priv;
  5446. unsigned long flags;
  5447. DECLARE_MAC_BUF(mac);
  5448. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  5449. if (priv->vif) {
  5450. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  5451. return -EOPNOTSUPP;
  5452. }
  5453. spin_lock_irqsave(&priv->lock, flags);
  5454. priv->vif = conf->vif;
  5455. spin_unlock_irqrestore(&priv->lock, flags);
  5456. mutex_lock(&priv->mutex);
  5457. if (conf->mac_addr) {
  5458. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  5459. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  5460. }
  5461. if (iwl_is_ready(priv))
  5462. iwl4965_set_mode(priv, conf->type);
  5463. mutex_unlock(&priv->mutex);
  5464. IWL_DEBUG_MAC80211("leave\n");
  5465. return 0;
  5466. }
  5467. /**
  5468. * iwl4965_mac_config - mac80211 config callback
  5469. *
  5470. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  5471. * be set inappropriately and the driver currently sets the hardware up to
  5472. * use it whenever needed.
  5473. */
  5474. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  5475. {
  5476. struct iwl_priv *priv = hw->priv;
  5477. const struct iwl_channel_info *ch_info;
  5478. unsigned long flags;
  5479. int ret = 0;
  5480. mutex_lock(&priv->mutex);
  5481. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  5482. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  5483. if (!iwl_is_ready(priv)) {
  5484. IWL_DEBUG_MAC80211("leave - not ready\n");
  5485. ret = -EIO;
  5486. goto out;
  5487. }
  5488. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  5489. test_bit(STATUS_SCANNING, &priv->status))) {
  5490. IWL_DEBUG_MAC80211("leave - scanning\n");
  5491. set_bit(STATUS_CONF_PENDING, &priv->status);
  5492. mutex_unlock(&priv->mutex);
  5493. return 0;
  5494. }
  5495. spin_lock_irqsave(&priv->lock, flags);
  5496. ch_info = iwl_get_channel_info(priv, conf->channel->band,
  5497. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5498. if (!is_channel_valid(ch_info)) {
  5499. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  5500. spin_unlock_irqrestore(&priv->lock, flags);
  5501. ret = -EINVAL;
  5502. goto out;
  5503. }
  5504. #ifdef CONFIG_IWL4965_HT
  5505. /* if we are switching from ht to 2.4 clear flags
  5506. * from any ht related info since 2.4 does not
  5507. * support ht */
  5508. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
  5509. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5510. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  5511. #endif
  5512. )
  5513. priv->staging_rxon.flags = 0;
  5514. #endif /* CONFIG_IWL4965_HT */
  5515. iwlcore_set_rxon_channel(priv, conf->channel->band,
  5516. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5517. iwl4965_set_flags_for_phymode(priv, conf->channel->band);
  5518. /* The list of supported rates and rate mask can be different
  5519. * for each band; since the band may have changed, reset
  5520. * the rate mask to what mac80211 lists */
  5521. iwl4965_set_rate(priv);
  5522. spin_unlock_irqrestore(&priv->lock, flags);
  5523. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5524. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  5525. iwl4965_hw_channel_switch(priv, conf->channel);
  5526. goto out;
  5527. }
  5528. #endif
  5529. if (priv->cfg->ops->lib->radio_kill_sw)
  5530. priv->cfg->ops->lib->radio_kill_sw(priv, !conf->radio_enabled);
  5531. if (!conf->radio_enabled) {
  5532. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  5533. goto out;
  5534. }
  5535. if (iwl_is_rfkill(priv)) {
  5536. IWL_DEBUG_MAC80211("leave - RF kill\n");
  5537. ret = -EIO;
  5538. goto out;
  5539. }
  5540. iwl4965_set_rate(priv);
  5541. if (memcmp(&priv->active_rxon,
  5542. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  5543. iwl4965_commit_rxon(priv);
  5544. else
  5545. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  5546. IWL_DEBUG_MAC80211("leave\n");
  5547. out:
  5548. clear_bit(STATUS_CONF_PENDING, &priv->status);
  5549. mutex_unlock(&priv->mutex);
  5550. return ret;
  5551. }
  5552. static void iwl4965_config_ap(struct iwl_priv *priv)
  5553. {
  5554. int ret = 0;
  5555. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5556. return;
  5557. /* The following should be done only at AP bring up */
  5558. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  5559. /* RXON - unassoc (to set timing command) */
  5560. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5561. iwl4965_commit_rxon(priv);
  5562. /* RXON Timing */
  5563. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5564. iwl4965_setup_rxon_timing(priv);
  5565. ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5566. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5567. if (ret)
  5568. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5569. "Attempting to continue.\n");
  5570. iwl4965_set_rxon_chain(priv);
  5571. /* FIXME: what should be the assoc_id for AP? */
  5572. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5573. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5574. priv->staging_rxon.flags |=
  5575. RXON_FLG_SHORT_PREAMBLE_MSK;
  5576. else
  5577. priv->staging_rxon.flags &=
  5578. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5579. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5580. if (priv->assoc_capability &
  5581. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5582. priv->staging_rxon.flags |=
  5583. RXON_FLG_SHORT_SLOT_MSK;
  5584. else
  5585. priv->staging_rxon.flags &=
  5586. ~RXON_FLG_SHORT_SLOT_MSK;
  5587. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5588. priv->staging_rxon.flags &=
  5589. ~RXON_FLG_SHORT_SLOT_MSK;
  5590. }
  5591. /* restore RXON assoc */
  5592. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5593. iwl4965_commit_rxon(priv);
  5594. iwl4965_activate_qos(priv, 1);
  5595. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5596. }
  5597. iwl4965_send_beacon_cmd(priv);
  5598. /* FIXME - we need to add code here to detect a totally new
  5599. * configuration, reset the AP, unassoc, rxon timing, assoc,
  5600. * clear sta table, add BCAST sta... */
  5601. }
  5602. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  5603. struct ieee80211_vif *vif,
  5604. struct ieee80211_if_conf *conf)
  5605. {
  5606. struct iwl_priv *priv = hw->priv;
  5607. DECLARE_MAC_BUF(mac);
  5608. unsigned long flags;
  5609. int rc;
  5610. if (conf == NULL)
  5611. return -EIO;
  5612. if (priv->vif != vif) {
  5613. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  5614. mutex_unlock(&priv->mutex);
  5615. return 0;
  5616. }
  5617. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  5618. (!conf->beacon || !conf->ssid_len)) {
  5619. IWL_DEBUG_MAC80211
  5620. ("Leaving in AP mode because HostAPD is not ready.\n");
  5621. return 0;
  5622. }
  5623. if (!iwl_is_alive(priv))
  5624. return -EAGAIN;
  5625. mutex_lock(&priv->mutex);
  5626. if (conf->bssid)
  5627. IWL_DEBUG_MAC80211("bssid: %s\n",
  5628. print_mac(mac, conf->bssid));
  5629. /*
  5630. * very dubious code was here; the probe filtering flag is never set:
  5631. *
  5632. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  5633. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  5634. */
  5635. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5636. if (!conf->bssid) {
  5637. conf->bssid = priv->mac_addr;
  5638. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  5639. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  5640. print_mac(mac, conf->bssid));
  5641. }
  5642. if (priv->ibss_beacon)
  5643. dev_kfree_skb(priv->ibss_beacon);
  5644. priv->ibss_beacon = conf->beacon;
  5645. }
  5646. if (iwl_is_rfkill(priv))
  5647. goto done;
  5648. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  5649. !is_multicast_ether_addr(conf->bssid)) {
  5650. /* If there is currently a HW scan going on in the background
  5651. * then we need to cancel it else the RXON below will fail. */
  5652. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  5653. IWL_WARNING("Aborted scan still in progress "
  5654. "after 100ms\n");
  5655. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  5656. mutex_unlock(&priv->mutex);
  5657. return -EAGAIN;
  5658. }
  5659. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  5660. /* TODO: Audit driver for usage of these members and see
  5661. * if mac80211 deprecates them (priv->bssid looks like it
  5662. * shouldn't be there, but I haven't scanned the IBSS code
  5663. * to verify) - jpk */
  5664. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  5665. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5666. iwl4965_config_ap(priv);
  5667. else {
  5668. rc = iwl4965_commit_rxon(priv);
  5669. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  5670. iwl4965_rxon_add_station(
  5671. priv, priv->active_rxon.bssid_addr, 1);
  5672. }
  5673. } else {
  5674. iwl4965_scan_cancel_timeout(priv, 100);
  5675. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5676. iwl4965_commit_rxon(priv);
  5677. }
  5678. done:
  5679. spin_lock_irqsave(&priv->lock, flags);
  5680. if (!conf->ssid_len)
  5681. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5682. else
  5683. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  5684. priv->essid_len = conf->ssid_len;
  5685. spin_unlock_irqrestore(&priv->lock, flags);
  5686. IWL_DEBUG_MAC80211("leave\n");
  5687. mutex_unlock(&priv->mutex);
  5688. return 0;
  5689. }
  5690. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  5691. unsigned int changed_flags,
  5692. unsigned int *total_flags,
  5693. int mc_count, struct dev_addr_list *mc_list)
  5694. {
  5695. /*
  5696. * XXX: dummy
  5697. * see also iwl4965_connection_init_rx_config
  5698. */
  5699. *total_flags = 0;
  5700. }
  5701. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  5702. struct ieee80211_if_init_conf *conf)
  5703. {
  5704. struct iwl_priv *priv = hw->priv;
  5705. IWL_DEBUG_MAC80211("enter\n");
  5706. mutex_lock(&priv->mutex);
  5707. if (iwl_is_ready_rf(priv)) {
  5708. iwl4965_scan_cancel_timeout(priv, 100);
  5709. cancel_delayed_work(&priv->post_associate);
  5710. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5711. iwl4965_commit_rxon(priv);
  5712. }
  5713. if (priv->vif == conf->vif) {
  5714. priv->vif = NULL;
  5715. memset(priv->bssid, 0, ETH_ALEN);
  5716. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5717. priv->essid_len = 0;
  5718. }
  5719. mutex_unlock(&priv->mutex);
  5720. IWL_DEBUG_MAC80211("leave\n");
  5721. }
  5722. #ifdef CONFIG_IWL4965_HT
  5723. static void iwl4965_ht_conf(struct iwl_priv *priv,
  5724. struct ieee80211_bss_conf *bss_conf)
  5725. {
  5726. struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf;
  5727. struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf;
  5728. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  5729. IWL_DEBUG_MAC80211("enter: \n");
  5730. iwl_conf->is_ht = bss_conf->assoc_ht;
  5731. if (!iwl_conf->is_ht)
  5732. return;
  5733. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  5734. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  5735. iwl_conf->sgf |= 0x1;
  5736. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  5737. iwl_conf->sgf |= 0x2;
  5738. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  5739. iwl_conf->max_amsdu_size =
  5740. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  5741. iwl_conf->supported_chan_width =
  5742. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  5743. iwl_conf->extension_chan_offset =
  5744. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  5745. /* If no above or below channel supplied disable FAT channel */
  5746. if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
  5747. iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
  5748. iwl_conf->supported_chan_width = 0;
  5749. iwl_conf->tx_mimo_ps_mode =
  5750. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  5751. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  5752. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  5753. iwl_conf->tx_chan_width =
  5754. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  5755. iwl_conf->ht_protection =
  5756. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  5757. iwl_conf->non_GF_STA_present =
  5758. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  5759. IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel);
  5760. IWL_DEBUG_MAC80211("leave\n");
  5761. }
  5762. #else
  5763. static inline void iwl4965_ht_conf(struct iwl_priv *priv,
  5764. struct ieee80211_bss_conf *bss_conf)
  5765. {
  5766. }
  5767. #endif
  5768. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  5769. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  5770. struct ieee80211_vif *vif,
  5771. struct ieee80211_bss_conf *bss_conf,
  5772. u32 changes)
  5773. {
  5774. struct iwl_priv *priv = hw->priv;
  5775. IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
  5776. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  5777. IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
  5778. bss_conf->use_short_preamble);
  5779. if (bss_conf->use_short_preamble)
  5780. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5781. else
  5782. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5783. }
  5784. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  5785. IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
  5786. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  5787. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  5788. else
  5789. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  5790. }
  5791. if (changes & BSS_CHANGED_HT) {
  5792. IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht);
  5793. iwl4965_ht_conf(priv, bss_conf);
  5794. iwl4965_set_rxon_chain(priv);
  5795. }
  5796. if (changes & BSS_CHANGED_ASSOC) {
  5797. IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
  5798. if (bss_conf->assoc) {
  5799. priv->assoc_id = bss_conf->aid;
  5800. priv->beacon_int = bss_conf->beacon_int;
  5801. priv->timestamp = bss_conf->timestamp;
  5802. priv->assoc_capability = bss_conf->assoc_capability;
  5803. priv->next_scan_jiffies = jiffies +
  5804. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  5805. queue_work(priv->workqueue, &priv->post_associate.work);
  5806. } else {
  5807. priv->assoc_id = 0;
  5808. IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
  5809. }
  5810. } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
  5811. IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
  5812. iwl4965_send_rxon_assoc(priv);
  5813. }
  5814. }
  5815. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  5816. {
  5817. int rc = 0;
  5818. unsigned long flags;
  5819. struct iwl_priv *priv = hw->priv;
  5820. IWL_DEBUG_MAC80211("enter\n");
  5821. mutex_lock(&priv->mutex);
  5822. spin_lock_irqsave(&priv->lock, flags);
  5823. if (!iwl_is_ready_rf(priv)) {
  5824. rc = -EIO;
  5825. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  5826. goto out_unlock;
  5827. }
  5828. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  5829. rc = -EIO;
  5830. IWL_ERROR("ERROR: APs don't scan\n");
  5831. goto out_unlock;
  5832. }
  5833. /* we don't schedule scan within next_scan_jiffies period */
  5834. if (priv->next_scan_jiffies &&
  5835. time_after(priv->next_scan_jiffies, jiffies)) {
  5836. rc = -EAGAIN;
  5837. goto out_unlock;
  5838. }
  5839. /* if we just finished scan ask for delay */
  5840. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  5841. IWL_DELAY_NEXT_SCAN, jiffies)) {
  5842. rc = -EAGAIN;
  5843. goto out_unlock;
  5844. }
  5845. if (len) {
  5846. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  5847. iwl4965_escape_essid(ssid, len), (int)len);
  5848. priv->one_direct_scan = 1;
  5849. priv->direct_ssid_len = (u8)
  5850. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  5851. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  5852. } else
  5853. priv->one_direct_scan = 0;
  5854. rc = iwl4965_scan_initiate(priv);
  5855. IWL_DEBUG_MAC80211("leave\n");
  5856. out_unlock:
  5857. spin_unlock_irqrestore(&priv->lock, flags);
  5858. mutex_unlock(&priv->mutex);
  5859. return rc;
  5860. }
  5861. static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
  5862. struct ieee80211_key_conf *keyconf, const u8 *addr,
  5863. u32 iv32, u16 *phase1key)
  5864. {
  5865. struct iwl_priv *priv = hw->priv;
  5866. u8 sta_id = IWL_INVALID_STATION;
  5867. unsigned long flags;
  5868. __le16 key_flags = 0;
  5869. int i;
  5870. DECLARE_MAC_BUF(mac);
  5871. IWL_DEBUG_MAC80211("enter\n");
  5872. sta_id = iwl4965_hw_find_station(priv, addr);
  5873. if (sta_id == IWL_INVALID_STATION) {
  5874. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  5875. print_mac(mac, addr));
  5876. return;
  5877. }
  5878. iwl4965_scan_cancel_timeout(priv, 100);
  5879. key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
  5880. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  5881. key_flags &= ~STA_KEY_FLG_INVALID;
  5882. if (sta_id == priv->hw_setting.bcast_sta_id)
  5883. key_flags |= STA_KEY_MULTICAST_MSK;
  5884. spin_lock_irqsave(&priv->sta_lock, flags);
  5885. priv->stations[sta_id].sta.key.key_offset =
  5886. (sta_id % STA_KEY_MAX_NUM);/* FIXME */
  5887. priv->stations[sta_id].sta.key.key_flags = key_flags;
  5888. priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
  5889. for (i = 0; i < 5; i++)
  5890. priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
  5891. cpu_to_le16(phase1key[i]);
  5892. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  5893. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  5894. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  5895. spin_unlock_irqrestore(&priv->sta_lock, flags);
  5896. IWL_DEBUG_MAC80211("leave\n");
  5897. }
  5898. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  5899. const u8 *local_addr, const u8 *addr,
  5900. struct ieee80211_key_conf *key)
  5901. {
  5902. struct iwl_priv *priv = hw->priv;
  5903. DECLARE_MAC_BUF(mac);
  5904. int ret = 0;
  5905. u8 sta_id = IWL_INVALID_STATION;
  5906. u8 static_key;
  5907. IWL_DEBUG_MAC80211("enter\n");
  5908. if (!priv->cfg->mod_params->hw_crypto) {
  5909. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  5910. return -EOPNOTSUPP;
  5911. }
  5912. if (is_zero_ether_addr(addr))
  5913. /* only support pairwise keys */
  5914. return -EOPNOTSUPP;
  5915. /* FIXME: need to differenciate between static and dynamic key
  5916. * in the level of mac80211 */
  5917. static_key = !iwl_is_associated(priv);
  5918. if (!static_key) {
  5919. sta_id = iwl4965_hw_find_station(priv, addr);
  5920. if (sta_id == IWL_INVALID_STATION) {
  5921. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  5922. print_mac(mac, addr));
  5923. return -EINVAL;
  5924. }
  5925. }
  5926. iwl4965_scan_cancel_timeout(priv, 100);
  5927. switch (cmd) {
  5928. case SET_KEY:
  5929. if (static_key)
  5930. ret = iwl4965_set_static_key(priv, key);
  5931. else
  5932. ret = iwl4965_set_dynamic_key(priv, key, sta_id);
  5933. IWL_DEBUG_MAC80211("enable hwcrypto key\n");
  5934. break;
  5935. case DISABLE_KEY:
  5936. if (static_key)
  5937. ret = iwl4965_remove_static_key(priv);
  5938. else
  5939. ret = iwl4965_clear_sta_key_info(priv, sta_id);
  5940. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  5941. break;
  5942. default:
  5943. ret = -EINVAL;
  5944. }
  5945. IWL_DEBUG_MAC80211("leave\n");
  5946. return ret;
  5947. }
  5948. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  5949. const struct ieee80211_tx_queue_params *params)
  5950. {
  5951. struct iwl_priv *priv = hw->priv;
  5952. unsigned long flags;
  5953. int q;
  5954. IWL_DEBUG_MAC80211("enter\n");
  5955. if (!iwl_is_ready_rf(priv)) {
  5956. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5957. return -EIO;
  5958. }
  5959. if (queue >= AC_NUM) {
  5960. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  5961. return 0;
  5962. }
  5963. if (!priv->qos_data.qos_enable) {
  5964. priv->qos_data.qos_active = 0;
  5965. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  5966. return 0;
  5967. }
  5968. q = AC_NUM - 1 - queue;
  5969. spin_lock_irqsave(&priv->lock, flags);
  5970. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  5971. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  5972. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  5973. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  5974. cpu_to_le16((params->txop * 32));
  5975. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  5976. priv->qos_data.qos_active = 1;
  5977. spin_unlock_irqrestore(&priv->lock, flags);
  5978. mutex_lock(&priv->mutex);
  5979. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5980. iwl4965_activate_qos(priv, 1);
  5981. else if (priv->assoc_id && iwl_is_associated(priv))
  5982. iwl4965_activate_qos(priv, 0);
  5983. mutex_unlock(&priv->mutex);
  5984. IWL_DEBUG_MAC80211("leave\n");
  5985. return 0;
  5986. }
  5987. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  5988. struct ieee80211_tx_queue_stats *stats)
  5989. {
  5990. struct iwl_priv *priv = hw->priv;
  5991. int i, avail;
  5992. struct iwl4965_tx_queue *txq;
  5993. struct iwl4965_queue *q;
  5994. unsigned long flags;
  5995. IWL_DEBUG_MAC80211("enter\n");
  5996. if (!iwl_is_ready_rf(priv)) {
  5997. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5998. return -EIO;
  5999. }
  6000. spin_lock_irqsave(&priv->lock, flags);
  6001. for (i = 0; i < AC_NUM; i++) {
  6002. txq = &priv->txq[i];
  6003. q = &txq->q;
  6004. avail = iwl4965_queue_space(q);
  6005. stats->data[i].len = q->n_window - avail;
  6006. stats->data[i].limit = q->n_window - q->high_mark;
  6007. stats->data[i].count = q->n_window;
  6008. }
  6009. spin_unlock_irqrestore(&priv->lock, flags);
  6010. IWL_DEBUG_MAC80211("leave\n");
  6011. return 0;
  6012. }
  6013. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6014. struct ieee80211_low_level_stats *stats)
  6015. {
  6016. IWL_DEBUG_MAC80211("enter\n");
  6017. IWL_DEBUG_MAC80211("leave\n");
  6018. return 0;
  6019. }
  6020. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6021. {
  6022. IWL_DEBUG_MAC80211("enter\n");
  6023. IWL_DEBUG_MAC80211("leave\n");
  6024. return 0;
  6025. }
  6026. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6027. {
  6028. struct iwl_priv *priv = hw->priv;
  6029. unsigned long flags;
  6030. mutex_lock(&priv->mutex);
  6031. IWL_DEBUG_MAC80211("enter\n");
  6032. priv->lq_mngr.lq_ready = 0;
  6033. #ifdef CONFIG_IWL4965_HT
  6034. spin_lock_irqsave(&priv->lock, flags);
  6035. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  6036. spin_unlock_irqrestore(&priv->lock, flags);
  6037. #endif /* CONFIG_IWL4965_HT */
  6038. iwlcore_reset_qos(priv);
  6039. cancel_delayed_work(&priv->post_associate);
  6040. spin_lock_irqsave(&priv->lock, flags);
  6041. priv->assoc_id = 0;
  6042. priv->assoc_capability = 0;
  6043. priv->assoc_station_added = 0;
  6044. /* new association get rid of ibss beacon skb */
  6045. if (priv->ibss_beacon)
  6046. dev_kfree_skb(priv->ibss_beacon);
  6047. priv->ibss_beacon = NULL;
  6048. priv->beacon_int = priv->hw->conf.beacon_int;
  6049. priv->timestamp = 0;
  6050. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6051. priv->beacon_int = 0;
  6052. spin_unlock_irqrestore(&priv->lock, flags);
  6053. if (!iwl_is_ready_rf(priv)) {
  6054. IWL_DEBUG_MAC80211("leave - not ready\n");
  6055. mutex_unlock(&priv->mutex);
  6056. return;
  6057. }
  6058. /* we are restarting association process
  6059. * clear RXON_FILTER_ASSOC_MSK bit
  6060. */
  6061. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6062. iwl4965_scan_cancel_timeout(priv, 100);
  6063. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6064. iwl4965_commit_rxon(priv);
  6065. }
  6066. /* Per mac80211.h: This is only used in IBSS mode... */
  6067. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6068. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6069. mutex_unlock(&priv->mutex);
  6070. return;
  6071. }
  6072. priv->only_active_channel = 0;
  6073. iwl4965_set_rate(priv);
  6074. mutex_unlock(&priv->mutex);
  6075. IWL_DEBUG_MAC80211("leave\n");
  6076. }
  6077. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6078. struct ieee80211_tx_control *control)
  6079. {
  6080. struct iwl_priv *priv = hw->priv;
  6081. unsigned long flags;
  6082. mutex_lock(&priv->mutex);
  6083. IWL_DEBUG_MAC80211("enter\n");
  6084. if (!iwl_is_ready_rf(priv)) {
  6085. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6086. mutex_unlock(&priv->mutex);
  6087. return -EIO;
  6088. }
  6089. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6090. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6091. mutex_unlock(&priv->mutex);
  6092. return -EIO;
  6093. }
  6094. spin_lock_irqsave(&priv->lock, flags);
  6095. if (priv->ibss_beacon)
  6096. dev_kfree_skb(priv->ibss_beacon);
  6097. priv->ibss_beacon = skb;
  6098. priv->assoc_id = 0;
  6099. IWL_DEBUG_MAC80211("leave\n");
  6100. spin_unlock_irqrestore(&priv->lock, flags);
  6101. iwlcore_reset_qos(priv);
  6102. queue_work(priv->workqueue, &priv->post_associate.work);
  6103. mutex_unlock(&priv->mutex);
  6104. return 0;
  6105. }
  6106. /*****************************************************************************
  6107. *
  6108. * sysfs attributes
  6109. *
  6110. *****************************************************************************/
  6111. #ifdef CONFIG_IWLWIFI_DEBUG
  6112. /*
  6113. * The following adds a new attribute to the sysfs representation
  6114. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6115. * used for controlling the debug level.
  6116. *
  6117. * See the level definitions in iwl for details.
  6118. */
  6119. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6120. {
  6121. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  6122. }
  6123. static ssize_t store_debug_level(struct device_driver *d,
  6124. const char *buf, size_t count)
  6125. {
  6126. char *p = (char *)buf;
  6127. u32 val;
  6128. val = simple_strtoul(p, &p, 0);
  6129. if (p == buf)
  6130. printk(KERN_INFO DRV_NAME
  6131. ": %s is not in hex or decimal form.\n", buf);
  6132. else
  6133. iwl_debug_level = val;
  6134. return strnlen(buf, count);
  6135. }
  6136. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6137. show_debug_level, store_debug_level);
  6138. #endif /* CONFIG_IWLWIFI_DEBUG */
  6139. static ssize_t show_temperature(struct device *d,
  6140. struct device_attribute *attr, char *buf)
  6141. {
  6142. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6143. if (!iwl_is_alive(priv))
  6144. return -EAGAIN;
  6145. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6146. }
  6147. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6148. static ssize_t show_rs_window(struct device *d,
  6149. struct device_attribute *attr,
  6150. char *buf)
  6151. {
  6152. struct iwl_priv *priv = d->driver_data;
  6153. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6154. }
  6155. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6156. static ssize_t show_tx_power(struct device *d,
  6157. struct device_attribute *attr, char *buf)
  6158. {
  6159. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6160. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6161. }
  6162. static ssize_t store_tx_power(struct device *d,
  6163. struct device_attribute *attr,
  6164. const char *buf, size_t count)
  6165. {
  6166. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6167. char *p = (char *)buf;
  6168. u32 val;
  6169. val = simple_strtoul(p, &p, 10);
  6170. if (p == buf)
  6171. printk(KERN_INFO DRV_NAME
  6172. ": %s is not in decimal form.\n", buf);
  6173. else
  6174. iwl4965_hw_reg_set_txpower(priv, val);
  6175. return count;
  6176. }
  6177. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6178. static ssize_t show_flags(struct device *d,
  6179. struct device_attribute *attr, char *buf)
  6180. {
  6181. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6182. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6183. }
  6184. static ssize_t store_flags(struct device *d,
  6185. struct device_attribute *attr,
  6186. const char *buf, size_t count)
  6187. {
  6188. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6189. u32 flags = simple_strtoul(buf, NULL, 0);
  6190. mutex_lock(&priv->mutex);
  6191. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6192. /* Cancel any currently running scans... */
  6193. if (iwl4965_scan_cancel_timeout(priv, 100))
  6194. IWL_WARNING("Could not cancel scan.\n");
  6195. else {
  6196. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6197. flags);
  6198. priv->staging_rxon.flags = cpu_to_le32(flags);
  6199. iwl4965_commit_rxon(priv);
  6200. }
  6201. }
  6202. mutex_unlock(&priv->mutex);
  6203. return count;
  6204. }
  6205. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6206. static ssize_t show_filter_flags(struct device *d,
  6207. struct device_attribute *attr, char *buf)
  6208. {
  6209. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6210. return sprintf(buf, "0x%04X\n",
  6211. le32_to_cpu(priv->active_rxon.filter_flags));
  6212. }
  6213. static ssize_t store_filter_flags(struct device *d,
  6214. struct device_attribute *attr,
  6215. const char *buf, size_t count)
  6216. {
  6217. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6218. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6219. mutex_lock(&priv->mutex);
  6220. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6221. /* Cancel any currently running scans... */
  6222. if (iwl4965_scan_cancel_timeout(priv, 100))
  6223. IWL_WARNING("Could not cancel scan.\n");
  6224. else {
  6225. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6226. "0x%04X\n", filter_flags);
  6227. priv->staging_rxon.filter_flags =
  6228. cpu_to_le32(filter_flags);
  6229. iwl4965_commit_rxon(priv);
  6230. }
  6231. }
  6232. mutex_unlock(&priv->mutex);
  6233. return count;
  6234. }
  6235. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6236. store_filter_flags);
  6237. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6238. static ssize_t show_measurement(struct device *d,
  6239. struct device_attribute *attr, char *buf)
  6240. {
  6241. struct iwl_priv *priv = dev_get_drvdata(d);
  6242. struct iwl4965_spectrum_notification measure_report;
  6243. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6244. u8 *data = (u8 *) & measure_report;
  6245. unsigned long flags;
  6246. spin_lock_irqsave(&priv->lock, flags);
  6247. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6248. spin_unlock_irqrestore(&priv->lock, flags);
  6249. return 0;
  6250. }
  6251. memcpy(&measure_report, &priv->measure_report, size);
  6252. priv->measurement_status = 0;
  6253. spin_unlock_irqrestore(&priv->lock, flags);
  6254. while (size && (PAGE_SIZE - len)) {
  6255. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6256. PAGE_SIZE - len, 1);
  6257. len = strlen(buf);
  6258. if (PAGE_SIZE - len)
  6259. buf[len++] = '\n';
  6260. ofs += 16;
  6261. size -= min(size, 16U);
  6262. }
  6263. return len;
  6264. }
  6265. static ssize_t store_measurement(struct device *d,
  6266. struct device_attribute *attr,
  6267. const char *buf, size_t count)
  6268. {
  6269. struct iwl_priv *priv = dev_get_drvdata(d);
  6270. struct ieee80211_measurement_params params = {
  6271. .channel = le16_to_cpu(priv->active_rxon.channel),
  6272. .start_time = cpu_to_le64(priv->last_tsf),
  6273. .duration = cpu_to_le16(1),
  6274. };
  6275. u8 type = IWL_MEASURE_BASIC;
  6276. u8 buffer[32];
  6277. u8 channel;
  6278. if (count) {
  6279. char *p = buffer;
  6280. strncpy(buffer, buf, min(sizeof(buffer), count));
  6281. channel = simple_strtoul(p, NULL, 0);
  6282. if (channel)
  6283. params.channel = channel;
  6284. p = buffer;
  6285. while (*p && *p != ' ')
  6286. p++;
  6287. if (*p)
  6288. type = simple_strtoul(p + 1, NULL, 0);
  6289. }
  6290. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6291. "channel %d (for '%s')\n", type, params.channel, buf);
  6292. iwl4965_get_measurement(priv, &params, type);
  6293. return count;
  6294. }
  6295. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6296. show_measurement, store_measurement);
  6297. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  6298. static ssize_t store_retry_rate(struct device *d,
  6299. struct device_attribute *attr,
  6300. const char *buf, size_t count)
  6301. {
  6302. struct iwl_priv *priv = dev_get_drvdata(d);
  6303. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6304. if (priv->retry_rate <= 0)
  6305. priv->retry_rate = 1;
  6306. return count;
  6307. }
  6308. static ssize_t show_retry_rate(struct device *d,
  6309. struct device_attribute *attr, char *buf)
  6310. {
  6311. struct iwl_priv *priv = dev_get_drvdata(d);
  6312. return sprintf(buf, "%d", priv->retry_rate);
  6313. }
  6314. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6315. store_retry_rate);
  6316. static ssize_t store_power_level(struct device *d,
  6317. struct device_attribute *attr,
  6318. const char *buf, size_t count)
  6319. {
  6320. struct iwl_priv *priv = dev_get_drvdata(d);
  6321. int rc;
  6322. int mode;
  6323. mode = simple_strtoul(buf, NULL, 0);
  6324. mutex_lock(&priv->mutex);
  6325. if (!iwl_is_ready(priv)) {
  6326. rc = -EAGAIN;
  6327. goto out;
  6328. }
  6329. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6330. mode = IWL_POWER_AC;
  6331. else
  6332. mode |= IWL_POWER_ENABLED;
  6333. if (mode != priv->power_mode) {
  6334. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6335. if (rc) {
  6336. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6337. goto out;
  6338. }
  6339. priv->power_mode = mode;
  6340. }
  6341. rc = count;
  6342. out:
  6343. mutex_unlock(&priv->mutex);
  6344. return rc;
  6345. }
  6346. #define MAX_WX_STRING 80
  6347. /* Values are in microsecond */
  6348. static const s32 timeout_duration[] = {
  6349. 350000,
  6350. 250000,
  6351. 75000,
  6352. 37000,
  6353. 25000,
  6354. };
  6355. static const s32 period_duration[] = {
  6356. 400000,
  6357. 700000,
  6358. 1000000,
  6359. 1000000,
  6360. 1000000
  6361. };
  6362. static ssize_t show_power_level(struct device *d,
  6363. struct device_attribute *attr, char *buf)
  6364. {
  6365. struct iwl_priv *priv = dev_get_drvdata(d);
  6366. int level = IWL_POWER_LEVEL(priv->power_mode);
  6367. char *p = buf;
  6368. p += sprintf(p, "%d ", level);
  6369. switch (level) {
  6370. case IWL_POWER_MODE_CAM:
  6371. case IWL_POWER_AC:
  6372. p += sprintf(p, "(AC)");
  6373. break;
  6374. case IWL_POWER_BATTERY:
  6375. p += sprintf(p, "(BATTERY)");
  6376. break;
  6377. default:
  6378. p += sprintf(p,
  6379. "(Timeout %dms, Period %dms)",
  6380. timeout_duration[level - 1] / 1000,
  6381. period_duration[level - 1] / 1000);
  6382. }
  6383. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6384. p += sprintf(p, " OFF\n");
  6385. else
  6386. p += sprintf(p, " \n");
  6387. return (p - buf + 1);
  6388. }
  6389. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6390. store_power_level);
  6391. static ssize_t show_channels(struct device *d,
  6392. struct device_attribute *attr, char *buf)
  6393. {
  6394. /* all this shit doesn't belong into sysfs anyway */
  6395. return 0;
  6396. }
  6397. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6398. static ssize_t show_statistics(struct device *d,
  6399. struct device_attribute *attr, char *buf)
  6400. {
  6401. struct iwl_priv *priv = dev_get_drvdata(d);
  6402. u32 size = sizeof(struct iwl4965_notif_statistics);
  6403. u32 len = 0, ofs = 0;
  6404. u8 *data = (u8 *) & priv->statistics;
  6405. int rc = 0;
  6406. if (!iwl_is_alive(priv))
  6407. return -EAGAIN;
  6408. mutex_lock(&priv->mutex);
  6409. rc = iwl4965_send_statistics_request(priv);
  6410. mutex_unlock(&priv->mutex);
  6411. if (rc) {
  6412. len = sprintf(buf,
  6413. "Error sending statistics request: 0x%08X\n", rc);
  6414. return len;
  6415. }
  6416. while (size && (PAGE_SIZE - len)) {
  6417. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6418. PAGE_SIZE - len, 1);
  6419. len = strlen(buf);
  6420. if (PAGE_SIZE - len)
  6421. buf[len++] = '\n';
  6422. ofs += 16;
  6423. size -= min(size, 16U);
  6424. }
  6425. return len;
  6426. }
  6427. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6428. static ssize_t show_antenna(struct device *d,
  6429. struct device_attribute *attr, char *buf)
  6430. {
  6431. struct iwl_priv *priv = dev_get_drvdata(d);
  6432. if (!iwl_is_alive(priv))
  6433. return -EAGAIN;
  6434. return sprintf(buf, "%d\n", priv->antenna);
  6435. }
  6436. static ssize_t store_antenna(struct device *d,
  6437. struct device_attribute *attr,
  6438. const char *buf, size_t count)
  6439. {
  6440. int ant;
  6441. struct iwl_priv *priv = dev_get_drvdata(d);
  6442. if (count == 0)
  6443. return 0;
  6444. if (sscanf(buf, "%1i", &ant) != 1) {
  6445. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6446. return count;
  6447. }
  6448. if ((ant >= 0) && (ant <= 2)) {
  6449. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6450. priv->antenna = (enum iwl4965_antenna)ant;
  6451. } else
  6452. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  6453. return count;
  6454. }
  6455. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  6456. static ssize_t show_status(struct device *d,
  6457. struct device_attribute *attr, char *buf)
  6458. {
  6459. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6460. if (!iwl_is_alive(priv))
  6461. return -EAGAIN;
  6462. return sprintf(buf, "0x%08x\n", (int)priv->status);
  6463. }
  6464. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  6465. static ssize_t dump_error_log(struct device *d,
  6466. struct device_attribute *attr,
  6467. const char *buf, size_t count)
  6468. {
  6469. char *p = (char *)buf;
  6470. if (p[0] == '1')
  6471. iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  6472. return strnlen(buf, count);
  6473. }
  6474. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  6475. static ssize_t dump_event_log(struct device *d,
  6476. struct device_attribute *attr,
  6477. const char *buf, size_t count)
  6478. {
  6479. char *p = (char *)buf;
  6480. if (p[0] == '1')
  6481. iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  6482. return strnlen(buf, count);
  6483. }
  6484. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  6485. /*****************************************************************************
  6486. *
  6487. * driver setup and teardown
  6488. *
  6489. *****************************************************************************/
  6490. static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
  6491. {
  6492. priv->workqueue = create_workqueue(DRV_NAME);
  6493. init_waitqueue_head(&priv->wait_command_queue);
  6494. INIT_WORK(&priv->up, iwl4965_bg_up);
  6495. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  6496. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  6497. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  6498. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  6499. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  6500. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  6501. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  6502. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  6503. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  6504. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  6505. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  6506. iwl4965_hw_setup_deferred_work(priv);
  6507. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  6508. iwl4965_irq_tasklet, (unsigned long)priv);
  6509. }
  6510. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
  6511. {
  6512. iwl4965_hw_cancel_deferred_work(priv);
  6513. cancel_delayed_work_sync(&priv->init_alive_start);
  6514. cancel_delayed_work(&priv->scan_check);
  6515. cancel_delayed_work(&priv->alive_start);
  6516. cancel_delayed_work(&priv->post_associate);
  6517. cancel_work_sync(&priv->beacon_update);
  6518. }
  6519. static struct attribute *iwl4965_sysfs_entries[] = {
  6520. &dev_attr_antenna.attr,
  6521. &dev_attr_channels.attr,
  6522. &dev_attr_dump_errors.attr,
  6523. &dev_attr_dump_events.attr,
  6524. &dev_attr_flags.attr,
  6525. &dev_attr_filter_flags.attr,
  6526. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6527. &dev_attr_measurement.attr,
  6528. #endif
  6529. &dev_attr_power_level.attr,
  6530. &dev_attr_retry_rate.attr,
  6531. &dev_attr_rs_window.attr,
  6532. &dev_attr_statistics.attr,
  6533. &dev_attr_status.attr,
  6534. &dev_attr_temperature.attr,
  6535. &dev_attr_tx_power.attr,
  6536. NULL
  6537. };
  6538. static struct attribute_group iwl4965_attribute_group = {
  6539. .name = NULL, /* put in device directory */
  6540. .attrs = iwl4965_sysfs_entries,
  6541. };
  6542. static struct ieee80211_ops iwl4965_hw_ops = {
  6543. .tx = iwl4965_mac_tx,
  6544. .start = iwl4965_mac_start,
  6545. .stop = iwl4965_mac_stop,
  6546. .add_interface = iwl4965_mac_add_interface,
  6547. .remove_interface = iwl4965_mac_remove_interface,
  6548. .config = iwl4965_mac_config,
  6549. .config_interface = iwl4965_mac_config_interface,
  6550. .configure_filter = iwl4965_configure_filter,
  6551. .set_key = iwl4965_mac_set_key,
  6552. .update_tkip_key = iwl4965_mac_update_tkip_key,
  6553. .get_stats = iwl4965_mac_get_stats,
  6554. .get_tx_stats = iwl4965_mac_get_tx_stats,
  6555. .conf_tx = iwl4965_mac_conf_tx,
  6556. .get_tsf = iwl4965_mac_get_tsf,
  6557. .reset_tsf = iwl4965_mac_reset_tsf,
  6558. .beacon_update = iwl4965_mac_beacon_update,
  6559. .bss_info_changed = iwl4965_bss_info_changed,
  6560. #ifdef CONFIG_IWL4965_HT
  6561. .ampdu_action = iwl4965_mac_ampdu_action,
  6562. #endif /* CONFIG_IWL4965_HT */
  6563. .hw_scan = iwl4965_mac_hw_scan
  6564. };
  6565. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  6566. {
  6567. int err = 0;
  6568. struct iwl_priv *priv;
  6569. struct ieee80211_hw *hw;
  6570. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  6571. unsigned long flags;
  6572. DECLARE_MAC_BUF(mac);
  6573. /************************
  6574. * 1. Allocating HW data
  6575. ************************/
  6576. /* Disabling hardware scan means that mac80211 will perform scans
  6577. * "the hard way", rather than using device's scan. */
  6578. if (cfg->mod_params->disable_hw_scan) {
  6579. IWL_DEBUG_INFO("Disabling hw_scan\n");
  6580. iwl4965_hw_ops.hw_scan = NULL;
  6581. }
  6582. hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
  6583. if (!hw) {
  6584. err = -ENOMEM;
  6585. goto out;
  6586. }
  6587. priv = hw->priv;
  6588. /* At this point both hw and priv are allocated. */
  6589. SET_IEEE80211_DEV(hw, &pdev->dev);
  6590. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  6591. priv->cfg = cfg;
  6592. priv->pci_dev = pdev;
  6593. #ifdef CONFIG_IWLWIFI_DEBUG
  6594. iwl_debug_level = priv->cfg->mod_params->debug;
  6595. atomic_set(&priv->restrict_refcnt, 0);
  6596. #endif
  6597. /**************************
  6598. * 2. Initializing PCI bus
  6599. **************************/
  6600. if (pci_enable_device(pdev)) {
  6601. err = -ENODEV;
  6602. goto out_ieee80211_free_hw;
  6603. }
  6604. pci_set_master(pdev);
  6605. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  6606. if (!err)
  6607. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  6608. if (err) {
  6609. printk(KERN_WARNING DRV_NAME
  6610. ": No suitable DMA available.\n");
  6611. goto out_pci_disable_device;
  6612. }
  6613. err = pci_request_regions(pdev, DRV_NAME);
  6614. if (err)
  6615. goto out_pci_disable_device;
  6616. pci_set_drvdata(pdev, priv);
  6617. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  6618. * PCI Tx retries from interfering with C3 CPU state */
  6619. pci_write_config_byte(pdev, 0x41, 0x00);
  6620. /***********************
  6621. * 3. Read REV register
  6622. ***********************/
  6623. priv->hw_base = pci_iomap(pdev, 0, 0);
  6624. if (!priv->hw_base) {
  6625. err = -ENODEV;
  6626. goto out_pci_release_regions;
  6627. }
  6628. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  6629. (unsigned long long) pci_resource_len(pdev, 0));
  6630. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  6631. printk(KERN_INFO DRV_NAME
  6632. ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
  6633. /*****************
  6634. * 4. Read EEPROM
  6635. *****************/
  6636. /* nic init */
  6637. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  6638. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  6639. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  6640. err = iwl_poll_bit(priv, CSR_GP_CNTRL,
  6641. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  6642. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  6643. if (err < 0) {
  6644. IWL_DEBUG_INFO("Failed to init the card\n");
  6645. goto out_iounmap;
  6646. }
  6647. /* Read the EEPROM */
  6648. err = iwl_eeprom_init(priv);
  6649. if (err) {
  6650. IWL_ERROR("Unable to init EEPROM\n");
  6651. goto out_iounmap;
  6652. }
  6653. /* MAC Address location in EEPROM same for 3945/4965 */
  6654. iwl_eeprom_get_mac(priv, priv->mac_addr);
  6655. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  6656. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  6657. /************************
  6658. * 5. Setup HW constants
  6659. ************************/
  6660. /* Device-specific setup */
  6661. if (iwl4965_hw_set_hw_setting(priv)) {
  6662. IWL_ERROR("failed to set hw settings\n");
  6663. goto out_iounmap;
  6664. }
  6665. /*******************
  6666. * 6. Setup hw/priv
  6667. *******************/
  6668. err = iwl_setup(priv);
  6669. if (err)
  6670. goto out_unset_hw_settings;
  6671. /* At this point both hw and priv are initialized. */
  6672. /**********************************
  6673. * 7. Initialize module parameters
  6674. **********************************/
  6675. /* Disable radio (SW RF KILL) via parameter when loading driver */
  6676. if (priv->cfg->mod_params->disable) {
  6677. set_bit(STATUS_RF_KILL_SW, &priv->status);
  6678. IWL_DEBUG_INFO("Radio disabled.\n");
  6679. }
  6680. if (priv->cfg->mod_params->enable_qos)
  6681. priv->qos_data.qos_enable = 1;
  6682. /********************
  6683. * 8. Setup services
  6684. ********************/
  6685. spin_lock_irqsave(&priv->lock, flags);
  6686. iwl4965_disable_interrupts(priv);
  6687. spin_unlock_irqrestore(&priv->lock, flags);
  6688. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6689. if (err) {
  6690. IWL_ERROR("failed to create sysfs device attributes\n");
  6691. goto out_unset_hw_settings;
  6692. }
  6693. err = iwl_dbgfs_register(priv, DRV_NAME);
  6694. if (err) {
  6695. IWL_ERROR("failed to create debugfs files\n");
  6696. goto out_remove_sysfs;
  6697. }
  6698. iwl4965_setup_deferred_work(priv);
  6699. iwl4965_setup_rx_handlers(priv);
  6700. /********************
  6701. * 9. Conclude
  6702. ********************/
  6703. pci_save_state(pdev);
  6704. pci_disable_device(pdev);
  6705. /* notify iwlcore to init */
  6706. iwlcore_low_level_notify(priv, IWLCORE_INIT_EVT);
  6707. return 0;
  6708. out_remove_sysfs:
  6709. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6710. out_unset_hw_settings:
  6711. iwl4965_unset_hw_setting(priv);
  6712. out_iounmap:
  6713. pci_iounmap(pdev, priv->hw_base);
  6714. out_pci_release_regions:
  6715. pci_release_regions(pdev);
  6716. pci_set_drvdata(pdev, NULL);
  6717. out_pci_disable_device:
  6718. pci_disable_device(pdev);
  6719. out_ieee80211_free_hw:
  6720. ieee80211_free_hw(priv->hw);
  6721. out:
  6722. return err;
  6723. }
  6724. static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
  6725. {
  6726. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6727. struct list_head *p, *q;
  6728. int i;
  6729. unsigned long flags;
  6730. if (!priv)
  6731. return;
  6732. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  6733. if (priv->mac80211_registered) {
  6734. ieee80211_unregister_hw(priv->hw);
  6735. priv->mac80211_registered = 0;
  6736. }
  6737. set_bit(STATUS_EXIT_PENDING, &priv->status);
  6738. iwl4965_down(priv);
  6739. /* make sure we flush any pending irq or
  6740. * tasklet for the driver
  6741. */
  6742. spin_lock_irqsave(&priv->lock, flags);
  6743. iwl4965_disable_interrupts(priv);
  6744. spin_unlock_irqrestore(&priv->lock, flags);
  6745. iwl_synchronize_irq(priv);
  6746. /* Free MAC hash list for ADHOC */
  6747. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  6748. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  6749. list_del(p);
  6750. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  6751. }
  6752. }
  6753. iwlcore_low_level_notify(priv, IWLCORE_REMOVE_EVT);
  6754. iwl_dbgfs_unregister(priv);
  6755. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6756. iwl4965_dealloc_ucode_pci(priv);
  6757. if (priv->rxq.bd)
  6758. iwl4965_rx_queue_free(priv, &priv->rxq);
  6759. iwl4965_hw_txq_ctx_free(priv);
  6760. iwl4965_unset_hw_setting(priv);
  6761. iwlcore_clear_stations_table(priv);
  6762. /*netif_stop_queue(dev); */
  6763. flush_workqueue(priv->workqueue);
  6764. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  6765. * priv->workqueue... so we can't take down the workqueue
  6766. * until now... */
  6767. destroy_workqueue(priv->workqueue);
  6768. priv->workqueue = NULL;
  6769. pci_iounmap(pdev, priv->hw_base);
  6770. pci_release_regions(pdev);
  6771. pci_disable_device(pdev);
  6772. pci_set_drvdata(pdev, NULL);
  6773. iwl_free_channel_map(priv);
  6774. iwl4965_free_geos(priv);
  6775. if (priv->ibss_beacon)
  6776. dev_kfree_skb(priv->ibss_beacon);
  6777. ieee80211_free_hw(priv->hw);
  6778. }
  6779. #ifdef CONFIG_PM
  6780. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  6781. {
  6782. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6783. if (priv->is_open) {
  6784. set_bit(STATUS_IN_SUSPEND, &priv->status);
  6785. iwl4965_mac_stop(priv->hw);
  6786. priv->is_open = 1;
  6787. }
  6788. pci_set_power_state(pdev, PCI_D3hot);
  6789. return 0;
  6790. }
  6791. static int iwl4965_pci_resume(struct pci_dev *pdev)
  6792. {
  6793. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6794. pci_set_power_state(pdev, PCI_D0);
  6795. if (priv->is_open)
  6796. iwl4965_mac_start(priv->hw);
  6797. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  6798. return 0;
  6799. }
  6800. #endif /* CONFIG_PM */
  6801. /*****************************************************************************
  6802. *
  6803. * driver and module entry point
  6804. *
  6805. *****************************************************************************/
  6806. static struct pci_driver iwl4965_driver = {
  6807. .name = DRV_NAME,
  6808. .id_table = iwl4965_hw_card_ids,
  6809. .probe = iwl4965_pci_probe,
  6810. .remove = __devexit_p(iwl4965_pci_remove),
  6811. #ifdef CONFIG_PM
  6812. .suspend = iwl4965_pci_suspend,
  6813. .resume = iwl4965_pci_resume,
  6814. #endif
  6815. };
  6816. static int __init iwl4965_init(void)
  6817. {
  6818. int ret;
  6819. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  6820. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  6821. ret = iwl4965_rate_control_register();
  6822. if (ret) {
  6823. IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
  6824. return ret;
  6825. }
  6826. ret = pci_register_driver(&iwl4965_driver);
  6827. if (ret) {
  6828. IWL_ERROR("Unable to initialize PCI module\n");
  6829. goto error_register;
  6830. }
  6831. #ifdef CONFIG_IWLWIFI_DEBUG
  6832. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  6833. if (ret) {
  6834. IWL_ERROR("Unable to create driver sysfs file\n");
  6835. goto error_debug;
  6836. }
  6837. #endif
  6838. return ret;
  6839. #ifdef CONFIG_IWLWIFI_DEBUG
  6840. error_debug:
  6841. pci_unregister_driver(&iwl4965_driver);
  6842. #endif
  6843. error_register:
  6844. iwl4965_rate_control_unregister();
  6845. return ret;
  6846. }
  6847. static void __exit iwl4965_exit(void)
  6848. {
  6849. #ifdef CONFIG_IWLWIFI_DEBUG
  6850. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  6851. #endif
  6852. pci_unregister_driver(&iwl4965_driver);
  6853. iwl4965_rate_control_unregister();
  6854. }
  6855. module_exit(iwl4965_exit);
  6856. module_init(iwl4965_init);