iwl4965-base.c 236 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-eeprom.h"
  45. #include "iwl-core.h"
  46. #include "iwl-4965.h"
  47. #include "iwl-helpers.h"
  48. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  49. struct iwl4965_tx_queue *txq);
  50. /******************************************************************************
  51. *
  52. * module boiler plate
  53. *
  54. ******************************************************************************/
  55. /* module parameters */
  56. struct iwl_mod_params iwl4965_mod_params = {
  57. .num_of_queues = IWL_MAX_NUM_QUEUES,
  58. .enable_qos = 1,
  59. .amsdu_size_8K = 1,
  60. /* the rest are 0 by default */
  61. };
  62. /*
  63. * module name, copyright, version, etc.
  64. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  65. */
  66. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  67. #ifdef CONFIG_IWLWIFI_DEBUG
  68. #define VD "d"
  69. #else
  70. #define VD
  71. #endif
  72. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  73. #define VS "s"
  74. #else
  75. #define VS
  76. #endif
  77. #define DRV_VERSION IWLWIFI_VERSION VD VS
  78. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  79. MODULE_VERSION(DRV_VERSION);
  80. MODULE_AUTHOR(DRV_COPYRIGHT);
  81. MODULE_LICENSE("GPL");
  82. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  83. {
  84. u16 fc = le16_to_cpu(hdr->frame_control);
  85. int hdr_len = ieee80211_get_hdrlen(fc);
  86. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  87. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  88. return NULL;
  89. }
  90. static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
  91. struct iwl_priv *priv, enum ieee80211_band band)
  92. {
  93. return priv->hw->wiphy->bands[band];
  94. }
  95. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  96. {
  97. /* Single white space is for Linksys APs */
  98. if (essid_len == 1 && essid[0] == ' ')
  99. return 1;
  100. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  101. while (essid_len) {
  102. essid_len--;
  103. if (essid[essid_len] != '\0')
  104. return 0;
  105. }
  106. return 1;
  107. }
  108. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  109. {
  110. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  111. const char *s = essid;
  112. char *d = escaped;
  113. if (iwl4965_is_empty_essid(essid, essid_len)) {
  114. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  115. return escaped;
  116. }
  117. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  118. while (essid_len--) {
  119. if (*s == '\0') {
  120. *d++ = '\\';
  121. *d++ = '0';
  122. s++;
  123. } else
  124. *d++ = *s++;
  125. }
  126. *d = '\0';
  127. return escaped;
  128. }
  129. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  130. * DMA services
  131. *
  132. * Theory of operation
  133. *
  134. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  135. * of buffer descriptors, each of which points to one or more data buffers for
  136. * the device to read from or fill. Driver and device exchange status of each
  137. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  138. * entries in each circular buffer, to protect against confusing empty and full
  139. * queue states.
  140. *
  141. * The device reads or writes the data in the queues via the device's several
  142. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  143. *
  144. * For Tx queue, there are low mark and high mark limits. If, after queuing
  145. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  146. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  147. * Tx queue resumed.
  148. *
  149. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  150. * queue (#4) for sending commands to the device firmware, and 15 other
  151. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  152. *
  153. * See more detailed info in iwl-4965-hw.h.
  154. ***************************************************/
  155. int iwl4965_queue_space(const struct iwl4965_queue *q)
  156. {
  157. int s = q->read_ptr - q->write_ptr;
  158. if (q->read_ptr > q->write_ptr)
  159. s -= q->n_bd;
  160. if (s <= 0)
  161. s += q->n_window;
  162. /* keep some reserve to not confuse empty and full situations */
  163. s -= 2;
  164. if (s < 0)
  165. s = 0;
  166. return s;
  167. }
  168. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  169. {
  170. return q->write_ptr > q->read_ptr ?
  171. (i >= q->read_ptr && i < q->write_ptr) :
  172. !(i < q->read_ptr && i >= q->write_ptr);
  173. }
  174. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  175. {
  176. /* This is for scan command, the big buffer at end of command array */
  177. if (is_huge)
  178. return q->n_window; /* must be power of 2 */
  179. /* Otherwise, use normal size buffers */
  180. return index & (q->n_window - 1);
  181. }
  182. /**
  183. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  184. */
  185. static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
  186. int count, int slots_num, u32 id)
  187. {
  188. q->n_bd = count;
  189. q->n_window = slots_num;
  190. q->id = id;
  191. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  192. * and iwl_queue_dec_wrap are broken. */
  193. BUG_ON(!is_power_of_2(count));
  194. /* slots_num must be power-of-two size, otherwise
  195. * get_cmd_index is broken. */
  196. BUG_ON(!is_power_of_2(slots_num));
  197. q->low_mark = q->n_window / 4;
  198. if (q->low_mark < 4)
  199. q->low_mark = 4;
  200. q->high_mark = q->n_window / 8;
  201. if (q->high_mark < 2)
  202. q->high_mark = 2;
  203. q->write_ptr = q->read_ptr = 0;
  204. return 0;
  205. }
  206. /**
  207. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  208. */
  209. static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
  210. struct iwl4965_tx_queue *txq, u32 id)
  211. {
  212. struct pci_dev *dev = priv->pci_dev;
  213. /* Driver private data, only for Tx (not command) queues,
  214. * not shared with device. */
  215. if (id != IWL_CMD_QUEUE_NUM) {
  216. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  217. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  218. if (!txq->txb) {
  219. IWL_ERROR("kmalloc for auxiliary BD "
  220. "structures failed\n");
  221. goto error;
  222. }
  223. } else
  224. txq->txb = NULL;
  225. /* Circular buffer of transmit frame descriptors (TFDs),
  226. * shared with device */
  227. txq->bd = pci_alloc_consistent(dev,
  228. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  229. &txq->q.dma_addr);
  230. if (!txq->bd) {
  231. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  232. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  233. goto error;
  234. }
  235. txq->q.id = id;
  236. return 0;
  237. error:
  238. if (txq->txb) {
  239. kfree(txq->txb);
  240. txq->txb = NULL;
  241. }
  242. return -ENOMEM;
  243. }
  244. /**
  245. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  246. */
  247. int iwl4965_tx_queue_init(struct iwl_priv *priv,
  248. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  249. {
  250. struct pci_dev *dev = priv->pci_dev;
  251. int len;
  252. int rc = 0;
  253. /*
  254. * Alloc buffer array for commands (Tx or other types of commands).
  255. * For the command queue (#4), allocate command space + one big
  256. * command for scan, since scan command is very huge; the system will
  257. * not have two scans at the same time, so only one is needed.
  258. * For normal Tx queues (all other queues), no super-size command
  259. * space is needed.
  260. */
  261. len = sizeof(struct iwl4965_cmd) * slots_num;
  262. if (txq_id == IWL_CMD_QUEUE_NUM)
  263. len += IWL_MAX_SCAN_SIZE;
  264. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  265. if (!txq->cmd)
  266. return -ENOMEM;
  267. /* Alloc driver data array and TFD circular buffer */
  268. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  269. if (rc) {
  270. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  271. return -ENOMEM;
  272. }
  273. txq->need_update = 0;
  274. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  275. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  276. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  277. /* Initialize queue's high/low-water marks, and head/tail indexes */
  278. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  279. /* Tell device where to find queue */
  280. iwl4965_hw_tx_queue_init(priv, txq);
  281. return 0;
  282. }
  283. /**
  284. * iwl4965_tx_queue_free - Deallocate DMA queue.
  285. * @txq: Transmit queue to deallocate.
  286. *
  287. * Empty queue by removing and destroying all BD's.
  288. * Free all buffers.
  289. * 0-fill, but do not free "txq" descriptor structure.
  290. */
  291. void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
  292. {
  293. struct iwl4965_queue *q = &txq->q;
  294. struct pci_dev *dev = priv->pci_dev;
  295. int len;
  296. if (q->n_bd == 0)
  297. return;
  298. /* first, empty all BD's */
  299. for (; q->write_ptr != q->read_ptr;
  300. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  301. iwl4965_hw_txq_free_tfd(priv, txq);
  302. len = sizeof(struct iwl4965_cmd) * q->n_window;
  303. if (q->id == IWL_CMD_QUEUE_NUM)
  304. len += IWL_MAX_SCAN_SIZE;
  305. /* De-alloc array of command/tx buffers */
  306. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  307. /* De-alloc circular buffer of TFDs */
  308. if (txq->q.n_bd)
  309. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  310. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  311. /* De-alloc array of per-TFD driver data */
  312. if (txq->txb) {
  313. kfree(txq->txb);
  314. txq->txb = NULL;
  315. }
  316. /* 0-fill queue descriptor structure */
  317. memset(txq, 0, sizeof(*txq));
  318. }
  319. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  320. /*************** STATION TABLE MANAGEMENT ****
  321. * mac80211 should be examined to determine if sta_info is duplicating
  322. * the functionality provided here
  323. */
  324. /**************************************************************/
  325. #if 0 /* temporary disable till we add real remove station */
  326. /**
  327. * iwl4965_remove_station - Remove driver's knowledge of station.
  328. *
  329. * NOTE: This does not remove station from device's station table.
  330. */
  331. static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  332. {
  333. int index = IWL_INVALID_STATION;
  334. int i;
  335. unsigned long flags;
  336. spin_lock_irqsave(&priv->sta_lock, flags);
  337. if (is_ap)
  338. index = IWL_AP_ID;
  339. else if (is_broadcast_ether_addr(addr))
  340. index = priv->hw_setting.bcast_sta_id;
  341. else
  342. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  343. if (priv->stations[i].used &&
  344. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  345. addr)) {
  346. index = i;
  347. break;
  348. }
  349. if (unlikely(index == IWL_INVALID_STATION))
  350. goto out;
  351. if (priv->stations[index].used) {
  352. priv->stations[index].used = 0;
  353. priv->num_stations--;
  354. }
  355. BUG_ON(priv->num_stations < 0);
  356. out:
  357. spin_unlock_irqrestore(&priv->sta_lock, flags);
  358. return 0;
  359. }
  360. #endif
  361. /**
  362. * iwl4965_add_station_flags - Add station to tables in driver and device
  363. */
  364. u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
  365. int is_ap, u8 flags, void *ht_data)
  366. {
  367. int i;
  368. int index = IWL_INVALID_STATION;
  369. struct iwl4965_station_entry *station;
  370. unsigned long flags_spin;
  371. DECLARE_MAC_BUF(mac);
  372. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  373. if (is_ap)
  374. index = IWL_AP_ID;
  375. else if (is_broadcast_ether_addr(addr))
  376. index = priv->hw_setting.bcast_sta_id;
  377. else
  378. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  379. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  380. addr)) {
  381. index = i;
  382. break;
  383. }
  384. if (!priv->stations[i].used &&
  385. index == IWL_INVALID_STATION)
  386. index = i;
  387. }
  388. /* These two conditions have the same outcome, but keep them separate
  389. since they have different meanings */
  390. if (unlikely(index == IWL_INVALID_STATION)) {
  391. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  392. return index;
  393. }
  394. if (priv->stations[index].used &&
  395. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  396. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  397. return index;
  398. }
  399. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  400. station = &priv->stations[index];
  401. station->used = 1;
  402. priv->num_stations++;
  403. /* Set up the REPLY_ADD_STA command to send to device */
  404. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  405. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  406. station->sta.mode = 0;
  407. station->sta.sta.sta_id = index;
  408. station->sta.station_flags = 0;
  409. #ifdef CONFIG_IWL4965_HT
  410. /* BCAST station and IBSS stations do not work in HT mode */
  411. if (index != priv->hw_setting.bcast_sta_id &&
  412. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  413. iwl4965_set_ht_add_station(priv, index,
  414. (struct ieee80211_ht_info *) ht_data);
  415. #endif /*CONFIG_IWL4965_HT*/
  416. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  417. /* Add station to device's station table */
  418. iwl4965_send_add_station(priv, &station->sta, flags);
  419. return index;
  420. }
  421. /*************** DRIVER STATUS FUNCTIONS *****/
  422. static inline int iwl4965_is_ready(struct iwl_priv *priv)
  423. {
  424. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  425. * set but EXIT_PENDING is not */
  426. return test_bit(STATUS_READY, &priv->status) &&
  427. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  428. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  429. }
  430. static inline int iwl4965_is_alive(struct iwl_priv *priv)
  431. {
  432. return test_bit(STATUS_ALIVE, &priv->status);
  433. }
  434. static inline int iwl4965_is_init(struct iwl_priv *priv)
  435. {
  436. return test_bit(STATUS_INIT, &priv->status);
  437. }
  438. static inline int iwl4965_is_rfkill(struct iwl_priv *priv)
  439. {
  440. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  441. test_bit(STATUS_RF_KILL_SW, &priv->status);
  442. }
  443. static inline int iwl4965_is_ready_rf(struct iwl_priv *priv)
  444. {
  445. if (iwl4965_is_rfkill(priv))
  446. return 0;
  447. return iwl4965_is_ready(priv);
  448. }
  449. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  450. #define IWL_CMD(x) case x : return #x
  451. static const char *get_cmd_string(u8 cmd)
  452. {
  453. switch (cmd) {
  454. IWL_CMD(REPLY_ALIVE);
  455. IWL_CMD(REPLY_ERROR);
  456. IWL_CMD(REPLY_RXON);
  457. IWL_CMD(REPLY_RXON_ASSOC);
  458. IWL_CMD(REPLY_QOS_PARAM);
  459. IWL_CMD(REPLY_RXON_TIMING);
  460. IWL_CMD(REPLY_ADD_STA);
  461. IWL_CMD(REPLY_REMOVE_STA);
  462. IWL_CMD(REPLY_REMOVE_ALL_STA);
  463. IWL_CMD(REPLY_TX);
  464. IWL_CMD(REPLY_RATE_SCALE);
  465. IWL_CMD(REPLY_LEDS_CMD);
  466. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  467. IWL_CMD(RADAR_NOTIFICATION);
  468. IWL_CMD(REPLY_QUIET_CMD);
  469. IWL_CMD(REPLY_CHANNEL_SWITCH);
  470. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  471. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  472. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  473. IWL_CMD(POWER_TABLE_CMD);
  474. IWL_CMD(PM_SLEEP_NOTIFICATION);
  475. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  476. IWL_CMD(REPLY_SCAN_CMD);
  477. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  478. IWL_CMD(SCAN_START_NOTIFICATION);
  479. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  480. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  481. IWL_CMD(BEACON_NOTIFICATION);
  482. IWL_CMD(REPLY_TX_BEACON);
  483. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  484. IWL_CMD(QUIET_NOTIFICATION);
  485. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  486. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  487. IWL_CMD(REPLY_BT_CONFIG);
  488. IWL_CMD(REPLY_STATISTICS_CMD);
  489. IWL_CMD(STATISTICS_NOTIFICATION);
  490. IWL_CMD(REPLY_CARD_STATE_CMD);
  491. IWL_CMD(CARD_STATE_NOTIFICATION);
  492. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  493. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  494. IWL_CMD(SENSITIVITY_CMD);
  495. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  496. IWL_CMD(REPLY_RX_PHY_CMD);
  497. IWL_CMD(REPLY_RX_MPDU_CMD);
  498. IWL_CMD(REPLY_4965_RX);
  499. IWL_CMD(REPLY_COMPRESSED_BA);
  500. default:
  501. return "UNKNOWN";
  502. }
  503. }
  504. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  505. /**
  506. * iwl4965_enqueue_hcmd - enqueue a uCode command
  507. * @priv: device private data point
  508. * @cmd: a point to the ucode command structure
  509. *
  510. * The function returns < 0 values to indicate the operation is
  511. * failed. On success, it turns the index (> 0) of command in the
  512. * command queue.
  513. */
  514. static int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl4965_host_cmd *cmd)
  515. {
  516. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  517. struct iwl4965_queue *q = &txq->q;
  518. struct iwl4965_tfd_frame *tfd;
  519. u32 *control_flags;
  520. struct iwl4965_cmd *out_cmd;
  521. u32 idx;
  522. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  523. dma_addr_t phys_addr;
  524. int ret;
  525. unsigned long flags;
  526. /* If any of the command structures end up being larger than
  527. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  528. * we will need to increase the size of the TFD entries */
  529. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  530. !(cmd->meta.flags & CMD_SIZE_HUGE));
  531. if (iwl4965_is_rfkill(priv)) {
  532. IWL_DEBUG_INFO("Not sending command - RF KILL");
  533. return -EIO;
  534. }
  535. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  536. IWL_ERROR("No space for Tx\n");
  537. return -ENOSPC;
  538. }
  539. spin_lock_irqsave(&priv->hcmd_lock, flags);
  540. tfd = &txq->bd[q->write_ptr];
  541. memset(tfd, 0, sizeof(*tfd));
  542. control_flags = (u32 *) tfd;
  543. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  544. out_cmd = &txq->cmd[idx];
  545. out_cmd->hdr.cmd = cmd->id;
  546. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  547. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  548. /* At this point, the out_cmd now has all of the incoming cmd
  549. * information */
  550. out_cmd->hdr.flags = 0;
  551. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  552. INDEX_TO_SEQ(q->write_ptr));
  553. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  554. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  555. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  556. offsetof(struct iwl4965_cmd, hdr);
  557. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  558. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  559. "%d bytes at %d[%d]:%d\n",
  560. get_cmd_string(out_cmd->hdr.cmd),
  561. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  562. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  563. txq->need_update = 1;
  564. /* Set up entry in queue's byte count circular buffer */
  565. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  566. /* Increment and update queue's write index */
  567. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  568. iwl4965_tx_queue_update_write_ptr(priv, txq);
  569. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  570. return ret ? ret : idx;
  571. }
  572. static int iwl4965_send_cmd_async(struct iwl_priv *priv, struct iwl4965_host_cmd *cmd)
  573. {
  574. int ret;
  575. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  576. /* An asynchronous command can not expect an SKB to be set. */
  577. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  578. /* An asynchronous command MUST have a callback. */
  579. BUG_ON(!cmd->meta.u.callback);
  580. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  581. return -EBUSY;
  582. ret = iwl4965_enqueue_hcmd(priv, cmd);
  583. if (ret < 0) {
  584. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  585. get_cmd_string(cmd->id), ret);
  586. return ret;
  587. }
  588. return 0;
  589. }
  590. static int iwl4965_send_cmd_sync(struct iwl_priv *priv, struct iwl4965_host_cmd *cmd)
  591. {
  592. int cmd_idx;
  593. int ret;
  594. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  595. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  596. /* A synchronous command can not have a callback set. */
  597. BUG_ON(cmd->meta.u.callback != NULL);
  598. if (atomic_xchg(&entry, 1)) {
  599. IWL_ERROR("Error sending %s: Already sending a host command\n",
  600. get_cmd_string(cmd->id));
  601. return -EBUSY;
  602. }
  603. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  604. if (cmd->meta.flags & CMD_WANT_SKB)
  605. cmd->meta.source = &cmd->meta;
  606. cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
  607. if (cmd_idx < 0) {
  608. ret = cmd_idx;
  609. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  610. get_cmd_string(cmd->id), ret);
  611. goto out;
  612. }
  613. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  614. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  615. HOST_COMPLETE_TIMEOUT);
  616. if (!ret) {
  617. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  618. IWL_ERROR("Error sending %s: time out after %dms.\n",
  619. get_cmd_string(cmd->id),
  620. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  621. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  622. ret = -ETIMEDOUT;
  623. goto cancel;
  624. }
  625. }
  626. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  627. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  628. get_cmd_string(cmd->id));
  629. ret = -ECANCELED;
  630. goto fail;
  631. }
  632. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  633. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  634. get_cmd_string(cmd->id));
  635. ret = -EIO;
  636. goto fail;
  637. }
  638. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  639. IWL_ERROR("Error: Response NULL in '%s'\n",
  640. get_cmd_string(cmd->id));
  641. ret = -EIO;
  642. goto out;
  643. }
  644. ret = 0;
  645. goto out;
  646. cancel:
  647. if (cmd->meta.flags & CMD_WANT_SKB) {
  648. struct iwl4965_cmd *qcmd;
  649. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  650. * TX cmd queue. Otherwise in case the cmd comes
  651. * in later, it will possibly set an invalid
  652. * address (cmd->meta.source). */
  653. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  654. qcmd->meta.flags &= ~CMD_WANT_SKB;
  655. }
  656. fail:
  657. if (cmd->meta.u.skb) {
  658. dev_kfree_skb_any(cmd->meta.u.skb);
  659. cmd->meta.u.skb = NULL;
  660. }
  661. out:
  662. atomic_set(&entry, 0);
  663. return ret;
  664. }
  665. static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  666. {
  667. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  668. if (hw_decrypt)
  669. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  670. else
  671. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  672. }
  673. int iwl4965_send_cmd(struct iwl_priv *priv, struct iwl4965_host_cmd *cmd)
  674. {
  675. if (cmd->meta.flags & CMD_ASYNC)
  676. return iwl4965_send_cmd_async(priv, cmd);
  677. return iwl4965_send_cmd_sync(priv, cmd);
  678. }
  679. int iwl4965_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
  680. {
  681. struct iwl4965_host_cmd cmd = {
  682. .id = id,
  683. .len = len,
  684. .data = data,
  685. };
  686. return iwl4965_send_cmd_sync(priv, &cmd);
  687. }
  688. static int __must_check iwl4965_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
  689. {
  690. struct iwl4965_host_cmd cmd = {
  691. .id = id,
  692. .len = sizeof(val),
  693. .data = &val,
  694. };
  695. return iwl4965_send_cmd_sync(priv, &cmd);
  696. }
  697. int iwl4965_send_statistics_request(struct iwl_priv *priv)
  698. {
  699. return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  700. }
  701. /**
  702. * iwl4965_rxon_add_station - add station into station table.
  703. *
  704. * there is only one AP station with id= IWL_AP_ID
  705. * NOTE: mutex must be held before calling this fnction
  706. */
  707. static int iwl4965_rxon_add_station(struct iwl_priv *priv,
  708. const u8 *addr, int is_ap)
  709. {
  710. u8 sta_id;
  711. /* Add station to device's station table */
  712. #ifdef CONFIG_IWL4965_HT
  713. struct ieee80211_conf *conf = &priv->hw->conf;
  714. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  715. if ((is_ap) &&
  716. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  717. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  718. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  719. 0, cur_ht_config);
  720. else
  721. #endif /* CONFIG_IWL4965_HT */
  722. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  723. 0, NULL);
  724. /* Set up default rate scaling table in device's station table */
  725. iwl4965_add_station(priv, addr, is_ap);
  726. return sta_id;
  727. }
  728. /**
  729. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  730. *
  731. * NOTE: This is really only useful during development and can eventually
  732. * be #ifdef'd out once the driver is stable and folks aren't actively
  733. * making changes
  734. */
  735. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  736. {
  737. int error = 0;
  738. int counter = 1;
  739. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  740. error |= le32_to_cpu(rxon->flags &
  741. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  742. RXON_FLG_RADAR_DETECT_MSK));
  743. if (error)
  744. IWL_WARNING("check 24G fields %d | %d\n",
  745. counter++, error);
  746. } else {
  747. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  748. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  749. if (error)
  750. IWL_WARNING("check 52 fields %d | %d\n",
  751. counter++, error);
  752. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  753. if (error)
  754. IWL_WARNING("check 52 CCK %d | %d\n",
  755. counter++, error);
  756. }
  757. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  758. if (error)
  759. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  760. /* make sure basic rates 6Mbps and 1Mbps are supported */
  761. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  762. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  763. if (error)
  764. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  765. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  766. if (error)
  767. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  768. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  769. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  770. if (error)
  771. IWL_WARNING("check CCK and short slot %d | %d\n",
  772. counter++, error);
  773. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  774. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  775. if (error)
  776. IWL_WARNING("check CCK & auto detect %d | %d\n",
  777. counter++, error);
  778. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  779. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  780. if (error)
  781. IWL_WARNING("check TGG and auto detect %d | %d\n",
  782. counter++, error);
  783. if (error)
  784. IWL_WARNING("Tuning to channel %d\n",
  785. le16_to_cpu(rxon->channel));
  786. if (error) {
  787. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  788. return -1;
  789. }
  790. return 0;
  791. }
  792. /**
  793. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  794. * @priv: staging_rxon is compared to active_rxon
  795. *
  796. * If the RXON structure is changing enough to require a new tune,
  797. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  798. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  799. */
  800. static int iwl4965_full_rxon_required(struct iwl_priv *priv)
  801. {
  802. /* These items are only settable from the full RXON command */
  803. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  804. compare_ether_addr(priv->staging_rxon.bssid_addr,
  805. priv->active_rxon.bssid_addr) ||
  806. compare_ether_addr(priv->staging_rxon.node_addr,
  807. priv->active_rxon.node_addr) ||
  808. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  809. priv->active_rxon.wlap_bssid_addr) ||
  810. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  811. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  812. (priv->staging_rxon.air_propagation !=
  813. priv->active_rxon.air_propagation) ||
  814. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  815. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  816. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  817. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  818. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  819. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  820. return 1;
  821. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  822. * be updated with the RXON_ASSOC command -- however only some
  823. * flag transitions are allowed using RXON_ASSOC */
  824. /* Check if we are not switching bands */
  825. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  826. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  827. return 1;
  828. /* Check if we are switching association toggle */
  829. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  830. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  831. return 1;
  832. return 0;
  833. }
  834. static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
  835. {
  836. int rc = 0;
  837. struct iwl4965_rx_packet *res = NULL;
  838. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  839. struct iwl4965_host_cmd cmd = {
  840. .id = REPLY_RXON_ASSOC,
  841. .len = sizeof(rxon_assoc),
  842. .meta.flags = CMD_WANT_SKB,
  843. .data = &rxon_assoc,
  844. };
  845. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  846. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  847. if ((rxon1->flags == rxon2->flags) &&
  848. (rxon1->filter_flags == rxon2->filter_flags) &&
  849. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  850. (rxon1->ofdm_ht_single_stream_basic_rates ==
  851. rxon2->ofdm_ht_single_stream_basic_rates) &&
  852. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  853. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  854. (rxon1->rx_chain == rxon2->rx_chain) &&
  855. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  856. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  857. return 0;
  858. }
  859. rxon_assoc.flags = priv->staging_rxon.flags;
  860. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  861. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  862. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  863. rxon_assoc.reserved = 0;
  864. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  865. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  866. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  867. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  868. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  869. rc = iwl4965_send_cmd_sync(priv, &cmd);
  870. if (rc)
  871. return rc;
  872. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  873. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  874. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  875. rc = -EIO;
  876. }
  877. priv->alloc_rxb_skb--;
  878. dev_kfree_skb_any(cmd.meta.u.skb);
  879. return rc;
  880. }
  881. /**
  882. * iwl4965_commit_rxon - commit staging_rxon to hardware
  883. *
  884. * The RXON command in staging_rxon is committed to the hardware and
  885. * the active_rxon structure is updated with the new data. This
  886. * function correctly transitions out of the RXON_ASSOC_MSK state if
  887. * a HW tune is required based on the RXON structure changes.
  888. */
  889. static int iwl4965_commit_rxon(struct iwl_priv *priv)
  890. {
  891. /* cast away the const for active_rxon in this function */
  892. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  893. DECLARE_MAC_BUF(mac);
  894. int rc = 0;
  895. if (!iwl4965_is_alive(priv))
  896. return -1;
  897. /* always get timestamp with Rx frame */
  898. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  899. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  900. if (rc) {
  901. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  902. return -EINVAL;
  903. }
  904. /* If we don't need to send a full RXON, we can use
  905. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  906. * and other flags for the current radio configuration. */
  907. if (!iwl4965_full_rxon_required(priv)) {
  908. rc = iwl4965_send_rxon_assoc(priv);
  909. if (rc) {
  910. IWL_ERROR("Error setting RXON_ASSOC "
  911. "configuration (%d).\n", rc);
  912. return rc;
  913. }
  914. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  915. return 0;
  916. }
  917. /* station table will be cleared */
  918. priv->assoc_station_added = 0;
  919. #ifdef CONFIG_IWL4965_SENSITIVITY
  920. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  921. if (!priv->error_recovering)
  922. priv->start_calib = 0;
  923. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  924. #endif /* CONFIG_IWL4965_SENSITIVITY */
  925. /* If we are currently associated and the new config requires
  926. * an RXON_ASSOC and the new config wants the associated mask enabled,
  927. * we must clear the associated from the active configuration
  928. * before we apply the new config */
  929. if (iwl4965_is_associated(priv) &&
  930. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  931. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  932. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  933. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  934. sizeof(struct iwl4965_rxon_cmd),
  935. &priv->active_rxon);
  936. /* If the mask clearing failed then we set
  937. * active_rxon back to what it was previously */
  938. if (rc) {
  939. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  940. IWL_ERROR("Error clearing ASSOC_MSK on current "
  941. "configuration (%d).\n", rc);
  942. return rc;
  943. }
  944. }
  945. IWL_DEBUG_INFO("Sending RXON\n"
  946. "* with%s RXON_FILTER_ASSOC_MSK\n"
  947. "* channel = %d\n"
  948. "* bssid = %s\n",
  949. ((priv->staging_rxon.filter_flags &
  950. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  951. le16_to_cpu(priv->staging_rxon.channel),
  952. print_mac(mac, priv->staging_rxon.bssid_addr));
  953. iwl4965_set_rxon_hwcrypto(priv, priv->cfg->mod_params->hw_crypto);
  954. /* Apply the new configuration */
  955. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  956. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  957. if (rc) {
  958. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  959. return rc;
  960. }
  961. iwlcore_clear_stations_table(priv);
  962. #ifdef CONFIG_IWL4965_SENSITIVITY
  963. if (!priv->error_recovering)
  964. priv->start_calib = 0;
  965. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  966. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  967. #endif /* CONFIG_IWL4965_SENSITIVITY */
  968. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  969. /* If we issue a new RXON command which required a tune then we must
  970. * send a new TXPOWER command or we won't be able to Tx any frames */
  971. rc = iwl4965_hw_reg_send_txpower(priv);
  972. if (rc) {
  973. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  974. return rc;
  975. }
  976. /* Add the broadcast address so we can send broadcast frames */
  977. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  978. IWL_INVALID_STATION) {
  979. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  980. return -EIO;
  981. }
  982. /* If we have set the ASSOC_MSK and we are in BSS mode then
  983. * add the IWL_AP_ID to the station rate table */
  984. if (iwl4965_is_associated(priv) &&
  985. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  986. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  987. == IWL_INVALID_STATION) {
  988. IWL_ERROR("Error adding AP address for transmit.\n");
  989. return -EIO;
  990. }
  991. priv->assoc_station_added = 1;
  992. }
  993. return 0;
  994. }
  995. static int iwl4965_send_bt_config(struct iwl_priv *priv)
  996. {
  997. struct iwl4965_bt_cmd bt_cmd = {
  998. .flags = 3,
  999. .lead_time = 0xAA,
  1000. .max_kill = 1,
  1001. .kill_ack_mask = 0,
  1002. .kill_cts_mask = 0,
  1003. };
  1004. return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1005. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  1006. }
  1007. static int iwl4965_send_scan_abort(struct iwl_priv *priv)
  1008. {
  1009. int rc = 0;
  1010. struct iwl4965_rx_packet *res;
  1011. struct iwl4965_host_cmd cmd = {
  1012. .id = REPLY_SCAN_ABORT_CMD,
  1013. .meta.flags = CMD_WANT_SKB,
  1014. };
  1015. /* If there isn't a scan actively going on in the hardware
  1016. * then we are in between scan bands and not actually
  1017. * actively scanning, so don't send the abort command */
  1018. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1019. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1020. return 0;
  1021. }
  1022. rc = iwl4965_send_cmd_sync(priv, &cmd);
  1023. if (rc) {
  1024. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1025. return rc;
  1026. }
  1027. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1028. if (res->u.status != CAN_ABORT_STATUS) {
  1029. /* The scan abort will return 1 for success or
  1030. * 2 for "failure". A failure condition can be
  1031. * due to simply not being in an active scan which
  1032. * can occur if we send the scan abort before we
  1033. * the microcode has notified us that a scan is
  1034. * completed. */
  1035. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1036. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1037. clear_bit(STATUS_SCAN_HW, &priv->status);
  1038. }
  1039. dev_kfree_skb_any(cmd.meta.u.skb);
  1040. return rc;
  1041. }
  1042. static int iwl4965_card_state_sync_callback(struct iwl_priv *priv,
  1043. struct iwl4965_cmd *cmd,
  1044. struct sk_buff *skb)
  1045. {
  1046. return 1;
  1047. }
  1048. /*
  1049. * CARD_STATE_CMD
  1050. *
  1051. * Use: Sets the device's internal card state to enable, disable, or halt
  1052. *
  1053. * When in the 'enable' state the card operates as normal.
  1054. * When in the 'disable' state, the card enters into a low power mode.
  1055. * When in the 'halt' state, the card is shut down and must be fully
  1056. * restarted to come back on.
  1057. */
  1058. static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1059. {
  1060. struct iwl4965_host_cmd cmd = {
  1061. .id = REPLY_CARD_STATE_CMD,
  1062. .len = sizeof(u32),
  1063. .data = &flags,
  1064. .meta.flags = meta_flag,
  1065. };
  1066. if (meta_flag & CMD_ASYNC)
  1067. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  1068. return iwl4965_send_cmd(priv, &cmd);
  1069. }
  1070. static int iwl4965_add_sta_sync_callback(struct iwl_priv *priv,
  1071. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  1072. {
  1073. struct iwl4965_rx_packet *res = NULL;
  1074. if (!skb) {
  1075. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1076. return 1;
  1077. }
  1078. res = (struct iwl4965_rx_packet *)skb->data;
  1079. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1080. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1081. res->hdr.flags);
  1082. return 1;
  1083. }
  1084. switch (res->u.add_sta.status) {
  1085. case ADD_STA_SUCCESS_MSK:
  1086. break;
  1087. default:
  1088. break;
  1089. }
  1090. /* We didn't cache the SKB; let the caller free it */
  1091. return 1;
  1092. }
  1093. int iwl4965_send_add_station(struct iwl_priv *priv,
  1094. struct iwl4965_addsta_cmd *sta, u8 flags)
  1095. {
  1096. struct iwl4965_rx_packet *res = NULL;
  1097. int rc = 0;
  1098. struct iwl4965_host_cmd cmd = {
  1099. .id = REPLY_ADD_STA,
  1100. .len = sizeof(struct iwl4965_addsta_cmd),
  1101. .meta.flags = flags,
  1102. .data = sta,
  1103. };
  1104. if (flags & CMD_ASYNC)
  1105. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  1106. else
  1107. cmd.meta.flags |= CMD_WANT_SKB;
  1108. rc = iwl4965_send_cmd(priv, &cmd);
  1109. if (rc || (flags & CMD_ASYNC))
  1110. return rc;
  1111. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1112. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1113. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1114. res->hdr.flags);
  1115. rc = -EIO;
  1116. }
  1117. if (rc == 0) {
  1118. switch (res->u.add_sta.status) {
  1119. case ADD_STA_SUCCESS_MSK:
  1120. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1121. break;
  1122. default:
  1123. rc = -EIO;
  1124. IWL_WARNING("REPLY_ADD_STA failed\n");
  1125. break;
  1126. }
  1127. }
  1128. priv->alloc_rxb_skb--;
  1129. dev_kfree_skb_any(cmd.meta.u.skb);
  1130. return rc;
  1131. }
  1132. static int iwl4965_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  1133. struct ieee80211_key_conf *keyconf,
  1134. u8 sta_id)
  1135. {
  1136. unsigned long flags;
  1137. __le16 key_flags = 0;
  1138. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  1139. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1140. if (sta_id == priv->hw_setting.bcast_sta_id)
  1141. key_flags |= STA_KEY_MULTICAST_MSK;
  1142. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1143. keyconf->hw_key_idx = keyconf->keyidx;
  1144. key_flags &= ~STA_KEY_FLG_INVALID;
  1145. spin_lock_irqsave(&priv->sta_lock, flags);
  1146. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1147. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1148. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1149. keyconf->keylen);
  1150. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1151. keyconf->keylen);
  1152. priv->stations[sta_id].sta.key.key_offset
  1153. = (sta_id % STA_KEY_MAX_NUM);/*FIXME*/
  1154. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1155. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1156. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1157. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1158. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1159. return iwl4965_send_add_station(priv,
  1160. &priv->stations[sta_id].sta, CMD_ASYNC);
  1161. }
  1162. static int iwl4965_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  1163. struct ieee80211_key_conf *keyconf,
  1164. u8 sta_id)
  1165. {
  1166. return -EOPNOTSUPP;
  1167. }
  1168. static int iwl4965_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  1169. {
  1170. unsigned long flags;
  1171. spin_lock_irqsave(&priv->sta_lock, flags);
  1172. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1173. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1174. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1175. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1176. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1177. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1178. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1179. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1180. return 0;
  1181. }
  1182. static int iwl4965_set_dynamic_key(struct iwl_priv *priv,
  1183. struct ieee80211_key_conf *key, u8 sta_id)
  1184. {
  1185. int ret;
  1186. switch (key->alg) {
  1187. case ALG_CCMP:
  1188. ret = iwl4965_set_ccmp_dynamic_key_info(priv, key, sta_id);
  1189. break;
  1190. case ALG_TKIP:
  1191. ret = iwl4965_set_tkip_dynamic_key_info(priv, key, sta_id);
  1192. break;
  1193. case ALG_WEP:
  1194. ret = -EOPNOTSUPP;
  1195. break;
  1196. default:
  1197. IWL_ERROR("Unknown alg: %s alg = %d\n", __func__, key->alg);
  1198. ret = -EINVAL;
  1199. }
  1200. return ret;
  1201. }
  1202. static int iwl4965_remove_static_key(struct iwl_priv *priv)
  1203. {
  1204. int ret = -EOPNOTSUPP;
  1205. return ret;
  1206. }
  1207. static int iwl4965_set_static_key(struct iwl_priv *priv,
  1208. struct ieee80211_key_conf *key)
  1209. {
  1210. if (key->alg == ALG_WEP)
  1211. return -EOPNOTSUPP;
  1212. IWL_ERROR("Static key invalid: alg %d\n", key->alg);
  1213. return -EINVAL;
  1214. }
  1215. static void iwl4965_clear_free_frames(struct iwl_priv *priv)
  1216. {
  1217. struct list_head *element;
  1218. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1219. priv->frames_count);
  1220. while (!list_empty(&priv->free_frames)) {
  1221. element = priv->free_frames.next;
  1222. list_del(element);
  1223. kfree(list_entry(element, struct iwl4965_frame, list));
  1224. priv->frames_count--;
  1225. }
  1226. if (priv->frames_count) {
  1227. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1228. priv->frames_count);
  1229. priv->frames_count = 0;
  1230. }
  1231. }
  1232. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
  1233. {
  1234. struct iwl4965_frame *frame;
  1235. struct list_head *element;
  1236. if (list_empty(&priv->free_frames)) {
  1237. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1238. if (!frame) {
  1239. IWL_ERROR("Could not allocate frame!\n");
  1240. return NULL;
  1241. }
  1242. priv->frames_count++;
  1243. return frame;
  1244. }
  1245. element = priv->free_frames.next;
  1246. list_del(element);
  1247. return list_entry(element, struct iwl4965_frame, list);
  1248. }
  1249. static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
  1250. {
  1251. memset(frame, 0, sizeof(*frame));
  1252. list_add(&frame->list, &priv->free_frames);
  1253. }
  1254. unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
  1255. struct ieee80211_hdr *hdr,
  1256. const u8 *dest, int left)
  1257. {
  1258. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1259. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1260. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1261. return 0;
  1262. if (priv->ibss_beacon->len > left)
  1263. return 0;
  1264. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1265. return priv->ibss_beacon->len;
  1266. }
  1267. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1268. {
  1269. u8 i;
  1270. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1271. i = iwl4965_rates[i].next_ieee) {
  1272. if (rate_mask & (1 << i))
  1273. return iwl4965_rates[i].plcp;
  1274. }
  1275. return IWL_RATE_INVALID;
  1276. }
  1277. static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
  1278. {
  1279. struct iwl4965_frame *frame;
  1280. unsigned int frame_size;
  1281. int rc;
  1282. u8 rate;
  1283. frame = iwl4965_get_free_frame(priv);
  1284. if (!frame) {
  1285. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1286. "command.\n");
  1287. return -ENOMEM;
  1288. }
  1289. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1290. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1291. 0xFF0);
  1292. if (rate == IWL_INVALID_RATE)
  1293. rate = IWL_RATE_6M_PLCP;
  1294. } else {
  1295. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1296. if (rate == IWL_INVALID_RATE)
  1297. rate = IWL_RATE_1M_PLCP;
  1298. }
  1299. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1300. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1301. &frame->u.cmd[0]);
  1302. iwl4965_free_frame(priv, frame);
  1303. return rc;
  1304. }
  1305. /******************************************************************************
  1306. *
  1307. * Misc. internal state and helper functions
  1308. *
  1309. ******************************************************************************/
  1310. static void iwl4965_unset_hw_setting(struct iwl_priv *priv)
  1311. {
  1312. if (priv->hw_setting.shared_virt)
  1313. pci_free_consistent(priv->pci_dev,
  1314. sizeof(struct iwl4965_shared),
  1315. priv->hw_setting.shared_virt,
  1316. priv->hw_setting.shared_phys);
  1317. }
  1318. /**
  1319. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1320. *
  1321. * return : set the bit for each supported rate insert in ie
  1322. */
  1323. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1324. u16 basic_rate, int *left)
  1325. {
  1326. u16 ret_rates = 0, bit;
  1327. int i;
  1328. u8 *cnt = ie;
  1329. u8 *rates = ie + 1;
  1330. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1331. if (bit & supported_rate) {
  1332. ret_rates |= bit;
  1333. rates[*cnt] = iwl4965_rates[i].ieee |
  1334. ((bit & basic_rate) ? 0x80 : 0x00);
  1335. (*cnt)++;
  1336. (*left)--;
  1337. if ((*left <= 0) ||
  1338. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1339. break;
  1340. }
  1341. }
  1342. return ret_rates;
  1343. }
  1344. /**
  1345. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1346. */
  1347. static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
  1348. enum ieee80211_band band,
  1349. struct ieee80211_mgmt *frame,
  1350. int left, int is_direct)
  1351. {
  1352. int len = 0;
  1353. u8 *pos = NULL;
  1354. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1355. #ifdef CONFIG_IWL4965_HT
  1356. const struct ieee80211_supported_band *sband =
  1357. iwl4965_get_hw_mode(priv, band);
  1358. #endif /* CONFIG_IWL4965_HT */
  1359. /* Make sure there is enough space for the probe request,
  1360. * two mandatory IEs and the data */
  1361. left -= 24;
  1362. if (left < 0)
  1363. return 0;
  1364. len += 24;
  1365. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1366. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1367. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1368. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1369. frame->seq_ctrl = 0;
  1370. /* fill in our indirect SSID IE */
  1371. /* ...next IE... */
  1372. left -= 2;
  1373. if (left < 0)
  1374. return 0;
  1375. len += 2;
  1376. pos = &(frame->u.probe_req.variable[0]);
  1377. *pos++ = WLAN_EID_SSID;
  1378. *pos++ = 0;
  1379. /* fill in our direct SSID IE... */
  1380. if (is_direct) {
  1381. /* ...next IE... */
  1382. left -= 2 + priv->essid_len;
  1383. if (left < 0)
  1384. return 0;
  1385. /* ... fill it in... */
  1386. *pos++ = WLAN_EID_SSID;
  1387. *pos++ = priv->essid_len;
  1388. memcpy(pos, priv->essid, priv->essid_len);
  1389. pos += priv->essid_len;
  1390. len += 2 + priv->essid_len;
  1391. }
  1392. /* fill in supported rate */
  1393. /* ...next IE... */
  1394. left -= 2;
  1395. if (left < 0)
  1396. return 0;
  1397. /* ... fill it in... */
  1398. *pos++ = WLAN_EID_SUPP_RATES;
  1399. *pos = 0;
  1400. /* exclude 60M rate */
  1401. active_rates = priv->rates_mask;
  1402. active_rates &= ~IWL_RATE_60M_MASK;
  1403. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1404. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1405. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1406. active_rate_basic, &left);
  1407. active_rates &= ~ret_rates;
  1408. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1409. active_rate_basic, &left);
  1410. active_rates &= ~ret_rates;
  1411. len += 2 + *pos;
  1412. pos += (*pos) + 1;
  1413. if (active_rates == 0)
  1414. goto fill_end;
  1415. /* fill in supported extended rate */
  1416. /* ...next IE... */
  1417. left -= 2;
  1418. if (left < 0)
  1419. return 0;
  1420. /* ... fill it in... */
  1421. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1422. *pos = 0;
  1423. iwl4965_supported_rate_to_ie(pos, active_rates,
  1424. active_rate_basic, &left);
  1425. if (*pos > 0)
  1426. len += 2 + *pos;
  1427. #ifdef CONFIG_IWL4965_HT
  1428. if (sband && sband->ht_info.ht_supported) {
  1429. struct ieee80211_ht_cap *ht_cap;
  1430. pos += (*pos) + 1;
  1431. *pos++ = WLAN_EID_HT_CAPABILITY;
  1432. *pos++ = sizeof(struct ieee80211_ht_cap);
  1433. ht_cap = (struct ieee80211_ht_cap *)pos;
  1434. ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
  1435. memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
  1436. ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
  1437. IEEE80211_HT_CAP_AMPDU_FACTOR) |
  1438. ((sband->ht_info.ampdu_density << 2) &
  1439. IEEE80211_HT_CAP_AMPDU_DENSITY);
  1440. len += 2 + sizeof(struct ieee80211_ht_cap);
  1441. }
  1442. #endif /*CONFIG_IWL4965_HT */
  1443. fill_end:
  1444. return (u16)len;
  1445. }
  1446. /*
  1447. * QoS support
  1448. */
  1449. static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
  1450. struct iwl4965_qosparam_cmd *qos)
  1451. {
  1452. return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1453. sizeof(struct iwl4965_qosparam_cmd), qos);
  1454. }
  1455. static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
  1456. {
  1457. unsigned long flags;
  1458. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1459. return;
  1460. if (!priv->qos_data.qos_enable)
  1461. return;
  1462. spin_lock_irqsave(&priv->lock, flags);
  1463. priv->qos_data.def_qos_parm.qos_flags = 0;
  1464. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1465. !priv->qos_data.qos_cap.q_AP.txop_request)
  1466. priv->qos_data.def_qos_parm.qos_flags |=
  1467. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1468. if (priv->qos_data.qos_active)
  1469. priv->qos_data.def_qos_parm.qos_flags |=
  1470. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1471. #ifdef CONFIG_IWL4965_HT
  1472. if (priv->current_ht_config.is_ht)
  1473. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1474. #endif /* CONFIG_IWL4965_HT */
  1475. spin_unlock_irqrestore(&priv->lock, flags);
  1476. if (force || iwl4965_is_associated(priv)) {
  1477. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1478. priv->qos_data.qos_active,
  1479. priv->qos_data.def_qos_parm.qos_flags);
  1480. iwl4965_send_qos_params_command(priv,
  1481. &(priv->qos_data.def_qos_parm));
  1482. }
  1483. }
  1484. /*
  1485. * Power management (not Tx power!) functions
  1486. */
  1487. #define MSEC_TO_USEC 1024
  1488. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1489. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1490. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1491. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1492. __constant_cpu_to_le32(X1), \
  1493. __constant_cpu_to_le32(X2), \
  1494. __constant_cpu_to_le32(X3), \
  1495. __constant_cpu_to_le32(X4)}
  1496. /* default power management (not Tx power) table values */
  1497. /* for tim 0-10 */
  1498. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1499. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1500. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1501. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1502. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1503. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1504. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1505. };
  1506. /* for tim > 10 */
  1507. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1508. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1509. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1510. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1511. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1512. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1513. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1514. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1515. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1516. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1517. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1518. };
  1519. int iwl4965_power_init_handle(struct iwl_priv *priv)
  1520. {
  1521. int rc = 0, i;
  1522. struct iwl4965_power_mgr *pow_data;
  1523. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1524. u16 pci_pm;
  1525. IWL_DEBUG_POWER("Initialize power \n");
  1526. pow_data = &(priv->power_data);
  1527. memset(pow_data, 0, sizeof(*pow_data));
  1528. pow_data->active_index = IWL_POWER_RANGE_0;
  1529. pow_data->dtim_val = 0xffff;
  1530. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1531. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1532. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1533. if (rc != 0)
  1534. return 0;
  1535. else {
  1536. struct iwl4965_powertable_cmd *cmd;
  1537. IWL_DEBUG_POWER("adjust power command flags\n");
  1538. for (i = 0; i < IWL_POWER_AC; i++) {
  1539. cmd = &pow_data->pwr_range_0[i].cmd;
  1540. if (pci_pm & 0x1)
  1541. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1542. else
  1543. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1544. }
  1545. }
  1546. return rc;
  1547. }
  1548. static int iwl4965_update_power_cmd(struct iwl_priv *priv,
  1549. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1550. {
  1551. int rc = 0, i;
  1552. u8 skip;
  1553. u32 max_sleep = 0;
  1554. struct iwl4965_power_vec_entry *range;
  1555. u8 period = 0;
  1556. struct iwl4965_power_mgr *pow_data;
  1557. if (mode > IWL_POWER_INDEX_5) {
  1558. IWL_DEBUG_POWER("Error invalid power mode \n");
  1559. return -1;
  1560. }
  1561. pow_data = &(priv->power_data);
  1562. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1563. range = &pow_data->pwr_range_0[0];
  1564. else
  1565. range = &pow_data->pwr_range_1[1];
  1566. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1567. #ifdef IWL_MAC80211_DISABLE
  1568. if (priv->assoc_network != NULL) {
  1569. unsigned long flags;
  1570. period = priv->assoc_network->tim.tim_period;
  1571. }
  1572. #endif /*IWL_MAC80211_DISABLE */
  1573. skip = range[mode].no_dtim;
  1574. if (period == 0) {
  1575. period = 1;
  1576. skip = 0;
  1577. }
  1578. if (skip == 0) {
  1579. max_sleep = period;
  1580. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1581. } else {
  1582. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1583. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1584. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1585. }
  1586. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1587. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1588. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1589. }
  1590. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1591. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1592. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1593. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1594. le32_to_cpu(cmd->sleep_interval[0]),
  1595. le32_to_cpu(cmd->sleep_interval[1]),
  1596. le32_to_cpu(cmd->sleep_interval[2]),
  1597. le32_to_cpu(cmd->sleep_interval[3]),
  1598. le32_to_cpu(cmd->sleep_interval[4]));
  1599. return rc;
  1600. }
  1601. static int iwl4965_send_power_mode(struct iwl_priv *priv, u32 mode)
  1602. {
  1603. u32 uninitialized_var(final_mode);
  1604. int rc;
  1605. struct iwl4965_powertable_cmd cmd;
  1606. /* If on battery, set to 3,
  1607. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1608. * else user level */
  1609. switch (mode) {
  1610. case IWL_POWER_BATTERY:
  1611. final_mode = IWL_POWER_INDEX_3;
  1612. break;
  1613. case IWL_POWER_AC:
  1614. final_mode = IWL_POWER_MODE_CAM;
  1615. break;
  1616. default:
  1617. final_mode = mode;
  1618. break;
  1619. }
  1620. cmd.keep_alive_beacons = 0;
  1621. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1622. rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1623. if (final_mode == IWL_POWER_MODE_CAM)
  1624. clear_bit(STATUS_POWER_PMI, &priv->status);
  1625. else
  1626. set_bit(STATUS_POWER_PMI, &priv->status);
  1627. return rc;
  1628. }
  1629. int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1630. {
  1631. /* Filter incoming packets to determine if they are targeted toward
  1632. * this network, discarding packets coming from ourselves */
  1633. switch (priv->iw_mode) {
  1634. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1635. /* packets from our adapter are dropped (echo) */
  1636. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1637. return 0;
  1638. /* {broad,multi}cast packets to our IBSS go through */
  1639. if (is_multicast_ether_addr(header->addr1))
  1640. return !compare_ether_addr(header->addr3, priv->bssid);
  1641. /* packets to our adapter go through */
  1642. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1643. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1644. /* packets from our adapter are dropped (echo) */
  1645. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1646. return 0;
  1647. /* {broad,multi}cast packets to our BSS go through */
  1648. if (is_multicast_ether_addr(header->addr1))
  1649. return !compare_ether_addr(header->addr2, priv->bssid);
  1650. /* packets to our adapter go through */
  1651. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1652. }
  1653. return 1;
  1654. }
  1655. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1656. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1657. {
  1658. switch (status & TX_STATUS_MSK) {
  1659. case TX_STATUS_SUCCESS:
  1660. return "SUCCESS";
  1661. TX_STATUS_ENTRY(SHORT_LIMIT);
  1662. TX_STATUS_ENTRY(LONG_LIMIT);
  1663. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1664. TX_STATUS_ENTRY(MGMNT_ABORT);
  1665. TX_STATUS_ENTRY(NEXT_FRAG);
  1666. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1667. TX_STATUS_ENTRY(DEST_PS);
  1668. TX_STATUS_ENTRY(ABORTED);
  1669. TX_STATUS_ENTRY(BT_RETRY);
  1670. TX_STATUS_ENTRY(STA_INVALID);
  1671. TX_STATUS_ENTRY(FRAG_DROPPED);
  1672. TX_STATUS_ENTRY(TID_DISABLE);
  1673. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1674. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1675. TX_STATUS_ENTRY(TX_LOCKED);
  1676. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1677. }
  1678. return "UNKNOWN";
  1679. }
  1680. /**
  1681. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1682. *
  1683. * NOTE: priv->mutex is not required before calling this function
  1684. */
  1685. static int iwl4965_scan_cancel(struct iwl_priv *priv)
  1686. {
  1687. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1688. clear_bit(STATUS_SCANNING, &priv->status);
  1689. return 0;
  1690. }
  1691. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1692. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1693. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1694. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1695. queue_work(priv->workqueue, &priv->abort_scan);
  1696. } else
  1697. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1698. return test_bit(STATUS_SCANNING, &priv->status);
  1699. }
  1700. return 0;
  1701. }
  1702. /**
  1703. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  1704. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1705. *
  1706. * NOTE: priv->mutex must be held before calling this function
  1707. */
  1708. static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1709. {
  1710. unsigned long now = jiffies;
  1711. int ret;
  1712. ret = iwl4965_scan_cancel(priv);
  1713. if (ret && ms) {
  1714. mutex_unlock(&priv->mutex);
  1715. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1716. test_bit(STATUS_SCANNING, &priv->status))
  1717. msleep(1);
  1718. mutex_lock(&priv->mutex);
  1719. return test_bit(STATUS_SCANNING, &priv->status);
  1720. }
  1721. return ret;
  1722. }
  1723. static void iwl4965_sequence_reset(struct iwl_priv *priv)
  1724. {
  1725. /* Reset ieee stats */
  1726. /* We don't reset the net_device_stats (ieee->stats) on
  1727. * re-association */
  1728. priv->last_seq_num = -1;
  1729. priv->last_frag_num = -1;
  1730. priv->last_packet_time = 0;
  1731. iwl4965_scan_cancel(priv);
  1732. }
  1733. #define MAX_UCODE_BEACON_INTERVAL 4096
  1734. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1735. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  1736. {
  1737. u16 new_val = 0;
  1738. u16 beacon_factor = 0;
  1739. beacon_factor =
  1740. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1741. / MAX_UCODE_BEACON_INTERVAL;
  1742. new_val = beacon_val / beacon_factor;
  1743. return cpu_to_le16(new_val);
  1744. }
  1745. static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
  1746. {
  1747. u64 interval_tm_unit;
  1748. u64 tsf, result;
  1749. unsigned long flags;
  1750. struct ieee80211_conf *conf = NULL;
  1751. u16 beacon_int = 0;
  1752. conf = ieee80211_get_hw_conf(priv->hw);
  1753. spin_lock_irqsave(&priv->lock, flags);
  1754. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  1755. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  1756. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1757. tsf = priv->timestamp1;
  1758. tsf = ((tsf << 32) | priv->timestamp0);
  1759. beacon_int = priv->beacon_int;
  1760. spin_unlock_irqrestore(&priv->lock, flags);
  1761. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1762. if (beacon_int == 0) {
  1763. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1764. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1765. } else {
  1766. priv->rxon_timing.beacon_interval =
  1767. cpu_to_le16(beacon_int);
  1768. priv->rxon_timing.beacon_interval =
  1769. iwl4965_adjust_beacon_interval(
  1770. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1771. }
  1772. priv->rxon_timing.atim_window = 0;
  1773. } else {
  1774. priv->rxon_timing.beacon_interval =
  1775. iwl4965_adjust_beacon_interval(conf->beacon_int);
  1776. /* TODO: we need to get atim_window from upper stack
  1777. * for now we set to 0 */
  1778. priv->rxon_timing.atim_window = 0;
  1779. }
  1780. interval_tm_unit =
  1781. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1782. result = do_div(tsf, interval_tm_unit);
  1783. priv->rxon_timing.beacon_init_val =
  1784. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1785. IWL_DEBUG_ASSOC
  1786. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1787. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1788. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1789. le16_to_cpu(priv->rxon_timing.atim_window));
  1790. }
  1791. static int iwl4965_scan_initiate(struct iwl_priv *priv)
  1792. {
  1793. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1794. IWL_ERROR("APs don't scan.\n");
  1795. return 0;
  1796. }
  1797. if (!iwl4965_is_ready_rf(priv)) {
  1798. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1799. return -EIO;
  1800. }
  1801. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1802. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1803. return -EAGAIN;
  1804. }
  1805. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1806. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1807. "Queuing.\n");
  1808. return -EAGAIN;
  1809. }
  1810. IWL_DEBUG_INFO("Starting scan...\n");
  1811. priv->scan_bands = 2;
  1812. set_bit(STATUS_SCANNING, &priv->status);
  1813. priv->scan_start = jiffies;
  1814. priv->scan_pass_start = priv->scan_start;
  1815. queue_work(priv->workqueue, &priv->request_scan);
  1816. return 0;
  1817. }
  1818. static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
  1819. enum ieee80211_band band)
  1820. {
  1821. if (band == IEEE80211_BAND_5GHZ) {
  1822. priv->staging_rxon.flags &=
  1823. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1824. | RXON_FLG_CCK_MSK);
  1825. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1826. } else {
  1827. /* Copied from iwl4965_bg_post_associate() */
  1828. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1829. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1830. else
  1831. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1832. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  1833. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1834. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1835. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1836. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1837. }
  1838. }
  1839. /*
  1840. * initialize rxon structure with default values from eeprom
  1841. */
  1842. static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
  1843. {
  1844. const struct iwl_channel_info *ch_info;
  1845. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  1846. switch (priv->iw_mode) {
  1847. case IEEE80211_IF_TYPE_AP:
  1848. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  1849. break;
  1850. case IEEE80211_IF_TYPE_STA:
  1851. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1852. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1853. break;
  1854. case IEEE80211_IF_TYPE_IBSS:
  1855. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1856. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1857. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1858. RXON_FILTER_ACCEPT_GRP_MSK;
  1859. break;
  1860. case IEEE80211_IF_TYPE_MNTR:
  1861. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1862. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1863. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1864. break;
  1865. }
  1866. #if 0
  1867. /* TODO: Figure out when short_preamble would be set and cache from
  1868. * that */
  1869. if (!hw_to_local(priv->hw)->short_preamble)
  1870. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1871. else
  1872. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1873. #endif
  1874. ch_info = iwl4965_get_channel_info(priv, priv->band,
  1875. le16_to_cpu(priv->staging_rxon.channel));
  1876. if (!ch_info)
  1877. ch_info = &priv->channel_info[0];
  1878. /*
  1879. * in some case A channels are all non IBSS
  1880. * in this case force B/G channel
  1881. */
  1882. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  1883. !(is_channel_ibss(ch_info)))
  1884. ch_info = &priv->channel_info[0];
  1885. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  1886. priv->band = ch_info->band;
  1887. iwl4965_set_flags_for_phymode(priv, priv->band);
  1888. priv->staging_rxon.ofdm_basic_rates =
  1889. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1890. priv->staging_rxon.cck_basic_rates =
  1891. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1892. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  1893. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  1894. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1895. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  1896. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  1897. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  1898. iwl4965_set_rxon_chain(priv);
  1899. }
  1900. static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
  1901. {
  1902. if (mode == IEEE80211_IF_TYPE_IBSS) {
  1903. const struct iwl_channel_info *ch_info;
  1904. ch_info = iwl4965_get_channel_info(priv,
  1905. priv->band,
  1906. le16_to_cpu(priv->staging_rxon.channel));
  1907. if (!ch_info || !is_channel_ibss(ch_info)) {
  1908. IWL_ERROR("channel %d not IBSS channel\n",
  1909. le16_to_cpu(priv->staging_rxon.channel));
  1910. return -EINVAL;
  1911. }
  1912. }
  1913. priv->iw_mode = mode;
  1914. iwl4965_connection_init_rx_config(priv);
  1915. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1916. iwlcore_clear_stations_table(priv);
  1917. /* dont commit rxon if rf-kill is on*/
  1918. if (!iwl4965_is_ready_rf(priv))
  1919. return -EAGAIN;
  1920. cancel_delayed_work(&priv->scan_check);
  1921. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  1922. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  1923. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  1924. return -EAGAIN;
  1925. }
  1926. iwl4965_commit_rxon(priv);
  1927. return 0;
  1928. }
  1929. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  1930. struct ieee80211_tx_control *ctl,
  1931. struct iwl4965_cmd *cmd,
  1932. struct sk_buff *skb_frag,
  1933. int sta_id)
  1934. {
  1935. struct iwl4965_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  1936. switch (keyinfo->alg) {
  1937. case ALG_CCMP:
  1938. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  1939. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  1940. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  1941. cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
  1942. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  1943. break;
  1944. case ALG_TKIP:
  1945. #if 0
  1946. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  1947. if (last_frag)
  1948. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  1949. 8);
  1950. else
  1951. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  1952. #endif
  1953. break;
  1954. case ALG_WEP:
  1955. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  1956. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  1957. if (keyinfo->keylen == 13)
  1958. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  1959. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  1960. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  1961. "with key %d\n", ctl->key_idx);
  1962. break;
  1963. default:
  1964. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  1965. break;
  1966. }
  1967. }
  1968. /*
  1969. * handle build REPLY_TX command notification.
  1970. */
  1971. static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
  1972. struct iwl4965_cmd *cmd,
  1973. struct ieee80211_tx_control *ctrl,
  1974. struct ieee80211_hdr *hdr,
  1975. int is_unicast, u8 std_id)
  1976. {
  1977. __le16 *qc;
  1978. u16 fc = le16_to_cpu(hdr->frame_control);
  1979. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  1980. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  1981. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  1982. tx_flags |= TX_CMD_FLG_ACK_MSK;
  1983. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  1984. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1985. if (ieee80211_is_probe_response(fc) &&
  1986. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  1987. tx_flags |= TX_CMD_FLG_TSF_MSK;
  1988. } else {
  1989. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  1990. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1991. }
  1992. if (ieee80211_is_back_request(fc))
  1993. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  1994. cmd->cmd.tx.sta_id = std_id;
  1995. if (ieee80211_get_morefrag(hdr))
  1996. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  1997. qc = ieee80211_get_qos_ctrl(hdr);
  1998. if (qc) {
  1999. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2000. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2001. } else
  2002. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2003. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2004. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2005. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2006. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2007. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2008. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2009. }
  2010. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2011. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2012. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2013. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2014. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2015. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2016. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2017. else
  2018. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2019. } else
  2020. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2021. cmd->cmd.tx.driver_txop = 0;
  2022. cmd->cmd.tx.tx_flags = tx_flags;
  2023. cmd->cmd.tx.next_frame_len = 0;
  2024. }
  2025. static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len)
  2026. {
  2027. /* 0 - mgmt, 1 - cnt, 2 - data */
  2028. int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
  2029. priv->tx_stats[idx].cnt++;
  2030. priv->tx_stats[idx].bytes += len;
  2031. }
  2032. /**
  2033. * iwl4965_get_sta_id - Find station's index within station table
  2034. *
  2035. * If new IBSS station, create new entry in station table
  2036. */
  2037. static int iwl4965_get_sta_id(struct iwl_priv *priv,
  2038. struct ieee80211_hdr *hdr)
  2039. {
  2040. int sta_id;
  2041. u16 fc = le16_to_cpu(hdr->frame_control);
  2042. DECLARE_MAC_BUF(mac);
  2043. /* If this frame is broadcast or management, use broadcast station id */
  2044. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2045. is_multicast_ether_addr(hdr->addr1))
  2046. return priv->hw_setting.bcast_sta_id;
  2047. switch (priv->iw_mode) {
  2048. /* If we are a client station in a BSS network, use the special
  2049. * AP station entry (that's the only station we communicate with) */
  2050. case IEEE80211_IF_TYPE_STA:
  2051. return IWL_AP_ID;
  2052. /* If we are an AP, then find the station, or use BCAST */
  2053. case IEEE80211_IF_TYPE_AP:
  2054. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2055. if (sta_id != IWL_INVALID_STATION)
  2056. return sta_id;
  2057. return priv->hw_setting.bcast_sta_id;
  2058. /* If this frame is going out to an IBSS network, find the station,
  2059. * or create a new station table entry */
  2060. case IEEE80211_IF_TYPE_IBSS:
  2061. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2062. if (sta_id != IWL_INVALID_STATION)
  2063. return sta_id;
  2064. /* Create new station table entry */
  2065. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  2066. 0, CMD_ASYNC, NULL);
  2067. if (sta_id != IWL_INVALID_STATION)
  2068. return sta_id;
  2069. IWL_DEBUG_DROP("Station %s not in station map. "
  2070. "Defaulting to broadcast...\n",
  2071. print_mac(mac, hdr->addr1));
  2072. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2073. return priv->hw_setting.bcast_sta_id;
  2074. default:
  2075. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2076. return priv->hw_setting.bcast_sta_id;
  2077. }
  2078. }
  2079. /*
  2080. * start REPLY_TX command process
  2081. */
  2082. static int iwl4965_tx_skb(struct iwl_priv *priv,
  2083. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2084. {
  2085. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2086. struct iwl4965_tfd_frame *tfd;
  2087. u32 *control_flags;
  2088. int txq_id = ctl->queue;
  2089. struct iwl4965_tx_queue *txq = NULL;
  2090. struct iwl4965_queue *q = NULL;
  2091. dma_addr_t phys_addr;
  2092. dma_addr_t txcmd_phys;
  2093. dma_addr_t scratch_phys;
  2094. struct iwl4965_cmd *out_cmd = NULL;
  2095. u16 len, idx, len_org;
  2096. u8 id, hdr_len, unicast;
  2097. u8 sta_id;
  2098. u16 seq_number = 0;
  2099. u16 fc;
  2100. __le16 *qc;
  2101. u8 wait_write_ptr = 0;
  2102. unsigned long flags;
  2103. int rc;
  2104. spin_lock_irqsave(&priv->lock, flags);
  2105. if (iwl4965_is_rfkill(priv)) {
  2106. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2107. goto drop_unlock;
  2108. }
  2109. if (!priv->vif) {
  2110. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  2111. goto drop_unlock;
  2112. }
  2113. if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
  2114. IWL_ERROR("ERROR: No TX rate available.\n");
  2115. goto drop_unlock;
  2116. }
  2117. unicast = !is_multicast_ether_addr(hdr->addr1);
  2118. id = 0;
  2119. fc = le16_to_cpu(hdr->frame_control);
  2120. #ifdef CONFIG_IWLWIFI_DEBUG
  2121. if (ieee80211_is_auth(fc))
  2122. IWL_DEBUG_TX("Sending AUTH frame\n");
  2123. else if (ieee80211_is_assoc_request(fc))
  2124. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2125. else if (ieee80211_is_reassoc_request(fc))
  2126. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2127. #endif
  2128. /* drop all data frame if we are not associated */
  2129. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  2130. (!iwl4965_is_associated(priv) ||
  2131. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  2132. !priv->assoc_station_added)) {
  2133. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  2134. goto drop_unlock;
  2135. }
  2136. spin_unlock_irqrestore(&priv->lock, flags);
  2137. hdr_len = ieee80211_get_hdrlen(fc);
  2138. /* Find (or create) index into station table for destination station */
  2139. sta_id = iwl4965_get_sta_id(priv, hdr);
  2140. if (sta_id == IWL_INVALID_STATION) {
  2141. DECLARE_MAC_BUF(mac);
  2142. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2143. print_mac(mac, hdr->addr1));
  2144. goto drop;
  2145. }
  2146. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2147. qc = ieee80211_get_qos_ctrl(hdr);
  2148. if (qc) {
  2149. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2150. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2151. IEEE80211_SCTL_SEQ;
  2152. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2153. (hdr->seq_ctrl &
  2154. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2155. seq_number += 0x10;
  2156. #ifdef CONFIG_IWL4965_HT
  2157. /* aggregation is on for this <sta,tid> */
  2158. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  2159. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2160. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  2161. #endif /* CONFIG_IWL4965_HT */
  2162. }
  2163. /* Descriptor for chosen Tx queue */
  2164. txq = &priv->txq[txq_id];
  2165. q = &txq->q;
  2166. spin_lock_irqsave(&priv->lock, flags);
  2167. /* Set up first empty TFD within this queue's circular TFD buffer */
  2168. tfd = &txq->bd[q->write_ptr];
  2169. memset(tfd, 0, sizeof(*tfd));
  2170. control_flags = (u32 *) tfd;
  2171. idx = get_cmd_index(q, q->write_ptr, 0);
  2172. /* Set up driver data for this TFD */
  2173. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2174. txq->txb[q->write_ptr].skb[0] = skb;
  2175. memcpy(&(txq->txb[q->write_ptr].status.control),
  2176. ctl, sizeof(struct ieee80211_tx_control));
  2177. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2178. out_cmd = &txq->cmd[idx];
  2179. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2180. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2181. /*
  2182. * Set up the Tx-command (not MAC!) header.
  2183. * Store the chosen Tx queue and TFD index within the sequence field;
  2184. * after Tx, uCode's Tx response will return this value so driver can
  2185. * locate the frame within the tx queue and do post-tx processing.
  2186. */
  2187. out_cmd->hdr.cmd = REPLY_TX;
  2188. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2189. INDEX_TO_SEQ(q->write_ptr)));
  2190. /* Copy MAC header from skb into command buffer */
  2191. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2192. /*
  2193. * Use the first empty entry in this queue's command buffer array
  2194. * to contain the Tx command and MAC header concatenated together
  2195. * (payload data will be in another buffer).
  2196. * Size of this varies, due to varying MAC header length.
  2197. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2198. * of the MAC header (device reads on dword boundaries).
  2199. * We'll tell device about this padding later.
  2200. */
  2201. len = priv->hw_setting.tx_cmd_len +
  2202. sizeof(struct iwl4965_cmd_header) + hdr_len;
  2203. len_org = len;
  2204. len = (len + 3) & ~3;
  2205. if (len_org != len)
  2206. len_org = 1;
  2207. else
  2208. len_org = 0;
  2209. /* Physical address of this Tx command's header (not MAC header!),
  2210. * within command buffer array. */
  2211. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
  2212. offsetof(struct iwl4965_cmd, hdr);
  2213. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2214. * first entry */
  2215. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2216. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2217. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id);
  2218. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2219. * if any (802.11 null frames have no payload). */
  2220. len = skb->len - hdr_len;
  2221. if (len) {
  2222. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2223. len, PCI_DMA_TODEVICE);
  2224. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2225. }
  2226. /* Tell 4965 about any 2-byte padding after MAC header */
  2227. if (len_org)
  2228. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2229. /* Total # bytes to be transmitted */
  2230. len = (u16)skb->len;
  2231. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2232. /* TODO need this for burst mode later on */
  2233. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2234. /* set is_hcca to 0; it probably will never be implemented */
  2235. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2236. iwl_update_tx_stats(priv, fc, len);
  2237. scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
  2238. offsetof(struct iwl4965_tx_cmd, scratch);
  2239. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2240. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2241. if (!ieee80211_get_morefrag(hdr)) {
  2242. txq->need_update = 1;
  2243. if (qc) {
  2244. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2245. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2246. }
  2247. } else {
  2248. wait_write_ptr = 1;
  2249. txq->need_update = 0;
  2250. }
  2251. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2252. sizeof(out_cmd->cmd.tx));
  2253. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2254. ieee80211_get_hdrlen(fc));
  2255. /* Set up entry for this TFD in Tx byte-count array */
  2256. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2257. /* Tell device the write index *just past* this latest filled TFD */
  2258. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  2259. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2260. spin_unlock_irqrestore(&priv->lock, flags);
  2261. if (rc)
  2262. return rc;
  2263. if ((iwl4965_queue_space(q) < q->high_mark)
  2264. && priv->mac80211_registered) {
  2265. if (wait_write_ptr) {
  2266. spin_lock_irqsave(&priv->lock, flags);
  2267. txq->need_update = 1;
  2268. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2269. spin_unlock_irqrestore(&priv->lock, flags);
  2270. }
  2271. ieee80211_stop_queue(priv->hw, ctl->queue);
  2272. }
  2273. return 0;
  2274. drop_unlock:
  2275. spin_unlock_irqrestore(&priv->lock, flags);
  2276. drop:
  2277. return -1;
  2278. }
  2279. static void iwl4965_set_rate(struct iwl_priv *priv)
  2280. {
  2281. const struct ieee80211_supported_band *hw = NULL;
  2282. struct ieee80211_rate *rate;
  2283. int i;
  2284. hw = iwl4965_get_hw_mode(priv, priv->band);
  2285. if (!hw) {
  2286. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2287. return;
  2288. }
  2289. priv->active_rate = 0;
  2290. priv->active_rate_basic = 0;
  2291. for (i = 0; i < hw->n_bitrates; i++) {
  2292. rate = &(hw->bitrates[i]);
  2293. if (rate->hw_value < IWL_RATE_COUNT)
  2294. priv->active_rate |= (1 << rate->hw_value);
  2295. }
  2296. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2297. priv->active_rate, priv->active_rate_basic);
  2298. /*
  2299. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2300. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2301. * OFDM
  2302. */
  2303. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2304. priv->staging_rxon.cck_basic_rates =
  2305. ((priv->active_rate_basic &
  2306. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2307. else
  2308. priv->staging_rxon.cck_basic_rates =
  2309. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2310. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2311. priv->staging_rxon.ofdm_basic_rates =
  2312. ((priv->active_rate_basic &
  2313. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2314. IWL_FIRST_OFDM_RATE) & 0xFF;
  2315. else
  2316. priv->staging_rxon.ofdm_basic_rates =
  2317. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2318. }
  2319. static void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2320. {
  2321. unsigned long flags;
  2322. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2323. return;
  2324. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2325. disable_radio ? "OFF" : "ON");
  2326. if (disable_radio) {
  2327. iwl4965_scan_cancel(priv);
  2328. /* FIXME: This is a workaround for AP */
  2329. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2330. spin_lock_irqsave(&priv->lock, flags);
  2331. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2332. CSR_UCODE_SW_BIT_RFKILL);
  2333. spin_unlock_irqrestore(&priv->lock, flags);
  2334. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2335. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2336. }
  2337. return;
  2338. }
  2339. spin_lock_irqsave(&priv->lock, flags);
  2340. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2341. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2342. spin_unlock_irqrestore(&priv->lock, flags);
  2343. /* wake up ucode */
  2344. msleep(10);
  2345. spin_lock_irqsave(&priv->lock, flags);
  2346. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2347. if (!iwl4965_grab_nic_access(priv))
  2348. iwl4965_release_nic_access(priv);
  2349. spin_unlock_irqrestore(&priv->lock, flags);
  2350. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2351. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2352. "disabled by HW switch\n");
  2353. return;
  2354. }
  2355. queue_work(priv->workqueue, &priv->restart);
  2356. return;
  2357. }
  2358. void iwl4965_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2359. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2360. {
  2361. u16 fc =
  2362. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2363. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2364. return;
  2365. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2366. return;
  2367. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2368. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2369. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2370. /* The uCode has got a bad phase 1 Key, pushes the packet.
  2371. * Decryption will be done in SW. */
  2372. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2373. RX_RES_STATUS_BAD_KEY_TTAK)
  2374. break;
  2375. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2376. RX_RES_STATUS_BAD_ICV_MIC)
  2377. stats->flag |= RX_FLAG_MMIC_ERROR;
  2378. case RX_RES_STATUS_SEC_TYPE_WEP:
  2379. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2380. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2381. RX_RES_STATUS_DECRYPT_OK) {
  2382. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2383. stats->flag |= RX_FLAG_DECRYPTED;
  2384. }
  2385. break;
  2386. default:
  2387. break;
  2388. }
  2389. }
  2390. #define IWL_PACKET_RETRY_TIME HZ
  2391. int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2392. {
  2393. u16 sc = le16_to_cpu(header->seq_ctrl);
  2394. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2395. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2396. u16 *last_seq, *last_frag;
  2397. unsigned long *last_time;
  2398. switch (priv->iw_mode) {
  2399. case IEEE80211_IF_TYPE_IBSS:{
  2400. struct list_head *p;
  2401. struct iwl4965_ibss_seq *entry = NULL;
  2402. u8 *mac = header->addr2;
  2403. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2404. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2405. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2406. if (!compare_ether_addr(entry->mac, mac))
  2407. break;
  2408. }
  2409. if (p == &priv->ibss_mac_hash[index]) {
  2410. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2411. if (!entry) {
  2412. IWL_ERROR("Cannot malloc new mac entry\n");
  2413. return 0;
  2414. }
  2415. memcpy(entry->mac, mac, ETH_ALEN);
  2416. entry->seq_num = seq;
  2417. entry->frag_num = frag;
  2418. entry->packet_time = jiffies;
  2419. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2420. return 0;
  2421. }
  2422. last_seq = &entry->seq_num;
  2423. last_frag = &entry->frag_num;
  2424. last_time = &entry->packet_time;
  2425. break;
  2426. }
  2427. case IEEE80211_IF_TYPE_STA:
  2428. last_seq = &priv->last_seq_num;
  2429. last_frag = &priv->last_frag_num;
  2430. last_time = &priv->last_packet_time;
  2431. break;
  2432. default:
  2433. return 0;
  2434. }
  2435. if ((*last_seq == seq) &&
  2436. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2437. if (*last_frag == frag)
  2438. goto drop;
  2439. if (*last_frag + 1 != frag)
  2440. /* out-of-order fragment */
  2441. goto drop;
  2442. } else
  2443. *last_seq = seq;
  2444. *last_frag = frag;
  2445. *last_time = jiffies;
  2446. return 0;
  2447. drop:
  2448. return 1;
  2449. }
  2450. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2451. #include "iwl-spectrum.h"
  2452. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2453. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2454. #define TIME_UNIT 1024
  2455. /*
  2456. * extended beacon time format
  2457. * time in usec will be changed into a 32-bit value in 8:24 format
  2458. * the high 1 byte is the beacon counts
  2459. * the lower 3 bytes is the time in usec within one beacon interval
  2460. */
  2461. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2462. {
  2463. u32 quot;
  2464. u32 rem;
  2465. u32 interval = beacon_interval * 1024;
  2466. if (!interval || !usec)
  2467. return 0;
  2468. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2469. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2470. return (quot << 24) + rem;
  2471. }
  2472. /* base is usually what we get from ucode with each received frame,
  2473. * the same as HW timer counter counting down
  2474. */
  2475. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2476. {
  2477. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2478. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2479. u32 interval = beacon_interval * TIME_UNIT;
  2480. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2481. (addon & BEACON_TIME_MASK_HIGH);
  2482. if (base_low > addon_low)
  2483. res += base_low - addon_low;
  2484. else if (base_low < addon_low) {
  2485. res += interval + base_low - addon_low;
  2486. res += (1 << 24);
  2487. } else
  2488. res += (1 << 24);
  2489. return cpu_to_le32(res);
  2490. }
  2491. static int iwl4965_get_measurement(struct iwl_priv *priv,
  2492. struct ieee80211_measurement_params *params,
  2493. u8 type)
  2494. {
  2495. struct iwl4965_spectrum_cmd spectrum;
  2496. struct iwl4965_rx_packet *res;
  2497. struct iwl4965_host_cmd cmd = {
  2498. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2499. .data = (void *)&spectrum,
  2500. .meta.flags = CMD_WANT_SKB,
  2501. };
  2502. u32 add_time = le64_to_cpu(params->start_time);
  2503. int rc;
  2504. int spectrum_resp_status;
  2505. int duration = le16_to_cpu(params->duration);
  2506. if (iwl4965_is_associated(priv))
  2507. add_time =
  2508. iwl4965_usecs_to_beacons(
  2509. le64_to_cpu(params->start_time) - priv->last_tsf,
  2510. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2511. memset(&spectrum, 0, sizeof(spectrum));
  2512. spectrum.channel_count = cpu_to_le16(1);
  2513. spectrum.flags =
  2514. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2515. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2516. cmd.len = sizeof(spectrum);
  2517. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2518. if (iwl4965_is_associated(priv))
  2519. spectrum.start_time =
  2520. iwl4965_add_beacon_time(priv->last_beacon_time,
  2521. add_time,
  2522. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2523. else
  2524. spectrum.start_time = 0;
  2525. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2526. spectrum.channels[0].channel = params->channel;
  2527. spectrum.channels[0].type = type;
  2528. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2529. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2530. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2531. rc = iwl4965_send_cmd_sync(priv, &cmd);
  2532. if (rc)
  2533. return rc;
  2534. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2535. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2536. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2537. rc = -EIO;
  2538. }
  2539. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2540. switch (spectrum_resp_status) {
  2541. case 0: /* Command will be handled */
  2542. if (res->u.spectrum.id != 0xff) {
  2543. IWL_DEBUG_INFO
  2544. ("Replaced existing measurement: %d\n",
  2545. res->u.spectrum.id);
  2546. priv->measurement_status &= ~MEASUREMENT_READY;
  2547. }
  2548. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2549. rc = 0;
  2550. break;
  2551. case 1: /* Command will not be handled */
  2552. rc = -EAGAIN;
  2553. break;
  2554. }
  2555. dev_kfree_skb_any(cmd.meta.u.skb);
  2556. return rc;
  2557. }
  2558. #endif
  2559. static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
  2560. struct iwl4965_tx_info *tx_sta)
  2561. {
  2562. tx_sta->status.ack_signal = 0;
  2563. tx_sta->status.excessive_retries = 0;
  2564. tx_sta->status.queue_length = 0;
  2565. tx_sta->status.queue_number = 0;
  2566. if (in_interrupt())
  2567. ieee80211_tx_status_irqsafe(priv->hw,
  2568. tx_sta->skb[0], &(tx_sta->status));
  2569. else
  2570. ieee80211_tx_status(priv->hw,
  2571. tx_sta->skb[0], &(tx_sta->status));
  2572. tx_sta->skb[0] = NULL;
  2573. }
  2574. /**
  2575. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2576. *
  2577. * When FW advances 'R' index, all entries between old and new 'R' index
  2578. * need to be reclaimed. As result, some free space forms. If there is
  2579. * enough free space (> low mark), wake the stack that feeds us.
  2580. */
  2581. int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2582. {
  2583. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2584. struct iwl4965_queue *q = &txq->q;
  2585. int nfreed = 0;
  2586. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2587. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2588. "is out of range [0-%d] %d %d.\n", txq_id,
  2589. index, q->n_bd, q->write_ptr, q->read_ptr);
  2590. return 0;
  2591. }
  2592. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2593. q->read_ptr != index;
  2594. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2595. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2596. iwl4965_txstatus_to_ieee(priv,
  2597. &(txq->txb[txq->q.read_ptr]));
  2598. iwl4965_hw_txq_free_tfd(priv, txq);
  2599. } else if (nfreed > 1) {
  2600. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2601. q->write_ptr, q->read_ptr);
  2602. queue_work(priv->workqueue, &priv->restart);
  2603. }
  2604. nfreed++;
  2605. }
  2606. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2607. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2608. priv->mac80211_registered)
  2609. ieee80211_wake_queue(priv->hw, txq_id); */
  2610. return nfreed;
  2611. }
  2612. static int iwl4965_is_tx_success(u32 status)
  2613. {
  2614. status &= TX_STATUS_MSK;
  2615. return (status == TX_STATUS_SUCCESS)
  2616. || (status == TX_STATUS_DIRECT_DONE);
  2617. }
  2618. /******************************************************************************
  2619. *
  2620. * Generic RX handler implementations
  2621. *
  2622. ******************************************************************************/
  2623. #ifdef CONFIG_IWL4965_HT
  2624. static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
  2625. struct ieee80211_hdr *hdr)
  2626. {
  2627. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2628. return IWL_AP_ID;
  2629. else {
  2630. u8 *da = ieee80211_get_DA(hdr);
  2631. return iwl4965_hw_find_station(priv, da);
  2632. }
  2633. }
  2634. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2635. struct iwl_priv *priv, int txq_id, int idx)
  2636. {
  2637. if (priv->txq[txq_id].txb[idx].skb[0])
  2638. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2639. txb[idx].skb[0]->data;
  2640. return NULL;
  2641. }
  2642. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2643. {
  2644. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2645. tx_resp->frame_count);
  2646. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2647. }
  2648. /**
  2649. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2650. */
  2651. static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
  2652. struct iwl4965_ht_agg *agg,
  2653. struct iwl4965_tx_resp_agg *tx_resp,
  2654. u16 start_idx)
  2655. {
  2656. u16 status;
  2657. struct agg_tx_status *frame_status = &tx_resp->status;
  2658. struct ieee80211_tx_status *tx_status = NULL;
  2659. struct ieee80211_hdr *hdr = NULL;
  2660. int i, sh;
  2661. int txq_id, idx;
  2662. u16 seq;
  2663. if (agg->wait_for_ba)
  2664. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2665. agg->frame_count = tx_resp->frame_count;
  2666. agg->start_idx = start_idx;
  2667. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2668. agg->bitmap = 0;
  2669. /* # frames attempted by Tx command */
  2670. if (agg->frame_count == 1) {
  2671. /* Only one frame was attempted; no block-ack will arrive */
  2672. status = le16_to_cpu(frame_status[0].status);
  2673. seq = le16_to_cpu(frame_status[0].sequence);
  2674. idx = SEQ_TO_INDEX(seq);
  2675. txq_id = SEQ_TO_QUEUE(seq);
  2676. /* FIXME: code repetition */
  2677. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  2678. agg->frame_count, agg->start_idx, idx);
  2679. tx_status = &(priv->txq[txq_id].txb[idx].status);
  2680. tx_status->retry_count = tx_resp->failure_frame;
  2681. tx_status->queue_number = status & 0xff;
  2682. tx_status->queue_length = tx_resp->failure_rts;
  2683. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  2684. tx_status->flags = iwl4965_is_tx_success(status)?
  2685. IEEE80211_TX_STATUS_ACK : 0;
  2686. iwl4965_hwrate_to_tx_control(priv,
  2687. le32_to_cpu(tx_resp->rate_n_flags),
  2688. &tx_status->control);
  2689. /* FIXME: code repetition end */
  2690. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2691. status & 0xff, tx_resp->failure_frame);
  2692. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2693. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2694. agg->wait_for_ba = 0;
  2695. } else {
  2696. /* Two or more frames were attempted; expect block-ack */
  2697. u64 bitmap = 0;
  2698. int start = agg->start_idx;
  2699. /* Construct bit-map of pending frames within Tx window */
  2700. for (i = 0; i < agg->frame_count; i++) {
  2701. u16 sc;
  2702. status = le16_to_cpu(frame_status[i].status);
  2703. seq = le16_to_cpu(frame_status[i].sequence);
  2704. idx = SEQ_TO_INDEX(seq);
  2705. txq_id = SEQ_TO_QUEUE(seq);
  2706. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2707. AGG_TX_STATE_ABORT_MSK))
  2708. continue;
  2709. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2710. agg->frame_count, txq_id, idx);
  2711. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  2712. sc = le16_to_cpu(hdr->seq_ctrl);
  2713. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  2714. IWL_ERROR("BUG_ON idx doesn't match seq control"
  2715. " idx=%d, seq_idx=%d, seq=%d\n",
  2716. idx, SEQ_TO_SN(sc),
  2717. hdr->seq_ctrl);
  2718. return -1;
  2719. }
  2720. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  2721. i, idx, SEQ_TO_SN(sc));
  2722. sh = idx - start;
  2723. if (sh > 64) {
  2724. sh = (start - idx) + 0xff;
  2725. bitmap = bitmap << sh;
  2726. sh = 0;
  2727. start = idx;
  2728. } else if (sh < -64)
  2729. sh = 0xff - (start - idx);
  2730. else if (sh < 0) {
  2731. sh = start - idx;
  2732. start = idx;
  2733. bitmap = bitmap << sh;
  2734. sh = 0;
  2735. }
  2736. bitmap |= (1 << sh);
  2737. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  2738. start, (u32)(bitmap & 0xFFFFFFFF));
  2739. }
  2740. agg->bitmap = bitmap;
  2741. agg->start_idx = start;
  2742. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2743. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  2744. agg->frame_count, agg->start_idx,
  2745. agg->bitmap);
  2746. if (bitmap)
  2747. agg->wait_for_ba = 1;
  2748. }
  2749. return 0;
  2750. }
  2751. #endif
  2752. /**
  2753. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  2754. */
  2755. static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
  2756. struct iwl4965_rx_mem_buffer *rxb)
  2757. {
  2758. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2759. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2760. int txq_id = SEQ_TO_QUEUE(sequence);
  2761. int index = SEQ_TO_INDEX(sequence);
  2762. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2763. struct ieee80211_tx_status *tx_status;
  2764. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2765. u32 status = le32_to_cpu(tx_resp->status);
  2766. #ifdef CONFIG_IWL4965_HT
  2767. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  2768. struct ieee80211_hdr *hdr;
  2769. __le16 *qc;
  2770. #endif
  2771. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2772. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2773. "is out of range [0-%d] %d %d\n", txq_id,
  2774. index, txq->q.n_bd, txq->q.write_ptr,
  2775. txq->q.read_ptr);
  2776. return;
  2777. }
  2778. #ifdef CONFIG_IWL4965_HT
  2779. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  2780. qc = ieee80211_get_qos_ctrl(hdr);
  2781. if (qc)
  2782. tid = le16_to_cpu(*qc) & 0xf;
  2783. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  2784. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  2785. IWL_ERROR("Station not known\n");
  2786. return;
  2787. }
  2788. if (txq->sched_retry) {
  2789. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  2790. struct iwl4965_ht_agg *agg = NULL;
  2791. if (!qc)
  2792. return;
  2793. agg = &priv->stations[sta_id].tid[tid].agg;
  2794. iwl4965_tx_status_reply_tx(priv, agg,
  2795. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  2796. if ((tx_resp->frame_count == 1) &&
  2797. !iwl4965_is_tx_success(status)) {
  2798. /* TODO: send BAR */
  2799. }
  2800. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  2801. int freed;
  2802. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  2803. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  2804. "%d index %d\n", scd_ssn , index);
  2805. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2806. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2807. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2808. txq_id >= 0 && priv->mac80211_registered &&
  2809. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2810. ieee80211_wake_queue(priv->hw, txq_id);
  2811. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2812. }
  2813. } else {
  2814. #endif /* CONFIG_IWL4965_HT */
  2815. tx_status = &(txq->txb[txq->q.read_ptr].status);
  2816. tx_status->retry_count = tx_resp->failure_frame;
  2817. tx_status->queue_number = status;
  2818. tx_status->queue_length = tx_resp->bt_kill_count;
  2819. tx_status->queue_length |= tx_resp->failure_rts;
  2820. tx_status->flags =
  2821. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2822. iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
  2823. &tx_status->control);
  2824. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  2825. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  2826. status, le32_to_cpu(tx_resp->rate_n_flags),
  2827. tx_resp->failure_frame);
  2828. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2829. if (index != -1) {
  2830. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2831. #ifdef CONFIG_IWL4965_HT
  2832. if (tid != MAX_TID_COUNT)
  2833. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2834. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2835. (txq_id >= 0) &&
  2836. priv->mac80211_registered)
  2837. ieee80211_wake_queue(priv->hw, txq_id);
  2838. if (tid != MAX_TID_COUNT)
  2839. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2840. #endif
  2841. }
  2842. #ifdef CONFIG_IWL4965_HT
  2843. }
  2844. #endif /* CONFIG_IWL4965_HT */
  2845. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2846. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2847. }
  2848. static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
  2849. struct iwl4965_rx_mem_buffer *rxb)
  2850. {
  2851. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2852. struct iwl4965_alive_resp *palive;
  2853. struct delayed_work *pwork;
  2854. palive = &pkt->u.alive_frame;
  2855. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2856. "0x%01X 0x%01X\n",
  2857. palive->is_valid, palive->ver_type,
  2858. palive->ver_subtype);
  2859. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2860. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2861. memcpy(&priv->card_alive_init,
  2862. &pkt->u.alive_frame,
  2863. sizeof(struct iwl4965_init_alive_resp));
  2864. pwork = &priv->init_alive_start;
  2865. } else {
  2866. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2867. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2868. sizeof(struct iwl4965_alive_resp));
  2869. pwork = &priv->alive_start;
  2870. }
  2871. /* We delay the ALIVE response by 5ms to
  2872. * give the HW RF Kill time to activate... */
  2873. if (palive->is_valid == UCODE_VALID_OK)
  2874. queue_delayed_work(priv->workqueue, pwork,
  2875. msecs_to_jiffies(5));
  2876. else
  2877. IWL_WARNING("uCode did not respond OK.\n");
  2878. }
  2879. static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
  2880. struct iwl4965_rx_mem_buffer *rxb)
  2881. {
  2882. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2883. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2884. return;
  2885. }
  2886. static void iwl4965_rx_reply_error(struct iwl_priv *priv,
  2887. struct iwl4965_rx_mem_buffer *rxb)
  2888. {
  2889. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2890. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  2891. "seq 0x%04X ser 0x%08X\n",
  2892. le32_to_cpu(pkt->u.err_resp.error_type),
  2893. get_cmd_string(pkt->u.err_resp.cmd_id),
  2894. pkt->u.err_resp.cmd_id,
  2895. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2896. le32_to_cpu(pkt->u.err_resp.error_info));
  2897. }
  2898. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2899. static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  2900. {
  2901. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2902. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  2903. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  2904. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2905. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2906. rxon->channel = csa->channel;
  2907. priv->staging_rxon.channel = csa->channel;
  2908. }
  2909. static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2910. struct iwl4965_rx_mem_buffer *rxb)
  2911. {
  2912. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2913. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2914. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2915. if (!report->state) {
  2916. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2917. "Spectrum Measure Notification: Start\n");
  2918. return;
  2919. }
  2920. memcpy(&priv->measure_report, report, sizeof(*report));
  2921. priv->measurement_status |= MEASUREMENT_READY;
  2922. #endif
  2923. }
  2924. static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
  2925. struct iwl4965_rx_mem_buffer *rxb)
  2926. {
  2927. #ifdef CONFIG_IWLWIFI_DEBUG
  2928. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2929. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  2930. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  2931. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  2932. #endif
  2933. }
  2934. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  2935. struct iwl4965_rx_mem_buffer *rxb)
  2936. {
  2937. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2938. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  2939. "notification for %s:\n",
  2940. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  2941. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  2942. }
  2943. static void iwl4965_bg_beacon_update(struct work_struct *work)
  2944. {
  2945. struct iwl_priv *priv =
  2946. container_of(work, struct iwl_priv, beacon_update);
  2947. struct sk_buff *beacon;
  2948. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  2949. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  2950. if (!beacon) {
  2951. IWL_ERROR("update beacon failed\n");
  2952. return;
  2953. }
  2954. mutex_lock(&priv->mutex);
  2955. /* new beacon skb is allocated every time; dispose previous.*/
  2956. if (priv->ibss_beacon)
  2957. dev_kfree_skb(priv->ibss_beacon);
  2958. priv->ibss_beacon = beacon;
  2959. mutex_unlock(&priv->mutex);
  2960. iwl4965_send_beacon_cmd(priv);
  2961. }
  2962. static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
  2963. struct iwl4965_rx_mem_buffer *rxb)
  2964. {
  2965. #ifdef CONFIG_IWLWIFI_DEBUG
  2966. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2967. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  2968. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  2969. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  2970. "tsf %d %d rate %d\n",
  2971. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  2972. beacon->beacon_notify_hdr.failure_frame,
  2973. le32_to_cpu(beacon->ibss_mgr_status),
  2974. le32_to_cpu(beacon->high_tsf),
  2975. le32_to_cpu(beacon->low_tsf), rate);
  2976. #endif
  2977. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  2978. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  2979. queue_work(priv->workqueue, &priv->beacon_update);
  2980. }
  2981. /* Service response to REPLY_SCAN_CMD (0x80) */
  2982. static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
  2983. struct iwl4965_rx_mem_buffer *rxb)
  2984. {
  2985. #ifdef CONFIG_IWLWIFI_DEBUG
  2986. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2987. struct iwl4965_scanreq_notification *notif =
  2988. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  2989. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  2990. #endif
  2991. }
  2992. /* Service SCAN_START_NOTIFICATION (0x82) */
  2993. static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
  2994. struct iwl4965_rx_mem_buffer *rxb)
  2995. {
  2996. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2997. struct iwl4965_scanstart_notification *notif =
  2998. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  2999. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3000. IWL_DEBUG_SCAN("Scan start: "
  3001. "%d [802.11%s] "
  3002. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3003. notif->channel,
  3004. notif->band ? "bg" : "a",
  3005. notif->tsf_high,
  3006. notif->tsf_low, notif->status, notif->beacon_timer);
  3007. }
  3008. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3009. static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
  3010. struct iwl4965_rx_mem_buffer *rxb)
  3011. {
  3012. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3013. struct iwl4965_scanresults_notification *notif =
  3014. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  3015. IWL_DEBUG_SCAN("Scan ch.res: "
  3016. "%d [802.11%s] "
  3017. "(TSF: 0x%08X:%08X) - %d "
  3018. "elapsed=%lu usec (%dms since last)\n",
  3019. notif->channel,
  3020. notif->band ? "bg" : "a",
  3021. le32_to_cpu(notif->tsf_high),
  3022. le32_to_cpu(notif->tsf_low),
  3023. le32_to_cpu(notif->statistics[0]),
  3024. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3025. jiffies_to_msecs(elapsed_jiffies
  3026. (priv->last_scan_jiffies, jiffies)));
  3027. priv->last_scan_jiffies = jiffies;
  3028. priv->next_scan_jiffies = 0;
  3029. }
  3030. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3031. static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
  3032. struct iwl4965_rx_mem_buffer *rxb)
  3033. {
  3034. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3035. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3036. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3037. scan_notif->scanned_channels,
  3038. scan_notif->tsf_low,
  3039. scan_notif->tsf_high, scan_notif->status);
  3040. /* The HW is no longer scanning */
  3041. clear_bit(STATUS_SCAN_HW, &priv->status);
  3042. /* The scan completion notification came in, so kill that timer... */
  3043. cancel_delayed_work(&priv->scan_check);
  3044. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3045. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3046. jiffies_to_msecs(elapsed_jiffies
  3047. (priv->scan_pass_start, jiffies)));
  3048. /* Remove this scanned band from the list
  3049. * of pending bands to scan */
  3050. priv->scan_bands--;
  3051. /* If a request to abort was given, or the scan did not succeed
  3052. * then we reset the scan state machine and terminate,
  3053. * re-queuing another scan if one has been requested */
  3054. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3055. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3056. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3057. } else {
  3058. /* If there are more bands on this scan pass reschedule */
  3059. if (priv->scan_bands > 0)
  3060. goto reschedule;
  3061. }
  3062. priv->last_scan_jiffies = jiffies;
  3063. priv->next_scan_jiffies = 0;
  3064. IWL_DEBUG_INFO("Setting scan to off\n");
  3065. clear_bit(STATUS_SCANNING, &priv->status);
  3066. IWL_DEBUG_INFO("Scan took %dms\n",
  3067. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3068. queue_work(priv->workqueue, &priv->scan_completed);
  3069. return;
  3070. reschedule:
  3071. priv->scan_pass_start = jiffies;
  3072. queue_work(priv->workqueue, &priv->request_scan);
  3073. }
  3074. /* Handle notification from uCode that card's power state is changing
  3075. * due to software, hardware, or critical temperature RFKILL */
  3076. static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
  3077. struct iwl4965_rx_mem_buffer *rxb)
  3078. {
  3079. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3080. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3081. unsigned long status = priv->status;
  3082. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3083. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3084. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3085. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3086. RF_CARD_DISABLED)) {
  3087. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3088. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3089. if (!iwl4965_grab_nic_access(priv)) {
  3090. iwl4965_write_direct32(
  3091. priv, HBUS_TARG_MBX_C,
  3092. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3093. iwl4965_release_nic_access(priv);
  3094. }
  3095. if (!(flags & RXON_CARD_DISABLED)) {
  3096. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3097. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3098. if (!iwl4965_grab_nic_access(priv)) {
  3099. iwl4965_write_direct32(
  3100. priv, HBUS_TARG_MBX_C,
  3101. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3102. iwl4965_release_nic_access(priv);
  3103. }
  3104. }
  3105. if (flags & RF_CARD_DISABLED) {
  3106. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3107. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3108. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3109. if (!iwl4965_grab_nic_access(priv))
  3110. iwl4965_release_nic_access(priv);
  3111. }
  3112. }
  3113. if (flags & HW_CARD_DISABLED)
  3114. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3115. else
  3116. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3117. if (flags & SW_CARD_DISABLED)
  3118. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3119. else
  3120. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3121. if (!(flags & RXON_CARD_DISABLED))
  3122. iwl4965_scan_cancel(priv);
  3123. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3124. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3125. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3126. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3127. queue_work(priv->workqueue, &priv->rf_kill);
  3128. else
  3129. wake_up_interruptible(&priv->wait_command_queue);
  3130. }
  3131. /**
  3132. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  3133. *
  3134. * Setup the RX handlers for each of the reply types sent from the uCode
  3135. * to the host.
  3136. *
  3137. * This function chains into the hardware specific files for them to setup
  3138. * any hardware specific handlers as well.
  3139. */
  3140. static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
  3141. {
  3142. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  3143. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  3144. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  3145. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  3146. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3147. iwl4965_rx_spectrum_measure_notif;
  3148. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  3149. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3150. iwl4965_rx_pm_debug_statistics_notif;
  3151. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  3152. /*
  3153. * The same handler is used for both the REPLY to a discrete
  3154. * statistics request from the host as well as for the periodic
  3155. * statistics notifications (after received beacons) from the uCode.
  3156. */
  3157. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3158. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3159. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3160. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3161. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3162. iwl4965_rx_scan_results_notif;
  3163. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3164. iwl4965_rx_scan_complete_notif;
  3165. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3166. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3167. /* Set up hardware specific Rx handlers */
  3168. iwl4965_hw_rx_handler_setup(priv);
  3169. }
  3170. /**
  3171. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3172. * @rxb: Rx buffer to reclaim
  3173. *
  3174. * If an Rx buffer has an async callback associated with it the callback
  3175. * will be executed. The attached skb (if present) will only be freed
  3176. * if the callback returns 1
  3177. */
  3178. static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
  3179. struct iwl4965_rx_mem_buffer *rxb)
  3180. {
  3181. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3182. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3183. int txq_id = SEQ_TO_QUEUE(sequence);
  3184. int index = SEQ_TO_INDEX(sequence);
  3185. int huge = sequence & SEQ_HUGE_FRAME;
  3186. int cmd_index;
  3187. struct iwl4965_cmd *cmd;
  3188. /* If a Tx command is being handled and it isn't in the actual
  3189. * command queue then there a command routing bug has been introduced
  3190. * in the queue management code. */
  3191. if (txq_id != IWL_CMD_QUEUE_NUM)
  3192. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3193. txq_id, pkt->hdr.cmd);
  3194. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3195. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3196. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3197. /* Input error checking is done when commands are added to queue. */
  3198. if (cmd->meta.flags & CMD_WANT_SKB) {
  3199. cmd->meta.source->u.skb = rxb->skb;
  3200. rxb->skb = NULL;
  3201. } else if (cmd->meta.u.callback &&
  3202. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3203. rxb->skb = NULL;
  3204. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3205. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3206. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3207. wake_up_interruptible(&priv->wait_command_queue);
  3208. }
  3209. }
  3210. /************************** RX-FUNCTIONS ****************************/
  3211. /*
  3212. * Rx theory of operation
  3213. *
  3214. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3215. * each of which point to Receive Buffers to be filled by 4965. These get
  3216. * used not only for Rx frames, but for any command response or notification
  3217. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3218. * of indexes into the circular buffer.
  3219. *
  3220. * Rx Queue Indexes
  3221. * The host/firmware share two index registers for managing the Rx buffers.
  3222. *
  3223. * The READ index maps to the first position that the firmware may be writing
  3224. * to -- the driver can read up to (but not including) this position and get
  3225. * good data.
  3226. * The READ index is managed by the firmware once the card is enabled.
  3227. *
  3228. * The WRITE index maps to the last position the driver has read from -- the
  3229. * position preceding WRITE is the last slot the firmware can place a packet.
  3230. *
  3231. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3232. * WRITE = READ.
  3233. *
  3234. * During initialization, the host sets up the READ queue position to the first
  3235. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3236. *
  3237. * When the firmware places a packet in a buffer, it will advance the READ index
  3238. * and fire the RX interrupt. The driver can then query the READ index and
  3239. * process as many packets as possible, moving the WRITE index forward as it
  3240. * resets the Rx queue buffers with new memory.
  3241. *
  3242. * The management in the driver is as follows:
  3243. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3244. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3245. * to replenish the iwl->rxq->rx_free.
  3246. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3247. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3248. * 'processed' and 'read' driver indexes as well)
  3249. * + A received packet is processed and handed to the kernel network stack,
  3250. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3251. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3252. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3253. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3254. * were enough free buffers and RX_STALLED is set it is cleared.
  3255. *
  3256. *
  3257. * Driver sequence:
  3258. *
  3259. * iwl4965_rx_queue_alloc() Allocates rx_free
  3260. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3261. * iwl4965_rx_queue_restock
  3262. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3263. * queue, updates firmware pointers, and updates
  3264. * the WRITE index. If insufficient rx_free buffers
  3265. * are available, schedules iwl4965_rx_replenish
  3266. *
  3267. * -- enable interrupts --
  3268. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3269. * READ INDEX, detaching the SKB from the pool.
  3270. * Moves the packet buffer from queue to rx_used.
  3271. * Calls iwl4965_rx_queue_restock to refill any empty
  3272. * slots.
  3273. * ...
  3274. *
  3275. */
  3276. /**
  3277. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3278. */
  3279. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3280. {
  3281. int s = q->read - q->write;
  3282. if (s <= 0)
  3283. s += RX_QUEUE_SIZE;
  3284. /* keep some buffer to not confuse full and empty queue */
  3285. s -= 2;
  3286. if (s < 0)
  3287. s = 0;
  3288. return s;
  3289. }
  3290. /**
  3291. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3292. */
  3293. int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
  3294. {
  3295. u32 reg = 0;
  3296. int rc = 0;
  3297. unsigned long flags;
  3298. spin_lock_irqsave(&q->lock, flags);
  3299. if (q->need_update == 0)
  3300. goto exit_unlock;
  3301. /* If power-saving is in use, make sure device is awake */
  3302. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3303. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3304. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3305. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3306. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3307. goto exit_unlock;
  3308. }
  3309. rc = iwl4965_grab_nic_access(priv);
  3310. if (rc)
  3311. goto exit_unlock;
  3312. /* Device expects a multiple of 8 */
  3313. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3314. q->write & ~0x7);
  3315. iwl4965_release_nic_access(priv);
  3316. /* Else device is assumed to be awake */
  3317. } else
  3318. /* Device expects a multiple of 8 */
  3319. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3320. q->need_update = 0;
  3321. exit_unlock:
  3322. spin_unlock_irqrestore(&q->lock, flags);
  3323. return rc;
  3324. }
  3325. /**
  3326. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3327. */
  3328. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3329. dma_addr_t dma_addr)
  3330. {
  3331. return cpu_to_le32((u32)(dma_addr >> 8));
  3332. }
  3333. /**
  3334. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3335. *
  3336. * If there are slots in the RX queue that need to be restocked,
  3337. * and we have free pre-allocated buffers, fill the ranks as much
  3338. * as we can, pulling from rx_free.
  3339. *
  3340. * This moves the 'write' index forward to catch up with 'processed', and
  3341. * also updates the memory address in the firmware to reference the new
  3342. * target buffer.
  3343. */
  3344. static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
  3345. {
  3346. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3347. struct list_head *element;
  3348. struct iwl4965_rx_mem_buffer *rxb;
  3349. unsigned long flags;
  3350. int write, rc;
  3351. spin_lock_irqsave(&rxq->lock, flags);
  3352. write = rxq->write & ~0x7;
  3353. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3354. /* Get next free Rx buffer, remove from free list */
  3355. element = rxq->rx_free.next;
  3356. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3357. list_del(element);
  3358. /* Point to Rx buffer via next RBD in circular buffer */
  3359. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3360. rxq->queue[rxq->write] = rxb;
  3361. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3362. rxq->free_count--;
  3363. }
  3364. spin_unlock_irqrestore(&rxq->lock, flags);
  3365. /* If the pre-allocated buffer pool is dropping low, schedule to
  3366. * refill it */
  3367. if (rxq->free_count <= RX_LOW_WATERMARK)
  3368. queue_work(priv->workqueue, &priv->rx_replenish);
  3369. /* If we've added more space for the firmware to place data, tell it.
  3370. * Increment device's write pointer in multiples of 8. */
  3371. if ((write != (rxq->write & ~0x7))
  3372. || (abs(rxq->write - rxq->read) > 7)) {
  3373. spin_lock_irqsave(&rxq->lock, flags);
  3374. rxq->need_update = 1;
  3375. spin_unlock_irqrestore(&rxq->lock, flags);
  3376. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3377. if (rc)
  3378. return rc;
  3379. }
  3380. return 0;
  3381. }
  3382. /**
  3383. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3384. *
  3385. * When moving to rx_free an SKB is allocated for the slot.
  3386. *
  3387. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3388. * This is called as a scheduled work item (except for during initialization)
  3389. */
  3390. static void iwl4965_rx_allocate(struct iwl_priv *priv)
  3391. {
  3392. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3393. struct list_head *element;
  3394. struct iwl4965_rx_mem_buffer *rxb;
  3395. unsigned long flags;
  3396. spin_lock_irqsave(&rxq->lock, flags);
  3397. while (!list_empty(&rxq->rx_used)) {
  3398. element = rxq->rx_used.next;
  3399. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3400. /* Alloc a new receive buffer */
  3401. rxb->skb =
  3402. alloc_skb(priv->hw_setting.rx_buf_size,
  3403. __GFP_NOWARN | GFP_ATOMIC);
  3404. if (!rxb->skb) {
  3405. if (net_ratelimit())
  3406. printk(KERN_CRIT DRV_NAME
  3407. ": Can not allocate SKB buffers\n");
  3408. /* We don't reschedule replenish work here -- we will
  3409. * call the restock method and if it still needs
  3410. * more buffers it will schedule replenish */
  3411. break;
  3412. }
  3413. priv->alloc_rxb_skb++;
  3414. list_del(element);
  3415. /* Get physical address of RB/SKB */
  3416. rxb->dma_addr =
  3417. pci_map_single(priv->pci_dev, rxb->skb->data,
  3418. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3419. list_add_tail(&rxb->list, &rxq->rx_free);
  3420. rxq->free_count++;
  3421. }
  3422. spin_unlock_irqrestore(&rxq->lock, flags);
  3423. }
  3424. /*
  3425. * this should be called while priv->lock is locked
  3426. */
  3427. static void __iwl4965_rx_replenish(void *data)
  3428. {
  3429. struct iwl_priv *priv = data;
  3430. iwl4965_rx_allocate(priv);
  3431. iwl4965_rx_queue_restock(priv);
  3432. }
  3433. void iwl4965_rx_replenish(void *data)
  3434. {
  3435. struct iwl_priv *priv = data;
  3436. unsigned long flags;
  3437. iwl4965_rx_allocate(priv);
  3438. spin_lock_irqsave(&priv->lock, flags);
  3439. iwl4965_rx_queue_restock(priv);
  3440. spin_unlock_irqrestore(&priv->lock, flags);
  3441. }
  3442. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3443. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3444. * This free routine walks the list of POOL entries and if SKB is set to
  3445. * non NULL it is unmapped and freed
  3446. */
  3447. static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3448. {
  3449. int i;
  3450. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3451. if (rxq->pool[i].skb != NULL) {
  3452. pci_unmap_single(priv->pci_dev,
  3453. rxq->pool[i].dma_addr,
  3454. priv->hw_setting.rx_buf_size,
  3455. PCI_DMA_FROMDEVICE);
  3456. dev_kfree_skb(rxq->pool[i].skb);
  3457. }
  3458. }
  3459. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3460. rxq->dma_addr);
  3461. rxq->bd = NULL;
  3462. }
  3463. int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
  3464. {
  3465. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3466. struct pci_dev *dev = priv->pci_dev;
  3467. int i;
  3468. spin_lock_init(&rxq->lock);
  3469. INIT_LIST_HEAD(&rxq->rx_free);
  3470. INIT_LIST_HEAD(&rxq->rx_used);
  3471. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3472. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3473. if (!rxq->bd)
  3474. return -ENOMEM;
  3475. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3476. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3477. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3478. /* Set us so that we have processed and used all buffers, but have
  3479. * not restocked the Rx queue with fresh buffers */
  3480. rxq->read = rxq->write = 0;
  3481. rxq->free_count = 0;
  3482. rxq->need_update = 0;
  3483. return 0;
  3484. }
  3485. void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3486. {
  3487. unsigned long flags;
  3488. int i;
  3489. spin_lock_irqsave(&rxq->lock, flags);
  3490. INIT_LIST_HEAD(&rxq->rx_free);
  3491. INIT_LIST_HEAD(&rxq->rx_used);
  3492. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3493. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3494. /* In the reset function, these buffers may have been allocated
  3495. * to an SKB, so we need to unmap and free potential storage */
  3496. if (rxq->pool[i].skb != NULL) {
  3497. pci_unmap_single(priv->pci_dev,
  3498. rxq->pool[i].dma_addr,
  3499. priv->hw_setting.rx_buf_size,
  3500. PCI_DMA_FROMDEVICE);
  3501. priv->alloc_rxb_skb--;
  3502. dev_kfree_skb(rxq->pool[i].skb);
  3503. rxq->pool[i].skb = NULL;
  3504. }
  3505. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3506. }
  3507. /* Set us so that we have processed and used all buffers, but have
  3508. * not restocked the Rx queue with fresh buffers */
  3509. rxq->read = rxq->write = 0;
  3510. rxq->free_count = 0;
  3511. spin_unlock_irqrestore(&rxq->lock, flags);
  3512. }
  3513. /* Convert linear signal-to-noise ratio into dB */
  3514. static u8 ratio2dB[100] = {
  3515. /* 0 1 2 3 4 5 6 7 8 9 */
  3516. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3517. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3518. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3519. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3520. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3521. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3522. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3523. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3524. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3525. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3526. };
  3527. /* Calculates a relative dB value from a ratio of linear
  3528. * (i.e. not dB) signal levels.
  3529. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3530. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3531. {
  3532. /* 1000:1 or higher just report as 60 dB */
  3533. if (sig_ratio >= 1000)
  3534. return 60;
  3535. /* 100:1 or higher, divide by 10 and use table,
  3536. * add 20 dB to make up for divide by 10 */
  3537. if (sig_ratio >= 100)
  3538. return (20 + (int)ratio2dB[sig_ratio/10]);
  3539. /* We shouldn't see this */
  3540. if (sig_ratio < 1)
  3541. return 0;
  3542. /* Use table for ratios 1:1 - 99:1 */
  3543. return (int)ratio2dB[sig_ratio];
  3544. }
  3545. #define PERFECT_RSSI (-20) /* dBm */
  3546. #define WORST_RSSI (-95) /* dBm */
  3547. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3548. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3549. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3550. * about formulas used below. */
  3551. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3552. {
  3553. int sig_qual;
  3554. int degradation = PERFECT_RSSI - rssi_dbm;
  3555. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3556. * as indicator; formula is (signal dbm - noise dbm).
  3557. * SNR at or above 40 is a great signal (100%).
  3558. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3559. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3560. if (noise_dbm) {
  3561. if (rssi_dbm - noise_dbm >= 40)
  3562. return 100;
  3563. else if (rssi_dbm < noise_dbm)
  3564. return 0;
  3565. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3566. /* Else use just the signal level.
  3567. * This formula is a least squares fit of data points collected and
  3568. * compared with a reference system that had a percentage (%) display
  3569. * for signal quality. */
  3570. } else
  3571. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3572. (15 * RSSI_RANGE + 62 * degradation)) /
  3573. (RSSI_RANGE * RSSI_RANGE);
  3574. if (sig_qual > 100)
  3575. sig_qual = 100;
  3576. else if (sig_qual < 1)
  3577. sig_qual = 0;
  3578. return sig_qual;
  3579. }
  3580. /**
  3581. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3582. *
  3583. * Uses the priv->rx_handlers callback function array to invoke
  3584. * the appropriate handlers, including command responses,
  3585. * frame-received notifications, and other notifications.
  3586. */
  3587. static void iwl4965_rx_handle(struct iwl_priv *priv)
  3588. {
  3589. struct iwl4965_rx_mem_buffer *rxb;
  3590. struct iwl4965_rx_packet *pkt;
  3591. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3592. u32 r, i;
  3593. int reclaim;
  3594. unsigned long flags;
  3595. u8 fill_rx = 0;
  3596. u32 count = 8;
  3597. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3598. * buffer that the driver may process (last buffer filled by ucode). */
  3599. r = iwl4965_hw_get_rx_read(priv);
  3600. i = rxq->read;
  3601. /* Rx interrupt, but nothing sent from uCode */
  3602. if (i == r)
  3603. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3604. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3605. fill_rx = 1;
  3606. while (i != r) {
  3607. rxb = rxq->queue[i];
  3608. /* If an RXB doesn't have a Rx queue slot associated with it,
  3609. * then a bug has been introduced in the queue refilling
  3610. * routines -- catch it here */
  3611. BUG_ON(rxb == NULL);
  3612. rxq->queue[i] = NULL;
  3613. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3614. priv->hw_setting.rx_buf_size,
  3615. PCI_DMA_FROMDEVICE);
  3616. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3617. /* Reclaim a command buffer only if this packet is a response
  3618. * to a (driver-originated) command.
  3619. * If the packet (e.g. Rx frame) originated from uCode,
  3620. * there is no command buffer to reclaim.
  3621. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3622. * but apparently a few don't get set; catch them here. */
  3623. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3624. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3625. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3626. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3627. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3628. (pkt->hdr.cmd != REPLY_TX);
  3629. /* Based on type of command response or notification,
  3630. * handle those that need handling via function in
  3631. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3632. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3633. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3634. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3635. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3636. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3637. } else {
  3638. /* No handling needed */
  3639. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3640. "r %d i %d No handler needed for %s, 0x%02x\n",
  3641. r, i, get_cmd_string(pkt->hdr.cmd),
  3642. pkt->hdr.cmd);
  3643. }
  3644. if (reclaim) {
  3645. /* Invoke any callbacks, transfer the skb to caller, and
  3646. * fire off the (possibly) blocking iwl4965_send_cmd()
  3647. * as we reclaim the driver command queue */
  3648. if (rxb && rxb->skb)
  3649. iwl4965_tx_cmd_complete(priv, rxb);
  3650. else
  3651. IWL_WARNING("Claim null rxb?\n");
  3652. }
  3653. /* For now we just don't re-use anything. We can tweak this
  3654. * later to try and re-use notification packets and SKBs that
  3655. * fail to Rx correctly */
  3656. if (rxb->skb != NULL) {
  3657. priv->alloc_rxb_skb--;
  3658. dev_kfree_skb_any(rxb->skb);
  3659. rxb->skb = NULL;
  3660. }
  3661. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3662. priv->hw_setting.rx_buf_size,
  3663. PCI_DMA_FROMDEVICE);
  3664. spin_lock_irqsave(&rxq->lock, flags);
  3665. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3666. spin_unlock_irqrestore(&rxq->lock, flags);
  3667. i = (i + 1) & RX_QUEUE_MASK;
  3668. /* If there are a lot of unused frames,
  3669. * restock the Rx queue so ucode wont assert. */
  3670. if (fill_rx) {
  3671. count++;
  3672. if (count >= 8) {
  3673. priv->rxq.read = i;
  3674. __iwl4965_rx_replenish(priv);
  3675. count = 0;
  3676. }
  3677. }
  3678. }
  3679. /* Backtrack one entry */
  3680. priv->rxq.read = i;
  3681. iwl4965_rx_queue_restock(priv);
  3682. }
  3683. /**
  3684. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  3685. */
  3686. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3687. struct iwl4965_tx_queue *txq)
  3688. {
  3689. u32 reg = 0;
  3690. int rc = 0;
  3691. int txq_id = txq->q.id;
  3692. if (txq->need_update == 0)
  3693. return rc;
  3694. /* if we're trying to save power */
  3695. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3696. /* wake up nic if it's powered down ...
  3697. * uCode will wake up, and interrupt us again, so next
  3698. * time we'll skip this part. */
  3699. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3700. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3701. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3702. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3703. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3704. return rc;
  3705. }
  3706. /* restore this queue's parameters in nic hardware. */
  3707. rc = iwl4965_grab_nic_access(priv);
  3708. if (rc)
  3709. return rc;
  3710. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  3711. txq->q.write_ptr | (txq_id << 8));
  3712. iwl4965_release_nic_access(priv);
  3713. /* else not in power-save mode, uCode will never sleep when we're
  3714. * trying to tx (during RFKILL, we're not trying to tx). */
  3715. } else
  3716. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  3717. txq->q.write_ptr | (txq_id << 8));
  3718. txq->need_update = 0;
  3719. return rc;
  3720. }
  3721. #ifdef CONFIG_IWLWIFI_DEBUG
  3722. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  3723. {
  3724. DECLARE_MAC_BUF(mac);
  3725. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3726. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3727. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3728. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3729. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3730. le32_to_cpu(rxon->filter_flags));
  3731. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3732. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3733. rxon->ofdm_basic_rates);
  3734. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3735. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3736. print_mac(mac, rxon->node_addr));
  3737. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3738. print_mac(mac, rxon->bssid_addr));
  3739. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3740. }
  3741. #endif
  3742. static void iwl4965_enable_interrupts(struct iwl_priv *priv)
  3743. {
  3744. IWL_DEBUG_ISR("Enabling interrupts\n");
  3745. set_bit(STATUS_INT_ENABLED, &priv->status);
  3746. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3747. }
  3748. static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
  3749. {
  3750. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3751. /* disable interrupts from uCode/NIC to host */
  3752. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  3753. /* acknowledge/clear/reset any interrupts still pending
  3754. * from uCode or flow handler (Rx/Tx DMA) */
  3755. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  3756. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3757. IWL_DEBUG_ISR("Disabled interrupts\n");
  3758. }
  3759. static const char *desc_lookup(int i)
  3760. {
  3761. switch (i) {
  3762. case 1:
  3763. return "FAIL";
  3764. case 2:
  3765. return "BAD_PARAM";
  3766. case 3:
  3767. return "BAD_CHECKSUM";
  3768. case 4:
  3769. return "NMI_INTERRUPT";
  3770. case 5:
  3771. return "SYSASSERT";
  3772. case 6:
  3773. return "FATAL_ERROR";
  3774. }
  3775. return "UNKNOWN";
  3776. }
  3777. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3778. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3779. static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
  3780. {
  3781. u32 data2, line;
  3782. u32 desc, time, count, base, data1;
  3783. u32 blink1, blink2, ilink1, ilink2;
  3784. int rc;
  3785. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3786. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3787. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3788. return;
  3789. }
  3790. rc = iwl4965_grab_nic_access(priv);
  3791. if (rc) {
  3792. IWL_WARNING("Can not read from adapter at this time.\n");
  3793. return;
  3794. }
  3795. count = iwl4965_read_targ_mem(priv, base);
  3796. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3797. IWL_ERROR("Start IWL Error Log Dump:\n");
  3798. IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
  3799. }
  3800. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  3801. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  3802. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  3803. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  3804. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  3805. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  3806. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  3807. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  3808. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  3809. IWL_ERROR("Desc Time "
  3810. "data1 data2 line\n");
  3811. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  3812. desc_lookup(desc), desc, time, data1, data2, line);
  3813. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  3814. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  3815. ilink1, ilink2);
  3816. iwl4965_release_nic_access(priv);
  3817. }
  3818. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3819. /**
  3820. * iwl4965_print_event_log - Dump error event log to syslog
  3821. *
  3822. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  3823. */
  3824. static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
  3825. u32 num_events, u32 mode)
  3826. {
  3827. u32 i;
  3828. u32 base; /* SRAM byte address of event log header */
  3829. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3830. u32 ptr; /* SRAM byte address of log data */
  3831. u32 ev, time, data; /* event log data */
  3832. if (num_events == 0)
  3833. return;
  3834. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3835. if (mode == 0)
  3836. event_size = 2 * sizeof(u32);
  3837. else
  3838. event_size = 3 * sizeof(u32);
  3839. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3840. /* "time" is actually "data" for mode 0 (no timestamp).
  3841. * place event id # at far right for easier visual parsing. */
  3842. for (i = 0; i < num_events; i++) {
  3843. ev = iwl4965_read_targ_mem(priv, ptr);
  3844. ptr += sizeof(u32);
  3845. time = iwl4965_read_targ_mem(priv, ptr);
  3846. ptr += sizeof(u32);
  3847. if (mode == 0)
  3848. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  3849. else {
  3850. data = iwl4965_read_targ_mem(priv, ptr);
  3851. ptr += sizeof(u32);
  3852. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  3853. }
  3854. }
  3855. }
  3856. static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
  3857. {
  3858. int rc;
  3859. u32 base; /* SRAM byte address of event log header */
  3860. u32 capacity; /* event log capacity in # entries */
  3861. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3862. u32 num_wraps; /* # times uCode wrapped to top of log */
  3863. u32 next_entry; /* index of next entry to be written by uCode */
  3864. u32 size; /* # entries that we'll print */
  3865. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3866. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3867. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  3868. return;
  3869. }
  3870. rc = iwl4965_grab_nic_access(priv);
  3871. if (rc) {
  3872. IWL_WARNING("Can not read from adapter at this time.\n");
  3873. return;
  3874. }
  3875. /* event log header */
  3876. capacity = iwl4965_read_targ_mem(priv, base);
  3877. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  3878. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  3879. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  3880. size = num_wraps ? capacity : next_entry;
  3881. /* bail out if nothing in log */
  3882. if (size == 0) {
  3883. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  3884. iwl4965_release_nic_access(priv);
  3885. return;
  3886. }
  3887. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  3888. size, num_wraps);
  3889. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3890. * i.e the next one that uCode would fill. */
  3891. if (num_wraps)
  3892. iwl4965_print_event_log(priv, next_entry,
  3893. capacity - next_entry, mode);
  3894. /* (then/else) start at top of log */
  3895. iwl4965_print_event_log(priv, 0, next_entry, mode);
  3896. iwl4965_release_nic_access(priv);
  3897. }
  3898. /**
  3899. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  3900. */
  3901. static void iwl4965_irq_handle_error(struct iwl_priv *priv)
  3902. {
  3903. /* Set the FW error flag -- cleared on iwl4965_down */
  3904. set_bit(STATUS_FW_ERROR, &priv->status);
  3905. /* Cancel currently queued command. */
  3906. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3907. #ifdef CONFIG_IWLWIFI_DEBUG
  3908. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  3909. iwl4965_dump_nic_error_log(priv);
  3910. iwl4965_dump_nic_event_log(priv);
  3911. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  3912. }
  3913. #endif
  3914. wake_up_interruptible(&priv->wait_command_queue);
  3915. /* Keep the restart process from trying to send host
  3916. * commands by clearing the INIT status bit */
  3917. clear_bit(STATUS_READY, &priv->status);
  3918. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3919. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  3920. "Restarting adapter due to uCode error.\n");
  3921. if (iwl4965_is_associated(priv)) {
  3922. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  3923. sizeof(priv->recovery_rxon));
  3924. priv->error_recovering = 1;
  3925. }
  3926. queue_work(priv->workqueue, &priv->restart);
  3927. }
  3928. }
  3929. static void iwl4965_error_recovery(struct iwl_priv *priv)
  3930. {
  3931. unsigned long flags;
  3932. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  3933. sizeof(priv->staging_rxon));
  3934. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3935. iwl4965_commit_rxon(priv);
  3936. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  3937. spin_lock_irqsave(&priv->lock, flags);
  3938. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  3939. priv->error_recovering = 0;
  3940. spin_unlock_irqrestore(&priv->lock, flags);
  3941. }
  3942. static void iwl4965_irq_tasklet(struct iwl_priv *priv)
  3943. {
  3944. u32 inta, handled = 0;
  3945. u32 inta_fh;
  3946. unsigned long flags;
  3947. #ifdef CONFIG_IWLWIFI_DEBUG
  3948. u32 inta_mask;
  3949. #endif
  3950. spin_lock_irqsave(&priv->lock, flags);
  3951. /* Ack/clear/reset pending uCode interrupts.
  3952. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  3953. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  3954. inta = iwl4965_read32(priv, CSR_INT);
  3955. iwl4965_write32(priv, CSR_INT, inta);
  3956. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  3957. * Any new interrupts that happen after this, either while we're
  3958. * in this tasklet, or later, will show up in next ISR/tasklet. */
  3959. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  3960. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  3961. #ifdef CONFIG_IWLWIFI_DEBUG
  3962. if (iwl_debug_level & IWL_DL_ISR) {
  3963. /* just for debug */
  3964. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  3965. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3966. inta, inta_mask, inta_fh);
  3967. }
  3968. #endif
  3969. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  3970. * atomic, make sure that inta covers all the interrupts that
  3971. * we've discovered, even if FH interrupt came in just after
  3972. * reading CSR_INT. */
  3973. if (inta_fh & CSR49_FH_INT_RX_MASK)
  3974. inta |= CSR_INT_BIT_FH_RX;
  3975. if (inta_fh & CSR49_FH_INT_TX_MASK)
  3976. inta |= CSR_INT_BIT_FH_TX;
  3977. /* Now service all interrupt bits discovered above. */
  3978. if (inta & CSR_INT_BIT_HW_ERR) {
  3979. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  3980. /* Tell the device to stop sending interrupts */
  3981. iwl4965_disable_interrupts(priv);
  3982. iwl4965_irq_handle_error(priv);
  3983. handled |= CSR_INT_BIT_HW_ERR;
  3984. spin_unlock_irqrestore(&priv->lock, flags);
  3985. return;
  3986. }
  3987. #ifdef CONFIG_IWLWIFI_DEBUG
  3988. if (iwl_debug_level & (IWL_DL_ISR)) {
  3989. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  3990. if (inta & CSR_INT_BIT_SCD)
  3991. IWL_DEBUG_ISR("Scheduler finished to transmit "
  3992. "the frame/frames.\n");
  3993. /* Alive notification via Rx interrupt will do the real work */
  3994. if (inta & CSR_INT_BIT_ALIVE)
  3995. IWL_DEBUG_ISR("Alive interrupt\n");
  3996. }
  3997. #endif
  3998. /* Safely ignore these bits for debug checks below */
  3999. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  4000. /* HW RF KILL switch toggled */
  4001. if (inta & CSR_INT_BIT_RF_KILL) {
  4002. int hw_rf_kill = 0;
  4003. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  4004. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4005. hw_rf_kill = 1;
  4006. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4007. "RF_KILL bit toggled to %s.\n",
  4008. hw_rf_kill ? "disable radio":"enable radio");
  4009. /* Queue restart only if RF_KILL switch was set to "kill"
  4010. * when we loaded driver, and is now set to "enable".
  4011. * After we're Alive, RF_KILL gets handled by
  4012. * iwl4965_rx_card_state_notif() */
  4013. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4014. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4015. queue_work(priv->workqueue, &priv->restart);
  4016. }
  4017. handled |= CSR_INT_BIT_RF_KILL;
  4018. }
  4019. /* Chip got too hot and stopped itself */
  4020. if (inta & CSR_INT_BIT_CT_KILL) {
  4021. IWL_ERROR("Microcode CT kill error detected.\n");
  4022. handled |= CSR_INT_BIT_CT_KILL;
  4023. }
  4024. /* Error detected by uCode */
  4025. if (inta & CSR_INT_BIT_SW_ERR) {
  4026. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4027. inta);
  4028. iwl4965_irq_handle_error(priv);
  4029. handled |= CSR_INT_BIT_SW_ERR;
  4030. }
  4031. /* uCode wakes up after power-down sleep */
  4032. if (inta & CSR_INT_BIT_WAKEUP) {
  4033. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4034. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  4035. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4036. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4037. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4038. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4039. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4040. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4041. handled |= CSR_INT_BIT_WAKEUP;
  4042. }
  4043. /* All uCode command responses, including Tx command responses,
  4044. * Rx "responses" (frame-received notification), and other
  4045. * notifications from uCode come through here*/
  4046. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4047. iwl4965_rx_handle(priv);
  4048. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4049. }
  4050. if (inta & CSR_INT_BIT_FH_TX) {
  4051. IWL_DEBUG_ISR("Tx interrupt\n");
  4052. handled |= CSR_INT_BIT_FH_TX;
  4053. }
  4054. if (inta & ~handled)
  4055. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4056. if (inta & ~CSR_INI_SET_MASK) {
  4057. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4058. inta & ~CSR_INI_SET_MASK);
  4059. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4060. }
  4061. /* Re-enable all interrupts */
  4062. iwl4965_enable_interrupts(priv);
  4063. #ifdef CONFIG_IWLWIFI_DEBUG
  4064. if (iwl_debug_level & (IWL_DL_ISR)) {
  4065. inta = iwl4965_read32(priv, CSR_INT);
  4066. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4067. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4068. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4069. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4070. }
  4071. #endif
  4072. spin_unlock_irqrestore(&priv->lock, flags);
  4073. }
  4074. static irqreturn_t iwl4965_isr(int irq, void *data)
  4075. {
  4076. struct iwl_priv *priv = data;
  4077. u32 inta, inta_mask;
  4078. u32 inta_fh;
  4079. if (!priv)
  4080. return IRQ_NONE;
  4081. spin_lock(&priv->lock);
  4082. /* Disable (but don't clear!) interrupts here to avoid
  4083. * back-to-back ISRs and sporadic interrupts from our NIC.
  4084. * If we have something to service, the tasklet will re-enable ints.
  4085. * If we *don't* have something, we'll re-enable before leaving here. */
  4086. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4087. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4088. /* Discover which interrupts are active/pending */
  4089. inta = iwl4965_read32(priv, CSR_INT);
  4090. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4091. /* Ignore interrupt if there's nothing in NIC to service.
  4092. * This may be due to IRQ shared with another device,
  4093. * or due to sporadic interrupts thrown from our NIC. */
  4094. if (!inta && !inta_fh) {
  4095. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4096. goto none;
  4097. }
  4098. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4099. /* Hardware disappeared. It might have already raised
  4100. * an interrupt */
  4101. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4102. goto unplugged;
  4103. }
  4104. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4105. inta, inta_mask, inta_fh);
  4106. inta &= ~CSR_INT_BIT_SCD;
  4107. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  4108. if (likely(inta || inta_fh))
  4109. tasklet_schedule(&priv->irq_tasklet);
  4110. unplugged:
  4111. spin_unlock(&priv->lock);
  4112. return IRQ_HANDLED;
  4113. none:
  4114. /* re-enable interrupts here since we don't have anything to service. */
  4115. iwl4965_enable_interrupts(priv);
  4116. spin_unlock(&priv->lock);
  4117. return IRQ_NONE;
  4118. }
  4119. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4120. * sending probe req. This should be set long enough to hear probe responses
  4121. * from more than one AP. */
  4122. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4123. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4124. /* For faster active scanning, scan will move to the next channel if fewer than
  4125. * PLCP_QUIET_THRESH packets are heard on this channel within
  4126. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4127. * time if it's a quiet channel (nothing responded to our probe, and there's
  4128. * no other traffic).
  4129. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4130. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4131. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4132. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4133. * Must be set longer than active dwell time.
  4134. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4135. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4136. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4137. #define IWL_PASSIVE_DWELL_BASE (100)
  4138. #define IWL_CHANNEL_TUNE_TIME 5
  4139. static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
  4140. enum ieee80211_band band)
  4141. {
  4142. if (band == IEEE80211_BAND_5GHZ)
  4143. return IWL_ACTIVE_DWELL_TIME_52;
  4144. else
  4145. return IWL_ACTIVE_DWELL_TIME_24;
  4146. }
  4147. static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
  4148. enum ieee80211_band band)
  4149. {
  4150. u16 active = iwl4965_get_active_dwell_time(priv, band);
  4151. u16 passive = (band != IEEE80211_BAND_5GHZ) ?
  4152. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4153. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4154. if (iwl4965_is_associated(priv)) {
  4155. /* If we're associated, we clamp the maximum passive
  4156. * dwell time to be 98% of the beacon interval (minus
  4157. * 2 * channel tune time) */
  4158. passive = priv->beacon_int;
  4159. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4160. passive = IWL_PASSIVE_DWELL_BASE;
  4161. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4162. }
  4163. if (passive <= active)
  4164. passive = active + 1;
  4165. return passive;
  4166. }
  4167. static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
  4168. enum ieee80211_band band,
  4169. u8 is_active, u8 direct_mask,
  4170. struct iwl4965_scan_channel *scan_ch)
  4171. {
  4172. const struct ieee80211_channel *channels = NULL;
  4173. const struct ieee80211_supported_band *sband;
  4174. const struct iwl_channel_info *ch_info;
  4175. u16 passive_dwell = 0;
  4176. u16 active_dwell = 0;
  4177. int added, i;
  4178. sband = iwl4965_get_hw_mode(priv, band);
  4179. if (!sband)
  4180. return 0;
  4181. channels = sband->channels;
  4182. active_dwell = iwl4965_get_active_dwell_time(priv, band);
  4183. passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
  4184. for (i = 0, added = 0; i < sband->n_channels; i++) {
  4185. if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
  4186. le16_to_cpu(priv->active_rxon.channel)) {
  4187. if (iwl4965_is_associated(priv)) {
  4188. IWL_DEBUG_SCAN
  4189. ("Skipping current channel %d\n",
  4190. le16_to_cpu(priv->active_rxon.channel));
  4191. continue;
  4192. }
  4193. } else if (priv->only_active_channel)
  4194. continue;
  4195. scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
  4196. ch_info = iwl4965_get_channel_info(priv, band,
  4197. scan_ch->channel);
  4198. if (!is_channel_valid(ch_info)) {
  4199. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4200. scan_ch->channel);
  4201. continue;
  4202. }
  4203. if (!is_active || is_channel_passive(ch_info) ||
  4204. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
  4205. scan_ch->type = 0; /* passive */
  4206. else
  4207. scan_ch->type = 1; /* active */
  4208. if (scan_ch->type & 1)
  4209. scan_ch->type |= (direct_mask << 1);
  4210. if (is_channel_narrow(ch_info))
  4211. scan_ch->type |= (1 << 7);
  4212. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4213. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4214. /* Set txpower levels to defaults */
  4215. scan_ch->tpc.dsp_atten = 110;
  4216. /* scan_pwr_info->tpc.dsp_atten; */
  4217. /*scan_pwr_info->tpc.tx_gain; */
  4218. if (band == IEEE80211_BAND_5GHZ)
  4219. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4220. else {
  4221. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4222. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4223. * power level:
  4224. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4225. */
  4226. }
  4227. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4228. scan_ch->channel,
  4229. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4230. (scan_ch->type & 1) ?
  4231. active_dwell : passive_dwell);
  4232. scan_ch++;
  4233. added++;
  4234. }
  4235. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4236. return added;
  4237. }
  4238. static void iwl4965_init_hw_rates(struct iwl_priv *priv,
  4239. struct ieee80211_rate *rates)
  4240. {
  4241. int i;
  4242. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4243. rates[i].bitrate = iwl4965_rates[i].ieee * 5;
  4244. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  4245. rates[i].hw_value_short = i;
  4246. rates[i].flags = 0;
  4247. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  4248. /*
  4249. * If CCK != 1M then set short preamble rate flag.
  4250. */
  4251. rates[i].flags |=
  4252. (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  4253. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  4254. }
  4255. }
  4256. }
  4257. /**
  4258. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4259. */
  4260. int iwl4965_init_geos(struct iwl_priv *priv)
  4261. {
  4262. struct iwl_channel_info *ch;
  4263. struct ieee80211_supported_band *sband;
  4264. struct ieee80211_channel *channels;
  4265. struct ieee80211_channel *geo_ch;
  4266. struct ieee80211_rate *rates;
  4267. int i = 0;
  4268. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  4269. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  4270. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4271. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4272. return 0;
  4273. }
  4274. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4275. priv->channel_count, GFP_KERNEL);
  4276. if (!channels)
  4277. return -ENOMEM;
  4278. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  4279. GFP_KERNEL);
  4280. if (!rates) {
  4281. kfree(channels);
  4282. return -ENOMEM;
  4283. }
  4284. /* 5.2GHz channels start after the 2.4GHz channels */
  4285. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4286. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4287. /* just OFDM */
  4288. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  4289. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  4290. iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_5GHZ);
  4291. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4292. sband->channels = channels;
  4293. /* OFDM & CCK */
  4294. sband->bitrates = rates;
  4295. sband->n_bitrates = IWL_RATE_COUNT;
  4296. iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_2GHZ);
  4297. priv->ieee_channels = channels;
  4298. priv->ieee_rates = rates;
  4299. iwl4965_init_hw_rates(priv, rates);
  4300. for (i = 0; i < priv->channel_count; i++) {
  4301. ch = &priv->channel_info[i];
  4302. /* FIXME: might be removed if scan is OK */
  4303. if (!is_channel_valid(ch))
  4304. continue;
  4305. if (is_channel_a_band(ch))
  4306. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4307. else
  4308. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4309. geo_ch = &sband->channels[sband->n_channels++];
  4310. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  4311. geo_ch->max_power = ch->max_power_avg;
  4312. geo_ch->max_antenna_gain = 0xff;
  4313. geo_ch->hw_value = ch->channel;
  4314. if (is_channel_valid(ch)) {
  4315. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  4316. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  4317. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  4318. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  4319. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4320. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  4321. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4322. priv->max_channel_txpower_limit =
  4323. ch->max_power_avg;
  4324. } else {
  4325. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  4326. }
  4327. /* Save flags for reg domain usage */
  4328. geo_ch->orig_flags = geo_ch->flags;
  4329. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  4330. ch->channel, geo_ch->center_freq,
  4331. is_channel_a_band(ch) ? "5.2" : "2.4",
  4332. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  4333. "restricted" : "valid",
  4334. geo_ch->flags);
  4335. }
  4336. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  4337. priv->cfg->sku & IWL_SKU_A) {
  4338. printk(KERN_INFO DRV_NAME
  4339. ": Incorrectly detected BG card as ABG. Please send "
  4340. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4341. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4342. priv->cfg->sku &= ~IWL_SKU_A;
  4343. }
  4344. printk(KERN_INFO DRV_NAME
  4345. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4346. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  4347. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  4348. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
  4349. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
  4350. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4351. return 0;
  4352. }
  4353. /*
  4354. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  4355. */
  4356. void iwl4965_free_geos(struct iwl_priv *priv)
  4357. {
  4358. kfree(priv->ieee_channels);
  4359. kfree(priv->ieee_rates);
  4360. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4361. }
  4362. /******************************************************************************
  4363. *
  4364. * uCode download functions
  4365. *
  4366. ******************************************************************************/
  4367. static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
  4368. {
  4369. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4370. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4371. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4372. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4373. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4374. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4375. }
  4376. /**
  4377. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4378. * looking at all data.
  4379. */
  4380. static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  4381. u32 len)
  4382. {
  4383. u32 val;
  4384. u32 save_len = len;
  4385. int rc = 0;
  4386. u32 errcnt;
  4387. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4388. rc = iwl4965_grab_nic_access(priv);
  4389. if (rc)
  4390. return rc;
  4391. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4392. errcnt = 0;
  4393. for (; len > 0; len -= sizeof(u32), image++) {
  4394. /* read data comes through single port, auto-incr addr */
  4395. /* NOTE: Use the debugless read so we don't flood kernel log
  4396. * if IWL_DL_IO is set */
  4397. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4398. if (val != le32_to_cpu(*image)) {
  4399. IWL_ERROR("uCode INST section is invalid at "
  4400. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4401. save_len - len, val, le32_to_cpu(*image));
  4402. rc = -EIO;
  4403. errcnt++;
  4404. if (errcnt >= 20)
  4405. break;
  4406. }
  4407. }
  4408. iwl4965_release_nic_access(priv);
  4409. if (!errcnt)
  4410. IWL_DEBUG_INFO
  4411. ("ucode image in INSTRUCTION memory is good\n");
  4412. return rc;
  4413. }
  4414. /**
  4415. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4416. * using sample data 100 bytes apart. If these sample points are good,
  4417. * it's a pretty good bet that everything between them is good, too.
  4418. */
  4419. static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4420. {
  4421. u32 val;
  4422. int rc = 0;
  4423. u32 errcnt = 0;
  4424. u32 i;
  4425. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4426. rc = iwl4965_grab_nic_access(priv);
  4427. if (rc)
  4428. return rc;
  4429. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4430. /* read data comes through single port, auto-incr addr */
  4431. /* NOTE: Use the debugless read so we don't flood kernel log
  4432. * if IWL_DL_IO is set */
  4433. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  4434. i + RTC_INST_LOWER_BOUND);
  4435. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4436. if (val != le32_to_cpu(*image)) {
  4437. #if 0 /* Enable this if you want to see details */
  4438. IWL_ERROR("uCode INST section is invalid at "
  4439. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4440. i, val, *image);
  4441. #endif
  4442. rc = -EIO;
  4443. errcnt++;
  4444. if (errcnt >= 3)
  4445. break;
  4446. }
  4447. }
  4448. iwl4965_release_nic_access(priv);
  4449. return rc;
  4450. }
  4451. /**
  4452. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  4453. * and verify its contents
  4454. */
  4455. static int iwl4965_verify_ucode(struct iwl_priv *priv)
  4456. {
  4457. __le32 *image;
  4458. u32 len;
  4459. int rc = 0;
  4460. /* Try bootstrap */
  4461. image = (__le32 *)priv->ucode_boot.v_addr;
  4462. len = priv->ucode_boot.len;
  4463. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4464. if (rc == 0) {
  4465. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4466. return 0;
  4467. }
  4468. /* Try initialize */
  4469. image = (__le32 *)priv->ucode_init.v_addr;
  4470. len = priv->ucode_init.len;
  4471. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4472. if (rc == 0) {
  4473. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4474. return 0;
  4475. }
  4476. /* Try runtime/protocol */
  4477. image = (__le32 *)priv->ucode_code.v_addr;
  4478. len = priv->ucode_code.len;
  4479. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4480. if (rc == 0) {
  4481. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4482. return 0;
  4483. }
  4484. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4485. /* Since nothing seems to match, show first several data entries in
  4486. * instruction SRAM, so maybe visual inspection will give a clue.
  4487. * Selection of bootstrap image (vs. other images) is arbitrary. */
  4488. image = (__le32 *)priv->ucode_boot.v_addr;
  4489. len = priv->ucode_boot.len;
  4490. rc = iwl4965_verify_inst_full(priv, image, len);
  4491. return rc;
  4492. }
  4493. /* check contents of special bootstrap uCode SRAM */
  4494. static int iwl4965_verify_bsm(struct iwl_priv *priv)
  4495. {
  4496. __le32 *image = priv->ucode_boot.v_addr;
  4497. u32 len = priv->ucode_boot.len;
  4498. u32 reg;
  4499. u32 val;
  4500. IWL_DEBUG_INFO("Begin verify bsm\n");
  4501. /* verify BSM SRAM contents */
  4502. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  4503. for (reg = BSM_SRAM_LOWER_BOUND;
  4504. reg < BSM_SRAM_LOWER_BOUND + len;
  4505. reg += sizeof(u32), image ++) {
  4506. val = iwl4965_read_prph(priv, reg);
  4507. if (val != le32_to_cpu(*image)) {
  4508. IWL_ERROR("BSM uCode verification failed at "
  4509. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  4510. BSM_SRAM_LOWER_BOUND,
  4511. reg - BSM_SRAM_LOWER_BOUND, len,
  4512. val, le32_to_cpu(*image));
  4513. return -EIO;
  4514. }
  4515. }
  4516. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  4517. return 0;
  4518. }
  4519. /**
  4520. * iwl4965_load_bsm - Load bootstrap instructions
  4521. *
  4522. * BSM operation:
  4523. *
  4524. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  4525. * in special SRAM that does not power down during RFKILL. When powering back
  4526. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  4527. * the bootstrap program into the on-board processor, and starts it.
  4528. *
  4529. * The bootstrap program loads (via DMA) instructions and data for a new
  4530. * program from host DRAM locations indicated by the host driver in the
  4531. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  4532. * automatically.
  4533. *
  4534. * When initializing the NIC, the host driver points the BSM to the
  4535. * "initialize" uCode image. This uCode sets up some internal data, then
  4536. * notifies host via "initialize alive" that it is complete.
  4537. *
  4538. * The host then replaces the BSM_DRAM_* pointer values to point to the
  4539. * normal runtime uCode instructions and a backup uCode data cache buffer
  4540. * (filled initially with starting data values for the on-board processor),
  4541. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  4542. * which begins normal operation.
  4543. *
  4544. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  4545. * the backup data cache in DRAM before SRAM is powered down.
  4546. *
  4547. * When powering back up, the BSM loads the bootstrap program. This reloads
  4548. * the runtime uCode instructions and the backup data cache into SRAM,
  4549. * and re-launches the runtime uCode from where it left off.
  4550. */
  4551. static int iwl4965_load_bsm(struct iwl_priv *priv)
  4552. {
  4553. __le32 *image = priv->ucode_boot.v_addr;
  4554. u32 len = priv->ucode_boot.len;
  4555. dma_addr_t pinst;
  4556. dma_addr_t pdata;
  4557. u32 inst_len;
  4558. u32 data_len;
  4559. int rc;
  4560. int i;
  4561. u32 done;
  4562. u32 reg_offset;
  4563. IWL_DEBUG_INFO("Begin load bsm\n");
  4564. /* make sure bootstrap program is no larger than BSM's SRAM size */
  4565. if (len > IWL_MAX_BSM_SIZE)
  4566. return -EINVAL;
  4567. /* Tell bootstrap uCode where to find the "Initialize" uCode
  4568. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  4569. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  4570. * after the "initialize" uCode has run, to point to
  4571. * runtime/protocol instructions and backup data cache. */
  4572. pinst = priv->ucode_init.p_addr >> 4;
  4573. pdata = priv->ucode_init_data.p_addr >> 4;
  4574. inst_len = priv->ucode_init.len;
  4575. data_len = priv->ucode_init_data.len;
  4576. rc = iwl4965_grab_nic_access(priv);
  4577. if (rc)
  4578. return rc;
  4579. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4580. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4581. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  4582. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  4583. /* Fill BSM memory with bootstrap instructions */
  4584. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  4585. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  4586. reg_offset += sizeof(u32), image++)
  4587. _iwl4965_write_prph(priv, reg_offset,
  4588. le32_to_cpu(*image));
  4589. rc = iwl4965_verify_bsm(priv);
  4590. if (rc) {
  4591. iwl4965_release_nic_access(priv);
  4592. return rc;
  4593. }
  4594. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  4595. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  4596. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  4597. RTC_INST_LOWER_BOUND);
  4598. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  4599. /* Load bootstrap code into instruction SRAM now,
  4600. * to prepare to load "initialize" uCode */
  4601. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  4602. BSM_WR_CTRL_REG_BIT_START);
  4603. /* Wait for load of bootstrap uCode to finish */
  4604. for (i = 0; i < 100; i++) {
  4605. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  4606. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  4607. break;
  4608. udelay(10);
  4609. }
  4610. if (i < 100)
  4611. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  4612. else {
  4613. IWL_ERROR("BSM write did not complete!\n");
  4614. return -EIO;
  4615. }
  4616. /* Enable future boot loads whenever power management unit triggers it
  4617. * (e.g. when powering back up after power-save shutdown) */
  4618. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  4619. BSM_WR_CTRL_REG_BIT_START_EN);
  4620. iwl4965_release_nic_access(priv);
  4621. return 0;
  4622. }
  4623. static void iwl4965_nic_start(struct iwl_priv *priv)
  4624. {
  4625. /* Remove all resets to allow NIC to operate */
  4626. iwl4965_write32(priv, CSR_RESET, 0);
  4627. }
  4628. /**
  4629. * iwl4965_read_ucode - Read uCode images from disk file.
  4630. *
  4631. * Copy into buffers for card to fetch via bus-mastering
  4632. */
  4633. static int iwl4965_read_ucode(struct iwl_priv *priv)
  4634. {
  4635. struct iwl4965_ucode *ucode;
  4636. int ret;
  4637. const struct firmware *ucode_raw;
  4638. const char *name = priv->cfg->fw_name;
  4639. u8 *src;
  4640. size_t len;
  4641. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  4642. /* Ask kernel firmware_class module to get the boot firmware off disk.
  4643. * request_firmware() is synchronous, file is in memory on return. */
  4644. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  4645. if (ret < 0) {
  4646. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  4647. name, ret);
  4648. goto error;
  4649. }
  4650. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  4651. name, ucode_raw->size);
  4652. /* Make sure that we got at least our header! */
  4653. if (ucode_raw->size < sizeof(*ucode)) {
  4654. IWL_ERROR("File size way too small!\n");
  4655. ret = -EINVAL;
  4656. goto err_release;
  4657. }
  4658. /* Data from ucode file: header followed by uCode images */
  4659. ucode = (void *)ucode_raw->data;
  4660. ver = le32_to_cpu(ucode->ver);
  4661. inst_size = le32_to_cpu(ucode->inst_size);
  4662. data_size = le32_to_cpu(ucode->data_size);
  4663. init_size = le32_to_cpu(ucode->init_size);
  4664. init_data_size = le32_to_cpu(ucode->init_data_size);
  4665. boot_size = le32_to_cpu(ucode->boot_size);
  4666. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  4667. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  4668. inst_size);
  4669. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  4670. data_size);
  4671. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  4672. init_size);
  4673. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  4674. init_data_size);
  4675. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  4676. boot_size);
  4677. /* Verify size of file vs. image size info in file's header */
  4678. if (ucode_raw->size < sizeof(*ucode) +
  4679. inst_size + data_size + init_size +
  4680. init_data_size + boot_size) {
  4681. IWL_DEBUG_INFO("uCode file size %d too small\n",
  4682. (int)ucode_raw->size);
  4683. ret = -EINVAL;
  4684. goto err_release;
  4685. }
  4686. /* Verify that uCode images will fit in card's SRAM */
  4687. if (inst_size > IWL_MAX_INST_SIZE) {
  4688. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  4689. inst_size);
  4690. ret = -EINVAL;
  4691. goto err_release;
  4692. }
  4693. if (data_size > IWL_MAX_DATA_SIZE) {
  4694. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  4695. data_size);
  4696. ret = -EINVAL;
  4697. goto err_release;
  4698. }
  4699. if (init_size > IWL_MAX_INST_SIZE) {
  4700. IWL_DEBUG_INFO
  4701. ("uCode init instr len %d too large to fit in\n",
  4702. init_size);
  4703. ret = -EINVAL;
  4704. goto err_release;
  4705. }
  4706. if (init_data_size > IWL_MAX_DATA_SIZE) {
  4707. IWL_DEBUG_INFO
  4708. ("uCode init data len %d too large to fit in\n",
  4709. init_data_size);
  4710. ret = -EINVAL;
  4711. goto err_release;
  4712. }
  4713. if (boot_size > IWL_MAX_BSM_SIZE) {
  4714. IWL_DEBUG_INFO
  4715. ("uCode boot instr len %d too large to fit in\n",
  4716. boot_size);
  4717. ret = -EINVAL;
  4718. goto err_release;
  4719. }
  4720. /* Allocate ucode buffers for card's bus-master loading ... */
  4721. /* Runtime instructions and 2 copies of data:
  4722. * 1) unmodified from disk
  4723. * 2) backup cache for save/restore during power-downs */
  4724. priv->ucode_code.len = inst_size;
  4725. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  4726. priv->ucode_data.len = data_size;
  4727. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  4728. priv->ucode_data_backup.len = data_size;
  4729. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4730. /* Initialization instructions and data */
  4731. if (init_size && init_data_size) {
  4732. priv->ucode_init.len = init_size;
  4733. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  4734. priv->ucode_init_data.len = init_data_size;
  4735. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4736. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  4737. goto err_pci_alloc;
  4738. }
  4739. /* Bootstrap (instructions only, no data) */
  4740. if (boot_size) {
  4741. priv->ucode_boot.len = boot_size;
  4742. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4743. if (!priv->ucode_boot.v_addr)
  4744. goto err_pci_alloc;
  4745. }
  4746. /* Copy images into buffers for card's bus-master reads ... */
  4747. /* Runtime instructions (first block of data in file) */
  4748. src = &ucode->data[0];
  4749. len = priv->ucode_code.len;
  4750. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  4751. memcpy(priv->ucode_code.v_addr, src, len);
  4752. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  4753. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  4754. /* Runtime data (2nd block)
  4755. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  4756. src = &ucode->data[inst_size];
  4757. len = priv->ucode_data.len;
  4758. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  4759. memcpy(priv->ucode_data.v_addr, src, len);
  4760. memcpy(priv->ucode_data_backup.v_addr, src, len);
  4761. /* Initialization instructions (3rd block) */
  4762. if (init_size) {
  4763. src = &ucode->data[inst_size + data_size];
  4764. len = priv->ucode_init.len;
  4765. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  4766. len);
  4767. memcpy(priv->ucode_init.v_addr, src, len);
  4768. }
  4769. /* Initialization data (4th block) */
  4770. if (init_data_size) {
  4771. src = &ucode->data[inst_size + data_size + init_size];
  4772. len = priv->ucode_init_data.len;
  4773. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  4774. len);
  4775. memcpy(priv->ucode_init_data.v_addr, src, len);
  4776. }
  4777. /* Bootstrap instructions (5th block) */
  4778. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  4779. len = priv->ucode_boot.len;
  4780. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  4781. memcpy(priv->ucode_boot.v_addr, src, len);
  4782. /* We have our copies now, allow OS release its copies */
  4783. release_firmware(ucode_raw);
  4784. return 0;
  4785. err_pci_alloc:
  4786. IWL_ERROR("failed to allocate pci memory\n");
  4787. ret = -ENOMEM;
  4788. iwl4965_dealloc_ucode_pci(priv);
  4789. err_release:
  4790. release_firmware(ucode_raw);
  4791. error:
  4792. return ret;
  4793. }
  4794. /**
  4795. * iwl4965_set_ucode_ptrs - Set uCode address location
  4796. *
  4797. * Tell initialization uCode where to find runtime uCode.
  4798. *
  4799. * BSM registers initially contain pointers to initialization uCode.
  4800. * We need to replace them to load runtime uCode inst and data,
  4801. * and to save runtime data when powering down.
  4802. */
  4803. static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
  4804. {
  4805. dma_addr_t pinst;
  4806. dma_addr_t pdata;
  4807. int rc = 0;
  4808. unsigned long flags;
  4809. /* bits 35:4 for 4965 */
  4810. pinst = priv->ucode_code.p_addr >> 4;
  4811. pdata = priv->ucode_data_backup.p_addr >> 4;
  4812. spin_lock_irqsave(&priv->lock, flags);
  4813. rc = iwl4965_grab_nic_access(priv);
  4814. if (rc) {
  4815. spin_unlock_irqrestore(&priv->lock, flags);
  4816. return rc;
  4817. }
  4818. /* Tell bootstrap uCode where to find image to load */
  4819. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4820. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4821. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  4822. priv->ucode_data.len);
  4823. /* Inst bytecount must be last to set up, bit 31 signals uCode
  4824. * that all new ptr/size info is in place */
  4825. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  4826. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  4827. iwl4965_release_nic_access(priv);
  4828. spin_unlock_irqrestore(&priv->lock, flags);
  4829. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  4830. return rc;
  4831. }
  4832. /**
  4833. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  4834. *
  4835. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  4836. *
  4837. * The 4965 "initialize" ALIVE reply contains calibration data for:
  4838. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  4839. * (3945 does not contain this data).
  4840. *
  4841. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  4842. */
  4843. static void iwl4965_init_alive_start(struct iwl_priv *priv)
  4844. {
  4845. /* Check alive response for "valid" sign from uCode */
  4846. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  4847. /* We had an error bringing up the hardware, so take it
  4848. * all the way back down so we can try again */
  4849. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  4850. goto restart;
  4851. }
  4852. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  4853. * This is a paranoid check, because we would not have gotten the
  4854. * "initialize" alive if code weren't properly loaded. */
  4855. if (iwl4965_verify_ucode(priv)) {
  4856. /* Runtime instruction load was bad;
  4857. * take it all the way back down so we can try again */
  4858. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  4859. goto restart;
  4860. }
  4861. /* Calculate temperature */
  4862. priv->temperature = iwl4965_get_temperature(priv);
  4863. /* Send pointers to protocol/runtime uCode image ... init code will
  4864. * load and launch runtime uCode, which will send us another "Alive"
  4865. * notification. */
  4866. IWL_DEBUG_INFO("Initialization Alive received.\n");
  4867. if (iwl4965_set_ucode_ptrs(priv)) {
  4868. /* Runtime instruction load won't happen;
  4869. * take it all the way back down so we can try again */
  4870. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  4871. goto restart;
  4872. }
  4873. return;
  4874. restart:
  4875. queue_work(priv->workqueue, &priv->restart);
  4876. }
  4877. /**
  4878. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  4879. * from protocol/runtime uCode (initialization uCode's
  4880. * Alive gets handled by iwl4965_init_alive_start()).
  4881. */
  4882. static void iwl4965_alive_start(struct iwl_priv *priv)
  4883. {
  4884. int rc = 0;
  4885. IWL_DEBUG_INFO("Runtime Alive received.\n");
  4886. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  4887. /* We had an error bringing up the hardware, so take it
  4888. * all the way back down so we can try again */
  4889. IWL_DEBUG_INFO("Alive failed.\n");
  4890. goto restart;
  4891. }
  4892. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  4893. * This is a paranoid check, because we would not have gotten the
  4894. * "runtime" alive if code weren't properly loaded. */
  4895. if (iwl4965_verify_ucode(priv)) {
  4896. /* Runtime instruction load was bad;
  4897. * take it all the way back down so we can try again */
  4898. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  4899. goto restart;
  4900. }
  4901. iwlcore_clear_stations_table(priv);
  4902. rc = iwl4965_alive_notify(priv);
  4903. if (rc) {
  4904. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  4905. rc);
  4906. goto restart;
  4907. }
  4908. /* After the ALIVE response, we can send host commands to 4965 uCode */
  4909. set_bit(STATUS_ALIVE, &priv->status);
  4910. /* Clear out the uCode error bit if it is set */
  4911. clear_bit(STATUS_FW_ERROR, &priv->status);
  4912. if (iwl4965_is_rfkill(priv))
  4913. return;
  4914. ieee80211_start_queues(priv->hw);
  4915. priv->active_rate = priv->rates_mask;
  4916. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  4917. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  4918. if (iwl4965_is_associated(priv)) {
  4919. struct iwl4965_rxon_cmd *active_rxon =
  4920. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  4921. memcpy(&priv->staging_rxon, &priv->active_rxon,
  4922. sizeof(priv->staging_rxon));
  4923. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4924. } else {
  4925. /* Initialize our rx_config data */
  4926. iwl4965_connection_init_rx_config(priv);
  4927. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  4928. }
  4929. /* Configure Bluetooth device coexistence support */
  4930. iwl4965_send_bt_config(priv);
  4931. /* Configure the adapter for unassociated operation */
  4932. iwl4965_commit_rxon(priv);
  4933. /* At this point, the NIC is initialized and operational */
  4934. priv->notif_missed_beacons = 0;
  4935. set_bit(STATUS_READY, &priv->status);
  4936. iwl4965_rf_kill_ct_config(priv);
  4937. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  4938. wake_up_interruptible(&priv->wait_command_queue);
  4939. if (priv->error_recovering)
  4940. iwl4965_error_recovery(priv);
  4941. return;
  4942. restart:
  4943. queue_work(priv->workqueue, &priv->restart);
  4944. }
  4945. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
  4946. static void __iwl4965_down(struct iwl_priv *priv)
  4947. {
  4948. unsigned long flags;
  4949. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  4950. struct ieee80211_conf *conf = NULL;
  4951. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  4952. conf = ieee80211_get_hw_conf(priv->hw);
  4953. if (!exit_pending)
  4954. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4955. iwlcore_clear_stations_table(priv);
  4956. /* Unblock any waiting calls */
  4957. wake_up_interruptible_all(&priv->wait_command_queue);
  4958. /* Wipe out the EXIT_PENDING status bit if we are not actually
  4959. * exiting the module */
  4960. if (!exit_pending)
  4961. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  4962. /* stop and reset the on-board processor */
  4963. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  4964. /* tell the device to stop sending interrupts */
  4965. iwl4965_disable_interrupts(priv);
  4966. if (priv->mac80211_registered)
  4967. ieee80211_stop_queues(priv->hw);
  4968. /* If we have not previously called iwl4965_init() then
  4969. * clear all bits but the RF Kill and SUSPEND bits and return */
  4970. if (!iwl4965_is_init(priv)) {
  4971. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4972. STATUS_RF_KILL_HW |
  4973. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4974. STATUS_RF_KILL_SW |
  4975. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4976. STATUS_GEO_CONFIGURED |
  4977. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4978. STATUS_IN_SUSPEND;
  4979. goto exit;
  4980. }
  4981. /* ...otherwise clear out all the status bits but the RF Kill and
  4982. * SUSPEND bits and continue taking the NIC down. */
  4983. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4984. STATUS_RF_KILL_HW |
  4985. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4986. STATUS_RF_KILL_SW |
  4987. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4988. STATUS_GEO_CONFIGURED |
  4989. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4990. STATUS_IN_SUSPEND |
  4991. test_bit(STATUS_FW_ERROR, &priv->status) <<
  4992. STATUS_FW_ERROR;
  4993. spin_lock_irqsave(&priv->lock, flags);
  4994. iwl4965_clear_bit(priv, CSR_GP_CNTRL,
  4995. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4996. spin_unlock_irqrestore(&priv->lock, flags);
  4997. iwl4965_hw_txq_ctx_stop(priv);
  4998. iwl4965_hw_rxq_stop(priv);
  4999. spin_lock_irqsave(&priv->lock, flags);
  5000. if (!iwl4965_grab_nic_access(priv)) {
  5001. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  5002. APMG_CLK_VAL_DMA_CLK_RQT);
  5003. iwl4965_release_nic_access(priv);
  5004. }
  5005. spin_unlock_irqrestore(&priv->lock, flags);
  5006. udelay(5);
  5007. iwl4965_hw_nic_stop_master(priv);
  5008. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5009. iwl4965_hw_nic_reset(priv);
  5010. exit:
  5011. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  5012. if (priv->ibss_beacon)
  5013. dev_kfree_skb(priv->ibss_beacon);
  5014. priv->ibss_beacon = NULL;
  5015. /* clear out any free frames */
  5016. iwl4965_clear_free_frames(priv);
  5017. }
  5018. static void iwl4965_down(struct iwl_priv *priv)
  5019. {
  5020. mutex_lock(&priv->mutex);
  5021. __iwl4965_down(priv);
  5022. mutex_unlock(&priv->mutex);
  5023. iwl4965_cancel_deferred_work(priv);
  5024. }
  5025. #define MAX_HW_RESTARTS 5
  5026. static int __iwl4965_up(struct iwl_priv *priv)
  5027. {
  5028. int rc, i;
  5029. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5030. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5031. return -EIO;
  5032. }
  5033. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5034. IWL_WARNING("Radio disabled by SW RF kill (module "
  5035. "parameter)\n");
  5036. return -ENODEV;
  5037. }
  5038. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5039. IWL_ERROR("ucode not available for device bringup\n");
  5040. return -EIO;
  5041. }
  5042. /* If platform's RF_KILL switch is NOT set to KILL */
  5043. if (iwl4965_read32(priv, CSR_GP_CNTRL) &
  5044. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  5045. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5046. else {
  5047. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5048. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  5049. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5050. return -ENODEV;
  5051. }
  5052. }
  5053. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5054. rc = iwl4965_hw_nic_init(priv);
  5055. if (rc) {
  5056. IWL_ERROR("Unable to int nic\n");
  5057. return rc;
  5058. }
  5059. /* make sure rfkill handshake bits are cleared */
  5060. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5061. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5062. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5063. /* clear (again), then enable host interrupts */
  5064. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5065. iwl4965_enable_interrupts(priv);
  5066. /* really make sure rfkill handshake bits are cleared */
  5067. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5068. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5069. /* Copy original ucode data image from disk into backup cache.
  5070. * This will be used to initialize the on-board processor's
  5071. * data SRAM for a clean start when the runtime program first loads. */
  5072. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5073. priv->ucode_data.len);
  5074. /* We return success when we resume from suspend and rf_kill is on. */
  5075. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  5076. return 0;
  5077. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5078. iwlcore_clear_stations_table(priv);
  5079. /* load bootstrap state machine,
  5080. * load bootstrap program into processor's memory,
  5081. * prepare to load the "initialize" uCode */
  5082. rc = iwl4965_load_bsm(priv);
  5083. if (rc) {
  5084. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5085. continue;
  5086. }
  5087. /* start card; "initialize" will load runtime ucode */
  5088. iwl4965_nic_start(priv);
  5089. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5090. return 0;
  5091. }
  5092. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5093. __iwl4965_down(priv);
  5094. /* tried to restart and config the device for as long as our
  5095. * patience could withstand */
  5096. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5097. return -EIO;
  5098. }
  5099. /*****************************************************************************
  5100. *
  5101. * Workqueue callbacks
  5102. *
  5103. *****************************************************************************/
  5104. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  5105. {
  5106. struct iwl_priv *priv =
  5107. container_of(data, struct iwl_priv, init_alive_start.work);
  5108. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5109. return;
  5110. mutex_lock(&priv->mutex);
  5111. iwl4965_init_alive_start(priv);
  5112. mutex_unlock(&priv->mutex);
  5113. }
  5114. static void iwl4965_bg_alive_start(struct work_struct *data)
  5115. {
  5116. struct iwl_priv *priv =
  5117. container_of(data, struct iwl_priv, alive_start.work);
  5118. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5119. return;
  5120. mutex_lock(&priv->mutex);
  5121. iwl4965_alive_start(priv);
  5122. mutex_unlock(&priv->mutex);
  5123. }
  5124. static void iwl4965_bg_rf_kill(struct work_struct *work)
  5125. {
  5126. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  5127. wake_up_interruptible(&priv->wait_command_queue);
  5128. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5129. return;
  5130. mutex_lock(&priv->mutex);
  5131. if (!iwl4965_is_rfkill(priv)) {
  5132. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5133. "HW and/or SW RF Kill no longer active, restarting "
  5134. "device\n");
  5135. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5136. queue_work(priv->workqueue, &priv->restart);
  5137. } else {
  5138. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5139. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5140. "disabled by SW switch\n");
  5141. else
  5142. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5143. "Kill switch must be turned off for "
  5144. "wireless networking to work.\n");
  5145. }
  5146. mutex_unlock(&priv->mutex);
  5147. }
  5148. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5149. static void iwl4965_bg_scan_check(struct work_struct *data)
  5150. {
  5151. struct iwl_priv *priv =
  5152. container_of(data, struct iwl_priv, scan_check.work);
  5153. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5154. return;
  5155. mutex_lock(&priv->mutex);
  5156. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5157. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5158. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5159. "Scan completion watchdog resetting adapter (%dms)\n",
  5160. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5161. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5162. iwl4965_send_scan_abort(priv);
  5163. }
  5164. mutex_unlock(&priv->mutex);
  5165. }
  5166. static void iwl4965_bg_request_scan(struct work_struct *data)
  5167. {
  5168. struct iwl_priv *priv =
  5169. container_of(data, struct iwl_priv, request_scan);
  5170. struct iwl4965_host_cmd cmd = {
  5171. .id = REPLY_SCAN_CMD,
  5172. .len = sizeof(struct iwl4965_scan_cmd),
  5173. .meta.flags = CMD_SIZE_HUGE,
  5174. };
  5175. int rc = 0;
  5176. struct iwl4965_scan_cmd *scan;
  5177. struct ieee80211_conf *conf = NULL;
  5178. u16 cmd_len;
  5179. enum ieee80211_band band;
  5180. u8 direct_mask;
  5181. conf = ieee80211_get_hw_conf(priv->hw);
  5182. mutex_lock(&priv->mutex);
  5183. if (!iwl4965_is_ready(priv)) {
  5184. IWL_WARNING("request scan called when driver not ready.\n");
  5185. goto done;
  5186. }
  5187. /* Make sure the scan wasn't cancelled before this queued work
  5188. * was given the chance to run... */
  5189. if (!test_bit(STATUS_SCANNING, &priv->status))
  5190. goto done;
  5191. /* This should never be called or scheduled if there is currently
  5192. * a scan active in the hardware. */
  5193. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5194. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5195. "Ignoring second request.\n");
  5196. rc = -EIO;
  5197. goto done;
  5198. }
  5199. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5200. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5201. goto done;
  5202. }
  5203. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5204. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5205. goto done;
  5206. }
  5207. if (iwl4965_is_rfkill(priv)) {
  5208. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5209. goto done;
  5210. }
  5211. if (!test_bit(STATUS_READY, &priv->status)) {
  5212. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5213. goto done;
  5214. }
  5215. if (!priv->scan_bands) {
  5216. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5217. goto done;
  5218. }
  5219. if (!priv->scan) {
  5220. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5221. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5222. if (!priv->scan) {
  5223. rc = -ENOMEM;
  5224. goto done;
  5225. }
  5226. }
  5227. scan = priv->scan;
  5228. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5229. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5230. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5231. if (iwl4965_is_associated(priv)) {
  5232. u16 interval = 0;
  5233. u32 extra;
  5234. u32 suspend_time = 100;
  5235. u32 scan_suspend_time = 100;
  5236. unsigned long flags;
  5237. IWL_DEBUG_INFO("Scanning while associated...\n");
  5238. spin_lock_irqsave(&priv->lock, flags);
  5239. interval = priv->beacon_int;
  5240. spin_unlock_irqrestore(&priv->lock, flags);
  5241. scan->suspend_time = 0;
  5242. scan->max_out_time = cpu_to_le32(200 * 1024);
  5243. if (!interval)
  5244. interval = suspend_time;
  5245. extra = (suspend_time / interval) << 22;
  5246. scan_suspend_time = (extra |
  5247. ((suspend_time % interval) * 1024));
  5248. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5249. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5250. scan_suspend_time, interval);
  5251. }
  5252. /* We should add the ability for user to lock to PASSIVE ONLY */
  5253. if (priv->one_direct_scan) {
  5254. IWL_DEBUG_SCAN
  5255. ("Kicking off one direct scan for '%s'\n",
  5256. iwl4965_escape_essid(priv->direct_ssid,
  5257. priv->direct_ssid_len));
  5258. scan->direct_scan[0].id = WLAN_EID_SSID;
  5259. scan->direct_scan[0].len = priv->direct_ssid_len;
  5260. memcpy(scan->direct_scan[0].ssid,
  5261. priv->direct_ssid, priv->direct_ssid_len);
  5262. direct_mask = 1;
  5263. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5264. scan->direct_scan[0].id = WLAN_EID_SSID;
  5265. scan->direct_scan[0].len = priv->essid_len;
  5266. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5267. direct_mask = 1;
  5268. } else
  5269. direct_mask = 0;
  5270. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5271. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5272. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5273. switch (priv->scan_bands) {
  5274. case 2:
  5275. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5276. scan->tx_cmd.rate_n_flags =
  5277. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5278. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5279. scan->good_CRC_th = 0;
  5280. band = IEEE80211_BAND_2GHZ;
  5281. break;
  5282. case 1:
  5283. scan->tx_cmd.rate_n_flags =
  5284. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5285. RATE_MCS_ANT_B_MSK);
  5286. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5287. band = IEEE80211_BAND_5GHZ;
  5288. break;
  5289. default:
  5290. IWL_WARNING("Invalid scan band count\n");
  5291. goto done;
  5292. }
  5293. /* We don't build a direct scan probe request; the uCode will do
  5294. * that based on the direct_mask added to each channel entry */
  5295. cmd_len = iwl4965_fill_probe_req(priv, band,
  5296. (struct ieee80211_mgmt *)scan->data,
  5297. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
  5298. scan->tx_cmd.len = cpu_to_le16(cmd_len);
  5299. /* select Rx chains */
  5300. /* Force use of chains B and C (0x6) for scan Rx.
  5301. * Avoid A (0x1) because of its off-channel reception on A-band.
  5302. * MIMO is not used here, but value is required to make uCode happy. */
  5303. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5304. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5305. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5306. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5307. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5308. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5309. if (direct_mask) {
  5310. IWL_DEBUG_SCAN
  5311. ("Initiating direct scan for %s.\n",
  5312. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5313. scan->channel_count =
  5314. iwl4965_get_channels_for_scan(
  5315. priv, band, 1, /* active */
  5316. direct_mask,
  5317. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5318. } else {
  5319. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5320. scan->channel_count =
  5321. iwl4965_get_channels_for_scan(
  5322. priv, band, 0, /* passive */
  5323. direct_mask,
  5324. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5325. }
  5326. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5327. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5328. cmd.data = scan;
  5329. scan->len = cpu_to_le16(cmd.len);
  5330. set_bit(STATUS_SCAN_HW, &priv->status);
  5331. rc = iwl4965_send_cmd_sync(priv, &cmd);
  5332. if (rc)
  5333. goto done;
  5334. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5335. IWL_SCAN_CHECK_WATCHDOG);
  5336. mutex_unlock(&priv->mutex);
  5337. return;
  5338. done:
  5339. /* inform mac80211 scan aborted */
  5340. queue_work(priv->workqueue, &priv->scan_completed);
  5341. mutex_unlock(&priv->mutex);
  5342. }
  5343. static void iwl4965_bg_up(struct work_struct *data)
  5344. {
  5345. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  5346. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5347. return;
  5348. mutex_lock(&priv->mutex);
  5349. __iwl4965_up(priv);
  5350. mutex_unlock(&priv->mutex);
  5351. }
  5352. static void iwl4965_bg_restart(struct work_struct *data)
  5353. {
  5354. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  5355. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5356. return;
  5357. iwl4965_down(priv);
  5358. queue_work(priv->workqueue, &priv->up);
  5359. }
  5360. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  5361. {
  5362. struct iwl_priv *priv =
  5363. container_of(data, struct iwl_priv, rx_replenish);
  5364. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5365. return;
  5366. mutex_lock(&priv->mutex);
  5367. iwl4965_rx_replenish(priv);
  5368. mutex_unlock(&priv->mutex);
  5369. }
  5370. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  5371. static void iwl4965_bg_post_associate(struct work_struct *data)
  5372. {
  5373. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5374. post_associate.work);
  5375. int rc = 0;
  5376. struct ieee80211_conf *conf = NULL;
  5377. DECLARE_MAC_BUF(mac);
  5378. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5379. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5380. return;
  5381. }
  5382. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5383. priv->assoc_id,
  5384. print_mac(mac, priv->active_rxon.bssid_addr));
  5385. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5386. return;
  5387. mutex_lock(&priv->mutex);
  5388. if (!priv->vif || !priv->is_open) {
  5389. mutex_unlock(&priv->mutex);
  5390. return;
  5391. }
  5392. iwl4965_scan_cancel_timeout(priv, 200);
  5393. conf = ieee80211_get_hw_conf(priv->hw);
  5394. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5395. iwl4965_commit_rxon(priv);
  5396. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5397. iwl4965_setup_rxon_timing(priv);
  5398. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5399. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5400. if (rc)
  5401. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5402. "Attempting to continue.\n");
  5403. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5404. #ifdef CONFIG_IWL4965_HT
  5405. if (priv->current_ht_config.is_ht)
  5406. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  5407. #endif /* CONFIG_IWL4965_HT*/
  5408. iwl4965_set_rxon_chain(priv);
  5409. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5410. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5411. priv->assoc_id, priv->beacon_int);
  5412. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5413. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5414. else
  5415. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5416. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5417. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5418. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5419. else
  5420. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5421. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5422. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5423. }
  5424. iwl4965_commit_rxon(priv);
  5425. switch (priv->iw_mode) {
  5426. case IEEE80211_IF_TYPE_STA:
  5427. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  5428. break;
  5429. case IEEE80211_IF_TYPE_IBSS:
  5430. /* clear out the station table */
  5431. iwlcore_clear_stations_table(priv);
  5432. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5433. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  5434. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  5435. iwl4965_send_beacon_cmd(priv);
  5436. break;
  5437. default:
  5438. IWL_ERROR("%s Should not be called in %d mode\n",
  5439. __FUNCTION__, priv->iw_mode);
  5440. break;
  5441. }
  5442. iwl4965_sequence_reset(priv);
  5443. #ifdef CONFIG_IWL4965_SENSITIVITY
  5444. /* Enable Rx differential gain and sensitivity calibrations */
  5445. iwl4965_chain_noise_reset(priv);
  5446. priv->start_calib = 1;
  5447. #endif /* CONFIG_IWL4965_SENSITIVITY */
  5448. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5449. priv->assoc_station_added = 1;
  5450. iwl4965_activate_qos(priv, 0);
  5451. /* we have just associated, don't start scan too early */
  5452. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  5453. mutex_unlock(&priv->mutex);
  5454. }
  5455. static void iwl4965_bg_abort_scan(struct work_struct *work)
  5456. {
  5457. struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
  5458. if (!iwl4965_is_ready(priv))
  5459. return;
  5460. mutex_lock(&priv->mutex);
  5461. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5462. iwl4965_send_scan_abort(priv);
  5463. mutex_unlock(&priv->mutex);
  5464. }
  5465. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  5466. static void iwl4965_bg_scan_completed(struct work_struct *work)
  5467. {
  5468. struct iwl_priv *priv =
  5469. container_of(work, struct iwl_priv, scan_completed);
  5470. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5471. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5472. return;
  5473. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  5474. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  5475. ieee80211_scan_completed(priv->hw);
  5476. /* Since setting the TXPOWER may have been deferred while
  5477. * performing the scan, fire one off */
  5478. mutex_lock(&priv->mutex);
  5479. iwl4965_hw_reg_send_txpower(priv);
  5480. mutex_unlock(&priv->mutex);
  5481. }
  5482. /*****************************************************************************
  5483. *
  5484. * mac80211 entry point functions
  5485. *
  5486. *****************************************************************************/
  5487. #define UCODE_READY_TIMEOUT (2 * HZ)
  5488. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  5489. {
  5490. struct iwl_priv *priv = hw->priv;
  5491. int ret;
  5492. IWL_DEBUG_MAC80211("enter\n");
  5493. if (pci_enable_device(priv->pci_dev)) {
  5494. IWL_ERROR("Fail to pci_enable_device\n");
  5495. return -ENODEV;
  5496. }
  5497. pci_restore_state(priv->pci_dev);
  5498. pci_enable_msi(priv->pci_dev);
  5499. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  5500. DRV_NAME, priv);
  5501. if (ret) {
  5502. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  5503. goto out_disable_msi;
  5504. }
  5505. /* we should be verifying the device is ready to be opened */
  5506. mutex_lock(&priv->mutex);
  5507. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  5508. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  5509. * ucode filename and max sizes are card-specific. */
  5510. if (!priv->ucode_code.len) {
  5511. ret = iwl4965_read_ucode(priv);
  5512. if (ret) {
  5513. IWL_ERROR("Could not read microcode: %d\n", ret);
  5514. mutex_unlock(&priv->mutex);
  5515. goto out_release_irq;
  5516. }
  5517. }
  5518. ret = __iwl4965_up(priv);
  5519. mutex_unlock(&priv->mutex);
  5520. if (ret)
  5521. goto out_release_irq;
  5522. IWL_DEBUG_INFO("Start UP work done.\n");
  5523. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  5524. return 0;
  5525. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  5526. * mac80211 will not be run successfully. */
  5527. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  5528. test_bit(STATUS_READY, &priv->status),
  5529. UCODE_READY_TIMEOUT);
  5530. if (!ret) {
  5531. if (!test_bit(STATUS_READY, &priv->status)) {
  5532. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  5533. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  5534. ret = -ETIMEDOUT;
  5535. goto out_release_irq;
  5536. }
  5537. }
  5538. priv->is_open = 1;
  5539. IWL_DEBUG_MAC80211("leave\n");
  5540. return 0;
  5541. out_release_irq:
  5542. free_irq(priv->pci_dev->irq, priv);
  5543. out_disable_msi:
  5544. pci_disable_msi(priv->pci_dev);
  5545. pci_disable_device(priv->pci_dev);
  5546. priv->is_open = 0;
  5547. IWL_DEBUG_MAC80211("leave - failed\n");
  5548. return ret;
  5549. }
  5550. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  5551. {
  5552. struct iwl_priv *priv = hw->priv;
  5553. IWL_DEBUG_MAC80211("enter\n");
  5554. if (!priv->is_open) {
  5555. IWL_DEBUG_MAC80211("leave - skip\n");
  5556. return;
  5557. }
  5558. priv->is_open = 0;
  5559. if (iwl4965_is_ready_rf(priv)) {
  5560. /* stop mac, cancel any scan request and clear
  5561. * RXON_FILTER_ASSOC_MSK BIT
  5562. */
  5563. mutex_lock(&priv->mutex);
  5564. iwl4965_scan_cancel_timeout(priv, 100);
  5565. cancel_delayed_work(&priv->post_associate);
  5566. mutex_unlock(&priv->mutex);
  5567. }
  5568. iwl4965_down(priv);
  5569. flush_workqueue(priv->workqueue);
  5570. free_irq(priv->pci_dev->irq, priv);
  5571. pci_disable_msi(priv->pci_dev);
  5572. pci_save_state(priv->pci_dev);
  5573. pci_disable_device(priv->pci_dev);
  5574. IWL_DEBUG_MAC80211("leave\n");
  5575. }
  5576. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5577. struct ieee80211_tx_control *ctl)
  5578. {
  5579. struct iwl_priv *priv = hw->priv;
  5580. IWL_DEBUG_MAC80211("enter\n");
  5581. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5582. IWL_DEBUG_MAC80211("leave - monitor\n");
  5583. return -1;
  5584. }
  5585. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5586. ctl->tx_rate->bitrate);
  5587. if (iwl4965_tx_skb(priv, skb, ctl))
  5588. dev_kfree_skb_any(skb);
  5589. IWL_DEBUG_MAC80211("leave\n");
  5590. return 0;
  5591. }
  5592. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  5593. struct ieee80211_if_init_conf *conf)
  5594. {
  5595. struct iwl_priv *priv = hw->priv;
  5596. unsigned long flags;
  5597. DECLARE_MAC_BUF(mac);
  5598. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  5599. if (priv->vif) {
  5600. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  5601. return -EOPNOTSUPP;
  5602. }
  5603. spin_lock_irqsave(&priv->lock, flags);
  5604. priv->vif = conf->vif;
  5605. spin_unlock_irqrestore(&priv->lock, flags);
  5606. mutex_lock(&priv->mutex);
  5607. if (conf->mac_addr) {
  5608. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  5609. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  5610. }
  5611. if (iwl4965_is_ready(priv))
  5612. iwl4965_set_mode(priv, conf->type);
  5613. mutex_unlock(&priv->mutex);
  5614. IWL_DEBUG_MAC80211("leave\n");
  5615. return 0;
  5616. }
  5617. /**
  5618. * iwl4965_mac_config - mac80211 config callback
  5619. *
  5620. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  5621. * be set inappropriately and the driver currently sets the hardware up to
  5622. * use it whenever needed.
  5623. */
  5624. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  5625. {
  5626. struct iwl_priv *priv = hw->priv;
  5627. const struct iwl_channel_info *ch_info;
  5628. unsigned long flags;
  5629. int ret = 0;
  5630. mutex_lock(&priv->mutex);
  5631. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  5632. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  5633. if (!iwl4965_is_ready(priv)) {
  5634. IWL_DEBUG_MAC80211("leave - not ready\n");
  5635. ret = -EIO;
  5636. goto out;
  5637. }
  5638. if (unlikely(!iwl4965_mod_params.disable_hw_scan &&
  5639. test_bit(STATUS_SCANNING, &priv->status))) {
  5640. IWL_DEBUG_MAC80211("leave - scanning\n");
  5641. set_bit(STATUS_CONF_PENDING, &priv->status);
  5642. mutex_unlock(&priv->mutex);
  5643. return 0;
  5644. }
  5645. spin_lock_irqsave(&priv->lock, flags);
  5646. ch_info = iwl4965_get_channel_info(priv, conf->channel->band,
  5647. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5648. if (!is_channel_valid(ch_info)) {
  5649. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  5650. spin_unlock_irqrestore(&priv->lock, flags);
  5651. ret = -EINVAL;
  5652. goto out;
  5653. }
  5654. #ifdef CONFIG_IWL4965_HT
  5655. /* if we are switching from ht to 2.4 clear flags
  5656. * from any ht related info since 2.4 does not
  5657. * support ht */
  5658. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
  5659. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5660. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  5661. #endif
  5662. )
  5663. priv->staging_rxon.flags = 0;
  5664. #endif /* CONFIG_IWL4965_HT */
  5665. iwlcore_set_rxon_channel(priv, conf->channel->band,
  5666. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5667. iwl4965_set_flags_for_phymode(priv, conf->channel->band);
  5668. /* The list of supported rates and rate mask can be different
  5669. * for each band; since the band may have changed, reset
  5670. * the rate mask to what mac80211 lists */
  5671. iwl4965_set_rate(priv);
  5672. spin_unlock_irqrestore(&priv->lock, flags);
  5673. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5674. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  5675. iwl4965_hw_channel_switch(priv, conf->channel);
  5676. goto out;
  5677. }
  5678. #endif
  5679. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  5680. if (!conf->radio_enabled) {
  5681. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  5682. goto out;
  5683. }
  5684. if (iwl4965_is_rfkill(priv)) {
  5685. IWL_DEBUG_MAC80211("leave - RF kill\n");
  5686. ret = -EIO;
  5687. goto out;
  5688. }
  5689. iwl4965_set_rate(priv);
  5690. if (memcmp(&priv->active_rxon,
  5691. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  5692. iwl4965_commit_rxon(priv);
  5693. else
  5694. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  5695. IWL_DEBUG_MAC80211("leave\n");
  5696. out:
  5697. clear_bit(STATUS_CONF_PENDING, &priv->status);
  5698. mutex_unlock(&priv->mutex);
  5699. return ret;
  5700. }
  5701. static void iwl4965_config_ap(struct iwl_priv *priv)
  5702. {
  5703. int rc = 0;
  5704. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5705. return;
  5706. /* The following should be done only at AP bring up */
  5707. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  5708. /* RXON - unassoc (to set timing command) */
  5709. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5710. iwl4965_commit_rxon(priv);
  5711. /* RXON Timing */
  5712. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5713. iwl4965_setup_rxon_timing(priv);
  5714. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5715. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5716. if (rc)
  5717. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5718. "Attempting to continue.\n");
  5719. iwl4965_set_rxon_chain(priv);
  5720. /* FIXME: what should be the assoc_id for AP? */
  5721. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5722. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5723. priv->staging_rxon.flags |=
  5724. RXON_FLG_SHORT_PREAMBLE_MSK;
  5725. else
  5726. priv->staging_rxon.flags &=
  5727. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5728. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5729. if (priv->assoc_capability &
  5730. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5731. priv->staging_rxon.flags |=
  5732. RXON_FLG_SHORT_SLOT_MSK;
  5733. else
  5734. priv->staging_rxon.flags &=
  5735. ~RXON_FLG_SHORT_SLOT_MSK;
  5736. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5737. priv->staging_rxon.flags &=
  5738. ~RXON_FLG_SHORT_SLOT_MSK;
  5739. }
  5740. /* restore RXON assoc */
  5741. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5742. iwl4965_commit_rxon(priv);
  5743. iwl4965_activate_qos(priv, 1);
  5744. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5745. }
  5746. iwl4965_send_beacon_cmd(priv);
  5747. /* FIXME - we need to add code here to detect a totally new
  5748. * configuration, reset the AP, unassoc, rxon timing, assoc,
  5749. * clear sta table, add BCAST sta... */
  5750. }
  5751. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  5752. struct ieee80211_vif *vif,
  5753. struct ieee80211_if_conf *conf)
  5754. {
  5755. struct iwl_priv *priv = hw->priv;
  5756. DECLARE_MAC_BUF(mac);
  5757. unsigned long flags;
  5758. int rc;
  5759. if (conf == NULL)
  5760. return -EIO;
  5761. if (priv->vif != vif) {
  5762. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  5763. mutex_unlock(&priv->mutex);
  5764. return 0;
  5765. }
  5766. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  5767. (!conf->beacon || !conf->ssid_len)) {
  5768. IWL_DEBUG_MAC80211
  5769. ("Leaving in AP mode because HostAPD is not ready.\n");
  5770. return 0;
  5771. }
  5772. if (!iwl4965_is_alive(priv))
  5773. return -EAGAIN;
  5774. mutex_lock(&priv->mutex);
  5775. if (conf->bssid)
  5776. IWL_DEBUG_MAC80211("bssid: %s\n",
  5777. print_mac(mac, conf->bssid));
  5778. /*
  5779. * very dubious code was here; the probe filtering flag is never set:
  5780. *
  5781. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  5782. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  5783. */
  5784. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5785. if (!conf->bssid) {
  5786. conf->bssid = priv->mac_addr;
  5787. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  5788. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  5789. print_mac(mac, conf->bssid));
  5790. }
  5791. if (priv->ibss_beacon)
  5792. dev_kfree_skb(priv->ibss_beacon);
  5793. priv->ibss_beacon = conf->beacon;
  5794. }
  5795. if (iwl4965_is_rfkill(priv))
  5796. goto done;
  5797. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  5798. !is_multicast_ether_addr(conf->bssid)) {
  5799. /* If there is currently a HW scan going on in the background
  5800. * then we need to cancel it else the RXON below will fail. */
  5801. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  5802. IWL_WARNING("Aborted scan still in progress "
  5803. "after 100ms\n");
  5804. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  5805. mutex_unlock(&priv->mutex);
  5806. return -EAGAIN;
  5807. }
  5808. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  5809. /* TODO: Audit driver for usage of these members and see
  5810. * if mac80211 deprecates them (priv->bssid looks like it
  5811. * shouldn't be there, but I haven't scanned the IBSS code
  5812. * to verify) - jpk */
  5813. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  5814. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5815. iwl4965_config_ap(priv);
  5816. else {
  5817. rc = iwl4965_commit_rxon(priv);
  5818. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  5819. iwl4965_rxon_add_station(
  5820. priv, priv->active_rxon.bssid_addr, 1);
  5821. }
  5822. } else {
  5823. iwl4965_scan_cancel_timeout(priv, 100);
  5824. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5825. iwl4965_commit_rxon(priv);
  5826. }
  5827. done:
  5828. spin_lock_irqsave(&priv->lock, flags);
  5829. if (!conf->ssid_len)
  5830. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5831. else
  5832. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  5833. priv->essid_len = conf->ssid_len;
  5834. spin_unlock_irqrestore(&priv->lock, flags);
  5835. IWL_DEBUG_MAC80211("leave\n");
  5836. mutex_unlock(&priv->mutex);
  5837. return 0;
  5838. }
  5839. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  5840. unsigned int changed_flags,
  5841. unsigned int *total_flags,
  5842. int mc_count, struct dev_addr_list *mc_list)
  5843. {
  5844. /*
  5845. * XXX: dummy
  5846. * see also iwl4965_connection_init_rx_config
  5847. */
  5848. *total_flags = 0;
  5849. }
  5850. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  5851. struct ieee80211_if_init_conf *conf)
  5852. {
  5853. struct iwl_priv *priv = hw->priv;
  5854. IWL_DEBUG_MAC80211("enter\n");
  5855. mutex_lock(&priv->mutex);
  5856. if (iwl4965_is_ready_rf(priv)) {
  5857. iwl4965_scan_cancel_timeout(priv, 100);
  5858. cancel_delayed_work(&priv->post_associate);
  5859. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5860. iwl4965_commit_rxon(priv);
  5861. }
  5862. if (priv->vif == conf->vif) {
  5863. priv->vif = NULL;
  5864. memset(priv->bssid, 0, ETH_ALEN);
  5865. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5866. priv->essid_len = 0;
  5867. }
  5868. mutex_unlock(&priv->mutex);
  5869. IWL_DEBUG_MAC80211("leave\n");
  5870. }
  5871. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  5872. struct ieee80211_vif *vif,
  5873. struct ieee80211_bss_conf *bss_conf,
  5874. u32 changes)
  5875. {
  5876. struct iwl_priv *priv = hw->priv;
  5877. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  5878. if (bss_conf->use_short_preamble)
  5879. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5880. else
  5881. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5882. }
  5883. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  5884. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  5885. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  5886. else
  5887. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  5888. }
  5889. if (changes & BSS_CHANGED_ASSOC) {
  5890. /*
  5891. * TODO:
  5892. * do stuff instead of sniffing assoc resp
  5893. */
  5894. }
  5895. if (iwl4965_is_associated(priv))
  5896. iwl4965_send_rxon_assoc(priv);
  5897. }
  5898. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  5899. {
  5900. int rc = 0;
  5901. unsigned long flags;
  5902. struct iwl_priv *priv = hw->priv;
  5903. IWL_DEBUG_MAC80211("enter\n");
  5904. mutex_lock(&priv->mutex);
  5905. spin_lock_irqsave(&priv->lock, flags);
  5906. if (!iwl4965_is_ready_rf(priv)) {
  5907. rc = -EIO;
  5908. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  5909. goto out_unlock;
  5910. }
  5911. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  5912. rc = -EIO;
  5913. IWL_ERROR("ERROR: APs don't scan\n");
  5914. goto out_unlock;
  5915. }
  5916. /* we don't schedule scan within next_scan_jiffies period */
  5917. if (priv->next_scan_jiffies &&
  5918. time_after(priv->next_scan_jiffies, jiffies)) {
  5919. rc = -EAGAIN;
  5920. goto out_unlock;
  5921. }
  5922. /* if we just finished scan ask for delay */
  5923. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  5924. IWL_DELAY_NEXT_SCAN, jiffies)) {
  5925. rc = -EAGAIN;
  5926. goto out_unlock;
  5927. }
  5928. if (len) {
  5929. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  5930. iwl4965_escape_essid(ssid, len), (int)len);
  5931. priv->one_direct_scan = 1;
  5932. priv->direct_ssid_len = (u8)
  5933. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  5934. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  5935. } else
  5936. priv->one_direct_scan = 0;
  5937. rc = iwl4965_scan_initiate(priv);
  5938. IWL_DEBUG_MAC80211("leave\n");
  5939. out_unlock:
  5940. spin_unlock_irqrestore(&priv->lock, flags);
  5941. mutex_unlock(&priv->mutex);
  5942. return rc;
  5943. }
  5944. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  5945. const u8 *local_addr, const u8 *addr,
  5946. struct ieee80211_key_conf *key)
  5947. {
  5948. struct iwl_priv *priv = hw->priv;
  5949. DECLARE_MAC_BUF(mac);
  5950. int ret = 0;
  5951. u8 sta_id = IWL_INVALID_STATION;
  5952. u8 static_key;
  5953. IWL_DEBUG_MAC80211("enter\n");
  5954. if (!iwl4965_mod_params.hw_crypto) {
  5955. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  5956. return -EOPNOTSUPP;
  5957. }
  5958. if (is_zero_ether_addr(addr))
  5959. /* only support pairwise keys */
  5960. return -EOPNOTSUPP;
  5961. /* FIXME: need to differenciate between static and dynamic key
  5962. * in the level of mac80211 */
  5963. static_key = !iwl4965_is_associated(priv);
  5964. if (!static_key) {
  5965. sta_id = iwl4965_hw_find_station(priv, addr);
  5966. if (sta_id == IWL_INVALID_STATION) {
  5967. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  5968. print_mac(mac, addr));
  5969. return -EINVAL;
  5970. }
  5971. }
  5972. iwl4965_scan_cancel_timeout(priv, 100);
  5973. switch (cmd) {
  5974. case SET_KEY:
  5975. if (static_key)
  5976. ret = iwl4965_set_static_key(priv, key);
  5977. else
  5978. ret = iwl4965_set_dynamic_key(priv, key, sta_id);
  5979. IWL_DEBUG_MAC80211("enable hwcrypto key\n");
  5980. break;
  5981. case DISABLE_KEY:
  5982. if (static_key)
  5983. ret = iwl4965_remove_static_key(priv);
  5984. else
  5985. ret = iwl4965_clear_sta_key_info(priv, sta_id);
  5986. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  5987. break;
  5988. default:
  5989. ret = -EINVAL;
  5990. }
  5991. IWL_DEBUG_MAC80211("leave\n");
  5992. return ret;
  5993. }
  5994. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  5995. const struct ieee80211_tx_queue_params *params)
  5996. {
  5997. struct iwl_priv *priv = hw->priv;
  5998. unsigned long flags;
  5999. int q;
  6000. IWL_DEBUG_MAC80211("enter\n");
  6001. if (!iwl4965_is_ready_rf(priv)) {
  6002. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6003. return -EIO;
  6004. }
  6005. if (queue >= AC_NUM) {
  6006. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6007. return 0;
  6008. }
  6009. if (!priv->qos_data.qos_enable) {
  6010. priv->qos_data.qos_active = 0;
  6011. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6012. return 0;
  6013. }
  6014. q = AC_NUM - 1 - queue;
  6015. spin_lock_irqsave(&priv->lock, flags);
  6016. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6017. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6018. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6019. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6020. cpu_to_le16((params->txop * 32));
  6021. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6022. priv->qos_data.qos_active = 1;
  6023. spin_unlock_irqrestore(&priv->lock, flags);
  6024. mutex_lock(&priv->mutex);
  6025. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6026. iwl4965_activate_qos(priv, 1);
  6027. else if (priv->assoc_id && iwl4965_is_associated(priv))
  6028. iwl4965_activate_qos(priv, 0);
  6029. mutex_unlock(&priv->mutex);
  6030. IWL_DEBUG_MAC80211("leave\n");
  6031. return 0;
  6032. }
  6033. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  6034. struct ieee80211_tx_queue_stats *stats)
  6035. {
  6036. struct iwl_priv *priv = hw->priv;
  6037. int i, avail;
  6038. struct iwl4965_tx_queue *txq;
  6039. struct iwl4965_queue *q;
  6040. unsigned long flags;
  6041. IWL_DEBUG_MAC80211("enter\n");
  6042. if (!iwl4965_is_ready_rf(priv)) {
  6043. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6044. return -EIO;
  6045. }
  6046. spin_lock_irqsave(&priv->lock, flags);
  6047. for (i = 0; i < AC_NUM; i++) {
  6048. txq = &priv->txq[i];
  6049. q = &txq->q;
  6050. avail = iwl4965_queue_space(q);
  6051. stats->data[i].len = q->n_window - avail;
  6052. stats->data[i].limit = q->n_window - q->high_mark;
  6053. stats->data[i].count = q->n_window;
  6054. }
  6055. spin_unlock_irqrestore(&priv->lock, flags);
  6056. IWL_DEBUG_MAC80211("leave\n");
  6057. return 0;
  6058. }
  6059. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6060. struct ieee80211_low_level_stats *stats)
  6061. {
  6062. IWL_DEBUG_MAC80211("enter\n");
  6063. IWL_DEBUG_MAC80211("leave\n");
  6064. return 0;
  6065. }
  6066. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6067. {
  6068. IWL_DEBUG_MAC80211("enter\n");
  6069. IWL_DEBUG_MAC80211("leave\n");
  6070. return 0;
  6071. }
  6072. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6073. {
  6074. struct iwl_priv *priv = hw->priv;
  6075. unsigned long flags;
  6076. mutex_lock(&priv->mutex);
  6077. IWL_DEBUG_MAC80211("enter\n");
  6078. priv->lq_mngr.lq_ready = 0;
  6079. #ifdef CONFIG_IWL4965_HT
  6080. spin_lock_irqsave(&priv->lock, flags);
  6081. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  6082. spin_unlock_irqrestore(&priv->lock, flags);
  6083. #endif /* CONFIG_IWL4965_HT */
  6084. iwlcore_reset_qos(priv);
  6085. cancel_delayed_work(&priv->post_associate);
  6086. spin_lock_irqsave(&priv->lock, flags);
  6087. priv->assoc_id = 0;
  6088. priv->assoc_capability = 0;
  6089. priv->call_post_assoc_from_beacon = 0;
  6090. priv->assoc_station_added = 0;
  6091. /* new association get rid of ibss beacon skb */
  6092. if (priv->ibss_beacon)
  6093. dev_kfree_skb(priv->ibss_beacon);
  6094. priv->ibss_beacon = NULL;
  6095. priv->beacon_int = priv->hw->conf.beacon_int;
  6096. priv->timestamp1 = 0;
  6097. priv->timestamp0 = 0;
  6098. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6099. priv->beacon_int = 0;
  6100. spin_unlock_irqrestore(&priv->lock, flags);
  6101. if (!iwl4965_is_ready_rf(priv)) {
  6102. IWL_DEBUG_MAC80211("leave - not ready\n");
  6103. mutex_unlock(&priv->mutex);
  6104. return;
  6105. }
  6106. /* we are restarting association process
  6107. * clear RXON_FILTER_ASSOC_MSK bit
  6108. */
  6109. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6110. iwl4965_scan_cancel_timeout(priv, 100);
  6111. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6112. iwl4965_commit_rxon(priv);
  6113. }
  6114. /* Per mac80211.h: This is only used in IBSS mode... */
  6115. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6116. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6117. mutex_unlock(&priv->mutex);
  6118. return;
  6119. }
  6120. priv->only_active_channel = 0;
  6121. iwl4965_set_rate(priv);
  6122. mutex_unlock(&priv->mutex);
  6123. IWL_DEBUG_MAC80211("leave\n");
  6124. }
  6125. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6126. struct ieee80211_tx_control *control)
  6127. {
  6128. struct iwl_priv *priv = hw->priv;
  6129. unsigned long flags;
  6130. mutex_lock(&priv->mutex);
  6131. IWL_DEBUG_MAC80211("enter\n");
  6132. if (!iwl4965_is_ready_rf(priv)) {
  6133. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6134. mutex_unlock(&priv->mutex);
  6135. return -EIO;
  6136. }
  6137. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6138. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6139. mutex_unlock(&priv->mutex);
  6140. return -EIO;
  6141. }
  6142. spin_lock_irqsave(&priv->lock, flags);
  6143. if (priv->ibss_beacon)
  6144. dev_kfree_skb(priv->ibss_beacon);
  6145. priv->ibss_beacon = skb;
  6146. priv->assoc_id = 0;
  6147. IWL_DEBUG_MAC80211("leave\n");
  6148. spin_unlock_irqrestore(&priv->lock, flags);
  6149. iwlcore_reset_qos(priv);
  6150. queue_work(priv->workqueue, &priv->post_associate.work);
  6151. mutex_unlock(&priv->mutex);
  6152. return 0;
  6153. }
  6154. #ifdef CONFIG_IWL4965_HT
  6155. static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
  6156. struct iwl_priv *priv)
  6157. {
  6158. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  6159. struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
  6160. struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
  6161. IWL_DEBUG_MAC80211("enter: \n");
  6162. if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
  6163. iwl_conf->is_ht = 0;
  6164. return;
  6165. }
  6166. iwl_conf->is_ht = 1;
  6167. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6168. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  6169. iwl_conf->sgf |= 0x1;
  6170. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  6171. iwl_conf->sgf |= 0x2;
  6172. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  6173. iwl_conf->max_amsdu_size =
  6174. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  6175. iwl_conf->supported_chan_width =
  6176. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  6177. iwl_conf->extension_chan_offset =
  6178. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  6179. /* If no above or below channel supplied disable FAT channel */
  6180. if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
  6181. iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
  6182. iwl_conf->supported_chan_width = 0;
  6183. iwl_conf->tx_mimo_ps_mode =
  6184. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6185. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  6186. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  6187. iwl_conf->tx_chan_width =
  6188. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  6189. iwl_conf->ht_protection =
  6190. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  6191. iwl_conf->non_GF_STA_present =
  6192. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  6193. IWL_DEBUG_MAC80211("control channel %d\n",
  6194. iwl_conf->control_channel);
  6195. IWL_DEBUG_MAC80211("leave\n");
  6196. }
  6197. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6198. struct ieee80211_conf *conf)
  6199. {
  6200. struct iwl_priv *priv = hw->priv;
  6201. IWL_DEBUG_MAC80211("enter: \n");
  6202. iwl4965_ht_info_fill(conf, priv);
  6203. iwl4965_set_rxon_chain(priv);
  6204. if (priv && priv->assoc_id &&
  6205. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6206. unsigned long flags;
  6207. spin_lock_irqsave(&priv->lock, flags);
  6208. if (priv->beacon_int)
  6209. queue_work(priv->workqueue, &priv->post_associate.work);
  6210. else
  6211. priv->call_post_assoc_from_beacon = 1;
  6212. spin_unlock_irqrestore(&priv->lock, flags);
  6213. }
  6214. IWL_DEBUG_MAC80211("leave:\n");
  6215. return 0;
  6216. }
  6217. #endif /*CONFIG_IWL4965_HT*/
  6218. /*****************************************************************************
  6219. *
  6220. * sysfs attributes
  6221. *
  6222. *****************************************************************************/
  6223. #ifdef CONFIG_IWLWIFI_DEBUG
  6224. /*
  6225. * The following adds a new attribute to the sysfs representation
  6226. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6227. * used for controlling the debug level.
  6228. *
  6229. * See the level definitions in iwl for details.
  6230. */
  6231. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6232. {
  6233. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  6234. }
  6235. static ssize_t store_debug_level(struct device_driver *d,
  6236. const char *buf, size_t count)
  6237. {
  6238. char *p = (char *)buf;
  6239. u32 val;
  6240. val = simple_strtoul(p, &p, 0);
  6241. if (p == buf)
  6242. printk(KERN_INFO DRV_NAME
  6243. ": %s is not in hex or decimal form.\n", buf);
  6244. else
  6245. iwl_debug_level = val;
  6246. return strnlen(buf, count);
  6247. }
  6248. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6249. show_debug_level, store_debug_level);
  6250. #endif /* CONFIG_IWLWIFI_DEBUG */
  6251. static ssize_t show_rf_kill(struct device *d,
  6252. struct device_attribute *attr, char *buf)
  6253. {
  6254. /*
  6255. * 0 - RF kill not enabled
  6256. * 1 - SW based RF kill active (sysfs)
  6257. * 2 - HW based RF kill active
  6258. * 3 - Both HW and SW based RF kill active
  6259. */
  6260. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6261. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6262. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6263. return sprintf(buf, "%i\n", val);
  6264. }
  6265. static ssize_t store_rf_kill(struct device *d,
  6266. struct device_attribute *attr,
  6267. const char *buf, size_t count)
  6268. {
  6269. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6270. mutex_lock(&priv->mutex);
  6271. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  6272. mutex_unlock(&priv->mutex);
  6273. return count;
  6274. }
  6275. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6276. static ssize_t show_temperature(struct device *d,
  6277. struct device_attribute *attr, char *buf)
  6278. {
  6279. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6280. if (!iwl4965_is_alive(priv))
  6281. return -EAGAIN;
  6282. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6283. }
  6284. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6285. static ssize_t show_rs_window(struct device *d,
  6286. struct device_attribute *attr,
  6287. char *buf)
  6288. {
  6289. struct iwl_priv *priv = d->driver_data;
  6290. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6291. }
  6292. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6293. static ssize_t show_tx_power(struct device *d,
  6294. struct device_attribute *attr, char *buf)
  6295. {
  6296. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6297. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6298. }
  6299. static ssize_t store_tx_power(struct device *d,
  6300. struct device_attribute *attr,
  6301. const char *buf, size_t count)
  6302. {
  6303. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6304. char *p = (char *)buf;
  6305. u32 val;
  6306. val = simple_strtoul(p, &p, 10);
  6307. if (p == buf)
  6308. printk(KERN_INFO DRV_NAME
  6309. ": %s is not in decimal form.\n", buf);
  6310. else
  6311. iwl4965_hw_reg_set_txpower(priv, val);
  6312. return count;
  6313. }
  6314. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6315. static ssize_t show_flags(struct device *d,
  6316. struct device_attribute *attr, char *buf)
  6317. {
  6318. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6319. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6320. }
  6321. static ssize_t store_flags(struct device *d,
  6322. struct device_attribute *attr,
  6323. const char *buf, size_t count)
  6324. {
  6325. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6326. u32 flags = simple_strtoul(buf, NULL, 0);
  6327. mutex_lock(&priv->mutex);
  6328. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6329. /* Cancel any currently running scans... */
  6330. if (iwl4965_scan_cancel_timeout(priv, 100))
  6331. IWL_WARNING("Could not cancel scan.\n");
  6332. else {
  6333. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6334. flags);
  6335. priv->staging_rxon.flags = cpu_to_le32(flags);
  6336. iwl4965_commit_rxon(priv);
  6337. }
  6338. }
  6339. mutex_unlock(&priv->mutex);
  6340. return count;
  6341. }
  6342. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6343. static ssize_t show_filter_flags(struct device *d,
  6344. struct device_attribute *attr, char *buf)
  6345. {
  6346. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6347. return sprintf(buf, "0x%04X\n",
  6348. le32_to_cpu(priv->active_rxon.filter_flags));
  6349. }
  6350. static ssize_t store_filter_flags(struct device *d,
  6351. struct device_attribute *attr,
  6352. const char *buf, size_t count)
  6353. {
  6354. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6355. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6356. mutex_lock(&priv->mutex);
  6357. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6358. /* Cancel any currently running scans... */
  6359. if (iwl4965_scan_cancel_timeout(priv, 100))
  6360. IWL_WARNING("Could not cancel scan.\n");
  6361. else {
  6362. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6363. "0x%04X\n", filter_flags);
  6364. priv->staging_rxon.filter_flags =
  6365. cpu_to_le32(filter_flags);
  6366. iwl4965_commit_rxon(priv);
  6367. }
  6368. }
  6369. mutex_unlock(&priv->mutex);
  6370. return count;
  6371. }
  6372. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6373. store_filter_flags);
  6374. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6375. static ssize_t show_measurement(struct device *d,
  6376. struct device_attribute *attr, char *buf)
  6377. {
  6378. struct iwl_priv *priv = dev_get_drvdata(d);
  6379. struct iwl4965_spectrum_notification measure_report;
  6380. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6381. u8 *data = (u8 *) & measure_report;
  6382. unsigned long flags;
  6383. spin_lock_irqsave(&priv->lock, flags);
  6384. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6385. spin_unlock_irqrestore(&priv->lock, flags);
  6386. return 0;
  6387. }
  6388. memcpy(&measure_report, &priv->measure_report, size);
  6389. priv->measurement_status = 0;
  6390. spin_unlock_irqrestore(&priv->lock, flags);
  6391. while (size && (PAGE_SIZE - len)) {
  6392. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6393. PAGE_SIZE - len, 1);
  6394. len = strlen(buf);
  6395. if (PAGE_SIZE - len)
  6396. buf[len++] = '\n';
  6397. ofs += 16;
  6398. size -= min(size, 16U);
  6399. }
  6400. return len;
  6401. }
  6402. static ssize_t store_measurement(struct device *d,
  6403. struct device_attribute *attr,
  6404. const char *buf, size_t count)
  6405. {
  6406. struct iwl_priv *priv = dev_get_drvdata(d);
  6407. struct ieee80211_measurement_params params = {
  6408. .channel = le16_to_cpu(priv->active_rxon.channel),
  6409. .start_time = cpu_to_le64(priv->last_tsf),
  6410. .duration = cpu_to_le16(1),
  6411. };
  6412. u8 type = IWL_MEASURE_BASIC;
  6413. u8 buffer[32];
  6414. u8 channel;
  6415. if (count) {
  6416. char *p = buffer;
  6417. strncpy(buffer, buf, min(sizeof(buffer), count));
  6418. channel = simple_strtoul(p, NULL, 0);
  6419. if (channel)
  6420. params.channel = channel;
  6421. p = buffer;
  6422. while (*p && *p != ' ')
  6423. p++;
  6424. if (*p)
  6425. type = simple_strtoul(p + 1, NULL, 0);
  6426. }
  6427. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6428. "channel %d (for '%s')\n", type, params.channel, buf);
  6429. iwl4965_get_measurement(priv, &params, type);
  6430. return count;
  6431. }
  6432. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6433. show_measurement, store_measurement);
  6434. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  6435. static ssize_t store_retry_rate(struct device *d,
  6436. struct device_attribute *attr,
  6437. const char *buf, size_t count)
  6438. {
  6439. struct iwl_priv *priv = dev_get_drvdata(d);
  6440. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6441. if (priv->retry_rate <= 0)
  6442. priv->retry_rate = 1;
  6443. return count;
  6444. }
  6445. static ssize_t show_retry_rate(struct device *d,
  6446. struct device_attribute *attr, char *buf)
  6447. {
  6448. struct iwl_priv *priv = dev_get_drvdata(d);
  6449. return sprintf(buf, "%d", priv->retry_rate);
  6450. }
  6451. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6452. store_retry_rate);
  6453. static ssize_t store_power_level(struct device *d,
  6454. struct device_attribute *attr,
  6455. const char *buf, size_t count)
  6456. {
  6457. struct iwl_priv *priv = dev_get_drvdata(d);
  6458. int rc;
  6459. int mode;
  6460. mode = simple_strtoul(buf, NULL, 0);
  6461. mutex_lock(&priv->mutex);
  6462. if (!iwl4965_is_ready(priv)) {
  6463. rc = -EAGAIN;
  6464. goto out;
  6465. }
  6466. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6467. mode = IWL_POWER_AC;
  6468. else
  6469. mode |= IWL_POWER_ENABLED;
  6470. if (mode != priv->power_mode) {
  6471. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6472. if (rc) {
  6473. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6474. goto out;
  6475. }
  6476. priv->power_mode = mode;
  6477. }
  6478. rc = count;
  6479. out:
  6480. mutex_unlock(&priv->mutex);
  6481. return rc;
  6482. }
  6483. #define MAX_WX_STRING 80
  6484. /* Values are in microsecond */
  6485. static const s32 timeout_duration[] = {
  6486. 350000,
  6487. 250000,
  6488. 75000,
  6489. 37000,
  6490. 25000,
  6491. };
  6492. static const s32 period_duration[] = {
  6493. 400000,
  6494. 700000,
  6495. 1000000,
  6496. 1000000,
  6497. 1000000
  6498. };
  6499. static ssize_t show_power_level(struct device *d,
  6500. struct device_attribute *attr, char *buf)
  6501. {
  6502. struct iwl_priv *priv = dev_get_drvdata(d);
  6503. int level = IWL_POWER_LEVEL(priv->power_mode);
  6504. char *p = buf;
  6505. p += sprintf(p, "%d ", level);
  6506. switch (level) {
  6507. case IWL_POWER_MODE_CAM:
  6508. case IWL_POWER_AC:
  6509. p += sprintf(p, "(AC)");
  6510. break;
  6511. case IWL_POWER_BATTERY:
  6512. p += sprintf(p, "(BATTERY)");
  6513. break;
  6514. default:
  6515. p += sprintf(p,
  6516. "(Timeout %dms, Period %dms)",
  6517. timeout_duration[level - 1] / 1000,
  6518. period_duration[level - 1] / 1000);
  6519. }
  6520. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6521. p += sprintf(p, " OFF\n");
  6522. else
  6523. p += sprintf(p, " \n");
  6524. return (p - buf + 1);
  6525. }
  6526. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6527. store_power_level);
  6528. static ssize_t show_channels(struct device *d,
  6529. struct device_attribute *attr, char *buf)
  6530. {
  6531. /* all this shit doesn't belong into sysfs anyway */
  6532. return 0;
  6533. }
  6534. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6535. static ssize_t show_statistics(struct device *d,
  6536. struct device_attribute *attr, char *buf)
  6537. {
  6538. struct iwl_priv *priv = dev_get_drvdata(d);
  6539. u32 size = sizeof(struct iwl4965_notif_statistics);
  6540. u32 len = 0, ofs = 0;
  6541. u8 *data = (u8 *) & priv->statistics;
  6542. int rc = 0;
  6543. if (!iwl4965_is_alive(priv))
  6544. return -EAGAIN;
  6545. mutex_lock(&priv->mutex);
  6546. rc = iwl4965_send_statistics_request(priv);
  6547. mutex_unlock(&priv->mutex);
  6548. if (rc) {
  6549. len = sprintf(buf,
  6550. "Error sending statistics request: 0x%08X\n", rc);
  6551. return len;
  6552. }
  6553. while (size && (PAGE_SIZE - len)) {
  6554. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6555. PAGE_SIZE - len, 1);
  6556. len = strlen(buf);
  6557. if (PAGE_SIZE - len)
  6558. buf[len++] = '\n';
  6559. ofs += 16;
  6560. size -= min(size, 16U);
  6561. }
  6562. return len;
  6563. }
  6564. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6565. static ssize_t show_antenna(struct device *d,
  6566. struct device_attribute *attr, char *buf)
  6567. {
  6568. struct iwl_priv *priv = dev_get_drvdata(d);
  6569. if (!iwl4965_is_alive(priv))
  6570. return -EAGAIN;
  6571. return sprintf(buf, "%d\n", priv->antenna);
  6572. }
  6573. static ssize_t store_antenna(struct device *d,
  6574. struct device_attribute *attr,
  6575. const char *buf, size_t count)
  6576. {
  6577. int ant;
  6578. struct iwl_priv *priv = dev_get_drvdata(d);
  6579. if (count == 0)
  6580. return 0;
  6581. if (sscanf(buf, "%1i", &ant) != 1) {
  6582. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6583. return count;
  6584. }
  6585. if ((ant >= 0) && (ant <= 2)) {
  6586. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6587. priv->antenna = (enum iwl4965_antenna)ant;
  6588. } else
  6589. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  6590. return count;
  6591. }
  6592. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  6593. static ssize_t show_status(struct device *d,
  6594. struct device_attribute *attr, char *buf)
  6595. {
  6596. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6597. if (!iwl4965_is_alive(priv))
  6598. return -EAGAIN;
  6599. return sprintf(buf, "0x%08x\n", (int)priv->status);
  6600. }
  6601. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  6602. static ssize_t dump_error_log(struct device *d,
  6603. struct device_attribute *attr,
  6604. const char *buf, size_t count)
  6605. {
  6606. char *p = (char *)buf;
  6607. if (p[0] == '1')
  6608. iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  6609. return strnlen(buf, count);
  6610. }
  6611. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  6612. static ssize_t dump_event_log(struct device *d,
  6613. struct device_attribute *attr,
  6614. const char *buf, size_t count)
  6615. {
  6616. char *p = (char *)buf;
  6617. if (p[0] == '1')
  6618. iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  6619. return strnlen(buf, count);
  6620. }
  6621. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  6622. /*****************************************************************************
  6623. *
  6624. * driver setup and teardown
  6625. *
  6626. *****************************************************************************/
  6627. static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
  6628. {
  6629. priv->workqueue = create_workqueue(DRV_NAME);
  6630. init_waitqueue_head(&priv->wait_command_queue);
  6631. INIT_WORK(&priv->up, iwl4965_bg_up);
  6632. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  6633. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  6634. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  6635. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  6636. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  6637. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  6638. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  6639. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  6640. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  6641. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  6642. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  6643. iwl4965_hw_setup_deferred_work(priv);
  6644. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  6645. iwl4965_irq_tasklet, (unsigned long)priv);
  6646. }
  6647. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
  6648. {
  6649. iwl4965_hw_cancel_deferred_work(priv);
  6650. cancel_delayed_work_sync(&priv->init_alive_start);
  6651. cancel_delayed_work(&priv->scan_check);
  6652. cancel_delayed_work(&priv->alive_start);
  6653. cancel_delayed_work(&priv->post_associate);
  6654. cancel_work_sync(&priv->beacon_update);
  6655. }
  6656. static struct attribute *iwl4965_sysfs_entries[] = {
  6657. &dev_attr_antenna.attr,
  6658. &dev_attr_channels.attr,
  6659. &dev_attr_dump_errors.attr,
  6660. &dev_attr_dump_events.attr,
  6661. &dev_attr_flags.attr,
  6662. &dev_attr_filter_flags.attr,
  6663. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6664. &dev_attr_measurement.attr,
  6665. #endif
  6666. &dev_attr_power_level.attr,
  6667. &dev_attr_retry_rate.attr,
  6668. &dev_attr_rf_kill.attr,
  6669. &dev_attr_rs_window.attr,
  6670. &dev_attr_statistics.attr,
  6671. &dev_attr_status.attr,
  6672. &dev_attr_temperature.attr,
  6673. &dev_attr_tx_power.attr,
  6674. NULL
  6675. };
  6676. static struct attribute_group iwl4965_attribute_group = {
  6677. .name = NULL, /* put in device directory */
  6678. .attrs = iwl4965_sysfs_entries,
  6679. };
  6680. static struct ieee80211_ops iwl4965_hw_ops = {
  6681. .tx = iwl4965_mac_tx,
  6682. .start = iwl4965_mac_start,
  6683. .stop = iwl4965_mac_stop,
  6684. .add_interface = iwl4965_mac_add_interface,
  6685. .remove_interface = iwl4965_mac_remove_interface,
  6686. .config = iwl4965_mac_config,
  6687. .config_interface = iwl4965_mac_config_interface,
  6688. .configure_filter = iwl4965_configure_filter,
  6689. .set_key = iwl4965_mac_set_key,
  6690. .get_stats = iwl4965_mac_get_stats,
  6691. .get_tx_stats = iwl4965_mac_get_tx_stats,
  6692. .conf_tx = iwl4965_mac_conf_tx,
  6693. .get_tsf = iwl4965_mac_get_tsf,
  6694. .reset_tsf = iwl4965_mac_reset_tsf,
  6695. .beacon_update = iwl4965_mac_beacon_update,
  6696. .bss_info_changed = iwl4965_bss_info_changed,
  6697. #ifdef CONFIG_IWL4965_HT
  6698. .conf_ht = iwl4965_mac_conf_ht,
  6699. .ampdu_action = iwl4965_mac_ampdu_action,
  6700. #endif /* CONFIG_IWL4965_HT */
  6701. .hw_scan = iwl4965_mac_hw_scan
  6702. };
  6703. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  6704. {
  6705. int err = 0;
  6706. struct iwl_priv *priv;
  6707. struct ieee80211_hw *hw;
  6708. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  6709. DECLARE_MAC_BUF(mac);
  6710. /************************
  6711. * 1. Allocating HW data
  6712. ************************/
  6713. /* Disabling hardware scan means that mac80211 will perform scans
  6714. * "the hard way", rather than using device's scan. */
  6715. if (iwl4965_mod_params.disable_hw_scan) {
  6716. IWL_DEBUG_INFO("Disabling hw_scan\n");
  6717. iwl4965_hw_ops.hw_scan = NULL;
  6718. }
  6719. hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
  6720. if (!hw) {
  6721. err = -ENOMEM;
  6722. goto out;
  6723. }
  6724. priv = hw->priv;
  6725. /* At this point both hw and priv are allocated. */
  6726. SET_IEEE80211_DEV(hw, &pdev->dev);
  6727. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  6728. priv->cfg = cfg;
  6729. priv->pci_dev = pdev;
  6730. #ifdef CONFIG_IWLWIFI_DEBUG
  6731. iwl_debug_level = iwl4965_mod_params.debug;
  6732. atomic_set(&priv->restrict_refcnt, 0);
  6733. #endif
  6734. /**************************
  6735. * 2. Initializing PCI bus
  6736. **************************/
  6737. if (pci_enable_device(pdev)) {
  6738. err = -ENODEV;
  6739. goto out_ieee80211_free_hw;
  6740. }
  6741. pci_set_master(pdev);
  6742. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  6743. if (!err)
  6744. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  6745. if (err) {
  6746. printk(KERN_WARNING DRV_NAME
  6747. ": No suitable DMA available.\n");
  6748. goto out_pci_disable_device;
  6749. }
  6750. err = pci_request_regions(pdev, DRV_NAME);
  6751. if (err)
  6752. goto out_pci_disable_device;
  6753. pci_set_drvdata(pdev, priv);
  6754. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  6755. * PCI Tx retries from interfering with C3 CPU state */
  6756. pci_write_config_byte(pdev, 0x41, 0x00);
  6757. /***********************
  6758. * 3. Read REV register
  6759. ***********************/
  6760. priv->hw_base = pci_iomap(pdev, 0, 0);
  6761. if (!priv->hw_base) {
  6762. err = -ENODEV;
  6763. goto out_pci_release_regions;
  6764. }
  6765. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  6766. (unsigned long long) pci_resource_len(pdev, 0));
  6767. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  6768. printk(KERN_INFO DRV_NAME
  6769. ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
  6770. /*****************
  6771. * 4. Read EEPROM
  6772. *****************/
  6773. /* nic init */
  6774. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  6775. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  6776. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  6777. err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  6778. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  6779. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  6780. if (err < 0) {
  6781. IWL_DEBUG_INFO("Failed to init the card\n");
  6782. goto out_iounmap;
  6783. }
  6784. /* Read the EEPROM */
  6785. err = iwl_eeprom_init(priv);
  6786. if (err) {
  6787. IWL_ERROR("Unable to init EEPROM\n");
  6788. goto out_iounmap;
  6789. }
  6790. /* MAC Address location in EEPROM same for 3945/4965 */
  6791. iwl_eeprom_get_mac(priv, priv->mac_addr);
  6792. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  6793. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  6794. /************************
  6795. * 5. Setup HW constants
  6796. ************************/
  6797. /* Device-specific setup */
  6798. if (iwl4965_hw_set_hw_setting(priv)) {
  6799. IWL_ERROR("failed to set hw settings\n");
  6800. goto out_iounmap;
  6801. }
  6802. /*******************
  6803. * 6. Setup hw/priv
  6804. *******************/
  6805. err = iwl_setup(priv);
  6806. if (err)
  6807. goto out_unset_hw_settings;
  6808. /* At this point both hw and priv are initialized. */
  6809. /**********************************
  6810. * 7. Initialize module parameters
  6811. **********************************/
  6812. /* Disable radio (SW RF KILL) via parameter when loading driver */
  6813. if (iwl4965_mod_params.disable) {
  6814. set_bit(STATUS_RF_KILL_SW, &priv->status);
  6815. IWL_DEBUG_INFO("Radio disabled.\n");
  6816. }
  6817. if (iwl4965_mod_params.enable_qos)
  6818. priv->qos_data.qos_enable = 1;
  6819. /********************
  6820. * 8. Setup services
  6821. ********************/
  6822. iwl4965_disable_interrupts(priv);
  6823. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6824. if (err) {
  6825. IWL_ERROR("failed to create sysfs device attributes\n");
  6826. goto out_unset_hw_settings;
  6827. }
  6828. err = iwl_dbgfs_register(priv, DRV_NAME);
  6829. if (err) {
  6830. IWL_ERROR("failed to create debugfs files\n");
  6831. goto out_remove_sysfs;
  6832. }
  6833. iwl4965_setup_deferred_work(priv);
  6834. iwl4965_setup_rx_handlers(priv);
  6835. /********************
  6836. * 9. Conclude
  6837. ********************/
  6838. pci_save_state(pdev);
  6839. pci_disable_device(pdev);
  6840. return 0;
  6841. out_remove_sysfs:
  6842. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6843. out_unset_hw_settings:
  6844. iwl4965_unset_hw_setting(priv);
  6845. out_iounmap:
  6846. pci_iounmap(pdev, priv->hw_base);
  6847. out_pci_release_regions:
  6848. pci_release_regions(pdev);
  6849. pci_set_drvdata(pdev, NULL);
  6850. out_pci_disable_device:
  6851. pci_disable_device(pdev);
  6852. out_ieee80211_free_hw:
  6853. ieee80211_free_hw(priv->hw);
  6854. out:
  6855. return err;
  6856. }
  6857. static void iwl4965_pci_remove(struct pci_dev *pdev)
  6858. {
  6859. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6860. struct list_head *p, *q;
  6861. int i;
  6862. if (!priv)
  6863. return;
  6864. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  6865. set_bit(STATUS_EXIT_PENDING, &priv->status);
  6866. iwl4965_down(priv);
  6867. /* Free MAC hash list for ADHOC */
  6868. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  6869. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  6870. list_del(p);
  6871. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  6872. }
  6873. }
  6874. iwl_dbgfs_unregister(priv);
  6875. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6876. iwl4965_dealloc_ucode_pci(priv);
  6877. if (priv->rxq.bd)
  6878. iwl4965_rx_queue_free(priv, &priv->rxq);
  6879. iwl4965_hw_txq_ctx_free(priv);
  6880. iwl4965_unset_hw_setting(priv);
  6881. iwlcore_clear_stations_table(priv);
  6882. if (priv->mac80211_registered) {
  6883. ieee80211_unregister_hw(priv->hw);
  6884. iwl4965_rate_control_unregister(priv->hw);
  6885. }
  6886. /*netif_stop_queue(dev); */
  6887. flush_workqueue(priv->workqueue);
  6888. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  6889. * priv->workqueue... so we can't take down the workqueue
  6890. * until now... */
  6891. destroy_workqueue(priv->workqueue);
  6892. priv->workqueue = NULL;
  6893. pci_iounmap(pdev, priv->hw_base);
  6894. pci_release_regions(pdev);
  6895. pci_disable_device(pdev);
  6896. pci_set_drvdata(pdev, NULL);
  6897. iwl_free_channel_map(priv);
  6898. iwl4965_free_geos(priv);
  6899. if (priv->ibss_beacon)
  6900. dev_kfree_skb(priv->ibss_beacon);
  6901. ieee80211_free_hw(priv->hw);
  6902. }
  6903. #ifdef CONFIG_PM
  6904. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  6905. {
  6906. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6907. if (priv->is_open) {
  6908. set_bit(STATUS_IN_SUSPEND, &priv->status);
  6909. iwl4965_mac_stop(priv->hw);
  6910. priv->is_open = 1;
  6911. }
  6912. pci_set_power_state(pdev, PCI_D3hot);
  6913. return 0;
  6914. }
  6915. static int iwl4965_pci_resume(struct pci_dev *pdev)
  6916. {
  6917. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6918. pci_set_power_state(pdev, PCI_D0);
  6919. if (priv->is_open)
  6920. iwl4965_mac_start(priv->hw);
  6921. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  6922. return 0;
  6923. }
  6924. #endif /* CONFIG_PM */
  6925. /*****************************************************************************
  6926. *
  6927. * driver and module entry point
  6928. *
  6929. *****************************************************************************/
  6930. static struct pci_driver iwl4965_driver = {
  6931. .name = DRV_NAME,
  6932. .id_table = iwl4965_hw_card_ids,
  6933. .probe = iwl4965_pci_probe,
  6934. .remove = __devexit_p(iwl4965_pci_remove),
  6935. #ifdef CONFIG_PM
  6936. .suspend = iwl4965_pci_suspend,
  6937. .resume = iwl4965_pci_resume,
  6938. #endif
  6939. };
  6940. static int __init iwl4965_init(void)
  6941. {
  6942. int ret;
  6943. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  6944. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  6945. ret = pci_register_driver(&iwl4965_driver);
  6946. if (ret) {
  6947. IWL_ERROR("Unable to initialize PCI module\n");
  6948. return ret;
  6949. }
  6950. #ifdef CONFIG_IWLWIFI_DEBUG
  6951. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  6952. if (ret) {
  6953. IWL_ERROR("Unable to create driver sysfs file\n");
  6954. pci_unregister_driver(&iwl4965_driver);
  6955. return ret;
  6956. }
  6957. #endif
  6958. return ret;
  6959. }
  6960. static void __exit iwl4965_exit(void)
  6961. {
  6962. #ifdef CONFIG_IWLWIFI_DEBUG
  6963. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  6964. #endif
  6965. pci_unregister_driver(&iwl4965_driver);
  6966. }
  6967. module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
  6968. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  6969. module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
  6970. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  6971. module_param_named(hwcrypto, iwl4965_mod_params.hw_crypto, int, 0444);
  6972. MODULE_PARM_DESC(hwcrypto,
  6973. "using hardware crypto engine (default 0 [software])\n");
  6974. module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
  6975. MODULE_PARM_DESC(debug, "debug output mask");
  6976. module_param_named(
  6977. disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
  6978. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  6979. module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
  6980. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  6981. /* QoS */
  6982. module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
  6983. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  6984. module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
  6985. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  6986. module_exit(iwl4965_exit);
  6987. module_init(iwl4965_init);