sh_pfc.h 6.2 KB

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  1. /*
  2. * SuperH Pin Function Controller Support
  3. *
  4. * Copyright (c) 2008 Magnus Damm
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #ifndef __SH_PFC_H
  11. #define __SH_PFC_H
  12. #include <linux/stringify.h>
  13. #include <asm-generic/gpio.h>
  14. typedef unsigned short pinmux_enum_t;
  15. enum {
  16. PINMUX_TYPE_NONE,
  17. PINMUX_TYPE_FUNCTION,
  18. PINMUX_TYPE_GPIO,
  19. PINMUX_TYPE_OUTPUT,
  20. PINMUX_TYPE_INPUT,
  21. PINMUX_TYPE_INPUT_PULLUP,
  22. PINMUX_TYPE_INPUT_PULLDOWN,
  23. PINMUX_FLAG_TYPE, /* must be last */
  24. };
  25. #define PINMUX_FLAG_DBIT_SHIFT 5
  26. #define PINMUX_FLAG_DBIT (0x1f << PINMUX_FLAG_DBIT_SHIFT)
  27. #define PINMUX_FLAG_DREG_SHIFT 10
  28. #define PINMUX_FLAG_DREG (0x3f << PINMUX_FLAG_DREG_SHIFT)
  29. struct sh_pfc_pin {
  30. const pinmux_enum_t enum_id;
  31. unsigned short flags;
  32. const char *name;
  33. };
  34. struct pinmux_func {
  35. const pinmux_enum_t enum_id;
  36. const char *name;
  37. };
  38. #define PINMUX_GPIO(gpio, data_or_mark) \
  39. [gpio] = { \
  40. .name = __stringify(gpio), \
  41. .enum_id = data_or_mark, \
  42. .flags = PINMUX_TYPE_GPIO \
  43. }
  44. #define PINMUX_GPIO_FN(gpio, base, data_or_mark) \
  45. [gpio - (base)] = { \
  46. .name = __stringify(gpio), \
  47. .enum_id = data_or_mark, \
  48. }
  49. #define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
  50. struct pinmux_cfg_reg {
  51. unsigned long reg, reg_width, field_width;
  52. unsigned long *cnt;
  53. pinmux_enum_t *enum_ids;
  54. unsigned long *var_field_width;
  55. };
  56. #define PINMUX_CFG_REG(name, r, r_width, f_width) \
  57. .reg = r, .reg_width = r_width, .field_width = f_width, \
  58. .cnt = (unsigned long [r_width / f_width]) {}, \
  59. .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)])
  60. #define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
  61. .reg = r, .reg_width = r_width, \
  62. .cnt = (unsigned long [r_width]) {}, \
  63. .var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \
  64. .enum_ids = (pinmux_enum_t [])
  65. struct pinmux_data_reg {
  66. unsigned long reg, reg_width, reg_shadow;
  67. pinmux_enum_t *enum_ids;
  68. void __iomem *mapped_reg;
  69. };
  70. #define PINMUX_DATA_REG(name, r, r_width) \
  71. .reg = r, .reg_width = r_width, \
  72. .enum_ids = (pinmux_enum_t [r_width]) \
  73. struct pinmux_irq {
  74. int irq;
  75. unsigned short *gpios;
  76. };
  77. #define PINMUX_IRQ(irq_nr, ids...) \
  78. { .irq = irq_nr, .gpios = (unsigned short []) { ids, 0 } } \
  79. struct pinmux_range {
  80. pinmux_enum_t begin;
  81. pinmux_enum_t end;
  82. pinmux_enum_t force;
  83. };
  84. struct sh_pfc_soc_info {
  85. char *name;
  86. struct pinmux_range input;
  87. struct pinmux_range input_pd;
  88. struct pinmux_range input_pu;
  89. struct pinmux_range output;
  90. struct pinmux_range function;
  91. struct sh_pfc_pin *pins;
  92. unsigned int nr_pins;
  93. struct pinmux_func *func_gpios;
  94. unsigned int nr_func_gpios;
  95. struct pinmux_cfg_reg *cfg_regs;
  96. struct pinmux_data_reg *data_regs;
  97. pinmux_enum_t *gpio_data;
  98. unsigned int gpio_data_size;
  99. struct pinmux_irq *gpio_irq;
  100. unsigned int gpio_irq_size;
  101. unsigned long unlock_reg;
  102. };
  103. enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
  104. /* helper macro for port */
  105. #define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
  106. #define PORT_10(fn, pfx, sfx) \
  107. PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \
  108. PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \
  109. PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \
  110. PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \
  111. PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
  112. #define PORT_10_REV(fn, pfx, sfx) \
  113. PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \
  114. PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \
  115. PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \
  116. PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \
  117. PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
  118. #define PORT_32(fn, pfx, sfx) \
  119. PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
  120. PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \
  121. PORT_1(fn, pfx##31, sfx)
  122. #define PORT_32_REV(fn, pfx, sfx) \
  123. PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \
  124. PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \
  125. PORT_10_REV(fn, pfx, sfx)
  126. #define PORT_90(fn, pfx, sfx) \
  127. PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx), \
  128. PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx), \
  129. PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx), \
  130. PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx), \
  131. PORT_10(fn, pfx##9, sfx)
  132. #define _PORT_ALL(pfx, sfx) pfx##_##sfx
  133. #define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
  134. #define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str)
  135. #define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused)
  136. #define GPIO_FN(str) PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK)
  137. /* helper macro for pinmux_enum_t */
  138. #define PORT_DATA_I(nr) \
  139. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
  140. #define PORT_DATA_I_PD(nr) \
  141. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
  142. PORT##nr##_IN, PORT##nr##_IN_PD)
  143. #define PORT_DATA_I_PU(nr) \
  144. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
  145. PORT##nr##_IN, PORT##nr##_IN_PU)
  146. #define PORT_DATA_I_PU_PD(nr) \
  147. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
  148. PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
  149. #define PORT_DATA_O(nr) \
  150. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
  151. #define PORT_DATA_IO(nr) \
  152. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
  153. PORT##nr##_IN)
  154. #define PORT_DATA_IO_PD(nr) \
  155. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
  156. PORT##nr##_IN, PORT##nr##_IN_PD)
  157. #define PORT_DATA_IO_PU(nr) \
  158. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
  159. PORT##nr##_IN, PORT##nr##_IN_PU)
  160. #define PORT_DATA_IO_PU_PD(nr) \
  161. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
  162. PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
  163. /* helper macro for top 4 bits in PORTnCR */
  164. #define _PCRH(in, in_pd, in_pu, out) \
  165. 0, (out), (in), 0, \
  166. 0, 0, 0, 0, \
  167. 0, 0, (in_pd), 0, \
  168. 0, 0, (in_pu), 0
  169. #define PORTCR(nr, reg) \
  170. { \
  171. PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
  172. _PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
  173. PORT##nr##_IN_PU, PORT##nr##_OUT), \
  174. PORT##nr##_FN0, PORT##nr##_FN1, \
  175. PORT##nr##_FN2, PORT##nr##_FN3, \
  176. PORT##nr##_FN4, PORT##nr##_FN5, \
  177. PORT##nr##_FN6, PORT##nr##_FN7 } \
  178. }
  179. #endif /* __SH_PFC_H */