iwl-core.c 66 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <net/mac80211.h>
  34. #include "iwl-eeprom.h"
  35. #include "iwl-dev.h"
  36. #include "iwl-debug.h"
  37. #include "iwl-core.h"
  38. #include "iwl-io.h"
  39. #include "iwl-power.h"
  40. #include "iwl-sta.h"
  41. #include "iwl-helpers.h"
  42. MODULE_DESCRIPTION("iwl-legacy: common functions for 3945 and 4965");
  43. MODULE_VERSION(IWLWIFI_VERSION);
  44. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  45. MODULE_LICENSE("GPL");
  46. /*
  47. * set bt_coex_active to true, uCode will do kill/defer
  48. * every time the priority line is asserted (BT is sending signals on the
  49. * priority line in the PCIx).
  50. * set bt_coex_active to false, uCode will ignore the BT activity and
  51. * perform the normal operation
  52. *
  53. * User might experience transmit issue on some platform due to WiFi/BT
  54. * co-exist problem. The possible behaviors are:
  55. * Able to scan and finding all the available AP
  56. * Not able to associate with any AP
  57. * On those platforms, WiFi communication can be restored by set
  58. * "bt_coex_active" module parameter to "false"
  59. *
  60. * default: bt_coex_active = true (BT_COEX_ENABLE)
  61. */
  62. static bool bt_coex_active = true;
  63. module_param(bt_coex_active, bool, S_IRUGO);
  64. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
  65. u32 il_debug_level;
  66. EXPORT_SYMBOL(il_debug_level);
  67. const u8 il_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  68. EXPORT_SYMBOL(il_bcast_addr);
  69. /* This function both allocates and initializes hw and il. */
  70. struct ieee80211_hw *il_alloc_all(struct il_cfg *cfg)
  71. {
  72. struct il_priv *il;
  73. /* mac80211 allocates memory for this device instance, including
  74. * space for this driver's ilate structure */
  75. struct ieee80211_hw *hw;
  76. hw = ieee80211_alloc_hw(sizeof(struct il_priv),
  77. cfg->ops->ieee80211_ops);
  78. if (hw == NULL) {
  79. pr_err("%s: Can not allocate network device\n",
  80. cfg->name);
  81. goto out;
  82. }
  83. il = hw->priv;
  84. il->hw = hw;
  85. out:
  86. return hw;
  87. }
  88. EXPORT_SYMBOL(il_alloc_all);
  89. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  90. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  91. static void il_init_ht_hw_capab(const struct il_priv *il,
  92. struct ieee80211_sta_ht_cap *ht_info,
  93. enum ieee80211_band band)
  94. {
  95. u16 max_bit_rate = 0;
  96. u8 rx_chains_num = il->hw_params.rx_chains_num;
  97. u8 tx_chains_num = il->hw_params.tx_chains_num;
  98. ht_info->cap = 0;
  99. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  100. ht_info->ht_supported = true;
  101. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  102. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  103. if (il->hw_params.ht40_channel & BIT(band)) {
  104. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  105. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  106. ht_info->mcs.rx_mask[4] = 0x01;
  107. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  108. }
  109. if (il->cfg->mod_params->amsdu_size_8K)
  110. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  111. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  112. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  113. ht_info->mcs.rx_mask[0] = 0xFF;
  114. if (rx_chains_num >= 2)
  115. ht_info->mcs.rx_mask[1] = 0xFF;
  116. if (rx_chains_num >= 3)
  117. ht_info->mcs.rx_mask[2] = 0xFF;
  118. /* Highest supported Rx data rate */
  119. max_bit_rate *= rx_chains_num;
  120. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  121. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  122. /* Tx MCS capabilities */
  123. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  124. if (tx_chains_num != rx_chains_num) {
  125. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  126. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  127. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  128. }
  129. }
  130. /**
  131. * il_init_geos - Initialize mac80211's geo/channel info based from eeprom
  132. */
  133. int il_init_geos(struct il_priv *il)
  134. {
  135. struct il_channel_info *ch;
  136. struct ieee80211_supported_band *sband;
  137. struct ieee80211_channel *channels;
  138. struct ieee80211_channel *geo_ch;
  139. struct ieee80211_rate *rates;
  140. int i = 0;
  141. s8 max_tx_power = 0;
  142. if (il->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  143. il->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  144. D_INFO("Geography modes already initialized.\n");
  145. set_bit(STATUS_GEO_CONFIGURED, &il->status);
  146. return 0;
  147. }
  148. channels = kzalloc(sizeof(struct ieee80211_channel) *
  149. il->channel_count, GFP_KERNEL);
  150. if (!channels)
  151. return -ENOMEM;
  152. rates = kzalloc((sizeof(struct ieee80211_rate) * RATE_COUNT_LEGACY),
  153. GFP_KERNEL);
  154. if (!rates) {
  155. kfree(channels);
  156. return -ENOMEM;
  157. }
  158. /* 5.2GHz channels start after the 2.4GHz channels */
  159. sband = &il->bands[IEEE80211_BAND_5GHZ];
  160. sband->channels = &channels[ARRAY_SIZE(il_eeprom_band_1)];
  161. /* just OFDM */
  162. sband->bitrates = &rates[IL_FIRST_OFDM_RATE];
  163. sband->n_bitrates = RATE_COUNT_LEGACY - IL_FIRST_OFDM_RATE;
  164. if (il->cfg->sku & IL_SKU_N)
  165. il_init_ht_hw_capab(il, &sband->ht_cap,
  166. IEEE80211_BAND_5GHZ);
  167. sband = &il->bands[IEEE80211_BAND_2GHZ];
  168. sband->channels = channels;
  169. /* OFDM & CCK */
  170. sband->bitrates = rates;
  171. sband->n_bitrates = RATE_COUNT_LEGACY;
  172. if (il->cfg->sku & IL_SKU_N)
  173. il_init_ht_hw_capab(il, &sband->ht_cap,
  174. IEEE80211_BAND_2GHZ);
  175. il->ieee_channels = channels;
  176. il->ieee_rates = rates;
  177. for (i = 0; i < il->channel_count; i++) {
  178. ch = &il->channel_info[i];
  179. if (!il_is_channel_valid(ch))
  180. continue;
  181. sband = &il->bands[ch->band];
  182. geo_ch = &sband->channels[sband->n_channels++];
  183. geo_ch->center_freq =
  184. ieee80211_channel_to_frequency(ch->channel, ch->band);
  185. geo_ch->max_power = ch->max_power_avg;
  186. geo_ch->max_antenna_gain = 0xff;
  187. geo_ch->hw_value = ch->channel;
  188. if (il_is_channel_valid(ch)) {
  189. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  190. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  191. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  192. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  193. if (ch->flags & EEPROM_CHANNEL_RADAR)
  194. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  195. geo_ch->flags |= ch->ht40_extension_channel;
  196. if (ch->max_power_avg > max_tx_power)
  197. max_tx_power = ch->max_power_avg;
  198. } else {
  199. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  200. }
  201. D_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  202. ch->channel, geo_ch->center_freq,
  203. il_is_channel_a_band(ch) ? "5.2" : "2.4",
  204. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  205. "restricted" : "valid",
  206. geo_ch->flags);
  207. }
  208. il->tx_power_device_lmt = max_tx_power;
  209. il->tx_power_user_lmt = max_tx_power;
  210. il->tx_power_next = max_tx_power;
  211. if (il->bands[IEEE80211_BAND_5GHZ].n_channels == 0 &&
  212. (il->cfg->sku & IL_SKU_A)) {
  213. IL_INFO("Incorrectly detected BG card as ABG. "
  214. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  215. il->pci_dev->device,
  216. il->pci_dev->subsystem_device);
  217. il->cfg->sku &= ~IL_SKU_A;
  218. }
  219. IL_INFO("Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  220. il->bands[IEEE80211_BAND_2GHZ].n_channels,
  221. il->bands[IEEE80211_BAND_5GHZ].n_channels);
  222. set_bit(STATUS_GEO_CONFIGURED, &il->status);
  223. return 0;
  224. }
  225. EXPORT_SYMBOL(il_init_geos);
  226. /*
  227. * il_free_geos - undo allocations in il_init_geos
  228. */
  229. void il_free_geos(struct il_priv *il)
  230. {
  231. kfree(il->ieee_channels);
  232. kfree(il->ieee_rates);
  233. clear_bit(STATUS_GEO_CONFIGURED, &il->status);
  234. }
  235. EXPORT_SYMBOL(il_free_geos);
  236. static bool il_is_channel_extension(struct il_priv *il,
  237. enum ieee80211_band band,
  238. u16 channel, u8 extension_chan_offset)
  239. {
  240. const struct il_channel_info *ch_info;
  241. ch_info = il_get_channel_info(il, band, channel);
  242. if (!il_is_channel_valid(ch_info))
  243. return false;
  244. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  245. return !(ch_info->ht40_extension_channel &
  246. IEEE80211_CHAN_NO_HT40PLUS);
  247. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  248. return !(ch_info->ht40_extension_channel &
  249. IEEE80211_CHAN_NO_HT40MINUS);
  250. return false;
  251. }
  252. bool il_is_ht40_tx_allowed(struct il_priv *il,
  253. struct il_rxon_context *ctx,
  254. struct ieee80211_sta_ht_cap *ht_cap)
  255. {
  256. if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
  257. return false;
  258. /*
  259. * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  260. * the bit will not set if it is pure 40MHz case
  261. */
  262. if (ht_cap && !ht_cap->ht_supported)
  263. return false;
  264. #ifdef CONFIG_IWLEGACY_DEBUGFS
  265. if (il->disable_ht40)
  266. return false;
  267. #endif
  268. return il_is_channel_extension(il, il->band,
  269. le16_to_cpu(ctx->staging.channel),
  270. ctx->ht.extension_chan_offset);
  271. }
  272. EXPORT_SYMBOL(il_is_ht40_tx_allowed);
  273. static u16 il_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  274. {
  275. u16 new_val;
  276. u16 beacon_factor;
  277. /*
  278. * If mac80211 hasn't given us a beacon interval, program
  279. * the default into the device.
  280. */
  281. if (!beacon_val)
  282. return DEFAULT_BEACON_INTERVAL;
  283. /*
  284. * If the beacon interval we obtained from the peer
  285. * is too large, we'll have to wake up more often
  286. * (and in IBSS case, we'll beacon too much)
  287. *
  288. * For example, if max_beacon_val is 4096, and the
  289. * requested beacon interval is 7000, we'll have to
  290. * use 3500 to be able to wake up on the beacons.
  291. *
  292. * This could badly influence beacon detection stats.
  293. */
  294. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  295. new_val = beacon_val / beacon_factor;
  296. if (!new_val)
  297. new_val = max_beacon_val;
  298. return new_val;
  299. }
  300. int
  301. il_send_rxon_timing(struct il_priv *il, struct il_rxon_context *ctx)
  302. {
  303. u64 tsf;
  304. s32 interval_tm, rem;
  305. struct ieee80211_conf *conf = NULL;
  306. u16 beacon_int;
  307. struct ieee80211_vif *vif = ctx->vif;
  308. conf = il_ieee80211_get_hw_conf(il->hw);
  309. lockdep_assert_held(&il->mutex);
  310. memset(&ctx->timing, 0, sizeof(struct il_rxon_time_cmd));
  311. ctx->timing.timestamp = cpu_to_le64(il->timestamp);
  312. ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
  313. beacon_int = vif ? vif->bss_conf.beacon_int : 0;
  314. /*
  315. * TODO: For IBSS we need to get atim_win from mac80211,
  316. * for now just always use 0
  317. */
  318. ctx->timing.atim_win = 0;
  319. beacon_int = il_adjust_beacon_interval(beacon_int,
  320. il->hw_params.max_beacon_itrvl * TIME_UNIT);
  321. ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
  322. tsf = il->timestamp; /* tsf is modifed by do_div: copy it */
  323. interval_tm = beacon_int * TIME_UNIT;
  324. rem = do_div(tsf, interval_tm);
  325. ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  326. ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
  327. D_ASSOC(
  328. "beacon interval %d beacon timer %d beacon tim %d\n",
  329. le16_to_cpu(ctx->timing.beacon_interval),
  330. le32_to_cpu(ctx->timing.beacon_init_val),
  331. le16_to_cpu(ctx->timing.atim_win));
  332. return il_send_cmd_pdu(il, ctx->rxon_timing_cmd,
  333. sizeof(ctx->timing), &ctx->timing);
  334. }
  335. EXPORT_SYMBOL(il_send_rxon_timing);
  336. void
  337. il_set_rxon_hwcrypto(struct il_priv *il,
  338. struct il_rxon_context *ctx,
  339. int hw_decrypt)
  340. {
  341. struct il_rxon_cmd *rxon = &ctx->staging;
  342. if (hw_decrypt)
  343. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  344. else
  345. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  346. }
  347. EXPORT_SYMBOL(il_set_rxon_hwcrypto);
  348. /* validate RXON structure is valid */
  349. int
  350. il_check_rxon_cmd(struct il_priv *il, struct il_rxon_context *ctx)
  351. {
  352. struct il_rxon_cmd *rxon = &ctx->staging;
  353. bool error = false;
  354. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  355. if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
  356. IL_WARN("check 2.4G: wrong narrow\n");
  357. error = true;
  358. }
  359. if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
  360. IL_WARN("check 2.4G: wrong radar\n");
  361. error = true;
  362. }
  363. } else {
  364. if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
  365. IL_WARN("check 5.2G: not short slot!\n");
  366. error = true;
  367. }
  368. if (rxon->flags & RXON_FLG_CCK_MSK) {
  369. IL_WARN("check 5.2G: CCK!\n");
  370. error = true;
  371. }
  372. }
  373. if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
  374. IL_WARN("mac/bssid mcast!\n");
  375. error = true;
  376. }
  377. /* make sure basic rates 6Mbps and 1Mbps are supported */
  378. if ((rxon->ofdm_basic_rates & RATE_6M_MASK) == 0 &&
  379. (rxon->cck_basic_rates & RATE_1M_MASK) == 0) {
  380. IL_WARN("neither 1 nor 6 are basic\n");
  381. error = true;
  382. }
  383. if (le16_to_cpu(rxon->assoc_id) > 2007) {
  384. IL_WARN("aid > 2007\n");
  385. error = true;
  386. }
  387. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  388. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
  389. IL_WARN("CCK and short slot\n");
  390. error = true;
  391. }
  392. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  393. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
  394. IL_WARN("CCK and auto detect");
  395. error = true;
  396. }
  397. if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  398. RXON_FLG_TGG_PROTECT_MSK)) ==
  399. RXON_FLG_TGG_PROTECT_MSK) {
  400. IL_WARN("TGg but no auto-detect\n");
  401. error = true;
  402. }
  403. if (error)
  404. IL_WARN("Tuning to channel %d\n",
  405. le16_to_cpu(rxon->channel));
  406. if (error) {
  407. IL_ERR("Invalid RXON\n");
  408. return -EINVAL;
  409. }
  410. return 0;
  411. }
  412. EXPORT_SYMBOL(il_check_rxon_cmd);
  413. /**
  414. * il_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  415. * @il: staging_rxon is compared to active_rxon
  416. *
  417. * If the RXON structure is changing enough to require a new tune,
  418. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  419. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  420. */
  421. int il_full_rxon_required(struct il_priv *il,
  422. struct il_rxon_context *ctx)
  423. {
  424. const struct il_rxon_cmd *staging = &ctx->staging;
  425. const struct il_rxon_cmd *active = &ctx->active;
  426. #define CHK(cond) \
  427. if ((cond)) { \
  428. D_INFO("need full RXON - " #cond "\n"); \
  429. return 1; \
  430. }
  431. #define CHK_NEQ(c1, c2) \
  432. if ((c1) != (c2)) { \
  433. D_INFO("need full RXON - " \
  434. #c1 " != " #c2 " - %d != %d\n", \
  435. (c1), (c2)); \
  436. return 1; \
  437. }
  438. /* These items are only settable from the full RXON command */
  439. CHK(!il_is_associated_ctx(ctx));
  440. CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
  441. CHK(compare_ether_addr(staging->node_addr, active->node_addr));
  442. CHK(compare_ether_addr(staging->wlap_bssid_addr,
  443. active->wlap_bssid_addr));
  444. CHK_NEQ(staging->dev_type, active->dev_type);
  445. CHK_NEQ(staging->channel, active->channel);
  446. CHK_NEQ(staging->air_propagation, active->air_propagation);
  447. CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
  448. active->ofdm_ht_single_stream_basic_rates);
  449. CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
  450. active->ofdm_ht_dual_stream_basic_rates);
  451. CHK_NEQ(staging->assoc_id, active->assoc_id);
  452. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  453. * be updated with the RXON_ASSOC command -- however only some
  454. * flag transitions are allowed using RXON_ASSOC */
  455. /* Check if we are not switching bands */
  456. CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
  457. active->flags & RXON_FLG_BAND_24G_MSK);
  458. /* Check if we are switching association toggle */
  459. CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
  460. active->filter_flags & RXON_FILTER_ASSOC_MSK);
  461. #undef CHK
  462. #undef CHK_NEQ
  463. return 0;
  464. }
  465. EXPORT_SYMBOL(il_full_rxon_required);
  466. u8 il_get_lowest_plcp(struct il_priv *il,
  467. struct il_rxon_context *ctx)
  468. {
  469. /*
  470. * Assign the lowest rate -- should really get this from
  471. * the beacon skb from mac80211.
  472. */
  473. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
  474. return RATE_1M_PLCP;
  475. else
  476. return RATE_6M_PLCP;
  477. }
  478. EXPORT_SYMBOL(il_get_lowest_plcp);
  479. static void _il_set_rxon_ht(struct il_priv *il,
  480. struct il_ht_config *ht_conf,
  481. struct il_rxon_context *ctx)
  482. {
  483. struct il_rxon_cmd *rxon = &ctx->staging;
  484. if (!ctx->ht.enabled) {
  485. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  486. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  487. RXON_FLG_HT40_PROT_MSK |
  488. RXON_FLG_HT_PROT_MSK);
  489. return;
  490. }
  491. rxon->flags |= cpu_to_le32(ctx->ht.protection <<
  492. RXON_FLG_HT_OPERATING_MODE_POS);
  493. /* Set up channel bandwidth:
  494. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  495. /* clear the HT channel mode before set the mode */
  496. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  497. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  498. if (il_is_ht40_tx_allowed(il, ctx, NULL)) {
  499. /* pure ht40 */
  500. if (ctx->ht.protection ==
  501. IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  502. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  503. /* Note: control channel is opposite of extension channel */
  504. switch (ctx->ht.extension_chan_offset) {
  505. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  506. rxon->flags &=
  507. ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  508. break;
  509. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  510. rxon->flags |=
  511. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  512. break;
  513. }
  514. } else {
  515. /* Note: control channel is opposite of extension channel */
  516. switch (ctx->ht.extension_chan_offset) {
  517. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  518. rxon->flags &=
  519. ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  520. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  521. break;
  522. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  523. rxon->flags |=
  524. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  525. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  526. break;
  527. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  528. default:
  529. /* channel location only valid if in Mixed mode */
  530. IL_ERR(
  531. "invalid extension channel offset\n");
  532. break;
  533. }
  534. }
  535. } else {
  536. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  537. }
  538. if (il->cfg->ops->hcmd->set_rxon_chain)
  539. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  540. D_ASSOC("rxon flags 0x%X operation mode :0x%X "
  541. "extension channel offset 0x%x\n",
  542. le32_to_cpu(rxon->flags), ctx->ht.protection,
  543. ctx->ht.extension_chan_offset);
  544. }
  545. void il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
  546. {
  547. _il_set_rxon_ht(il, ht_conf, &il->ctx);
  548. }
  549. EXPORT_SYMBOL(il_set_rxon_ht);
  550. /* Return valid, unused, channel for a passive scan to reset the RF */
  551. u8 il_get_single_channel_number(struct il_priv *il,
  552. enum ieee80211_band band)
  553. {
  554. const struct il_channel_info *ch_info;
  555. int i;
  556. u8 channel = 0;
  557. u8 min, max;
  558. if (band == IEEE80211_BAND_5GHZ) {
  559. min = 14;
  560. max = il->channel_count;
  561. } else {
  562. min = 0;
  563. max = 14;
  564. }
  565. for (i = min; i < max; i++) {
  566. channel = il->channel_info[i].channel;
  567. if (channel == le16_to_cpu(il->ctx.staging.channel))
  568. continue;
  569. ch_info = il_get_channel_info(il, band, channel);
  570. if (il_is_channel_valid(ch_info))
  571. break;
  572. }
  573. return channel;
  574. }
  575. EXPORT_SYMBOL(il_get_single_channel_number);
  576. /**
  577. * il_set_rxon_channel - Set the band and channel values in staging RXON
  578. * @ch: requested channel as a pointer to struct ieee80211_channel
  579. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  580. * in the staging RXON flag structure based on the ch->band
  581. */
  582. int
  583. il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch,
  584. struct il_rxon_context *ctx)
  585. {
  586. enum ieee80211_band band = ch->band;
  587. u16 channel = ch->hw_value;
  588. if (le16_to_cpu(ctx->staging.channel) == channel && il->band == band)
  589. return 0;
  590. ctx->staging.channel = cpu_to_le16(channel);
  591. if (band == IEEE80211_BAND_5GHZ)
  592. ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
  593. else
  594. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  595. il->band = band;
  596. D_INFO("Staging channel set to %d [%d]\n", channel, band);
  597. return 0;
  598. }
  599. EXPORT_SYMBOL(il_set_rxon_channel);
  600. void il_set_flags_for_band(struct il_priv *il,
  601. struct il_rxon_context *ctx,
  602. enum ieee80211_band band,
  603. struct ieee80211_vif *vif)
  604. {
  605. if (band == IEEE80211_BAND_5GHZ) {
  606. ctx->staging.flags &=
  607. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  608. | RXON_FLG_CCK_MSK);
  609. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  610. } else {
  611. /* Copied from il_post_associate() */
  612. if (vif && vif->bss_conf.use_short_slot)
  613. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  614. else
  615. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  616. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  617. ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
  618. ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
  619. }
  620. }
  621. EXPORT_SYMBOL(il_set_flags_for_band);
  622. /*
  623. * initialize rxon structure with default values from eeprom
  624. */
  625. void il_connection_init_rx_config(struct il_priv *il,
  626. struct il_rxon_context *ctx)
  627. {
  628. const struct il_channel_info *ch_info;
  629. memset(&ctx->staging, 0, sizeof(ctx->staging));
  630. if (!ctx->vif) {
  631. ctx->staging.dev_type = ctx->unused_devtype;
  632. } else
  633. switch (ctx->vif->type) {
  634. case NL80211_IFTYPE_STATION:
  635. ctx->staging.dev_type = ctx->station_devtype;
  636. ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  637. break;
  638. case NL80211_IFTYPE_ADHOC:
  639. ctx->staging.dev_type = ctx->ibss_devtype;
  640. ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  641. ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  642. RXON_FILTER_ACCEPT_GRP_MSK;
  643. break;
  644. default:
  645. IL_ERR("Unsupported interface type %d\n",
  646. ctx->vif->type);
  647. break;
  648. }
  649. #if 0
  650. /* TODO: Figure out when short_preamble would be set and cache from
  651. * that */
  652. if (!hw_to_local(il->hw)->short_preamble)
  653. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  654. else
  655. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  656. #endif
  657. ch_info = il_get_channel_info(il, il->band,
  658. le16_to_cpu(ctx->active.channel));
  659. if (!ch_info)
  660. ch_info = &il->channel_info[0];
  661. ctx->staging.channel = cpu_to_le16(ch_info->channel);
  662. il->band = ch_info->band;
  663. il_set_flags_for_band(il, ctx, il->band, ctx->vif);
  664. ctx->staging.ofdm_basic_rates =
  665. (IL_OFDM_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
  666. ctx->staging.cck_basic_rates =
  667. (IL_CCK_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
  668. /* clear both MIX and PURE40 mode flag */
  669. ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  670. RXON_FLG_CHANNEL_MODE_PURE_40);
  671. if (ctx->vif)
  672. memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
  673. ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
  674. ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
  675. }
  676. EXPORT_SYMBOL(il_connection_init_rx_config);
  677. void il_set_rate(struct il_priv *il)
  678. {
  679. const struct ieee80211_supported_band *hw = NULL;
  680. struct ieee80211_rate *rate;
  681. int i;
  682. hw = il_get_hw_mode(il, il->band);
  683. if (!hw) {
  684. IL_ERR("Failed to set rate: unable to get hw mode\n");
  685. return;
  686. }
  687. il->active_rate = 0;
  688. for (i = 0; i < hw->n_bitrates; i++) {
  689. rate = &(hw->bitrates[i]);
  690. if (rate->hw_value < RATE_COUNT_LEGACY)
  691. il->active_rate |= (1 << rate->hw_value);
  692. }
  693. D_RATE("Set active_rate = %0x\n", il->active_rate);
  694. il->ctx.staging.cck_basic_rates =
  695. (IL_CCK_BASIC_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
  696. il->ctx.staging.ofdm_basic_rates =
  697. (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
  698. }
  699. EXPORT_SYMBOL(il_set_rate);
  700. void il_chswitch_done(struct il_priv *il, bool is_success)
  701. {
  702. struct il_rxon_context *ctx = &il->ctx;
  703. if (test_bit(STATUS_EXIT_PENDING, &il->status))
  704. return;
  705. if (test_and_clear_bit(STATUS_CHANNEL_SWITCH_PENDING, &il->status))
  706. ieee80211_chswitch_done(ctx->vif, is_success);
  707. }
  708. EXPORT_SYMBOL(il_chswitch_done);
  709. void il_rx_csa(struct il_priv *il, struct il_rx_buf *rxb)
  710. {
  711. struct il_rx_pkt *pkt = rxb_addr(rxb);
  712. struct il_csa_notification *csa = &(pkt->u.csa_notif);
  713. struct il_rxon_context *ctx = &il->ctx;
  714. struct il_rxon_cmd *rxon = (void *)&ctx->active;
  715. if (!test_bit(STATUS_CHANNEL_SWITCH_PENDING, &il->status))
  716. return;
  717. if (!le32_to_cpu(csa->status) && csa->channel == il->switch_channel) {
  718. rxon->channel = csa->channel;
  719. ctx->staging.channel = csa->channel;
  720. D_11H("CSA notif: channel %d\n",
  721. le16_to_cpu(csa->channel));
  722. il_chswitch_done(il, true);
  723. } else {
  724. IL_ERR("CSA notif (fail) : channel %d\n",
  725. le16_to_cpu(csa->channel));
  726. il_chswitch_done(il, false);
  727. }
  728. }
  729. EXPORT_SYMBOL(il_rx_csa);
  730. #ifdef CONFIG_IWLEGACY_DEBUG
  731. void il_print_rx_config_cmd(struct il_priv *il,
  732. struct il_rxon_context *ctx)
  733. {
  734. struct il_rxon_cmd *rxon = &ctx->staging;
  735. D_RADIO("RX CONFIG:\n");
  736. il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  737. D_RADIO("u16 channel: 0x%x\n",
  738. le16_to_cpu(rxon->channel));
  739. D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  740. D_RADIO("u32 filter_flags: 0x%08x\n",
  741. le32_to_cpu(rxon->filter_flags));
  742. D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  743. D_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  744. rxon->ofdm_basic_rates);
  745. D_RADIO("u8 cck_basic_rates: 0x%02x\n",
  746. rxon->cck_basic_rates);
  747. D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
  748. D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  749. D_RADIO("u16 assoc_id: 0x%x\n",
  750. le16_to_cpu(rxon->assoc_id));
  751. }
  752. EXPORT_SYMBOL(il_print_rx_config_cmd);
  753. #endif
  754. /**
  755. * il_irq_handle_error - called for HW or SW error interrupt from card
  756. */
  757. void il_irq_handle_error(struct il_priv *il)
  758. {
  759. /* Set the FW error flag -- cleared on il_down */
  760. set_bit(STATUS_FW_ERROR, &il->status);
  761. /* Cancel currently queued command. */
  762. clear_bit(STATUS_HCMD_ACTIVE, &il->status);
  763. IL_ERR("Loaded firmware version: %s\n",
  764. il->hw->wiphy->fw_version);
  765. il->cfg->ops->lib->dump_nic_error_log(il);
  766. if (il->cfg->ops->lib->dump_fh)
  767. il->cfg->ops->lib->dump_fh(il, NULL, false);
  768. #ifdef CONFIG_IWLEGACY_DEBUG
  769. if (il_get_debug_level(il) & IL_DL_FW_ERRORS)
  770. il_print_rx_config_cmd(il,
  771. &il->ctx);
  772. #endif
  773. wake_up(&il->wait_command_queue);
  774. /* Keep the restart process from trying to send host
  775. * commands by clearing the INIT status bit */
  776. clear_bit(STATUS_READY, &il->status);
  777. if (!test_bit(STATUS_EXIT_PENDING, &il->status)) {
  778. IL_DBG(IL_DL_FW_ERRORS,
  779. "Restarting adapter due to uCode error.\n");
  780. if (il->cfg->mod_params->restart_fw)
  781. queue_work(il->workqueue, &il->restart);
  782. }
  783. }
  784. EXPORT_SYMBOL(il_irq_handle_error);
  785. static int il_apm_stop_master(struct il_priv *il)
  786. {
  787. int ret = 0;
  788. /* stop device's busmaster DMA activity */
  789. il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  790. ret = _il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
  791. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  792. if (ret)
  793. IL_WARN("Master Disable Timed Out, 100 usec\n");
  794. D_INFO("stop master\n");
  795. return ret;
  796. }
  797. void il_apm_stop(struct il_priv *il)
  798. {
  799. D_INFO("Stop card, put in low power state\n");
  800. /* Stop device's DMA activity */
  801. il_apm_stop_master(il);
  802. /* Reset the entire device */
  803. il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  804. udelay(10);
  805. /*
  806. * Clear "initialization complete" bit to move adapter from
  807. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  808. */
  809. il_clear_bit(il, CSR_GP_CNTRL,
  810. CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  811. }
  812. EXPORT_SYMBOL(il_apm_stop);
  813. /*
  814. * Start up NIC's basic functionality after it has been reset
  815. * (e.g. after platform boot, or shutdown via il_apm_stop())
  816. * NOTE: This does not load uCode nor start the embedded processor
  817. */
  818. int il_apm_init(struct il_priv *il)
  819. {
  820. int ret = 0;
  821. u16 lctl;
  822. D_INFO("Init card's basic functions\n");
  823. /*
  824. * Use "set_bit" below rather than "write", to preserve any hardware
  825. * bits already set by default after reset.
  826. */
  827. /* Disable L0S exit timer (platform NMI Work/Around) */
  828. il_set_bit(il, CSR_GIO_CHICKEN_BITS,
  829. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  830. /*
  831. * Disable L0s without affecting L1;
  832. * don't wait for ICH L0s (ICH bug W/A)
  833. */
  834. il_set_bit(il, CSR_GIO_CHICKEN_BITS,
  835. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  836. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  837. il_set_bit(il, CSR_DBG_HPET_MEM_REG,
  838. CSR_DBG_HPET_MEM_REG_VAL);
  839. /*
  840. * Enable HAP INTA (interrupt from management bus) to
  841. * wake device's PCI Express link L1a -> L0s
  842. * NOTE: This is no-op for 3945 (non-existent bit)
  843. */
  844. il_set_bit(il, CSR_HW_IF_CONFIG_REG,
  845. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  846. /*
  847. * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
  848. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  849. * If so (likely), disable L0S, so device moves directly L0->L1;
  850. * costs negligible amount of power savings.
  851. * If not (unlikely), enable L0S, so there is at least some
  852. * power savings, even without L1.
  853. */
  854. if (il->cfg->base_params->set_l0s) {
  855. lctl = il_pcie_link_ctl(il);
  856. if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
  857. PCI_CFG_LINK_CTRL_VAL_L1_EN) {
  858. /* L1-ASPM enabled; disable(!) L0S */
  859. il_set_bit(il, CSR_GIO_REG,
  860. CSR_GIO_REG_VAL_L0S_ENABLED);
  861. D_POWER("L1 Enabled; Disabling L0S\n");
  862. } else {
  863. /* L1-ASPM disabled; enable(!) L0S */
  864. il_clear_bit(il, CSR_GIO_REG,
  865. CSR_GIO_REG_VAL_L0S_ENABLED);
  866. D_POWER("L1 Disabled; Enabling L0S\n");
  867. }
  868. }
  869. /* Configure analog phase-lock-loop before activating to D0A */
  870. if (il->cfg->base_params->pll_cfg_val)
  871. il_set_bit(il, CSR_ANA_PLL_CFG,
  872. il->cfg->base_params->pll_cfg_val);
  873. /*
  874. * Set "initialization complete" bit to move adapter from
  875. * D0U* --> D0A* (powered-up active) state.
  876. */
  877. il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  878. /*
  879. * Wait for clock stabilization; once stabilized, access to
  880. * device-internal resources is supported, e.g. il_wr_prph()
  881. * and accesses to uCode SRAM.
  882. */
  883. ret = _il_poll_bit(il, CSR_GP_CNTRL,
  884. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  885. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  886. if (ret < 0) {
  887. D_INFO("Failed to init the card\n");
  888. goto out;
  889. }
  890. /*
  891. * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
  892. * BSM (Boostrap State Machine) is only in 3945 and 4965.
  893. *
  894. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  895. * do not disable clocks. This preserves any hardware bits already
  896. * set by default in "CLK_CTRL_REG" after reset.
  897. */
  898. if (il->cfg->base_params->use_bsm)
  899. il_wr_prph(il, APMG_CLK_EN_REG,
  900. APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
  901. else
  902. il_wr_prph(il, APMG_CLK_EN_REG,
  903. APMG_CLK_VAL_DMA_CLK_RQT);
  904. udelay(20);
  905. /* Disable L1-Active */
  906. il_set_bits_prph(il, APMG_PCIDEV_STT_REG,
  907. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  908. out:
  909. return ret;
  910. }
  911. EXPORT_SYMBOL(il_apm_init);
  912. int il_set_tx_power(struct il_priv *il, s8 tx_power, bool force)
  913. {
  914. int ret;
  915. s8 prev_tx_power;
  916. bool defer;
  917. struct il_rxon_context *ctx = &il->ctx;
  918. lockdep_assert_held(&il->mutex);
  919. if (il->tx_power_user_lmt == tx_power && !force)
  920. return 0;
  921. if (!il->cfg->ops->lib->send_tx_power)
  922. return -EOPNOTSUPP;
  923. /* 0 dBm mean 1 milliwatt */
  924. if (tx_power < 0) {
  925. IL_WARN(
  926. "Requested user TXPOWER %d below 1 mW.\n",
  927. tx_power);
  928. return -EINVAL;
  929. }
  930. if (tx_power > il->tx_power_device_lmt) {
  931. IL_WARN(
  932. "Requested user TXPOWER %d above upper limit %d.\n",
  933. tx_power, il->tx_power_device_lmt);
  934. return -EINVAL;
  935. }
  936. if (!il_is_ready_rf(il))
  937. return -EIO;
  938. /* scan complete and commit_rxon use tx_power_next value,
  939. * it always need to be updated for newest request */
  940. il->tx_power_next = tx_power;
  941. /* do not set tx power when scanning or channel changing */
  942. defer = test_bit(STATUS_SCANNING, &il->status) ||
  943. memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
  944. if (defer && !force) {
  945. D_INFO("Deferring tx power set\n");
  946. return 0;
  947. }
  948. prev_tx_power = il->tx_power_user_lmt;
  949. il->tx_power_user_lmt = tx_power;
  950. ret = il->cfg->ops->lib->send_tx_power(il);
  951. /* if fail to set tx_power, restore the orig. tx power */
  952. if (ret) {
  953. il->tx_power_user_lmt = prev_tx_power;
  954. il->tx_power_next = prev_tx_power;
  955. }
  956. return ret;
  957. }
  958. EXPORT_SYMBOL(il_set_tx_power);
  959. void il_send_bt_config(struct il_priv *il)
  960. {
  961. struct il_bt_cmd bt_cmd = {
  962. .lead_time = BT_LEAD_TIME_DEF,
  963. .max_kill = BT_MAX_KILL_DEF,
  964. .kill_ack_mask = 0,
  965. .kill_cts_mask = 0,
  966. };
  967. if (!bt_coex_active)
  968. bt_cmd.flags = BT_COEX_DISABLE;
  969. else
  970. bt_cmd.flags = BT_COEX_ENABLE;
  971. D_INFO("BT coex %s\n",
  972. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  973. if (il_send_cmd_pdu(il, REPLY_BT_CONFIG,
  974. sizeof(struct il_bt_cmd), &bt_cmd))
  975. IL_ERR("failed to send BT Coex Config\n");
  976. }
  977. EXPORT_SYMBOL(il_send_bt_config);
  978. int il_send_stats_request(struct il_priv *il, u8 flags, bool clear)
  979. {
  980. struct il_stats_cmd stats_cmd = {
  981. .configuration_flags =
  982. clear ? IL_STATS_CONF_CLEAR_STATS : 0,
  983. };
  984. if (flags & CMD_ASYNC)
  985. return il_send_cmd_pdu_async(il, REPLY_STATISTICS_CMD,
  986. sizeof(struct il_stats_cmd),
  987. &stats_cmd, NULL);
  988. else
  989. return il_send_cmd_pdu(il, REPLY_STATISTICS_CMD,
  990. sizeof(struct il_stats_cmd),
  991. &stats_cmd);
  992. }
  993. EXPORT_SYMBOL(il_send_stats_request);
  994. void il_rx_pm_sleep_notif(struct il_priv *il,
  995. struct il_rx_buf *rxb)
  996. {
  997. #ifdef CONFIG_IWLEGACY_DEBUG
  998. struct il_rx_pkt *pkt = rxb_addr(rxb);
  999. struct il_sleep_notification *sleep = &(pkt->u.sleep_notif);
  1000. D_RX("sleep mode: %d, src: %d\n",
  1001. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  1002. #endif
  1003. }
  1004. EXPORT_SYMBOL(il_rx_pm_sleep_notif);
  1005. void il_rx_pm_debug_stats_notif(struct il_priv *il,
  1006. struct il_rx_buf *rxb)
  1007. {
  1008. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1009. u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  1010. D_RADIO("Dumping %d bytes of unhandled "
  1011. "notification for %s:\n", len,
  1012. il_get_cmd_string(pkt->hdr.cmd));
  1013. il_print_hex_dump(il, IL_DL_RADIO, pkt->u.raw, len);
  1014. }
  1015. EXPORT_SYMBOL(il_rx_pm_debug_stats_notif);
  1016. void il_rx_reply_error(struct il_priv *il,
  1017. struct il_rx_buf *rxb)
  1018. {
  1019. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1020. IL_ERR("Error Reply type 0x%08X cmd %s (0x%02X) "
  1021. "seq 0x%04X ser 0x%08X\n",
  1022. le32_to_cpu(pkt->u.err_resp.error_type),
  1023. il_get_cmd_string(pkt->u.err_resp.cmd_id),
  1024. pkt->u.err_resp.cmd_id,
  1025. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  1026. le32_to_cpu(pkt->u.err_resp.error_info));
  1027. }
  1028. EXPORT_SYMBOL(il_rx_reply_error);
  1029. void il_clear_isr_stats(struct il_priv *il)
  1030. {
  1031. memset(&il->isr_stats, 0, sizeof(il->isr_stats));
  1032. }
  1033. int il_mac_conf_tx(struct ieee80211_hw *hw,
  1034. struct ieee80211_vif *vif, u16 queue,
  1035. const struct ieee80211_tx_queue_params *params)
  1036. {
  1037. struct il_priv *il = hw->priv;
  1038. unsigned long flags;
  1039. int q;
  1040. D_MAC80211("enter\n");
  1041. if (!il_is_ready_rf(il)) {
  1042. D_MAC80211("leave - RF not ready\n");
  1043. return -EIO;
  1044. }
  1045. if (queue >= AC_NUM) {
  1046. D_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  1047. return 0;
  1048. }
  1049. q = AC_NUM - 1 - queue;
  1050. spin_lock_irqsave(&il->lock, flags);
  1051. il->ctx.qos_data.def_qos_parm.ac[q].cw_min =
  1052. cpu_to_le16(params->cw_min);
  1053. il->ctx.qos_data.def_qos_parm.ac[q].cw_max =
  1054. cpu_to_le16(params->cw_max);
  1055. il->ctx.qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  1056. il->ctx.qos_data.def_qos_parm.ac[q].edca_txop =
  1057. cpu_to_le16((params->txop * 32));
  1058. il->ctx.qos_data.def_qos_parm.ac[q].reserved1 = 0;
  1059. spin_unlock_irqrestore(&il->lock, flags);
  1060. D_MAC80211("leave\n");
  1061. return 0;
  1062. }
  1063. EXPORT_SYMBOL(il_mac_conf_tx);
  1064. int il_mac_tx_last_beacon(struct ieee80211_hw *hw)
  1065. {
  1066. struct il_priv *il = hw->priv;
  1067. return il->ibss_manager == IL_IBSS_MANAGER;
  1068. }
  1069. EXPORT_SYMBOL_GPL(il_mac_tx_last_beacon);
  1070. static int
  1071. il_set_mode(struct il_priv *il, struct il_rxon_context *ctx)
  1072. {
  1073. il_connection_init_rx_config(il, ctx);
  1074. if (il->cfg->ops->hcmd->set_rxon_chain)
  1075. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  1076. return il_commit_rxon(il, ctx);
  1077. }
  1078. static int il_setup_interface(struct il_priv *il,
  1079. struct il_rxon_context *ctx)
  1080. {
  1081. struct ieee80211_vif *vif = ctx->vif;
  1082. int err;
  1083. lockdep_assert_held(&il->mutex);
  1084. /*
  1085. * This variable will be correct only when there's just
  1086. * a single context, but all code using it is for hardware
  1087. * that supports only one context.
  1088. */
  1089. il->iw_mode = vif->type;
  1090. ctx->is_active = true;
  1091. err = il_set_mode(il, ctx);
  1092. if (err) {
  1093. if (!ctx->always_active)
  1094. ctx->is_active = false;
  1095. return err;
  1096. }
  1097. return 0;
  1098. }
  1099. int
  1100. il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1101. {
  1102. struct il_priv *il = hw->priv;
  1103. struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
  1104. int err;
  1105. u32 modes;
  1106. D_MAC80211("enter: type %d, addr %pM\n",
  1107. vif->type, vif->addr);
  1108. mutex_lock(&il->mutex);
  1109. if (!il_is_ready_rf(il)) {
  1110. IL_WARN("Try to add interface when device not ready\n");
  1111. err = -EINVAL;
  1112. goto out;
  1113. }
  1114. /* check if busy context is exclusive */
  1115. if (il->ctx.vif &&
  1116. (il->ctx.exclusive_interface_modes & BIT(il->ctx.vif->type))) {
  1117. err = -EINVAL;
  1118. goto out;
  1119. }
  1120. modes = il->ctx.interface_modes | il->ctx.exclusive_interface_modes;
  1121. if (!(modes & BIT(vif->type))) {
  1122. err = -EOPNOTSUPP;
  1123. goto out;
  1124. }
  1125. vif_priv->ctx = &il->ctx;
  1126. il->ctx.vif = vif;
  1127. err = il_setup_interface(il, &il->ctx);
  1128. if (err) {
  1129. il->ctx.vif = NULL;
  1130. il->iw_mode = NL80211_IFTYPE_STATION;
  1131. }
  1132. out:
  1133. mutex_unlock(&il->mutex);
  1134. D_MAC80211("leave\n");
  1135. return err;
  1136. }
  1137. EXPORT_SYMBOL(il_mac_add_interface);
  1138. static void il_teardown_interface(struct il_priv *il,
  1139. struct ieee80211_vif *vif,
  1140. bool mode_change)
  1141. {
  1142. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  1143. lockdep_assert_held(&il->mutex);
  1144. if (il->scan_vif == vif) {
  1145. il_scan_cancel_timeout(il, 200);
  1146. il_force_scan_end(il);
  1147. }
  1148. if (!mode_change) {
  1149. il_set_mode(il, ctx);
  1150. if (!ctx->always_active)
  1151. ctx->is_active = false;
  1152. }
  1153. }
  1154. void il_mac_remove_interface(struct ieee80211_hw *hw,
  1155. struct ieee80211_vif *vif)
  1156. {
  1157. struct il_priv *il = hw->priv;
  1158. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  1159. D_MAC80211("enter\n");
  1160. mutex_lock(&il->mutex);
  1161. WARN_ON(ctx->vif != vif);
  1162. ctx->vif = NULL;
  1163. il_teardown_interface(il, vif, false);
  1164. memset(il->bssid, 0, ETH_ALEN);
  1165. mutex_unlock(&il->mutex);
  1166. D_MAC80211("leave\n");
  1167. }
  1168. EXPORT_SYMBOL(il_mac_remove_interface);
  1169. int il_alloc_txq_mem(struct il_priv *il)
  1170. {
  1171. if (!il->txq)
  1172. il->txq = kzalloc(
  1173. sizeof(struct il_tx_queue) *
  1174. il->cfg->base_params->num_of_queues,
  1175. GFP_KERNEL);
  1176. if (!il->txq) {
  1177. IL_ERR("Not enough memory for txq\n");
  1178. return -ENOMEM;
  1179. }
  1180. return 0;
  1181. }
  1182. EXPORT_SYMBOL(il_alloc_txq_mem);
  1183. void il_txq_mem(struct il_priv *il)
  1184. {
  1185. kfree(il->txq);
  1186. il->txq = NULL;
  1187. }
  1188. EXPORT_SYMBOL(il_txq_mem);
  1189. #ifdef CONFIG_IWLEGACY_DEBUGFS
  1190. #define IL_TRAFFIC_DUMP_SIZE (IL_TRAFFIC_ENTRY_SIZE * IL_TRAFFIC_ENTRIES)
  1191. void il_reset_traffic_log(struct il_priv *il)
  1192. {
  1193. il->tx_traffic_idx = 0;
  1194. il->rx_traffic_idx = 0;
  1195. if (il->tx_traffic)
  1196. memset(il->tx_traffic, 0, IL_TRAFFIC_DUMP_SIZE);
  1197. if (il->rx_traffic)
  1198. memset(il->rx_traffic, 0, IL_TRAFFIC_DUMP_SIZE);
  1199. }
  1200. int il_alloc_traffic_mem(struct il_priv *il)
  1201. {
  1202. u32 traffic_size = IL_TRAFFIC_DUMP_SIZE;
  1203. if (il_debug_level & IL_DL_TX) {
  1204. if (!il->tx_traffic) {
  1205. il->tx_traffic =
  1206. kzalloc(traffic_size, GFP_KERNEL);
  1207. if (!il->tx_traffic)
  1208. return -ENOMEM;
  1209. }
  1210. }
  1211. if (il_debug_level & IL_DL_RX) {
  1212. if (!il->rx_traffic) {
  1213. il->rx_traffic =
  1214. kzalloc(traffic_size, GFP_KERNEL);
  1215. if (!il->rx_traffic)
  1216. return -ENOMEM;
  1217. }
  1218. }
  1219. il_reset_traffic_log(il);
  1220. return 0;
  1221. }
  1222. EXPORT_SYMBOL(il_alloc_traffic_mem);
  1223. void il_free_traffic_mem(struct il_priv *il)
  1224. {
  1225. kfree(il->tx_traffic);
  1226. il->tx_traffic = NULL;
  1227. kfree(il->rx_traffic);
  1228. il->rx_traffic = NULL;
  1229. }
  1230. EXPORT_SYMBOL(il_free_traffic_mem);
  1231. void il_dbg_log_tx_data_frame(struct il_priv *il,
  1232. u16 length, struct ieee80211_hdr *header)
  1233. {
  1234. __le16 fc;
  1235. u16 len;
  1236. if (likely(!(il_debug_level & IL_DL_TX)))
  1237. return;
  1238. if (!il->tx_traffic)
  1239. return;
  1240. fc = header->frame_control;
  1241. if (ieee80211_is_data(fc)) {
  1242. len = (length > IL_TRAFFIC_ENTRY_SIZE)
  1243. ? IL_TRAFFIC_ENTRY_SIZE : length;
  1244. memcpy((il->tx_traffic +
  1245. (il->tx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)),
  1246. header, len);
  1247. il->tx_traffic_idx =
  1248. (il->tx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES;
  1249. }
  1250. }
  1251. EXPORT_SYMBOL(il_dbg_log_tx_data_frame);
  1252. void il_dbg_log_rx_data_frame(struct il_priv *il,
  1253. u16 length, struct ieee80211_hdr *header)
  1254. {
  1255. __le16 fc;
  1256. u16 len;
  1257. if (likely(!(il_debug_level & IL_DL_RX)))
  1258. return;
  1259. if (!il->rx_traffic)
  1260. return;
  1261. fc = header->frame_control;
  1262. if (ieee80211_is_data(fc)) {
  1263. len = (length > IL_TRAFFIC_ENTRY_SIZE)
  1264. ? IL_TRAFFIC_ENTRY_SIZE : length;
  1265. memcpy((il->rx_traffic +
  1266. (il->rx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)),
  1267. header, len);
  1268. il->rx_traffic_idx =
  1269. (il->rx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES;
  1270. }
  1271. }
  1272. EXPORT_SYMBOL(il_dbg_log_rx_data_frame);
  1273. const char *il_get_mgmt_string(int cmd)
  1274. {
  1275. switch (cmd) {
  1276. IL_CMD(MANAGEMENT_ASSOC_REQ);
  1277. IL_CMD(MANAGEMENT_ASSOC_RESP);
  1278. IL_CMD(MANAGEMENT_REASSOC_REQ);
  1279. IL_CMD(MANAGEMENT_REASSOC_RESP);
  1280. IL_CMD(MANAGEMENT_PROBE_REQ);
  1281. IL_CMD(MANAGEMENT_PROBE_RESP);
  1282. IL_CMD(MANAGEMENT_BEACON);
  1283. IL_CMD(MANAGEMENT_ATIM);
  1284. IL_CMD(MANAGEMENT_DISASSOC);
  1285. IL_CMD(MANAGEMENT_AUTH);
  1286. IL_CMD(MANAGEMENT_DEAUTH);
  1287. IL_CMD(MANAGEMENT_ACTION);
  1288. default:
  1289. return "UNKNOWN";
  1290. }
  1291. }
  1292. const char *il_get_ctrl_string(int cmd)
  1293. {
  1294. switch (cmd) {
  1295. IL_CMD(CONTROL_BACK_REQ);
  1296. IL_CMD(CONTROL_BACK);
  1297. IL_CMD(CONTROL_PSPOLL);
  1298. IL_CMD(CONTROL_RTS);
  1299. IL_CMD(CONTROL_CTS);
  1300. IL_CMD(CONTROL_ACK);
  1301. IL_CMD(CONTROL_CFEND);
  1302. IL_CMD(CONTROL_CFENDACK);
  1303. default:
  1304. return "UNKNOWN";
  1305. }
  1306. }
  1307. void il_clear_traffic_stats(struct il_priv *il)
  1308. {
  1309. memset(&il->tx_stats, 0, sizeof(struct traffic_stats));
  1310. memset(&il->rx_stats, 0, sizeof(struct traffic_stats));
  1311. }
  1312. /*
  1313. * if CONFIG_IWLEGACY_DEBUGFS defined,
  1314. * il_update_stats function will
  1315. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass
  1316. * Use debugFs to display the rx/rx_stats
  1317. * if CONFIG_IWLEGACY_DEBUGFS not being defined, then no MGMT and CTRL
  1318. * information will be recorded, but DATA pkt still will be recorded
  1319. * for the reason of il_led.c need to control the led blinking based on
  1320. * number of tx and rx data.
  1321. *
  1322. */
  1323. void
  1324. il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len)
  1325. {
  1326. struct traffic_stats *stats;
  1327. if (is_tx)
  1328. stats = &il->tx_stats;
  1329. else
  1330. stats = &il->rx_stats;
  1331. if (ieee80211_is_mgmt(fc)) {
  1332. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  1333. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  1334. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  1335. break;
  1336. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  1337. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  1338. break;
  1339. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  1340. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  1341. break;
  1342. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  1343. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  1344. break;
  1345. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  1346. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  1347. break;
  1348. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  1349. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  1350. break;
  1351. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  1352. stats->mgmt[MANAGEMENT_BEACON]++;
  1353. break;
  1354. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  1355. stats->mgmt[MANAGEMENT_ATIM]++;
  1356. break;
  1357. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  1358. stats->mgmt[MANAGEMENT_DISASSOC]++;
  1359. break;
  1360. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  1361. stats->mgmt[MANAGEMENT_AUTH]++;
  1362. break;
  1363. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  1364. stats->mgmt[MANAGEMENT_DEAUTH]++;
  1365. break;
  1366. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  1367. stats->mgmt[MANAGEMENT_ACTION]++;
  1368. break;
  1369. }
  1370. } else if (ieee80211_is_ctl(fc)) {
  1371. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  1372. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  1373. stats->ctrl[CONTROL_BACK_REQ]++;
  1374. break;
  1375. case cpu_to_le16(IEEE80211_STYPE_BACK):
  1376. stats->ctrl[CONTROL_BACK]++;
  1377. break;
  1378. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  1379. stats->ctrl[CONTROL_PSPOLL]++;
  1380. break;
  1381. case cpu_to_le16(IEEE80211_STYPE_RTS):
  1382. stats->ctrl[CONTROL_RTS]++;
  1383. break;
  1384. case cpu_to_le16(IEEE80211_STYPE_CTS):
  1385. stats->ctrl[CONTROL_CTS]++;
  1386. break;
  1387. case cpu_to_le16(IEEE80211_STYPE_ACK):
  1388. stats->ctrl[CONTROL_ACK]++;
  1389. break;
  1390. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  1391. stats->ctrl[CONTROL_CFEND]++;
  1392. break;
  1393. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  1394. stats->ctrl[CONTROL_CFENDACK]++;
  1395. break;
  1396. }
  1397. } else {
  1398. /* data */
  1399. stats->data_cnt++;
  1400. stats->data_bytes += len;
  1401. }
  1402. }
  1403. EXPORT_SYMBOL(il_update_stats);
  1404. #endif
  1405. int il_force_reset(struct il_priv *il, bool external)
  1406. {
  1407. struct il_force_reset *force_reset;
  1408. if (test_bit(STATUS_EXIT_PENDING, &il->status))
  1409. return -EINVAL;
  1410. force_reset = &il->force_reset;
  1411. force_reset->reset_request_count++;
  1412. if (!external) {
  1413. if (force_reset->last_force_reset_jiffies &&
  1414. time_after(force_reset->last_force_reset_jiffies +
  1415. force_reset->reset_duration, jiffies)) {
  1416. D_INFO("force reset rejected\n");
  1417. force_reset->reset_reject_count++;
  1418. return -EAGAIN;
  1419. }
  1420. }
  1421. force_reset->reset_success_count++;
  1422. force_reset->last_force_reset_jiffies = jiffies;
  1423. /*
  1424. * if the request is from external(ex: debugfs),
  1425. * then always perform the request in regardless the module
  1426. * parameter setting
  1427. * if the request is from internal (uCode error or driver
  1428. * detect failure), then fw_restart module parameter
  1429. * need to be check before performing firmware reload
  1430. */
  1431. if (!external && !il->cfg->mod_params->restart_fw) {
  1432. D_INFO("Cancel firmware reload based on "
  1433. "module parameter setting\n");
  1434. return 0;
  1435. }
  1436. IL_ERR("On demand firmware reload\n");
  1437. /* Set the FW error flag -- cleared on il_down */
  1438. set_bit(STATUS_FW_ERROR, &il->status);
  1439. wake_up(&il->wait_command_queue);
  1440. /*
  1441. * Keep the restart process from trying to send host
  1442. * commands by clearing the INIT status bit
  1443. */
  1444. clear_bit(STATUS_READY, &il->status);
  1445. queue_work(il->workqueue, &il->restart);
  1446. return 0;
  1447. }
  1448. int
  1449. il_mac_change_interface(struct ieee80211_hw *hw,
  1450. struct ieee80211_vif *vif,
  1451. enum nl80211_iftype newtype, bool newp2p)
  1452. {
  1453. struct il_priv *il = hw->priv;
  1454. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  1455. u32 modes;
  1456. int err;
  1457. newtype = ieee80211_iftype_p2p(newtype, newp2p);
  1458. mutex_lock(&il->mutex);
  1459. if (!ctx->vif || !il_is_ready_rf(il)) {
  1460. /*
  1461. * Huh? But wait ... this can maybe happen when
  1462. * we're in the middle of a firmware restart!
  1463. */
  1464. err = -EBUSY;
  1465. goto out;
  1466. }
  1467. modes = ctx->interface_modes | ctx->exclusive_interface_modes;
  1468. if (!(modes & BIT(newtype))) {
  1469. err = -EOPNOTSUPP;
  1470. goto out;
  1471. }
  1472. if ((il->ctx.exclusive_interface_modes & BIT(il->ctx.vif->type)) ||
  1473. (il->ctx.exclusive_interface_modes & BIT(newtype))) {
  1474. err = -EINVAL;
  1475. goto out;
  1476. }
  1477. /* success */
  1478. il_teardown_interface(il, vif, true);
  1479. vif->type = newtype;
  1480. vif->p2p = newp2p;
  1481. err = il_setup_interface(il, ctx);
  1482. WARN_ON(err);
  1483. /*
  1484. * We've switched internally, but submitting to the
  1485. * device may have failed for some reason. Mask this
  1486. * error, because otherwise mac80211 will not switch
  1487. * (and set the interface type back) and we'll be
  1488. * out of sync with it.
  1489. */
  1490. err = 0;
  1491. out:
  1492. mutex_unlock(&il->mutex);
  1493. return err;
  1494. }
  1495. EXPORT_SYMBOL(il_mac_change_interface);
  1496. /*
  1497. * On every watchdog tick we check (latest) time stamp. If it does not
  1498. * change during timeout period and queue is not empty we reset firmware.
  1499. */
  1500. static int il_check_stuck_queue(struct il_priv *il, int cnt)
  1501. {
  1502. struct il_tx_queue *txq = &il->txq[cnt];
  1503. struct il_queue *q = &txq->q;
  1504. unsigned long timeout;
  1505. int ret;
  1506. if (q->read_ptr == q->write_ptr) {
  1507. txq->time_stamp = jiffies;
  1508. return 0;
  1509. }
  1510. timeout = txq->time_stamp +
  1511. msecs_to_jiffies(il->cfg->base_params->wd_timeout);
  1512. if (time_after(jiffies, timeout)) {
  1513. IL_ERR("Queue %d stuck for %u ms.\n",
  1514. q->id, il->cfg->base_params->wd_timeout);
  1515. ret = il_force_reset(il, false);
  1516. return (ret == -EAGAIN) ? 0 : 1;
  1517. }
  1518. return 0;
  1519. }
  1520. /*
  1521. * Making watchdog tick be a quarter of timeout assure we will
  1522. * discover the queue hung between timeout and 1.25*timeout
  1523. */
  1524. #define IL_WD_TICK(timeout) ((timeout) / 4)
  1525. /*
  1526. * Watchdog timer callback, we check each tx queue for stuck, if if hung
  1527. * we reset the firmware. If everything is fine just rearm the timer.
  1528. */
  1529. void il_bg_watchdog(unsigned long data)
  1530. {
  1531. struct il_priv *il = (struct il_priv *)data;
  1532. int cnt;
  1533. unsigned long timeout;
  1534. if (test_bit(STATUS_EXIT_PENDING, &il->status))
  1535. return;
  1536. timeout = il->cfg->base_params->wd_timeout;
  1537. if (timeout == 0)
  1538. return;
  1539. /* monitor and check for stuck cmd queue */
  1540. if (il_check_stuck_queue(il, il->cmd_queue))
  1541. return;
  1542. /* monitor and check for other stuck queues */
  1543. if (il_is_any_associated(il)) {
  1544. for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) {
  1545. /* skip as we already checked the command queue */
  1546. if (cnt == il->cmd_queue)
  1547. continue;
  1548. if (il_check_stuck_queue(il, cnt))
  1549. return;
  1550. }
  1551. }
  1552. mod_timer(&il->watchdog, jiffies +
  1553. msecs_to_jiffies(IL_WD_TICK(timeout)));
  1554. }
  1555. EXPORT_SYMBOL(il_bg_watchdog);
  1556. void il_setup_watchdog(struct il_priv *il)
  1557. {
  1558. unsigned int timeout = il->cfg->base_params->wd_timeout;
  1559. if (timeout)
  1560. mod_timer(&il->watchdog,
  1561. jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
  1562. else
  1563. del_timer(&il->watchdog);
  1564. }
  1565. EXPORT_SYMBOL(il_setup_watchdog);
  1566. /*
  1567. * extended beacon time format
  1568. * time in usec will be changed into a 32-bit value in extended:internal format
  1569. * the extended part is the beacon counts
  1570. * the internal part is the time in usec within one beacon interval
  1571. */
  1572. u32
  1573. il_usecs_to_beacons(struct il_priv *il,
  1574. u32 usec, u32 beacon_interval)
  1575. {
  1576. u32 quot;
  1577. u32 rem;
  1578. u32 interval = beacon_interval * TIME_UNIT;
  1579. if (!interval || !usec)
  1580. return 0;
  1581. quot = (usec / interval) &
  1582. (il_beacon_time_mask_high(il,
  1583. il->hw_params.beacon_time_tsf_bits) >>
  1584. il->hw_params.beacon_time_tsf_bits);
  1585. rem = (usec % interval) & il_beacon_time_mask_low(il,
  1586. il->hw_params.beacon_time_tsf_bits);
  1587. return (quot << il->hw_params.beacon_time_tsf_bits) + rem;
  1588. }
  1589. EXPORT_SYMBOL(il_usecs_to_beacons);
  1590. /* base is usually what we get from ucode with each received frame,
  1591. * the same as HW timer counter counting down
  1592. */
  1593. __le32 il_add_beacon_time(struct il_priv *il, u32 base,
  1594. u32 addon, u32 beacon_interval)
  1595. {
  1596. u32 base_low = base & il_beacon_time_mask_low(il,
  1597. il->hw_params.beacon_time_tsf_bits);
  1598. u32 addon_low = addon & il_beacon_time_mask_low(il,
  1599. il->hw_params.beacon_time_tsf_bits);
  1600. u32 interval = beacon_interval * TIME_UNIT;
  1601. u32 res = (base & il_beacon_time_mask_high(il,
  1602. il->hw_params.beacon_time_tsf_bits)) +
  1603. (addon & il_beacon_time_mask_high(il,
  1604. il->hw_params.beacon_time_tsf_bits));
  1605. if (base_low > addon_low)
  1606. res += base_low - addon_low;
  1607. else if (base_low < addon_low) {
  1608. res += interval + base_low - addon_low;
  1609. res += (1 << il->hw_params.beacon_time_tsf_bits);
  1610. } else
  1611. res += (1 << il->hw_params.beacon_time_tsf_bits);
  1612. return cpu_to_le32(res);
  1613. }
  1614. EXPORT_SYMBOL(il_add_beacon_time);
  1615. #ifdef CONFIG_PM
  1616. int il_pci_suspend(struct device *device)
  1617. {
  1618. struct pci_dev *pdev = to_pci_dev(device);
  1619. struct il_priv *il = pci_get_drvdata(pdev);
  1620. /*
  1621. * This function is called when system goes into suspend state
  1622. * mac80211 will call il_mac_stop() from the mac80211 suspend function
  1623. * first but since il_mac_stop() has no knowledge of who the caller is,
  1624. * it will not call apm_ops.stop() to stop the DMA operation.
  1625. * Calling apm_ops.stop here to make sure we stop the DMA.
  1626. */
  1627. il_apm_stop(il);
  1628. return 0;
  1629. }
  1630. EXPORT_SYMBOL(il_pci_suspend);
  1631. int il_pci_resume(struct device *device)
  1632. {
  1633. struct pci_dev *pdev = to_pci_dev(device);
  1634. struct il_priv *il = pci_get_drvdata(pdev);
  1635. bool hw_rfkill = false;
  1636. /*
  1637. * We disable the RETRY_TIMEOUT register (0x41) to keep
  1638. * PCI Tx retries from interfering with C3 CPU state.
  1639. */
  1640. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  1641. il_enable_interrupts(il);
  1642. if (!(_il_rd(il, CSR_GP_CNTRL) &
  1643. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  1644. hw_rfkill = true;
  1645. if (hw_rfkill)
  1646. set_bit(STATUS_RF_KILL_HW, &il->status);
  1647. else
  1648. clear_bit(STATUS_RF_KILL_HW, &il->status);
  1649. wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rfkill);
  1650. return 0;
  1651. }
  1652. EXPORT_SYMBOL(il_pci_resume);
  1653. const struct dev_pm_ops il_pm_ops = {
  1654. .suspend = il_pci_suspend,
  1655. .resume = il_pci_resume,
  1656. .freeze = il_pci_suspend,
  1657. .thaw = il_pci_resume,
  1658. .poweroff = il_pci_suspend,
  1659. .restore = il_pci_resume,
  1660. };
  1661. EXPORT_SYMBOL(il_pm_ops);
  1662. #endif /* CONFIG_PM */
  1663. static void
  1664. il_update_qos(struct il_priv *il, struct il_rxon_context *ctx)
  1665. {
  1666. if (test_bit(STATUS_EXIT_PENDING, &il->status))
  1667. return;
  1668. if (!ctx->is_active)
  1669. return;
  1670. ctx->qos_data.def_qos_parm.qos_flags = 0;
  1671. if (ctx->qos_data.qos_active)
  1672. ctx->qos_data.def_qos_parm.qos_flags |=
  1673. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1674. if (ctx->ht.enabled)
  1675. ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1676. D_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1677. ctx->qos_data.qos_active,
  1678. ctx->qos_data.def_qos_parm.qos_flags);
  1679. il_send_cmd_pdu_async(il, ctx->qos_cmd,
  1680. sizeof(struct il_qosparam_cmd),
  1681. &ctx->qos_data.def_qos_parm, NULL);
  1682. }
  1683. /**
  1684. * il_mac_config - mac80211 config callback
  1685. */
  1686. int il_mac_config(struct ieee80211_hw *hw, u32 changed)
  1687. {
  1688. struct il_priv *il = hw->priv;
  1689. const struct il_channel_info *ch_info;
  1690. struct ieee80211_conf *conf = &hw->conf;
  1691. struct ieee80211_channel *channel = conf->channel;
  1692. struct il_ht_config *ht_conf = &il->current_ht_config;
  1693. struct il_rxon_context *ctx = &il->ctx;
  1694. unsigned long flags = 0;
  1695. int ret = 0;
  1696. u16 ch;
  1697. int scan_active = 0;
  1698. bool ht_changed = false;
  1699. if (WARN_ON(!il->cfg->ops->legacy))
  1700. return -EOPNOTSUPP;
  1701. mutex_lock(&il->mutex);
  1702. D_MAC80211("enter to channel %d changed 0x%X\n",
  1703. channel->hw_value, changed);
  1704. if (unlikely(test_bit(STATUS_SCANNING, &il->status))) {
  1705. scan_active = 1;
  1706. D_MAC80211("scan active\n");
  1707. }
  1708. if (changed & (IEEE80211_CONF_CHANGE_SMPS |
  1709. IEEE80211_CONF_CHANGE_CHANNEL)) {
  1710. /* mac80211 uses static for non-HT which is what we want */
  1711. il->current_ht_config.smps = conf->smps_mode;
  1712. /*
  1713. * Recalculate chain counts.
  1714. *
  1715. * If monitor mode is enabled then mac80211 will
  1716. * set up the SM PS mode to OFF if an HT channel is
  1717. * configured.
  1718. */
  1719. if (il->cfg->ops->hcmd->set_rxon_chain)
  1720. il->cfg->ops->hcmd->set_rxon_chain(il, &il->ctx);
  1721. }
  1722. /* during scanning mac80211 will delay channel setting until
  1723. * scan finish with changed = 0
  1724. */
  1725. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  1726. if (scan_active)
  1727. goto set_ch_out;
  1728. ch = channel->hw_value;
  1729. ch_info = il_get_channel_info(il, channel->band, ch);
  1730. if (!il_is_channel_valid(ch_info)) {
  1731. D_MAC80211("leave - invalid channel\n");
  1732. ret = -EINVAL;
  1733. goto set_ch_out;
  1734. }
  1735. if (il->iw_mode == NL80211_IFTYPE_ADHOC &&
  1736. !il_is_channel_ibss(ch_info)) {
  1737. D_MAC80211("leave - not IBSS channel\n");
  1738. ret = -EINVAL;
  1739. goto set_ch_out;
  1740. }
  1741. spin_lock_irqsave(&il->lock, flags);
  1742. /* Configure HT40 channels */
  1743. if (ctx->ht.enabled != conf_is_ht(conf)) {
  1744. ctx->ht.enabled = conf_is_ht(conf);
  1745. ht_changed = true;
  1746. }
  1747. if (ctx->ht.enabled) {
  1748. if (conf_is_ht40_minus(conf)) {
  1749. ctx->ht.extension_chan_offset =
  1750. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  1751. ctx->ht.is_40mhz = true;
  1752. } else if (conf_is_ht40_plus(conf)) {
  1753. ctx->ht.extension_chan_offset =
  1754. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  1755. ctx->ht.is_40mhz = true;
  1756. } else {
  1757. ctx->ht.extension_chan_offset =
  1758. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  1759. ctx->ht.is_40mhz = false;
  1760. }
  1761. } else
  1762. ctx->ht.is_40mhz = false;
  1763. /*
  1764. * Default to no protection. Protection mode will
  1765. * later be set from BSS config in il_ht_conf
  1766. */
  1767. ctx->ht.protection =
  1768. IEEE80211_HT_OP_MODE_PROTECTION_NONE;
  1769. /* if we are switching from ht to 2.4 clear flags
  1770. * from any ht related info since 2.4 does not
  1771. * support ht */
  1772. if ((le16_to_cpu(ctx->staging.channel) != ch))
  1773. ctx->staging.flags = 0;
  1774. il_set_rxon_channel(il, channel, ctx);
  1775. il_set_rxon_ht(il, ht_conf);
  1776. il_set_flags_for_band(il, ctx, channel->band,
  1777. ctx->vif);
  1778. spin_unlock_irqrestore(&il->lock, flags);
  1779. if (il->cfg->ops->legacy->update_bcast_stations)
  1780. ret =
  1781. il->cfg->ops->legacy->update_bcast_stations(il);
  1782. set_ch_out:
  1783. /* The list of supported rates and rate mask can be different
  1784. * for each band; since the band may have changed, reset
  1785. * the rate mask to what mac80211 lists */
  1786. il_set_rate(il);
  1787. }
  1788. if (changed & (IEEE80211_CONF_CHANGE_PS |
  1789. IEEE80211_CONF_CHANGE_IDLE)) {
  1790. ret = il_power_update_mode(il, false);
  1791. if (ret)
  1792. D_MAC80211("Error setting sleep level\n");
  1793. }
  1794. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1795. D_MAC80211("TX Power old=%d new=%d\n",
  1796. il->tx_power_user_lmt, conf->power_level);
  1797. il_set_tx_power(il, conf->power_level, false);
  1798. }
  1799. if (!il_is_ready(il)) {
  1800. D_MAC80211("leave - not ready\n");
  1801. goto out;
  1802. }
  1803. if (scan_active)
  1804. goto out;
  1805. if (memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging)))
  1806. il_commit_rxon(il, ctx);
  1807. else
  1808. D_INFO("Not re-sending same RXON configuration.\n");
  1809. if (ht_changed)
  1810. il_update_qos(il, ctx);
  1811. out:
  1812. D_MAC80211("leave\n");
  1813. mutex_unlock(&il->mutex);
  1814. return ret;
  1815. }
  1816. EXPORT_SYMBOL(il_mac_config);
  1817. void il_mac_reset_tsf(struct ieee80211_hw *hw,
  1818. struct ieee80211_vif *vif)
  1819. {
  1820. struct il_priv *il = hw->priv;
  1821. unsigned long flags;
  1822. struct il_rxon_context *ctx = &il->ctx;
  1823. if (WARN_ON(!il->cfg->ops->legacy))
  1824. return;
  1825. mutex_lock(&il->mutex);
  1826. D_MAC80211("enter\n");
  1827. spin_lock_irqsave(&il->lock, flags);
  1828. memset(&il->current_ht_config, 0, sizeof(struct il_ht_config));
  1829. spin_unlock_irqrestore(&il->lock, flags);
  1830. spin_lock_irqsave(&il->lock, flags);
  1831. /* new association get rid of ibss beacon skb */
  1832. if (il->beacon_skb)
  1833. dev_kfree_skb(il->beacon_skb);
  1834. il->beacon_skb = NULL;
  1835. il->timestamp = 0;
  1836. spin_unlock_irqrestore(&il->lock, flags);
  1837. il_scan_cancel_timeout(il, 100);
  1838. if (!il_is_ready_rf(il)) {
  1839. D_MAC80211("leave - not ready\n");
  1840. mutex_unlock(&il->mutex);
  1841. return;
  1842. }
  1843. /* we are restarting association process
  1844. * clear RXON_FILTER_ASSOC_MSK bit
  1845. */
  1846. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1847. il_commit_rxon(il, ctx);
  1848. il_set_rate(il);
  1849. mutex_unlock(&il->mutex);
  1850. D_MAC80211("leave\n");
  1851. }
  1852. EXPORT_SYMBOL(il_mac_reset_tsf);
  1853. static void il_ht_conf(struct il_priv *il,
  1854. struct ieee80211_vif *vif)
  1855. {
  1856. struct il_ht_config *ht_conf = &il->current_ht_config;
  1857. struct ieee80211_sta *sta;
  1858. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1859. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  1860. D_ASSOC("enter:\n");
  1861. if (!ctx->ht.enabled)
  1862. return;
  1863. ctx->ht.protection =
  1864. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  1865. ctx->ht.non_gf_sta_present =
  1866. !!(bss_conf->ht_operation_mode &
  1867. IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  1868. ht_conf->single_chain_sufficient = false;
  1869. switch (vif->type) {
  1870. case NL80211_IFTYPE_STATION:
  1871. rcu_read_lock();
  1872. sta = ieee80211_find_sta(vif, bss_conf->bssid);
  1873. if (sta) {
  1874. struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
  1875. int maxstreams;
  1876. maxstreams = (ht_cap->mcs.tx_params &
  1877. IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
  1878. >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1879. maxstreams += 1;
  1880. if (ht_cap->mcs.rx_mask[1] == 0 &&
  1881. ht_cap->mcs.rx_mask[2] == 0)
  1882. ht_conf->single_chain_sufficient = true;
  1883. if (maxstreams <= 1)
  1884. ht_conf->single_chain_sufficient = true;
  1885. } else {
  1886. /*
  1887. * If at all, this can only happen through a race
  1888. * when the AP disconnects us while we're still
  1889. * setting up the connection, in that case mac80211
  1890. * will soon tell us about that.
  1891. */
  1892. ht_conf->single_chain_sufficient = true;
  1893. }
  1894. rcu_read_unlock();
  1895. break;
  1896. case NL80211_IFTYPE_ADHOC:
  1897. ht_conf->single_chain_sufficient = true;
  1898. break;
  1899. default:
  1900. break;
  1901. }
  1902. D_ASSOC("leave\n");
  1903. }
  1904. static inline void il_set_no_assoc(struct il_priv *il,
  1905. struct ieee80211_vif *vif)
  1906. {
  1907. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  1908. /*
  1909. * inform the ucode that there is no longer an
  1910. * association and that no more packets should be
  1911. * sent
  1912. */
  1913. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1914. ctx->staging.assoc_id = 0;
  1915. il_commit_rxon(il, ctx);
  1916. }
  1917. static void il_beacon_update(struct ieee80211_hw *hw,
  1918. struct ieee80211_vif *vif)
  1919. {
  1920. struct il_priv *il = hw->priv;
  1921. unsigned long flags;
  1922. __le64 timestamp;
  1923. struct sk_buff *skb = ieee80211_beacon_get(hw, vif);
  1924. if (!skb)
  1925. return;
  1926. D_MAC80211("enter\n");
  1927. lockdep_assert_held(&il->mutex);
  1928. if (!il->beacon_ctx) {
  1929. IL_ERR("update beacon but no beacon context!\n");
  1930. dev_kfree_skb(skb);
  1931. return;
  1932. }
  1933. spin_lock_irqsave(&il->lock, flags);
  1934. if (il->beacon_skb)
  1935. dev_kfree_skb(il->beacon_skb);
  1936. il->beacon_skb = skb;
  1937. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  1938. il->timestamp = le64_to_cpu(timestamp);
  1939. D_MAC80211("leave\n");
  1940. spin_unlock_irqrestore(&il->lock, flags);
  1941. if (!il_is_ready_rf(il)) {
  1942. D_MAC80211("leave - RF not ready\n");
  1943. return;
  1944. }
  1945. il->cfg->ops->legacy->post_associate(il);
  1946. }
  1947. void il_mac_bss_info_changed(struct ieee80211_hw *hw,
  1948. struct ieee80211_vif *vif,
  1949. struct ieee80211_bss_conf *bss_conf,
  1950. u32 changes)
  1951. {
  1952. struct il_priv *il = hw->priv;
  1953. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  1954. int ret;
  1955. if (WARN_ON(!il->cfg->ops->legacy))
  1956. return;
  1957. D_MAC80211("changes = 0x%X\n", changes);
  1958. mutex_lock(&il->mutex);
  1959. if (!il_is_alive(il)) {
  1960. mutex_unlock(&il->mutex);
  1961. return;
  1962. }
  1963. if (changes & BSS_CHANGED_QOS) {
  1964. unsigned long flags;
  1965. spin_lock_irqsave(&il->lock, flags);
  1966. ctx->qos_data.qos_active = bss_conf->qos;
  1967. il_update_qos(il, ctx);
  1968. spin_unlock_irqrestore(&il->lock, flags);
  1969. }
  1970. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  1971. /*
  1972. * the add_interface code must make sure we only ever
  1973. * have a single interface that could be beaconing at
  1974. * any time.
  1975. */
  1976. if (vif->bss_conf.enable_beacon)
  1977. il->beacon_ctx = ctx;
  1978. else
  1979. il->beacon_ctx = NULL;
  1980. }
  1981. if (changes & BSS_CHANGED_BSSID) {
  1982. D_MAC80211("BSSID %pM\n", bss_conf->bssid);
  1983. /*
  1984. * If there is currently a HW scan going on in the
  1985. * background then we need to cancel it else the RXON
  1986. * below/in post_associate will fail.
  1987. */
  1988. if (il_scan_cancel_timeout(il, 100)) {
  1989. IL_WARN(
  1990. "Aborted scan still in progress after 100ms\n");
  1991. D_MAC80211(
  1992. "leaving - scan abort failed.\n");
  1993. mutex_unlock(&il->mutex);
  1994. return;
  1995. }
  1996. /* mac80211 only sets assoc when in STATION mode */
  1997. if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
  1998. memcpy(ctx->staging.bssid_addr,
  1999. bss_conf->bssid, ETH_ALEN);
  2000. /* currently needed in a few places */
  2001. memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
  2002. } else {
  2003. ctx->staging.filter_flags &=
  2004. ~RXON_FILTER_ASSOC_MSK;
  2005. }
  2006. }
  2007. /*
  2008. * This needs to be after setting the BSSID in case
  2009. * mac80211 decides to do both changes at once because
  2010. * it will invoke post_associate.
  2011. */
  2012. if (vif->type == NL80211_IFTYPE_ADHOC && (changes & BSS_CHANGED_BEACON))
  2013. il_beacon_update(hw, vif);
  2014. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  2015. D_MAC80211("ERP_PREAMBLE %d\n",
  2016. bss_conf->use_short_preamble);
  2017. if (bss_conf->use_short_preamble)
  2018. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2019. else
  2020. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2021. }
  2022. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  2023. D_MAC80211(
  2024. "ERP_CTS %d\n", bss_conf->use_cts_prot);
  2025. if (bss_conf->use_cts_prot && il->band != IEEE80211_BAND_5GHZ)
  2026. ctx->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
  2027. else
  2028. ctx->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  2029. if (bss_conf->use_cts_prot)
  2030. ctx->staging.flags |= RXON_FLG_SELF_CTS_EN;
  2031. else
  2032. ctx->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
  2033. }
  2034. if (changes & BSS_CHANGED_BASIC_RATES) {
  2035. /* XXX use this information
  2036. *
  2037. * To do that, remove code from il_set_rate() and put something
  2038. * like this here:
  2039. *
  2040. if (A-band)
  2041. ctx->staging.ofdm_basic_rates =
  2042. bss_conf->basic_rates;
  2043. else
  2044. ctx->staging.ofdm_basic_rates =
  2045. bss_conf->basic_rates >> 4;
  2046. ctx->staging.cck_basic_rates =
  2047. bss_conf->basic_rates & 0xF;
  2048. */
  2049. }
  2050. if (changes & BSS_CHANGED_HT) {
  2051. il_ht_conf(il, vif);
  2052. if (il->cfg->ops->hcmd->set_rxon_chain)
  2053. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  2054. }
  2055. if (changes & BSS_CHANGED_ASSOC) {
  2056. D_MAC80211("ASSOC %d\n", bss_conf->assoc);
  2057. if (bss_conf->assoc) {
  2058. il->timestamp = bss_conf->timestamp;
  2059. if (!il_is_rfkill(il))
  2060. il->cfg->ops->legacy->post_associate(il);
  2061. } else
  2062. il_set_no_assoc(il, vif);
  2063. }
  2064. if (changes && il_is_associated_ctx(ctx) && bss_conf->aid) {
  2065. D_MAC80211("Changes (%#x) while associated\n",
  2066. changes);
  2067. ret = il_send_rxon_assoc(il, ctx);
  2068. if (!ret) {
  2069. /* Sync active_rxon with latest change. */
  2070. memcpy((void *)&ctx->active,
  2071. &ctx->staging,
  2072. sizeof(struct il_rxon_cmd));
  2073. }
  2074. }
  2075. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  2076. if (vif->bss_conf.enable_beacon) {
  2077. memcpy(ctx->staging.bssid_addr,
  2078. bss_conf->bssid, ETH_ALEN);
  2079. memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
  2080. il->cfg->ops->legacy->config_ap(il);
  2081. } else
  2082. il_set_no_assoc(il, vif);
  2083. }
  2084. if (changes & BSS_CHANGED_IBSS) {
  2085. ret = il->cfg->ops->legacy->manage_ibss_station(il, vif,
  2086. bss_conf->ibss_joined);
  2087. if (ret)
  2088. IL_ERR("failed to %s IBSS station %pM\n",
  2089. bss_conf->ibss_joined ? "add" : "remove",
  2090. bss_conf->bssid);
  2091. }
  2092. mutex_unlock(&il->mutex);
  2093. D_MAC80211("leave\n");
  2094. }
  2095. EXPORT_SYMBOL(il_mac_bss_info_changed);
  2096. irqreturn_t il_isr(int irq, void *data)
  2097. {
  2098. struct il_priv *il = data;
  2099. u32 inta, inta_mask;
  2100. u32 inta_fh;
  2101. unsigned long flags;
  2102. if (!il)
  2103. return IRQ_NONE;
  2104. spin_lock_irqsave(&il->lock, flags);
  2105. /* Disable (but don't clear!) interrupts here to avoid
  2106. * back-to-back ISRs and sporadic interrupts from our NIC.
  2107. * If we have something to service, the tasklet will re-enable ints.
  2108. * If we *don't* have something, we'll re-enable before leaving here. */
  2109. inta_mask = _il_rd(il, CSR_INT_MASK); /* just for debug */
  2110. _il_wr(il, CSR_INT_MASK, 0x00000000);
  2111. /* Discover which interrupts are active/pending */
  2112. inta = _il_rd(il, CSR_INT);
  2113. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  2114. /* Ignore interrupt if there's nothing in NIC to service.
  2115. * This may be due to IRQ shared with another device,
  2116. * or due to sporadic interrupts thrown from our NIC. */
  2117. if (!inta && !inta_fh) {
  2118. D_ISR(
  2119. "Ignore interrupt, inta == 0, inta_fh == 0\n");
  2120. goto none;
  2121. }
  2122. if (inta == 0xFFFFFFFF || (inta & 0xFFFFFFF0) == 0xa5a5a5a0) {
  2123. /* Hardware disappeared. It might have already raised
  2124. * an interrupt */
  2125. IL_WARN("HARDWARE GONE?? INTA == 0x%08x\n", inta);
  2126. goto unplugged;
  2127. }
  2128. D_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  2129. inta, inta_mask, inta_fh);
  2130. inta &= ~CSR_INT_BIT_SCD;
  2131. /* il_irq_tasklet() will service interrupts and re-enable them */
  2132. if (likely(inta || inta_fh))
  2133. tasklet_schedule(&il->irq_tasklet);
  2134. unplugged:
  2135. spin_unlock_irqrestore(&il->lock, flags);
  2136. return IRQ_HANDLED;
  2137. none:
  2138. /* re-enable interrupts here since we don't have anything to service. */
  2139. /* only Re-enable if disabled by irq */
  2140. if (test_bit(STATUS_INT_ENABLED, &il->status))
  2141. il_enable_interrupts(il);
  2142. spin_unlock_irqrestore(&il->lock, flags);
  2143. return IRQ_NONE;
  2144. }
  2145. EXPORT_SYMBOL(il_isr);
  2146. /*
  2147. * il_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
  2148. * function.
  2149. */
  2150. void il_tx_cmd_protection(struct il_priv *il,
  2151. struct ieee80211_tx_info *info,
  2152. __le16 fc, __le32 *tx_flags)
  2153. {
  2154. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  2155. *tx_flags |= TX_CMD_FLG_RTS_MSK;
  2156. *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2157. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2158. if (!ieee80211_is_mgmt(fc))
  2159. return;
  2160. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2161. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  2162. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  2163. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  2164. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  2165. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2166. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  2167. break;
  2168. }
  2169. } else if (info->control.rates[0].flags &
  2170. IEEE80211_TX_RC_USE_CTS_PROTECT) {
  2171. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2172. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  2173. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2174. }
  2175. }
  2176. EXPORT_SYMBOL(il_tx_cmd_protection);