exynos_thermal.c 26 KB

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  1. /*
  2. * exynos_thermal.c - Samsung EXYNOS TMU (Thermal Management Unit)
  3. *
  4. * Copyright (C) 2011 Samsung Electronics
  5. * Donggeun Kim <dg77.kim@samsung.com>
  6. * Amit Daniel Kachhap <amit.kachhap@linaro.org>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/module.h>
  24. #include <linux/err.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/clk.h>
  30. #include <linux/workqueue.h>
  31. #include <linux/sysfs.h>
  32. #include <linux/kobject.h>
  33. #include <linux/io.h>
  34. #include <linux/mutex.h>
  35. #include <linux/platform_data/exynos_thermal.h>
  36. #include <linux/thermal.h>
  37. #include <linux/cpufreq.h>
  38. #include <linux/cpu_cooling.h>
  39. #include <linux/of.h>
  40. #include <plat/cpu.h>
  41. /* Exynos generic registers */
  42. #define EXYNOS_TMU_REG_TRIMINFO 0x0
  43. #define EXYNOS_TMU_REG_CONTROL 0x20
  44. #define EXYNOS_TMU_REG_STATUS 0x28
  45. #define EXYNOS_TMU_REG_CURRENT_TEMP 0x40
  46. #define EXYNOS_TMU_REG_INTEN 0x70
  47. #define EXYNOS_TMU_REG_INTSTAT 0x74
  48. #define EXYNOS_TMU_REG_INTCLEAR 0x78
  49. #define EXYNOS_TMU_TRIM_TEMP_MASK 0xff
  50. #define EXYNOS_TMU_GAIN_SHIFT 8
  51. #define EXYNOS_TMU_REF_VOLTAGE_SHIFT 24
  52. #define EXYNOS_TMU_CORE_ON 3
  53. #define EXYNOS_TMU_CORE_OFF 2
  54. #define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET 50
  55. /* Exynos4210 specific registers */
  56. #define EXYNOS4210_TMU_REG_THRESHOLD_TEMP 0x44
  57. #define EXYNOS4210_TMU_REG_TRIG_LEVEL0 0x50
  58. #define EXYNOS4210_TMU_REG_TRIG_LEVEL1 0x54
  59. #define EXYNOS4210_TMU_REG_TRIG_LEVEL2 0x58
  60. #define EXYNOS4210_TMU_REG_TRIG_LEVEL3 0x5C
  61. #define EXYNOS4210_TMU_REG_PAST_TEMP0 0x60
  62. #define EXYNOS4210_TMU_REG_PAST_TEMP1 0x64
  63. #define EXYNOS4210_TMU_REG_PAST_TEMP2 0x68
  64. #define EXYNOS4210_TMU_REG_PAST_TEMP3 0x6C
  65. #define EXYNOS4210_TMU_TRIG_LEVEL0_MASK 0x1
  66. #define EXYNOS4210_TMU_TRIG_LEVEL1_MASK 0x10
  67. #define EXYNOS4210_TMU_TRIG_LEVEL2_MASK 0x100
  68. #define EXYNOS4210_TMU_TRIG_LEVEL3_MASK 0x1000
  69. #define EXYNOS4210_TMU_INTCLEAR_VAL 0x1111
  70. /* Exynos5250 and Exynos4412 specific registers */
  71. #define EXYNOS_TMU_TRIMINFO_CON 0x14
  72. #define EXYNOS_THD_TEMP_RISE 0x50
  73. #define EXYNOS_THD_TEMP_FALL 0x54
  74. #define EXYNOS_EMUL_CON 0x80
  75. #define EXYNOS_TRIMINFO_RELOAD 0x1
  76. #define EXYNOS_TMU_CLEAR_RISE_INT 0x111
  77. #define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 16)
  78. #define EXYNOS_MUX_ADDR_VALUE 6
  79. #define EXYNOS_MUX_ADDR_SHIFT 20
  80. #define EXYNOS_TMU_TRIP_MODE_SHIFT 13
  81. #define EFUSE_MIN_VALUE 40
  82. #define EFUSE_MAX_VALUE 100
  83. /* In-kernel thermal framework related macros & definations */
  84. #define SENSOR_NAME_LEN 16
  85. #define MAX_TRIP_COUNT 8
  86. #define MAX_COOLING_DEVICE 4
  87. #define ACTIVE_INTERVAL 500
  88. #define IDLE_INTERVAL 10000
  89. #define MCELSIUS 1000
  90. /* CPU Zone information */
  91. #define PANIC_ZONE 4
  92. #define WARN_ZONE 3
  93. #define MONITOR_ZONE 2
  94. #define SAFE_ZONE 1
  95. #define GET_ZONE(trip) (trip + 2)
  96. #define GET_TRIP(zone) (zone - 2)
  97. #define EXYNOS_ZONE_COUNT 3
  98. struct exynos_tmu_data {
  99. struct exynos_tmu_platform_data *pdata;
  100. struct resource *mem;
  101. void __iomem *base;
  102. int irq;
  103. enum soc_type soc;
  104. struct work_struct irq_work;
  105. struct mutex lock;
  106. struct clk *clk;
  107. u8 temp_error1, temp_error2;
  108. };
  109. struct thermal_trip_point_conf {
  110. int trip_val[MAX_TRIP_COUNT];
  111. int trip_count;
  112. };
  113. struct thermal_cooling_conf {
  114. struct freq_clip_table freq_data[MAX_TRIP_COUNT];
  115. int freq_clip_count;
  116. };
  117. struct thermal_sensor_conf {
  118. char name[SENSOR_NAME_LEN];
  119. int (*read_temperature)(void *data);
  120. struct thermal_trip_point_conf trip_data;
  121. struct thermal_cooling_conf cooling_data;
  122. void *private_data;
  123. };
  124. struct exynos_thermal_zone {
  125. enum thermal_device_mode mode;
  126. struct thermal_zone_device *therm_dev;
  127. struct thermal_cooling_device *cool_dev[MAX_COOLING_DEVICE];
  128. unsigned int cool_dev_size;
  129. struct platform_device *exynos4_dev;
  130. struct thermal_sensor_conf *sensor_conf;
  131. bool bind;
  132. };
  133. static struct exynos_thermal_zone *th_zone;
  134. static void exynos_unregister_thermal(void);
  135. static int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf);
  136. /* Get mode callback functions for thermal zone */
  137. static int exynos_get_mode(struct thermal_zone_device *thermal,
  138. enum thermal_device_mode *mode)
  139. {
  140. if (th_zone)
  141. *mode = th_zone->mode;
  142. return 0;
  143. }
  144. /* Set mode callback functions for thermal zone */
  145. static int exynos_set_mode(struct thermal_zone_device *thermal,
  146. enum thermal_device_mode mode)
  147. {
  148. if (!th_zone->therm_dev) {
  149. pr_notice("thermal zone not registered\n");
  150. return 0;
  151. }
  152. mutex_lock(&th_zone->therm_dev->lock);
  153. if (mode == THERMAL_DEVICE_ENABLED)
  154. th_zone->therm_dev->polling_delay = IDLE_INTERVAL;
  155. else
  156. th_zone->therm_dev->polling_delay = 0;
  157. mutex_unlock(&th_zone->therm_dev->lock);
  158. th_zone->mode = mode;
  159. thermal_zone_device_update(th_zone->therm_dev);
  160. pr_info("thermal polling set for duration=%d msec\n",
  161. th_zone->therm_dev->polling_delay);
  162. return 0;
  163. }
  164. /* Get trip type callback functions for thermal zone */
  165. static int exynos_get_trip_type(struct thermal_zone_device *thermal, int trip,
  166. enum thermal_trip_type *type)
  167. {
  168. switch (GET_ZONE(trip)) {
  169. case MONITOR_ZONE:
  170. case WARN_ZONE:
  171. *type = THERMAL_TRIP_ACTIVE;
  172. break;
  173. case PANIC_ZONE:
  174. *type = THERMAL_TRIP_CRITICAL;
  175. break;
  176. default:
  177. return -EINVAL;
  178. }
  179. return 0;
  180. }
  181. /* Get trip temperature callback functions for thermal zone */
  182. static int exynos_get_trip_temp(struct thermal_zone_device *thermal, int trip,
  183. unsigned long *temp)
  184. {
  185. if (trip < GET_TRIP(MONITOR_ZONE) || trip > GET_TRIP(PANIC_ZONE))
  186. return -EINVAL;
  187. *temp = th_zone->sensor_conf->trip_data.trip_val[trip];
  188. /* convert the temperature into millicelsius */
  189. *temp = *temp * MCELSIUS;
  190. return 0;
  191. }
  192. /* Get critical temperature callback functions for thermal zone */
  193. static int exynos_get_crit_temp(struct thermal_zone_device *thermal,
  194. unsigned long *temp)
  195. {
  196. int ret;
  197. /* Panic zone */
  198. ret = exynos_get_trip_temp(thermal, GET_TRIP(PANIC_ZONE), temp);
  199. return ret;
  200. }
  201. static int exynos_get_frequency_level(unsigned int cpu, unsigned int freq)
  202. {
  203. int i = 0, ret = -EINVAL;
  204. struct cpufreq_frequency_table *table = NULL;
  205. #ifdef CONFIG_CPU_FREQ
  206. table = cpufreq_frequency_get_table(cpu);
  207. #endif
  208. if (!table)
  209. return ret;
  210. while (table[i].frequency != CPUFREQ_TABLE_END) {
  211. if (table[i].frequency == CPUFREQ_ENTRY_INVALID)
  212. continue;
  213. if (table[i].frequency == freq)
  214. return i;
  215. i++;
  216. }
  217. return ret;
  218. }
  219. /* Bind callback functions for thermal zone */
  220. static int exynos_bind(struct thermal_zone_device *thermal,
  221. struct thermal_cooling_device *cdev)
  222. {
  223. int ret = 0, i, tab_size, level;
  224. struct freq_clip_table *tab_ptr, *clip_data;
  225. struct thermal_sensor_conf *data = th_zone->sensor_conf;
  226. tab_ptr = (struct freq_clip_table *)data->cooling_data.freq_data;
  227. tab_size = data->cooling_data.freq_clip_count;
  228. if (tab_ptr == NULL || tab_size == 0)
  229. return -EINVAL;
  230. /* find the cooling device registered*/
  231. for (i = 0; i < th_zone->cool_dev_size; i++)
  232. if (cdev == th_zone->cool_dev[i])
  233. break;
  234. /* No matching cooling device */
  235. if (i == th_zone->cool_dev_size)
  236. return 0;
  237. /* Bind the thermal zone to the cpufreq cooling device */
  238. for (i = 0; i < tab_size; i++) {
  239. clip_data = (struct freq_clip_table *)&(tab_ptr[i]);
  240. level = exynos_get_frequency_level(0, clip_data->freq_clip_max);
  241. if (level < 0)
  242. return 0;
  243. switch (GET_ZONE(i)) {
  244. case MONITOR_ZONE:
  245. case WARN_ZONE:
  246. if (thermal_zone_bind_cooling_device(thermal, i, cdev,
  247. level, level)) {
  248. pr_err("error binding cdev inst %d\n", i);
  249. ret = -EINVAL;
  250. }
  251. th_zone->bind = true;
  252. break;
  253. default:
  254. ret = -EINVAL;
  255. }
  256. }
  257. return ret;
  258. }
  259. /* Unbind callback functions for thermal zone */
  260. static int exynos_unbind(struct thermal_zone_device *thermal,
  261. struct thermal_cooling_device *cdev)
  262. {
  263. int ret = 0, i, tab_size;
  264. struct thermal_sensor_conf *data = th_zone->sensor_conf;
  265. if (th_zone->bind == false)
  266. return 0;
  267. tab_size = data->cooling_data.freq_clip_count;
  268. if (tab_size == 0)
  269. return -EINVAL;
  270. /* find the cooling device registered*/
  271. for (i = 0; i < th_zone->cool_dev_size; i++)
  272. if (cdev == th_zone->cool_dev[i])
  273. break;
  274. /* No matching cooling device */
  275. if (i == th_zone->cool_dev_size)
  276. return 0;
  277. /* Bind the thermal zone to the cpufreq cooling device */
  278. for (i = 0; i < tab_size; i++) {
  279. switch (GET_ZONE(i)) {
  280. case MONITOR_ZONE:
  281. case WARN_ZONE:
  282. if (thermal_zone_unbind_cooling_device(thermal, i,
  283. cdev)) {
  284. pr_err("error unbinding cdev inst=%d\n", i);
  285. ret = -EINVAL;
  286. }
  287. th_zone->bind = false;
  288. break;
  289. default:
  290. ret = -EINVAL;
  291. }
  292. }
  293. return ret;
  294. }
  295. /* Get temperature callback functions for thermal zone */
  296. static int exynos_get_temp(struct thermal_zone_device *thermal,
  297. unsigned long *temp)
  298. {
  299. void *data;
  300. if (!th_zone->sensor_conf) {
  301. pr_info("Temperature sensor not initialised\n");
  302. return -EINVAL;
  303. }
  304. data = th_zone->sensor_conf->private_data;
  305. *temp = th_zone->sensor_conf->read_temperature(data);
  306. /* convert the temperature into millicelsius */
  307. *temp = *temp * MCELSIUS;
  308. return 0;
  309. }
  310. /* Get the temperature trend */
  311. static int exynos_get_trend(struct thermal_zone_device *thermal,
  312. int trip, enum thermal_trend *trend)
  313. {
  314. if (thermal->temperature >= trip)
  315. *trend = THERMAL_TREND_RAISING;
  316. else
  317. *trend = THERMAL_TREND_DROPPING;
  318. return 0;
  319. }
  320. /* Operation callback functions for thermal zone */
  321. static struct thermal_zone_device_ops const exynos_dev_ops = {
  322. .bind = exynos_bind,
  323. .unbind = exynos_unbind,
  324. .get_temp = exynos_get_temp,
  325. .get_trend = exynos_get_trend,
  326. .get_mode = exynos_get_mode,
  327. .set_mode = exynos_set_mode,
  328. .get_trip_type = exynos_get_trip_type,
  329. .get_trip_temp = exynos_get_trip_temp,
  330. .get_crit_temp = exynos_get_crit_temp,
  331. };
  332. /*
  333. * This function may be called from interrupt based temperature sensor
  334. * when threshold is changed.
  335. */
  336. static void exynos_report_trigger(void)
  337. {
  338. unsigned int i;
  339. char data[10];
  340. char *envp[] = { data, NULL };
  341. if (!th_zone || !th_zone->therm_dev)
  342. return;
  343. if (th_zone->bind == false) {
  344. for (i = 0; i < th_zone->cool_dev_size; i++) {
  345. if (!th_zone->cool_dev[i])
  346. continue;
  347. exynos_bind(th_zone->therm_dev,
  348. th_zone->cool_dev[i]);
  349. }
  350. }
  351. thermal_zone_device_update(th_zone->therm_dev);
  352. mutex_lock(&th_zone->therm_dev->lock);
  353. /* Find the level for which trip happened */
  354. for (i = 0; i < th_zone->sensor_conf->trip_data.trip_count; i++) {
  355. if (th_zone->therm_dev->last_temperature <
  356. th_zone->sensor_conf->trip_data.trip_val[i] * MCELSIUS)
  357. break;
  358. }
  359. if (th_zone->mode == THERMAL_DEVICE_ENABLED) {
  360. if (i > 0)
  361. th_zone->therm_dev->polling_delay = ACTIVE_INTERVAL;
  362. else
  363. th_zone->therm_dev->polling_delay = IDLE_INTERVAL;
  364. }
  365. snprintf(data, sizeof(data), "%u", i);
  366. kobject_uevent_env(&th_zone->therm_dev->device.kobj, KOBJ_CHANGE, envp);
  367. mutex_unlock(&th_zone->therm_dev->lock);
  368. }
  369. /* Register with the in-kernel thermal management */
  370. static int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf)
  371. {
  372. int ret;
  373. struct cpumask mask_val;
  374. if (!sensor_conf || !sensor_conf->read_temperature) {
  375. pr_err("Temperature sensor not initialised\n");
  376. return -EINVAL;
  377. }
  378. th_zone = kzalloc(sizeof(struct exynos_thermal_zone), GFP_KERNEL);
  379. if (!th_zone)
  380. return -ENOMEM;
  381. th_zone->sensor_conf = sensor_conf;
  382. cpumask_set_cpu(0, &mask_val);
  383. th_zone->cool_dev[0] = cpufreq_cooling_register(&mask_val);
  384. if (IS_ERR(th_zone->cool_dev[0])) {
  385. pr_err("Failed to register cpufreq cooling device\n");
  386. ret = -EINVAL;
  387. goto err_unregister;
  388. }
  389. th_zone->cool_dev_size++;
  390. th_zone->therm_dev = thermal_zone_device_register(sensor_conf->name,
  391. EXYNOS_ZONE_COUNT, 0, NULL, &exynos_dev_ops, 0,
  392. IDLE_INTERVAL);
  393. if (IS_ERR(th_zone->therm_dev)) {
  394. pr_err("Failed to register thermal zone device\n");
  395. ret = -EINVAL;
  396. goto err_unregister;
  397. }
  398. th_zone->mode = THERMAL_DEVICE_ENABLED;
  399. pr_info("Exynos: Kernel Thermal management registered\n");
  400. return 0;
  401. err_unregister:
  402. exynos_unregister_thermal();
  403. return ret;
  404. }
  405. /* Un-Register with the in-kernel thermal management */
  406. static void exynos_unregister_thermal(void)
  407. {
  408. int i;
  409. if (th_zone && th_zone->therm_dev)
  410. thermal_zone_device_unregister(th_zone->therm_dev);
  411. for (i = 0; i < th_zone->cool_dev_size; i++) {
  412. if (th_zone && th_zone->cool_dev[i])
  413. cpufreq_cooling_unregister(th_zone->cool_dev[i]);
  414. }
  415. kfree(th_zone);
  416. pr_info("Exynos: Kernel Thermal management unregistered\n");
  417. }
  418. /*
  419. * TMU treats temperature as a mapped temperature code.
  420. * The temperature is converted differently depending on the calibration type.
  421. */
  422. static int temp_to_code(struct exynos_tmu_data *data, u8 temp)
  423. {
  424. struct exynos_tmu_platform_data *pdata = data->pdata;
  425. int temp_code;
  426. if (data->soc == SOC_ARCH_EXYNOS4210)
  427. /* temp should range between 25 and 125 */
  428. if (temp < 25 || temp > 125) {
  429. temp_code = -EINVAL;
  430. goto out;
  431. }
  432. switch (pdata->cal_type) {
  433. case TYPE_TWO_POINT_TRIMMING:
  434. temp_code = (temp - 25) *
  435. (data->temp_error2 - data->temp_error1) /
  436. (85 - 25) + data->temp_error1;
  437. break;
  438. case TYPE_ONE_POINT_TRIMMING:
  439. temp_code = temp + data->temp_error1 - 25;
  440. break;
  441. default:
  442. temp_code = temp + EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
  443. break;
  444. }
  445. out:
  446. return temp_code;
  447. }
  448. /*
  449. * Calculate a temperature value from a temperature code.
  450. * The unit of the temperature is degree Celsius.
  451. */
  452. static int code_to_temp(struct exynos_tmu_data *data, u8 temp_code)
  453. {
  454. struct exynos_tmu_platform_data *pdata = data->pdata;
  455. int temp;
  456. if (data->soc == SOC_ARCH_EXYNOS4210)
  457. /* temp_code should range between 75 and 175 */
  458. if (temp_code < 75 || temp_code > 175) {
  459. temp = -ENODATA;
  460. goto out;
  461. }
  462. switch (pdata->cal_type) {
  463. case TYPE_TWO_POINT_TRIMMING:
  464. temp = (temp_code - data->temp_error1) * (85 - 25) /
  465. (data->temp_error2 - data->temp_error1) + 25;
  466. break;
  467. case TYPE_ONE_POINT_TRIMMING:
  468. temp = temp_code - data->temp_error1 + 25;
  469. break;
  470. default:
  471. temp = temp_code - EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
  472. break;
  473. }
  474. out:
  475. return temp;
  476. }
  477. static int exynos_tmu_initialize(struct platform_device *pdev)
  478. {
  479. struct exynos_tmu_data *data = platform_get_drvdata(pdev);
  480. struct exynos_tmu_platform_data *pdata = data->pdata;
  481. unsigned int status, trim_info, rising_threshold;
  482. int ret = 0, threshold_code;
  483. mutex_lock(&data->lock);
  484. clk_enable(data->clk);
  485. status = readb(data->base + EXYNOS_TMU_REG_STATUS);
  486. if (!status) {
  487. ret = -EBUSY;
  488. goto out;
  489. }
  490. if (data->soc == SOC_ARCH_EXYNOS) {
  491. __raw_writel(EXYNOS_TRIMINFO_RELOAD,
  492. data->base + EXYNOS_TMU_TRIMINFO_CON);
  493. }
  494. /* Save trimming info in order to perform calibration */
  495. trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
  496. data->temp_error1 = trim_info & EXYNOS_TMU_TRIM_TEMP_MASK;
  497. data->temp_error2 = ((trim_info >> 8) & EXYNOS_TMU_TRIM_TEMP_MASK);
  498. if ((EFUSE_MIN_VALUE > data->temp_error1) ||
  499. (data->temp_error1 > EFUSE_MAX_VALUE) ||
  500. (data->temp_error2 != 0))
  501. data->temp_error1 = pdata->efuse_value;
  502. if (data->soc == SOC_ARCH_EXYNOS4210) {
  503. /* Write temperature code for threshold */
  504. threshold_code = temp_to_code(data, pdata->threshold);
  505. if (threshold_code < 0) {
  506. ret = threshold_code;
  507. goto out;
  508. }
  509. writeb(threshold_code,
  510. data->base + EXYNOS4210_TMU_REG_THRESHOLD_TEMP);
  511. writeb(pdata->trigger_levels[0],
  512. data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL0);
  513. writeb(pdata->trigger_levels[1],
  514. data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL1);
  515. writeb(pdata->trigger_levels[2],
  516. data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL2);
  517. writeb(pdata->trigger_levels[3],
  518. data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL3);
  519. writel(EXYNOS4210_TMU_INTCLEAR_VAL,
  520. data->base + EXYNOS_TMU_REG_INTCLEAR);
  521. } else if (data->soc == SOC_ARCH_EXYNOS) {
  522. /* Write temperature code for threshold */
  523. threshold_code = temp_to_code(data, pdata->trigger_levels[0]);
  524. if (threshold_code < 0) {
  525. ret = threshold_code;
  526. goto out;
  527. }
  528. rising_threshold = threshold_code;
  529. threshold_code = temp_to_code(data, pdata->trigger_levels[1]);
  530. if (threshold_code < 0) {
  531. ret = threshold_code;
  532. goto out;
  533. }
  534. rising_threshold |= (threshold_code << 8);
  535. threshold_code = temp_to_code(data, pdata->trigger_levels[2]);
  536. if (threshold_code < 0) {
  537. ret = threshold_code;
  538. goto out;
  539. }
  540. rising_threshold |= (threshold_code << 16);
  541. writel(rising_threshold,
  542. data->base + EXYNOS_THD_TEMP_RISE);
  543. writel(0, data->base + EXYNOS_THD_TEMP_FALL);
  544. writel(EXYNOS_TMU_CLEAR_RISE_INT|EXYNOS_TMU_CLEAR_FALL_INT,
  545. data->base + EXYNOS_TMU_REG_INTCLEAR);
  546. }
  547. out:
  548. clk_disable(data->clk);
  549. mutex_unlock(&data->lock);
  550. return ret;
  551. }
  552. static void exynos_tmu_control(struct platform_device *pdev, bool on)
  553. {
  554. struct exynos_tmu_data *data = platform_get_drvdata(pdev);
  555. struct exynos_tmu_platform_data *pdata = data->pdata;
  556. unsigned int con, interrupt_en;
  557. mutex_lock(&data->lock);
  558. clk_enable(data->clk);
  559. con = pdata->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT |
  560. pdata->gain << EXYNOS_TMU_GAIN_SHIFT;
  561. if (data->soc == SOC_ARCH_EXYNOS) {
  562. con |= pdata->noise_cancel_mode << EXYNOS_TMU_TRIP_MODE_SHIFT;
  563. con |= (EXYNOS_MUX_ADDR_VALUE << EXYNOS_MUX_ADDR_SHIFT);
  564. }
  565. if (on) {
  566. con |= EXYNOS_TMU_CORE_ON;
  567. interrupt_en = pdata->trigger_level3_en << 12 |
  568. pdata->trigger_level2_en << 8 |
  569. pdata->trigger_level1_en << 4 |
  570. pdata->trigger_level0_en;
  571. } else {
  572. con |= EXYNOS_TMU_CORE_OFF;
  573. interrupt_en = 0; /* Disable all interrupts */
  574. }
  575. writel(interrupt_en, data->base + EXYNOS_TMU_REG_INTEN);
  576. writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
  577. clk_disable(data->clk);
  578. mutex_unlock(&data->lock);
  579. }
  580. static int exynos_tmu_read(struct exynos_tmu_data *data)
  581. {
  582. u8 temp_code;
  583. int temp;
  584. mutex_lock(&data->lock);
  585. clk_enable(data->clk);
  586. temp_code = readb(data->base + EXYNOS_TMU_REG_CURRENT_TEMP);
  587. temp = code_to_temp(data, temp_code);
  588. clk_disable(data->clk);
  589. mutex_unlock(&data->lock);
  590. return temp;
  591. }
  592. static void exynos_tmu_work(struct work_struct *work)
  593. {
  594. struct exynos_tmu_data *data = container_of(work,
  595. struct exynos_tmu_data, irq_work);
  596. mutex_lock(&data->lock);
  597. clk_enable(data->clk);
  598. if (data->soc == SOC_ARCH_EXYNOS)
  599. writel(EXYNOS_TMU_CLEAR_RISE_INT,
  600. data->base + EXYNOS_TMU_REG_INTCLEAR);
  601. else
  602. writel(EXYNOS4210_TMU_INTCLEAR_VAL,
  603. data->base + EXYNOS_TMU_REG_INTCLEAR);
  604. clk_disable(data->clk);
  605. mutex_unlock(&data->lock);
  606. exynos_report_trigger();
  607. enable_irq(data->irq);
  608. }
  609. static irqreturn_t exynos_tmu_irq(int irq, void *id)
  610. {
  611. struct exynos_tmu_data *data = id;
  612. disable_irq_nosync(irq);
  613. schedule_work(&data->irq_work);
  614. return IRQ_HANDLED;
  615. }
  616. static struct thermal_sensor_conf exynos_sensor_conf = {
  617. .name = "exynos-therm",
  618. .read_temperature = (int (*)(void *))exynos_tmu_read,
  619. };
  620. #if defined(CONFIG_CPU_EXYNOS4210)
  621. static struct exynos_tmu_platform_data const exynos4210_default_tmu_data = {
  622. .threshold = 80,
  623. .trigger_levels[0] = 5,
  624. .trigger_levels[1] = 20,
  625. .trigger_levels[2] = 30,
  626. .trigger_level0_en = 1,
  627. .trigger_level1_en = 1,
  628. .trigger_level2_en = 1,
  629. .trigger_level3_en = 0,
  630. .gain = 15,
  631. .reference_voltage = 7,
  632. .cal_type = TYPE_ONE_POINT_TRIMMING,
  633. .freq_tab[0] = {
  634. .freq_clip_max = 800 * 1000,
  635. .temp_level = 85,
  636. },
  637. .freq_tab[1] = {
  638. .freq_clip_max = 200 * 1000,
  639. .temp_level = 100,
  640. },
  641. .freq_tab_count = 2,
  642. .type = SOC_ARCH_EXYNOS4210,
  643. };
  644. #define EXYNOS4210_TMU_DRV_DATA (&exynos4210_default_tmu_data)
  645. #else
  646. #define EXYNOS4210_TMU_DRV_DATA (NULL)
  647. #endif
  648. #if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412)
  649. static struct exynos_tmu_platform_data const exynos_default_tmu_data = {
  650. .trigger_levels[0] = 85,
  651. .trigger_levels[1] = 103,
  652. .trigger_levels[2] = 110,
  653. .trigger_level0_en = 1,
  654. .trigger_level1_en = 1,
  655. .trigger_level2_en = 1,
  656. .trigger_level3_en = 0,
  657. .gain = 8,
  658. .reference_voltage = 16,
  659. .noise_cancel_mode = 4,
  660. .cal_type = TYPE_ONE_POINT_TRIMMING,
  661. .efuse_value = 55,
  662. .freq_tab[0] = {
  663. .freq_clip_max = 800 * 1000,
  664. .temp_level = 85,
  665. },
  666. .freq_tab[1] = {
  667. .freq_clip_max = 200 * 1000,
  668. .temp_level = 103,
  669. },
  670. .freq_tab_count = 2,
  671. .type = SOC_ARCH_EXYNOS,
  672. };
  673. #define EXYNOS_TMU_DRV_DATA (&exynos_default_tmu_data)
  674. #else
  675. #define EXYNOS_TMU_DRV_DATA (NULL)
  676. #endif
  677. #ifdef CONFIG_OF
  678. static const struct of_device_id exynos_tmu_match[] = {
  679. {
  680. .compatible = "samsung,exynos4210-tmu",
  681. .data = (void *)EXYNOS4210_TMU_DRV_DATA,
  682. },
  683. {
  684. .compatible = "samsung,exynos5250-tmu",
  685. .data = (void *)EXYNOS_TMU_DRV_DATA,
  686. },
  687. {},
  688. };
  689. MODULE_DEVICE_TABLE(of, exynos_tmu_match);
  690. #else
  691. #define exynos_tmu_match NULL
  692. #endif
  693. static struct platform_device_id exynos_tmu_driver_ids[] = {
  694. {
  695. .name = "exynos4210-tmu",
  696. .driver_data = (kernel_ulong_t)EXYNOS4210_TMU_DRV_DATA,
  697. },
  698. {
  699. .name = "exynos5250-tmu",
  700. .driver_data = (kernel_ulong_t)EXYNOS_TMU_DRV_DATA,
  701. },
  702. { },
  703. };
  704. MODULE_DEVICE_TABLE(platform, exynos4_tmu_driver_ids);
  705. static inline struct exynos_tmu_platform_data *exynos_get_driver_data(
  706. struct platform_device *pdev)
  707. {
  708. #ifdef CONFIG_OF
  709. if (pdev->dev.of_node) {
  710. const struct of_device_id *match;
  711. match = of_match_node(exynos_tmu_match, pdev->dev.of_node);
  712. if (!match)
  713. return NULL;
  714. return (struct exynos_tmu_platform_data *) match->data;
  715. }
  716. #endif
  717. return (struct exynos_tmu_platform_data *)
  718. platform_get_device_id(pdev)->driver_data;
  719. }
  720. static int __devinit exynos_tmu_probe(struct platform_device *pdev)
  721. {
  722. struct exynos_tmu_data *data;
  723. struct exynos_tmu_platform_data *pdata = pdev->dev.platform_data;
  724. int ret, i;
  725. if (!pdata)
  726. pdata = exynos_get_driver_data(pdev);
  727. if (!pdata) {
  728. dev_err(&pdev->dev, "No platform init data supplied.\n");
  729. return -ENODEV;
  730. }
  731. data = kzalloc(sizeof(struct exynos_tmu_data), GFP_KERNEL);
  732. if (!data) {
  733. dev_err(&pdev->dev, "Failed to allocate driver structure\n");
  734. return -ENOMEM;
  735. }
  736. data->irq = platform_get_irq(pdev, 0);
  737. if (data->irq < 0) {
  738. ret = data->irq;
  739. dev_err(&pdev->dev, "Failed to get platform irq\n");
  740. goto err_free;
  741. }
  742. INIT_WORK(&data->irq_work, exynos_tmu_work);
  743. data->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  744. if (!data->mem) {
  745. ret = -ENOENT;
  746. dev_err(&pdev->dev, "Failed to get platform resource\n");
  747. goto err_free;
  748. }
  749. data->mem = request_mem_region(data->mem->start,
  750. resource_size(data->mem), pdev->name);
  751. if (!data->mem) {
  752. ret = -ENODEV;
  753. dev_err(&pdev->dev, "Failed to request memory region\n");
  754. goto err_free;
  755. }
  756. data->base = ioremap(data->mem->start, resource_size(data->mem));
  757. if (!data->base) {
  758. ret = -ENODEV;
  759. dev_err(&pdev->dev, "Failed to ioremap memory\n");
  760. goto err_mem_region;
  761. }
  762. ret = request_irq(data->irq, exynos_tmu_irq,
  763. IRQF_TRIGGER_RISING, "exynos-tmu", data);
  764. if (ret) {
  765. dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq);
  766. goto err_io_remap;
  767. }
  768. data->clk = clk_get(NULL, "tmu_apbif");
  769. if (IS_ERR(data->clk)) {
  770. ret = PTR_ERR(data->clk);
  771. dev_err(&pdev->dev, "Failed to get clock\n");
  772. goto err_irq;
  773. }
  774. if (pdata->type == SOC_ARCH_EXYNOS ||
  775. pdata->type == SOC_ARCH_EXYNOS4210)
  776. data->soc = pdata->type;
  777. else {
  778. ret = -EINVAL;
  779. dev_err(&pdev->dev, "Platform not supported\n");
  780. goto err_clk;
  781. }
  782. data->pdata = pdata;
  783. platform_set_drvdata(pdev, data);
  784. mutex_init(&data->lock);
  785. ret = exynos_tmu_initialize(pdev);
  786. if (ret) {
  787. dev_err(&pdev->dev, "Failed to initialize TMU\n");
  788. goto err_clk;
  789. }
  790. exynos_tmu_control(pdev, true);
  791. /* Register the sensor with thermal management interface */
  792. (&exynos_sensor_conf)->private_data = data;
  793. exynos_sensor_conf.trip_data.trip_count = pdata->trigger_level0_en +
  794. pdata->trigger_level1_en + pdata->trigger_level2_en +
  795. pdata->trigger_level3_en;
  796. for (i = 0; i < exynos_sensor_conf.trip_data.trip_count; i++)
  797. exynos_sensor_conf.trip_data.trip_val[i] =
  798. pdata->threshold + pdata->trigger_levels[i];
  799. exynos_sensor_conf.cooling_data.freq_clip_count =
  800. pdata->freq_tab_count;
  801. for (i = 0; i < pdata->freq_tab_count; i++) {
  802. exynos_sensor_conf.cooling_data.freq_data[i].freq_clip_max =
  803. pdata->freq_tab[i].freq_clip_max;
  804. exynos_sensor_conf.cooling_data.freq_data[i].temp_level =
  805. pdata->freq_tab[i].temp_level;
  806. }
  807. ret = exynos_register_thermal(&exynos_sensor_conf);
  808. if (ret) {
  809. dev_err(&pdev->dev, "Failed to register thermal interface\n");
  810. goto err_clk;
  811. }
  812. return 0;
  813. err_clk:
  814. platform_set_drvdata(pdev, NULL);
  815. clk_put(data->clk);
  816. err_irq:
  817. free_irq(data->irq, data);
  818. err_io_remap:
  819. iounmap(data->base);
  820. err_mem_region:
  821. release_mem_region(data->mem->start, resource_size(data->mem));
  822. err_free:
  823. kfree(data);
  824. return ret;
  825. }
  826. static int __devexit exynos_tmu_remove(struct platform_device *pdev)
  827. {
  828. struct exynos_tmu_data *data = platform_get_drvdata(pdev);
  829. exynos_tmu_control(pdev, false);
  830. exynos_unregister_thermal();
  831. clk_put(data->clk);
  832. free_irq(data->irq, data);
  833. iounmap(data->base);
  834. release_mem_region(data->mem->start, resource_size(data->mem));
  835. platform_set_drvdata(pdev, NULL);
  836. kfree(data);
  837. return 0;
  838. }
  839. #ifdef CONFIG_PM_SLEEP
  840. static int exynos_tmu_suspend(struct device *dev)
  841. {
  842. exynos_tmu_control(to_platform_device(dev), false);
  843. return 0;
  844. }
  845. static int exynos_tmu_resume(struct device *dev)
  846. {
  847. struct platform_device *pdev = to_platform_device(dev);
  848. exynos_tmu_initialize(pdev);
  849. exynos_tmu_control(pdev, true);
  850. return 0;
  851. }
  852. static SIMPLE_DEV_PM_OPS(exynos_tmu_pm,
  853. exynos_tmu_suspend, exynos_tmu_resume);
  854. #define EXYNOS_TMU_PM (&exynos_tmu_pm)
  855. #else
  856. #define EXYNOS_TMU_PM NULL
  857. #endif
  858. static struct platform_driver exynos_tmu_driver = {
  859. .driver = {
  860. .name = "exynos-tmu",
  861. .owner = THIS_MODULE,
  862. .pm = EXYNOS_TMU_PM,
  863. .of_match_table = exynos_tmu_match,
  864. },
  865. .probe = exynos_tmu_probe,
  866. .remove = __devexit_p(exynos_tmu_remove),
  867. .id_table = exynos_tmu_driver_ids,
  868. };
  869. module_platform_driver(exynos_tmu_driver);
  870. MODULE_DESCRIPTION("EXYNOS TMU Driver");
  871. MODULE_AUTHOR("Donggeun Kim <dg77.kim@samsung.com>");
  872. MODULE_LICENSE("GPL");
  873. MODULE_ALIAS("platform:exynos-tmu");