iwl-4965.c 137 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24. *
  25. *****************************************************************************/
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/version.h>
  29. #include <linux/init.h>
  30. #include <linux/pci.h>
  31. #include <linux/dma-mapping.h>
  32. #include <linux/delay.h>
  33. #include <linux/skbuff.h>
  34. #include <linux/netdevice.h>
  35. #include <linux/wireless.h>
  36. #include <net/mac80211.h>
  37. #include <linux/etherdevice.h>
  38. #include <asm/unaligned.h>
  39. #include "iwl-4965.h"
  40. #include "iwl-helpers.h"
  41. static void iwl4965_hw_card_show_info(struct iwl4965_priv *priv);
  42. #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
  43. [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
  44. IWL_RATE_SISO_##s##M_PLCP, \
  45. IWL_RATE_MIMO_##s##M_PLCP, \
  46. IWL_RATE_##r##M_IEEE, \
  47. IWL_RATE_##ip##M_INDEX, \
  48. IWL_RATE_##in##M_INDEX, \
  49. IWL_RATE_##rp##M_INDEX, \
  50. IWL_RATE_##rn##M_INDEX, \
  51. IWL_RATE_##pp##M_INDEX, \
  52. IWL_RATE_##np##M_INDEX }
  53. /*
  54. * Parameter order:
  55. * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
  56. *
  57. * If there isn't a valid next or previous rate then INV is used which
  58. * maps to IWL_RATE_INVALID
  59. *
  60. */
  61. const struct iwl4965_rate_info iwl4965_rates[IWL_RATE_COUNT] = {
  62. IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
  63. IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
  64. IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
  65. IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
  66. IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
  67. IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
  68. IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
  69. IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
  70. IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
  71. IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
  72. IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
  73. IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  74. IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
  75. };
  76. #ifdef CONFIG_IWL4965_HT
  77. static const u16 default_tid_to_tx_fifo[] = {
  78. IWL_TX_FIFO_AC1,
  79. IWL_TX_FIFO_AC0,
  80. IWL_TX_FIFO_AC0,
  81. IWL_TX_FIFO_AC1,
  82. IWL_TX_FIFO_AC2,
  83. IWL_TX_FIFO_AC2,
  84. IWL_TX_FIFO_AC3,
  85. IWL_TX_FIFO_AC3,
  86. IWL_TX_FIFO_NONE,
  87. IWL_TX_FIFO_NONE,
  88. IWL_TX_FIFO_NONE,
  89. IWL_TX_FIFO_NONE,
  90. IWL_TX_FIFO_NONE,
  91. IWL_TX_FIFO_NONE,
  92. IWL_TX_FIFO_NONE,
  93. IWL_TX_FIFO_NONE,
  94. IWL_TX_FIFO_AC3
  95. };
  96. #endif /*CONFIG_IWL4965_HT */
  97. static int is_fat_channel(__le32 rxon_flags)
  98. {
  99. return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
  100. (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
  101. }
  102. static u8 is_single_stream(struct iwl4965_priv *priv)
  103. {
  104. #ifdef CONFIG_IWL4965_HT
  105. if (!priv->current_ht_config.is_ht ||
  106. (priv->current_ht_config.supp_mcs_set[1] == 0) ||
  107. (priv->ps_mode == IWL_MIMO_PS_STATIC))
  108. return 1;
  109. #else
  110. return 1;
  111. #endif /*CONFIG_IWL4965_HT */
  112. return 0;
  113. }
  114. int iwl4965_hwrate_to_plcp_idx(u32 rate_n_flags)
  115. {
  116. int idx = 0;
  117. /* 4965 HT rate format */
  118. if (rate_n_flags & RATE_MCS_HT_MSK) {
  119. idx = (rate_n_flags & 0xff);
  120. if (idx >= IWL_RATE_MIMO_6M_PLCP)
  121. idx = idx - IWL_RATE_MIMO_6M_PLCP;
  122. idx += IWL_FIRST_OFDM_RATE;
  123. /* skip 9M not supported in ht*/
  124. if (idx >= IWL_RATE_9M_INDEX)
  125. idx += 1;
  126. if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
  127. return idx;
  128. /* 4965 legacy rate format, search for match in table */
  129. } else {
  130. for (idx = 0; idx < ARRAY_SIZE(iwl4965_rates); idx++)
  131. if (iwl4965_rates[idx].plcp == (rate_n_flags & 0xFF))
  132. return idx;
  133. }
  134. return -1;
  135. }
  136. /*
  137. * Determine how many receiver/antenna chains to use.
  138. * More provides better reception via diversity. Fewer saves power.
  139. * MIMO (dual stream) requires at least 2, but works better with 3.
  140. * This does not determine *which* chains to use, just how many.
  141. */
  142. static int iwl4965_get_rx_chain_counter(struct iwl4965_priv *priv,
  143. u8 *idle_state, u8 *rx_state)
  144. {
  145. u8 is_single = is_single_stream(priv);
  146. u8 is_cam = test_bit(STATUS_POWER_PMI, &priv->status) ? 0 : 1;
  147. /* # of Rx chains to use when expecting MIMO. */
  148. if (is_single || (!is_cam && (priv->ps_mode == IWL_MIMO_PS_STATIC)))
  149. *rx_state = 2;
  150. else
  151. *rx_state = 3;
  152. /* # Rx chains when idling and maybe trying to save power */
  153. switch (priv->ps_mode) {
  154. case IWL_MIMO_PS_STATIC:
  155. case IWL_MIMO_PS_DYNAMIC:
  156. *idle_state = (is_cam) ? 2 : 1;
  157. break;
  158. case IWL_MIMO_PS_NONE:
  159. *idle_state = (is_cam) ? *rx_state : 1;
  160. break;
  161. default:
  162. *idle_state = 1;
  163. break;
  164. }
  165. return 0;
  166. }
  167. int iwl4965_hw_rxq_stop(struct iwl4965_priv *priv)
  168. {
  169. int rc;
  170. unsigned long flags;
  171. spin_lock_irqsave(&priv->lock, flags);
  172. rc = iwl4965_grab_nic_access(priv);
  173. if (rc) {
  174. spin_unlock_irqrestore(&priv->lock, flags);
  175. return rc;
  176. }
  177. /* stop Rx DMA */
  178. iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
  179. rc = iwl4965_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
  180. (1 << 24), 1000);
  181. if (rc < 0)
  182. IWL_ERROR("Can't stop Rx DMA.\n");
  183. iwl4965_release_nic_access(priv);
  184. spin_unlock_irqrestore(&priv->lock, flags);
  185. return 0;
  186. }
  187. u8 iwl4965_hw_find_station(struct iwl4965_priv *priv, const u8 *addr)
  188. {
  189. int i;
  190. int start = 0;
  191. int ret = IWL_INVALID_STATION;
  192. unsigned long flags;
  193. DECLARE_MAC_BUF(mac);
  194. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) ||
  195. (priv->iw_mode == IEEE80211_IF_TYPE_AP))
  196. start = IWL_STA_ID;
  197. if (is_broadcast_ether_addr(addr))
  198. return IWL4965_BROADCAST_ID;
  199. spin_lock_irqsave(&priv->sta_lock, flags);
  200. for (i = start; i < priv->hw_setting.max_stations; i++)
  201. if ((priv->stations[i].used) &&
  202. (!compare_ether_addr
  203. (priv->stations[i].sta.sta.addr, addr))) {
  204. ret = i;
  205. goto out;
  206. }
  207. IWL_DEBUG_ASSOC_LIMIT("can not find STA %s total %d\n",
  208. print_mac(mac, addr), priv->num_stations);
  209. out:
  210. spin_unlock_irqrestore(&priv->sta_lock, flags);
  211. return ret;
  212. }
  213. static int iwl4965_nic_set_pwr_src(struct iwl4965_priv *priv, int pwr_max)
  214. {
  215. int ret;
  216. unsigned long flags;
  217. spin_lock_irqsave(&priv->lock, flags);
  218. ret = iwl4965_grab_nic_access(priv);
  219. if (ret) {
  220. spin_unlock_irqrestore(&priv->lock, flags);
  221. return ret;
  222. }
  223. if (!pwr_max) {
  224. u32 val;
  225. ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
  226. &val);
  227. if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
  228. iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
  229. APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
  230. ~APMG_PS_CTRL_MSK_PWR_SRC);
  231. } else
  232. iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
  233. APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
  234. ~APMG_PS_CTRL_MSK_PWR_SRC);
  235. iwl4965_release_nic_access(priv);
  236. spin_unlock_irqrestore(&priv->lock, flags);
  237. return ret;
  238. }
  239. static int iwl4965_rx_init(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  240. {
  241. int rc;
  242. unsigned long flags;
  243. unsigned int rb_size;
  244. spin_lock_irqsave(&priv->lock, flags);
  245. rc = iwl4965_grab_nic_access(priv);
  246. if (rc) {
  247. spin_unlock_irqrestore(&priv->lock, flags);
  248. return rc;
  249. }
  250. if (iwl4965_param_amsdu_size_8K)
  251. rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
  252. else
  253. rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
  254. /* Stop Rx DMA */
  255. iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
  256. /* Reset driver's Rx queue write index */
  257. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
  258. /* Tell device where to find RBD circular buffer in DRAM */
  259. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
  260. rxq->dma_addr >> 8);
  261. /* Tell device where in DRAM to update its Rx status */
  262. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
  263. (priv->hw_setting.shared_phys +
  264. offsetof(struct iwl4965_shared, val0)) >> 4);
  265. /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */
  266. iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
  267. FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
  268. FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
  269. rb_size |
  270. /*0x10 << 4 | */
  271. (RX_QUEUE_SIZE_LOG <<
  272. FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT));
  273. /*
  274. * iwl4965_write32(priv,CSR_INT_COAL_REG,0);
  275. */
  276. iwl4965_release_nic_access(priv);
  277. spin_unlock_irqrestore(&priv->lock, flags);
  278. return 0;
  279. }
  280. /* Tell 4965 where to find the "keep warm" buffer */
  281. static int iwl4965_kw_init(struct iwl4965_priv *priv)
  282. {
  283. unsigned long flags;
  284. int rc;
  285. spin_lock_irqsave(&priv->lock, flags);
  286. rc = iwl4965_grab_nic_access(priv);
  287. if (rc)
  288. goto out;
  289. iwl4965_write_direct32(priv, IWL_FH_KW_MEM_ADDR_REG,
  290. priv->kw.dma_addr >> 4);
  291. iwl4965_release_nic_access(priv);
  292. out:
  293. spin_unlock_irqrestore(&priv->lock, flags);
  294. return rc;
  295. }
  296. static int iwl4965_kw_alloc(struct iwl4965_priv *priv)
  297. {
  298. struct pci_dev *dev = priv->pci_dev;
  299. struct iwl4965_kw *kw = &priv->kw;
  300. kw->size = IWL4965_KW_SIZE; /* TBW need set somewhere else */
  301. kw->v_addr = pci_alloc_consistent(dev, kw->size, &kw->dma_addr);
  302. if (!kw->v_addr)
  303. return -ENOMEM;
  304. return 0;
  305. }
  306. #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
  307. ? # x " " : "")
  308. /**
  309. * iwl4965_set_fat_chan_info - Copy fat channel info into driver's priv.
  310. *
  311. * Does not set up a command, or touch hardware.
  312. */
  313. int iwl4965_set_fat_chan_info(struct iwl4965_priv *priv,
  314. enum ieee80211_band band, u16 channel,
  315. const struct iwl4965_eeprom_channel *eeprom_ch,
  316. u8 fat_extension_channel)
  317. {
  318. struct iwl4965_channel_info *ch_info;
  319. ch_info = (struct iwl4965_channel_info *)
  320. iwl4965_get_channel_info(priv, band, channel);
  321. if (!is_channel_valid(ch_info))
  322. return -1;
  323. IWL_DEBUG_INFO("FAT Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  324. " %ddBm): Ad-Hoc %ssupported\n",
  325. ch_info->channel,
  326. is_channel_a_band(ch_info) ?
  327. "5.2" : "2.4",
  328. CHECK_AND_PRINT(IBSS),
  329. CHECK_AND_PRINT(ACTIVE),
  330. CHECK_AND_PRINT(RADAR),
  331. CHECK_AND_PRINT(WIDE),
  332. CHECK_AND_PRINT(NARROW),
  333. CHECK_AND_PRINT(DFS),
  334. eeprom_ch->flags,
  335. eeprom_ch->max_power_avg,
  336. ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
  337. && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
  338. "" : "not ");
  339. ch_info->fat_eeprom = *eeprom_ch;
  340. ch_info->fat_max_power_avg = eeprom_ch->max_power_avg;
  341. ch_info->fat_curr_txpow = eeprom_ch->max_power_avg;
  342. ch_info->fat_min_power = 0;
  343. ch_info->fat_scan_power = eeprom_ch->max_power_avg;
  344. ch_info->fat_flags = eeprom_ch->flags;
  345. ch_info->fat_extension_channel = fat_extension_channel;
  346. return 0;
  347. }
  348. /**
  349. * iwl4965_kw_free - Free the "keep warm" buffer
  350. */
  351. static void iwl4965_kw_free(struct iwl4965_priv *priv)
  352. {
  353. struct pci_dev *dev = priv->pci_dev;
  354. struct iwl4965_kw *kw = &priv->kw;
  355. if (kw->v_addr) {
  356. pci_free_consistent(dev, kw->size, kw->v_addr, kw->dma_addr);
  357. memset(kw, 0, sizeof(*kw));
  358. }
  359. }
  360. /**
  361. * iwl4965_txq_ctx_reset - Reset TX queue context
  362. * Destroys all DMA structures and initialise them again
  363. *
  364. * @param priv
  365. * @return error code
  366. */
  367. static int iwl4965_txq_ctx_reset(struct iwl4965_priv *priv)
  368. {
  369. int rc = 0;
  370. int txq_id, slots_num;
  371. unsigned long flags;
  372. iwl4965_kw_free(priv);
  373. /* Free all tx/cmd queues and keep-warm buffer */
  374. iwl4965_hw_txq_ctx_free(priv);
  375. /* Alloc keep-warm buffer */
  376. rc = iwl4965_kw_alloc(priv);
  377. if (rc) {
  378. IWL_ERROR("Keep Warm allocation failed");
  379. goto error_kw;
  380. }
  381. spin_lock_irqsave(&priv->lock, flags);
  382. rc = iwl4965_grab_nic_access(priv);
  383. if (unlikely(rc)) {
  384. IWL_ERROR("TX reset failed");
  385. spin_unlock_irqrestore(&priv->lock, flags);
  386. goto error_reset;
  387. }
  388. /* Turn off all Tx DMA channels */
  389. iwl4965_write_prph(priv, KDR_SCD_TXFACT, 0);
  390. iwl4965_release_nic_access(priv);
  391. spin_unlock_irqrestore(&priv->lock, flags);
  392. /* Tell 4965 where to find the keep-warm buffer */
  393. rc = iwl4965_kw_init(priv);
  394. if (rc) {
  395. IWL_ERROR("kw_init failed\n");
  396. goto error_reset;
  397. }
  398. /* Alloc and init all (default 16) Tx queues,
  399. * including the command queue (#4) */
  400. for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
  401. slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
  402. TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
  403. rc = iwl4965_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
  404. txq_id);
  405. if (rc) {
  406. IWL_ERROR("Tx %d queue init failed\n", txq_id);
  407. goto error;
  408. }
  409. }
  410. return rc;
  411. error:
  412. iwl4965_hw_txq_ctx_free(priv);
  413. error_reset:
  414. iwl4965_kw_free(priv);
  415. error_kw:
  416. return rc;
  417. }
  418. int iwl4965_hw_nic_init(struct iwl4965_priv *priv)
  419. {
  420. int rc;
  421. unsigned long flags;
  422. struct iwl4965_rx_queue *rxq = &priv->rxq;
  423. u8 rev_id;
  424. u32 val;
  425. u8 val_link;
  426. iwl4965_power_init_handle(priv);
  427. /* nic_init */
  428. spin_lock_irqsave(&priv->lock, flags);
  429. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  430. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  431. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  432. rc = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  433. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  434. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  435. if (rc < 0) {
  436. spin_unlock_irqrestore(&priv->lock, flags);
  437. IWL_DEBUG_INFO("Failed to init the card\n");
  438. return rc;
  439. }
  440. rc = iwl4965_grab_nic_access(priv);
  441. if (rc) {
  442. spin_unlock_irqrestore(&priv->lock, flags);
  443. return rc;
  444. }
  445. iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
  446. iwl4965_write_prph(priv, APMG_CLK_CTRL_REG,
  447. APMG_CLK_VAL_DMA_CLK_RQT |
  448. APMG_CLK_VAL_BSM_CLK_RQT);
  449. iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
  450. udelay(20);
  451. iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  452. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  453. iwl4965_release_nic_access(priv);
  454. iwl4965_write32(priv, CSR_INT_COALESCING, 512 / 32);
  455. spin_unlock_irqrestore(&priv->lock, flags);
  456. /* Determine HW type */
  457. rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
  458. if (rc)
  459. return rc;
  460. IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
  461. iwl4965_nic_set_pwr_src(priv, 1);
  462. spin_lock_irqsave(&priv->lock, flags);
  463. if ((rev_id & 0x80) == 0x80 && (rev_id & 0x7f) < 8) {
  464. pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
  465. /* Enable No Snoop field */
  466. pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
  467. val & ~(1 << 11));
  468. }
  469. spin_unlock_irqrestore(&priv->lock, flags);
  470. if (priv->eeprom.calib_version < EEPROM_TX_POWER_VERSION_NEW) {
  471. IWL_ERROR("Older EEPROM detected! Aborting.\n");
  472. return -EINVAL;
  473. }
  474. pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
  475. /* disable L1 entry -- workaround for pre-B1 */
  476. pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02);
  477. spin_lock_irqsave(&priv->lock, flags);
  478. /* set CSR_HW_CONFIG_REG for uCode use */
  479. iwl4965_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  480. CSR_HW_IF_CONFIG_REG_BIT_KEDRON_R |
  481. CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
  482. CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
  483. rc = iwl4965_grab_nic_access(priv);
  484. if (rc < 0) {
  485. spin_unlock_irqrestore(&priv->lock, flags);
  486. IWL_DEBUG_INFO("Failed to init the card\n");
  487. return rc;
  488. }
  489. iwl4965_read_prph(priv, APMG_PS_CTRL_REG);
  490. iwl4965_set_bits_prph(priv, APMG_PS_CTRL_REG,
  491. APMG_PS_CTRL_VAL_RESET_REQ);
  492. udelay(5);
  493. iwl4965_clear_bits_prph(priv, APMG_PS_CTRL_REG,
  494. APMG_PS_CTRL_VAL_RESET_REQ);
  495. iwl4965_release_nic_access(priv);
  496. spin_unlock_irqrestore(&priv->lock, flags);
  497. iwl4965_hw_card_show_info(priv);
  498. /* end nic_init */
  499. /* Allocate the RX queue, or reset if it is already allocated */
  500. if (!rxq->bd) {
  501. rc = iwl4965_rx_queue_alloc(priv);
  502. if (rc) {
  503. IWL_ERROR("Unable to initialize Rx queue\n");
  504. return -ENOMEM;
  505. }
  506. } else
  507. iwl4965_rx_queue_reset(priv, rxq);
  508. iwl4965_rx_replenish(priv);
  509. iwl4965_rx_init(priv, rxq);
  510. spin_lock_irqsave(&priv->lock, flags);
  511. rxq->need_update = 1;
  512. iwl4965_rx_queue_update_write_ptr(priv, rxq);
  513. spin_unlock_irqrestore(&priv->lock, flags);
  514. /* Allocate and init all Tx and Command queues */
  515. rc = iwl4965_txq_ctx_reset(priv);
  516. if (rc)
  517. return rc;
  518. if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
  519. IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
  520. if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
  521. IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
  522. set_bit(STATUS_INIT, &priv->status);
  523. return 0;
  524. }
  525. int iwl4965_hw_nic_stop_master(struct iwl4965_priv *priv)
  526. {
  527. int rc = 0;
  528. u32 reg_val;
  529. unsigned long flags;
  530. spin_lock_irqsave(&priv->lock, flags);
  531. /* set stop master bit */
  532. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  533. reg_val = iwl4965_read32(priv, CSR_GP_CNTRL);
  534. if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
  535. (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
  536. IWL_DEBUG_INFO("Card in power save, master is already "
  537. "stopped\n");
  538. else {
  539. rc = iwl4965_poll_bit(priv, CSR_RESET,
  540. CSR_RESET_REG_FLAG_MASTER_DISABLED,
  541. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  542. if (rc < 0) {
  543. spin_unlock_irqrestore(&priv->lock, flags);
  544. return rc;
  545. }
  546. }
  547. spin_unlock_irqrestore(&priv->lock, flags);
  548. IWL_DEBUG_INFO("stop master\n");
  549. return rc;
  550. }
  551. /**
  552. * iwl4965_hw_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory
  553. */
  554. void iwl4965_hw_txq_ctx_stop(struct iwl4965_priv *priv)
  555. {
  556. int txq_id;
  557. unsigned long flags;
  558. /* Stop each Tx DMA channel, and wait for it to be idle */
  559. for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
  560. spin_lock_irqsave(&priv->lock, flags);
  561. if (iwl4965_grab_nic_access(priv)) {
  562. spin_unlock_irqrestore(&priv->lock, flags);
  563. continue;
  564. }
  565. iwl4965_write_direct32(priv,
  566. IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
  567. 0x0);
  568. iwl4965_poll_direct_bit(priv, IWL_FH_TSSR_TX_STATUS_REG,
  569. IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
  570. (txq_id), 200);
  571. iwl4965_release_nic_access(priv);
  572. spin_unlock_irqrestore(&priv->lock, flags);
  573. }
  574. /* Deallocate memory for all Tx queues */
  575. iwl4965_hw_txq_ctx_free(priv);
  576. }
  577. int iwl4965_hw_nic_reset(struct iwl4965_priv *priv)
  578. {
  579. int rc = 0;
  580. unsigned long flags;
  581. iwl4965_hw_nic_stop_master(priv);
  582. spin_lock_irqsave(&priv->lock, flags);
  583. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  584. udelay(10);
  585. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  586. rc = iwl4965_poll_bit(priv, CSR_RESET,
  587. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  588. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
  589. udelay(10);
  590. rc = iwl4965_grab_nic_access(priv);
  591. if (!rc) {
  592. iwl4965_write_prph(priv, APMG_CLK_EN_REG,
  593. APMG_CLK_VAL_DMA_CLK_RQT |
  594. APMG_CLK_VAL_BSM_CLK_RQT);
  595. udelay(10);
  596. iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  597. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  598. iwl4965_release_nic_access(priv);
  599. }
  600. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  601. wake_up_interruptible(&priv->wait_command_queue);
  602. spin_unlock_irqrestore(&priv->lock, flags);
  603. return rc;
  604. }
  605. #define REG_RECALIB_PERIOD (60)
  606. /**
  607. * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
  608. *
  609. * This callback is provided in order to queue the statistics_work
  610. * in work_queue context (v. softirq)
  611. *
  612. * This timer function is continually reset to execute within
  613. * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
  614. * was received. We need to ensure we receive the statistics in order
  615. * to update the temperature used for calibrating the TXPOWER. However,
  616. * we can't send the statistics command from softirq context (which
  617. * is the context which timers run at) so we have to queue off the
  618. * statistics_work to actually send the command to the hardware.
  619. */
  620. static void iwl4965_bg_statistics_periodic(unsigned long data)
  621. {
  622. struct iwl4965_priv *priv = (struct iwl4965_priv *)data;
  623. queue_work(priv->workqueue, &priv->statistics_work);
  624. }
  625. /**
  626. * iwl4965_bg_statistics_work - Send the statistics request to the hardware.
  627. *
  628. * This is queued by iwl4965_bg_statistics_periodic.
  629. */
  630. static void iwl4965_bg_statistics_work(struct work_struct *work)
  631. {
  632. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
  633. statistics_work);
  634. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  635. return;
  636. mutex_lock(&priv->mutex);
  637. iwl4965_send_statistics_request(priv);
  638. mutex_unlock(&priv->mutex);
  639. }
  640. #define CT_LIMIT_CONST 259
  641. #define TM_CT_KILL_THRESHOLD 110
  642. void iwl4965_rf_kill_ct_config(struct iwl4965_priv *priv)
  643. {
  644. struct iwl4965_ct_kill_config cmd;
  645. u32 R1, R2, R3;
  646. u32 temp_th;
  647. u32 crit_temperature;
  648. unsigned long flags;
  649. int rc = 0;
  650. spin_lock_irqsave(&priv->lock, flags);
  651. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  652. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  653. spin_unlock_irqrestore(&priv->lock, flags);
  654. if (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK) {
  655. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
  656. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
  657. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
  658. } else {
  659. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
  660. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
  661. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
  662. }
  663. temp_th = CELSIUS_TO_KELVIN(TM_CT_KILL_THRESHOLD);
  664. crit_temperature = ((temp_th * (R3-R1))/CT_LIMIT_CONST) + R2;
  665. cmd.critical_temperature_R = cpu_to_le32(crit_temperature);
  666. rc = iwl4965_send_cmd_pdu(priv,
  667. REPLY_CT_KILL_CONFIG_CMD, sizeof(cmd), &cmd);
  668. if (rc)
  669. IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
  670. else
  671. IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded\n");
  672. }
  673. #ifdef CONFIG_IWL4965_SENSITIVITY
  674. /* "false alarms" are signals that our DSP tries to lock onto,
  675. * but then determines that they are either noise, or transmissions
  676. * from a distant wireless network (also "noise", really) that get
  677. * "stepped on" by stronger transmissions within our own network.
  678. * This algorithm attempts to set a sensitivity level that is high
  679. * enough to receive all of our own network traffic, but not so
  680. * high that our DSP gets too busy trying to lock onto non-network
  681. * activity/noise. */
  682. static int iwl4965_sens_energy_cck(struct iwl4965_priv *priv,
  683. u32 norm_fa,
  684. u32 rx_enable_time,
  685. struct statistics_general_data *rx_info)
  686. {
  687. u32 max_nrg_cck = 0;
  688. int i = 0;
  689. u8 max_silence_rssi = 0;
  690. u32 silence_ref = 0;
  691. u8 silence_rssi_a = 0;
  692. u8 silence_rssi_b = 0;
  693. u8 silence_rssi_c = 0;
  694. u32 val;
  695. /* "false_alarms" values below are cross-multiplications to assess the
  696. * numbers of false alarms within the measured period of actual Rx
  697. * (Rx is off when we're txing), vs the min/max expected false alarms
  698. * (some should be expected if rx is sensitive enough) in a
  699. * hypothetical listening period of 200 time units (TU), 204.8 msec:
  700. *
  701. * MIN_FA/fixed-time < false_alarms/actual-rx-time < MAX_FA/beacon-time
  702. *
  703. * */
  704. u32 false_alarms = norm_fa * 200 * 1024;
  705. u32 max_false_alarms = MAX_FA_CCK * rx_enable_time;
  706. u32 min_false_alarms = MIN_FA_CCK * rx_enable_time;
  707. struct iwl4965_sensitivity_data *data = NULL;
  708. data = &(priv->sensitivity_data);
  709. data->nrg_auto_corr_silence_diff = 0;
  710. /* Find max silence rssi among all 3 receivers.
  711. * This is background noise, which may include transmissions from other
  712. * networks, measured during silence before our network's beacon */
  713. silence_rssi_a = (u8)((rx_info->beacon_silence_rssi_a &
  714. ALL_BAND_FILTER) >> 8);
  715. silence_rssi_b = (u8)((rx_info->beacon_silence_rssi_b &
  716. ALL_BAND_FILTER) >> 8);
  717. silence_rssi_c = (u8)((rx_info->beacon_silence_rssi_c &
  718. ALL_BAND_FILTER) >> 8);
  719. val = max(silence_rssi_b, silence_rssi_c);
  720. max_silence_rssi = max(silence_rssi_a, (u8) val);
  721. /* Store silence rssi in 20-beacon history table */
  722. data->nrg_silence_rssi[data->nrg_silence_idx] = max_silence_rssi;
  723. data->nrg_silence_idx++;
  724. if (data->nrg_silence_idx >= NRG_NUM_PREV_STAT_L)
  725. data->nrg_silence_idx = 0;
  726. /* Find max silence rssi across 20 beacon history */
  727. for (i = 0; i < NRG_NUM_PREV_STAT_L; i++) {
  728. val = data->nrg_silence_rssi[i];
  729. silence_ref = max(silence_ref, val);
  730. }
  731. IWL_DEBUG_CALIB("silence a %u, b %u, c %u, 20-bcn max %u\n",
  732. silence_rssi_a, silence_rssi_b, silence_rssi_c,
  733. silence_ref);
  734. /* Find max rx energy (min value!) among all 3 receivers,
  735. * measured during beacon frame.
  736. * Save it in 10-beacon history table. */
  737. i = data->nrg_energy_idx;
  738. val = min(rx_info->beacon_energy_b, rx_info->beacon_energy_c);
  739. data->nrg_value[i] = min(rx_info->beacon_energy_a, val);
  740. data->nrg_energy_idx++;
  741. if (data->nrg_energy_idx >= 10)
  742. data->nrg_energy_idx = 0;
  743. /* Find min rx energy (max value) across 10 beacon history.
  744. * This is the minimum signal level that we want to receive well.
  745. * Add backoff (margin so we don't miss slightly lower energy frames).
  746. * This establishes an upper bound (min value) for energy threshold. */
  747. max_nrg_cck = data->nrg_value[0];
  748. for (i = 1; i < 10; i++)
  749. max_nrg_cck = (u32) max(max_nrg_cck, (data->nrg_value[i]));
  750. max_nrg_cck += 6;
  751. IWL_DEBUG_CALIB("rx energy a %u, b %u, c %u, 10-bcn max/min %u\n",
  752. rx_info->beacon_energy_a, rx_info->beacon_energy_b,
  753. rx_info->beacon_energy_c, max_nrg_cck - 6);
  754. /* Count number of consecutive beacons with fewer-than-desired
  755. * false alarms. */
  756. if (false_alarms < min_false_alarms)
  757. data->num_in_cck_no_fa++;
  758. else
  759. data->num_in_cck_no_fa = 0;
  760. IWL_DEBUG_CALIB("consecutive bcns with few false alarms = %u\n",
  761. data->num_in_cck_no_fa);
  762. /* If we got too many false alarms this time, reduce sensitivity */
  763. if (false_alarms > max_false_alarms) {
  764. IWL_DEBUG_CALIB("norm FA %u > max FA %u\n",
  765. false_alarms, max_false_alarms);
  766. IWL_DEBUG_CALIB("... reducing sensitivity\n");
  767. data->nrg_curr_state = IWL_FA_TOO_MANY;
  768. if (data->auto_corr_cck > AUTO_CORR_MAX_TH_CCK) {
  769. /* Store for "fewer than desired" on later beacon */
  770. data->nrg_silence_ref = silence_ref;
  771. /* increase energy threshold (reduce nrg value)
  772. * to decrease sensitivity */
  773. if (data->nrg_th_cck > (NRG_MAX_CCK + NRG_STEP_CCK))
  774. data->nrg_th_cck = data->nrg_th_cck
  775. - NRG_STEP_CCK;
  776. }
  777. /* increase auto_corr values to decrease sensitivity */
  778. if (data->auto_corr_cck < AUTO_CORR_MAX_TH_CCK)
  779. data->auto_corr_cck = AUTO_CORR_MAX_TH_CCK + 1;
  780. else {
  781. val = data->auto_corr_cck + AUTO_CORR_STEP_CCK;
  782. data->auto_corr_cck = min((u32)AUTO_CORR_MAX_CCK, val);
  783. }
  784. val = data->auto_corr_cck_mrc + AUTO_CORR_STEP_CCK;
  785. data->auto_corr_cck_mrc = min((u32)AUTO_CORR_MAX_CCK_MRC, val);
  786. /* Else if we got fewer than desired, increase sensitivity */
  787. } else if (false_alarms < min_false_alarms) {
  788. data->nrg_curr_state = IWL_FA_TOO_FEW;
  789. /* Compare silence level with silence level for most recent
  790. * healthy number or too many false alarms */
  791. data->nrg_auto_corr_silence_diff = (s32)data->nrg_silence_ref -
  792. (s32)silence_ref;
  793. IWL_DEBUG_CALIB("norm FA %u < min FA %u, silence diff %d\n",
  794. false_alarms, min_false_alarms,
  795. data->nrg_auto_corr_silence_diff);
  796. /* Increase value to increase sensitivity, but only if:
  797. * 1a) previous beacon did *not* have *too many* false alarms
  798. * 1b) AND there's a significant difference in Rx levels
  799. * from a previous beacon with too many, or healthy # FAs
  800. * OR 2) We've seen a lot of beacons (100) with too few
  801. * false alarms */
  802. if ((data->nrg_prev_state != IWL_FA_TOO_MANY) &&
  803. ((data->nrg_auto_corr_silence_diff > NRG_DIFF) ||
  804. (data->num_in_cck_no_fa > MAX_NUMBER_CCK_NO_FA))) {
  805. IWL_DEBUG_CALIB("... increasing sensitivity\n");
  806. /* Increase nrg value to increase sensitivity */
  807. val = data->nrg_th_cck + NRG_STEP_CCK;
  808. data->nrg_th_cck = min((u32)NRG_MIN_CCK, val);
  809. /* Decrease auto_corr values to increase sensitivity */
  810. val = data->auto_corr_cck - AUTO_CORR_STEP_CCK;
  811. data->auto_corr_cck = max((u32)AUTO_CORR_MIN_CCK, val);
  812. val = data->auto_corr_cck_mrc - AUTO_CORR_STEP_CCK;
  813. data->auto_corr_cck_mrc =
  814. max((u32)AUTO_CORR_MIN_CCK_MRC, val);
  815. } else
  816. IWL_DEBUG_CALIB("... but not changing sensitivity\n");
  817. /* Else we got a healthy number of false alarms, keep status quo */
  818. } else {
  819. IWL_DEBUG_CALIB(" FA in safe zone\n");
  820. data->nrg_curr_state = IWL_FA_GOOD_RANGE;
  821. /* Store for use in "fewer than desired" with later beacon */
  822. data->nrg_silence_ref = silence_ref;
  823. /* If previous beacon had too many false alarms,
  824. * give it some extra margin by reducing sensitivity again
  825. * (but don't go below measured energy of desired Rx) */
  826. if (IWL_FA_TOO_MANY == data->nrg_prev_state) {
  827. IWL_DEBUG_CALIB("... increasing margin\n");
  828. data->nrg_th_cck -= NRG_MARGIN;
  829. }
  830. }
  831. /* Make sure the energy threshold does not go above the measured
  832. * energy of the desired Rx signals (reduced by backoff margin),
  833. * or else we might start missing Rx frames.
  834. * Lower value is higher energy, so we use max()!
  835. */
  836. data->nrg_th_cck = max(max_nrg_cck, data->nrg_th_cck);
  837. IWL_DEBUG_CALIB("new nrg_th_cck %u\n", data->nrg_th_cck);
  838. data->nrg_prev_state = data->nrg_curr_state;
  839. return 0;
  840. }
  841. static int iwl4965_sens_auto_corr_ofdm(struct iwl4965_priv *priv,
  842. u32 norm_fa,
  843. u32 rx_enable_time)
  844. {
  845. u32 val;
  846. u32 false_alarms = norm_fa * 200 * 1024;
  847. u32 max_false_alarms = MAX_FA_OFDM * rx_enable_time;
  848. u32 min_false_alarms = MIN_FA_OFDM * rx_enable_time;
  849. struct iwl4965_sensitivity_data *data = NULL;
  850. data = &(priv->sensitivity_data);
  851. /* If we got too many false alarms this time, reduce sensitivity */
  852. if (false_alarms > max_false_alarms) {
  853. IWL_DEBUG_CALIB("norm FA %u > max FA %u)\n",
  854. false_alarms, max_false_alarms);
  855. val = data->auto_corr_ofdm + AUTO_CORR_STEP_OFDM;
  856. data->auto_corr_ofdm =
  857. min((u32)AUTO_CORR_MAX_OFDM, val);
  858. val = data->auto_corr_ofdm_mrc + AUTO_CORR_STEP_OFDM;
  859. data->auto_corr_ofdm_mrc =
  860. min((u32)AUTO_CORR_MAX_OFDM_MRC, val);
  861. val = data->auto_corr_ofdm_x1 + AUTO_CORR_STEP_OFDM;
  862. data->auto_corr_ofdm_x1 =
  863. min((u32)AUTO_CORR_MAX_OFDM_X1, val);
  864. val = data->auto_corr_ofdm_mrc_x1 + AUTO_CORR_STEP_OFDM;
  865. data->auto_corr_ofdm_mrc_x1 =
  866. min((u32)AUTO_CORR_MAX_OFDM_MRC_X1, val);
  867. }
  868. /* Else if we got fewer than desired, increase sensitivity */
  869. else if (false_alarms < min_false_alarms) {
  870. IWL_DEBUG_CALIB("norm FA %u < min FA %u\n",
  871. false_alarms, min_false_alarms);
  872. val = data->auto_corr_ofdm - AUTO_CORR_STEP_OFDM;
  873. data->auto_corr_ofdm =
  874. max((u32)AUTO_CORR_MIN_OFDM, val);
  875. val = data->auto_corr_ofdm_mrc - AUTO_CORR_STEP_OFDM;
  876. data->auto_corr_ofdm_mrc =
  877. max((u32)AUTO_CORR_MIN_OFDM_MRC, val);
  878. val = data->auto_corr_ofdm_x1 - AUTO_CORR_STEP_OFDM;
  879. data->auto_corr_ofdm_x1 =
  880. max((u32)AUTO_CORR_MIN_OFDM_X1, val);
  881. val = data->auto_corr_ofdm_mrc_x1 - AUTO_CORR_STEP_OFDM;
  882. data->auto_corr_ofdm_mrc_x1 =
  883. max((u32)AUTO_CORR_MIN_OFDM_MRC_X1, val);
  884. }
  885. else
  886. IWL_DEBUG_CALIB("min FA %u < norm FA %u < max FA %u OK\n",
  887. min_false_alarms, false_alarms, max_false_alarms);
  888. return 0;
  889. }
  890. static int iwl4965_sensitivity_callback(struct iwl4965_priv *priv,
  891. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  892. {
  893. /* We didn't cache the SKB; let the caller free it */
  894. return 1;
  895. }
  896. /* Prepare a SENSITIVITY_CMD, send to uCode if values have changed */
  897. static int iwl4965_sensitivity_write(struct iwl4965_priv *priv, u8 flags)
  898. {
  899. int rc = 0;
  900. struct iwl4965_sensitivity_cmd cmd ;
  901. struct iwl4965_sensitivity_data *data = NULL;
  902. struct iwl4965_host_cmd cmd_out = {
  903. .id = SENSITIVITY_CMD,
  904. .len = sizeof(struct iwl4965_sensitivity_cmd),
  905. .meta.flags = flags,
  906. .data = &cmd,
  907. };
  908. data = &(priv->sensitivity_data);
  909. memset(&cmd, 0, sizeof(cmd));
  910. cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX] =
  911. cpu_to_le16((u16)data->auto_corr_ofdm);
  912. cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX] =
  913. cpu_to_le16((u16)data->auto_corr_ofdm_mrc);
  914. cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX] =
  915. cpu_to_le16((u16)data->auto_corr_ofdm_x1);
  916. cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX] =
  917. cpu_to_le16((u16)data->auto_corr_ofdm_mrc_x1);
  918. cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX] =
  919. cpu_to_le16((u16)data->auto_corr_cck);
  920. cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX] =
  921. cpu_to_le16((u16)data->auto_corr_cck_mrc);
  922. cmd.table[HD_MIN_ENERGY_CCK_DET_INDEX] =
  923. cpu_to_le16((u16)data->nrg_th_cck);
  924. cmd.table[HD_MIN_ENERGY_OFDM_DET_INDEX] =
  925. cpu_to_le16((u16)data->nrg_th_ofdm);
  926. cmd.table[HD_BARKER_CORR_TH_ADD_MIN_INDEX] =
  927. __constant_cpu_to_le16(190);
  928. cmd.table[HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX] =
  929. __constant_cpu_to_le16(390);
  930. cmd.table[HD_OFDM_ENERGY_TH_IN_INDEX] =
  931. __constant_cpu_to_le16(62);
  932. IWL_DEBUG_CALIB("ofdm: ac %u mrc %u x1 %u mrc_x1 %u thresh %u\n",
  933. data->auto_corr_ofdm, data->auto_corr_ofdm_mrc,
  934. data->auto_corr_ofdm_x1, data->auto_corr_ofdm_mrc_x1,
  935. data->nrg_th_ofdm);
  936. IWL_DEBUG_CALIB("cck: ac %u mrc %u thresh %u\n",
  937. data->auto_corr_cck, data->auto_corr_cck_mrc,
  938. data->nrg_th_cck);
  939. /* Update uCode's "work" table, and copy it to DSP */
  940. cmd.control = SENSITIVITY_CMD_CONTROL_WORK_TABLE;
  941. if (flags & CMD_ASYNC)
  942. cmd_out.meta.u.callback = iwl4965_sensitivity_callback;
  943. /* Don't send command to uCode if nothing has changed */
  944. if (!memcmp(&cmd.table[0], &(priv->sensitivity_tbl[0]),
  945. sizeof(u16)*HD_TABLE_SIZE)) {
  946. IWL_DEBUG_CALIB("No change in SENSITIVITY_CMD\n");
  947. return 0;
  948. }
  949. /* Copy table for comparison next time */
  950. memcpy(&(priv->sensitivity_tbl[0]), &(cmd.table[0]),
  951. sizeof(u16)*HD_TABLE_SIZE);
  952. rc = iwl4965_send_cmd(priv, &cmd_out);
  953. if (!rc) {
  954. IWL_DEBUG_CALIB("SENSITIVITY_CMD succeeded\n");
  955. return rc;
  956. }
  957. return 0;
  958. }
  959. void iwl4965_init_sensitivity(struct iwl4965_priv *priv, u8 flags, u8 force)
  960. {
  961. int rc = 0;
  962. int i;
  963. struct iwl4965_sensitivity_data *data = NULL;
  964. IWL_DEBUG_CALIB("Start iwl4965_init_sensitivity\n");
  965. if (force)
  966. memset(&(priv->sensitivity_tbl[0]), 0,
  967. sizeof(u16)*HD_TABLE_SIZE);
  968. /* Clear driver's sensitivity algo data */
  969. data = &(priv->sensitivity_data);
  970. memset(data, 0, sizeof(struct iwl4965_sensitivity_data));
  971. data->num_in_cck_no_fa = 0;
  972. data->nrg_curr_state = IWL_FA_TOO_MANY;
  973. data->nrg_prev_state = IWL_FA_TOO_MANY;
  974. data->nrg_silence_ref = 0;
  975. data->nrg_silence_idx = 0;
  976. data->nrg_energy_idx = 0;
  977. for (i = 0; i < 10; i++)
  978. data->nrg_value[i] = 0;
  979. for (i = 0; i < NRG_NUM_PREV_STAT_L; i++)
  980. data->nrg_silence_rssi[i] = 0;
  981. data->auto_corr_ofdm = 90;
  982. data->auto_corr_ofdm_mrc = 170;
  983. data->auto_corr_ofdm_x1 = 105;
  984. data->auto_corr_ofdm_mrc_x1 = 220;
  985. data->auto_corr_cck = AUTO_CORR_CCK_MIN_VAL_DEF;
  986. data->auto_corr_cck_mrc = 200;
  987. data->nrg_th_cck = 100;
  988. data->nrg_th_ofdm = 100;
  989. data->last_bad_plcp_cnt_ofdm = 0;
  990. data->last_fa_cnt_ofdm = 0;
  991. data->last_bad_plcp_cnt_cck = 0;
  992. data->last_fa_cnt_cck = 0;
  993. /* Clear prior Sensitivity command data to force send to uCode */
  994. if (force)
  995. memset(&(priv->sensitivity_tbl[0]), 0,
  996. sizeof(u16)*HD_TABLE_SIZE);
  997. rc |= iwl4965_sensitivity_write(priv, flags);
  998. IWL_DEBUG_CALIB("<<return 0x%X\n", rc);
  999. return;
  1000. }
  1001. /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
  1002. * Called after every association, but this runs only once!
  1003. * ... once chain noise is calibrated the first time, it's good forever. */
  1004. void iwl4965_chain_noise_reset(struct iwl4965_priv *priv)
  1005. {
  1006. struct iwl4965_chain_noise_data *data = NULL;
  1007. int rc = 0;
  1008. data = &(priv->chain_noise_data);
  1009. if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl4965_is_associated(priv)) {
  1010. struct iwl4965_calibration_cmd cmd;
  1011. memset(&cmd, 0, sizeof(cmd));
  1012. cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
  1013. cmd.diff_gain_a = 0;
  1014. cmd.diff_gain_b = 0;
  1015. cmd.diff_gain_c = 0;
  1016. rc = iwl4965_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
  1017. sizeof(cmd), &cmd);
  1018. msleep(4);
  1019. data->state = IWL_CHAIN_NOISE_ACCUMULATE;
  1020. IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
  1021. }
  1022. return;
  1023. }
  1024. /*
  1025. * Accumulate 20 beacons of signal and noise statistics for each of
  1026. * 3 receivers/antennas/rx-chains, then figure out:
  1027. * 1) Which antennas are connected.
  1028. * 2) Differential rx gain settings to balance the 3 receivers.
  1029. */
  1030. static void iwl4965_noise_calibration(struct iwl4965_priv *priv,
  1031. struct iwl4965_notif_statistics *stat_resp)
  1032. {
  1033. struct iwl4965_chain_noise_data *data = NULL;
  1034. int rc = 0;
  1035. u32 chain_noise_a;
  1036. u32 chain_noise_b;
  1037. u32 chain_noise_c;
  1038. u32 chain_sig_a;
  1039. u32 chain_sig_b;
  1040. u32 chain_sig_c;
  1041. u32 average_sig[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
  1042. u32 average_noise[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
  1043. u32 max_average_sig;
  1044. u16 max_average_sig_antenna_i;
  1045. u32 min_average_noise = MIN_AVERAGE_NOISE_MAX_VALUE;
  1046. u16 min_average_noise_antenna_i = INITIALIZATION_VALUE;
  1047. u16 i = 0;
  1048. u16 chan_num = INITIALIZATION_VALUE;
  1049. u32 band = INITIALIZATION_VALUE;
  1050. u32 active_chains = 0;
  1051. unsigned long flags;
  1052. struct statistics_rx_non_phy *rx_info = &(stat_resp->rx.general);
  1053. data = &(priv->chain_noise_data);
  1054. /* Accumulate just the first 20 beacons after the first association,
  1055. * then we're done forever. */
  1056. if (data->state != IWL_CHAIN_NOISE_ACCUMULATE) {
  1057. if (data->state == IWL_CHAIN_NOISE_ALIVE)
  1058. IWL_DEBUG_CALIB("Wait for noise calib reset\n");
  1059. return;
  1060. }
  1061. spin_lock_irqsave(&priv->lock, flags);
  1062. if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
  1063. IWL_DEBUG_CALIB(" << Interference data unavailable\n");
  1064. spin_unlock_irqrestore(&priv->lock, flags);
  1065. return;
  1066. }
  1067. band = (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) ? 0 : 1;
  1068. chan_num = le16_to_cpu(priv->staging_rxon.channel);
  1069. /* Make sure we accumulate data for just the associated channel
  1070. * (even if scanning). */
  1071. if ((chan_num != (le32_to_cpu(stat_resp->flag) >> 16)) ||
  1072. ((STATISTICS_REPLY_FLG_BAND_24G_MSK ==
  1073. (stat_resp->flag & STATISTICS_REPLY_FLG_BAND_24G_MSK)) && band)) {
  1074. IWL_DEBUG_CALIB("Stats not from chan=%d, band=%d\n",
  1075. chan_num, band);
  1076. spin_unlock_irqrestore(&priv->lock, flags);
  1077. return;
  1078. }
  1079. /* Accumulate beacon statistics values across 20 beacons */
  1080. chain_noise_a = le32_to_cpu(rx_info->beacon_silence_rssi_a) &
  1081. IN_BAND_FILTER;
  1082. chain_noise_b = le32_to_cpu(rx_info->beacon_silence_rssi_b) &
  1083. IN_BAND_FILTER;
  1084. chain_noise_c = le32_to_cpu(rx_info->beacon_silence_rssi_c) &
  1085. IN_BAND_FILTER;
  1086. chain_sig_a = le32_to_cpu(rx_info->beacon_rssi_a) & IN_BAND_FILTER;
  1087. chain_sig_b = le32_to_cpu(rx_info->beacon_rssi_b) & IN_BAND_FILTER;
  1088. chain_sig_c = le32_to_cpu(rx_info->beacon_rssi_c) & IN_BAND_FILTER;
  1089. spin_unlock_irqrestore(&priv->lock, flags);
  1090. data->beacon_count++;
  1091. data->chain_noise_a = (chain_noise_a + data->chain_noise_a);
  1092. data->chain_noise_b = (chain_noise_b + data->chain_noise_b);
  1093. data->chain_noise_c = (chain_noise_c + data->chain_noise_c);
  1094. data->chain_signal_a = (chain_sig_a + data->chain_signal_a);
  1095. data->chain_signal_b = (chain_sig_b + data->chain_signal_b);
  1096. data->chain_signal_c = (chain_sig_c + data->chain_signal_c);
  1097. IWL_DEBUG_CALIB("chan=%d, band=%d, beacon=%d\n", chan_num, band,
  1098. data->beacon_count);
  1099. IWL_DEBUG_CALIB("chain_sig: a %d b %d c %d\n",
  1100. chain_sig_a, chain_sig_b, chain_sig_c);
  1101. IWL_DEBUG_CALIB("chain_noise: a %d b %d c %d\n",
  1102. chain_noise_a, chain_noise_b, chain_noise_c);
  1103. /* If this is the 20th beacon, determine:
  1104. * 1) Disconnected antennas (using signal strengths)
  1105. * 2) Differential gain (using silence noise) to balance receivers */
  1106. if (data->beacon_count == CAL_NUM_OF_BEACONS) {
  1107. /* Analyze signal for disconnected antenna */
  1108. average_sig[0] = (data->chain_signal_a) / CAL_NUM_OF_BEACONS;
  1109. average_sig[1] = (data->chain_signal_b) / CAL_NUM_OF_BEACONS;
  1110. average_sig[2] = (data->chain_signal_c) / CAL_NUM_OF_BEACONS;
  1111. if (average_sig[0] >= average_sig[1]) {
  1112. max_average_sig = average_sig[0];
  1113. max_average_sig_antenna_i = 0;
  1114. active_chains = (1 << max_average_sig_antenna_i);
  1115. } else {
  1116. max_average_sig = average_sig[1];
  1117. max_average_sig_antenna_i = 1;
  1118. active_chains = (1 << max_average_sig_antenna_i);
  1119. }
  1120. if (average_sig[2] >= max_average_sig) {
  1121. max_average_sig = average_sig[2];
  1122. max_average_sig_antenna_i = 2;
  1123. active_chains = (1 << max_average_sig_antenna_i);
  1124. }
  1125. IWL_DEBUG_CALIB("average_sig: a %d b %d c %d\n",
  1126. average_sig[0], average_sig[1], average_sig[2]);
  1127. IWL_DEBUG_CALIB("max_average_sig = %d, antenna %d\n",
  1128. max_average_sig, max_average_sig_antenna_i);
  1129. /* Compare signal strengths for all 3 receivers. */
  1130. for (i = 0; i < NUM_RX_CHAINS; i++) {
  1131. if (i != max_average_sig_antenna_i) {
  1132. s32 rssi_delta = (max_average_sig -
  1133. average_sig[i]);
  1134. /* If signal is very weak, compared with
  1135. * strongest, mark it as disconnected. */
  1136. if (rssi_delta > MAXIMUM_ALLOWED_PATHLOSS)
  1137. data->disconn_array[i] = 1;
  1138. else
  1139. active_chains |= (1 << i);
  1140. IWL_DEBUG_CALIB("i = %d rssiDelta = %d "
  1141. "disconn_array[i] = %d\n",
  1142. i, rssi_delta, data->disconn_array[i]);
  1143. }
  1144. }
  1145. /*If both chains A & B are disconnected -
  1146. * connect B and leave A as is */
  1147. if (data->disconn_array[CHAIN_A] &&
  1148. data->disconn_array[CHAIN_B]) {
  1149. data->disconn_array[CHAIN_B] = 0;
  1150. active_chains |= (1 << CHAIN_B);
  1151. IWL_DEBUG_CALIB("both A & B chains are disconnected! "
  1152. "W/A - declare B as connected\n");
  1153. }
  1154. IWL_DEBUG_CALIB("active_chains (bitwise) = 0x%x\n",
  1155. active_chains);
  1156. /* Save for use within RXON, TX, SCAN commands, etc. */
  1157. priv->valid_antenna = active_chains;
  1158. /* Analyze noise for rx balance */
  1159. average_noise[0] = ((data->chain_noise_a)/CAL_NUM_OF_BEACONS);
  1160. average_noise[1] = ((data->chain_noise_b)/CAL_NUM_OF_BEACONS);
  1161. average_noise[2] = ((data->chain_noise_c)/CAL_NUM_OF_BEACONS);
  1162. for (i = 0; i < NUM_RX_CHAINS; i++) {
  1163. if (!(data->disconn_array[i]) &&
  1164. (average_noise[i] <= min_average_noise)) {
  1165. /* This means that chain i is active and has
  1166. * lower noise values so far: */
  1167. min_average_noise = average_noise[i];
  1168. min_average_noise_antenna_i = i;
  1169. }
  1170. }
  1171. data->delta_gain_code[min_average_noise_antenna_i] = 0;
  1172. IWL_DEBUG_CALIB("average_noise: a %d b %d c %d\n",
  1173. average_noise[0], average_noise[1],
  1174. average_noise[2]);
  1175. IWL_DEBUG_CALIB("min_average_noise = %d, antenna %d\n",
  1176. min_average_noise, min_average_noise_antenna_i);
  1177. for (i = 0; i < NUM_RX_CHAINS; i++) {
  1178. s32 delta_g = 0;
  1179. if (!(data->disconn_array[i]) &&
  1180. (data->delta_gain_code[i] ==
  1181. CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
  1182. delta_g = average_noise[i] - min_average_noise;
  1183. data->delta_gain_code[i] = (u8)((delta_g *
  1184. 10) / 15);
  1185. if (CHAIN_NOISE_MAX_DELTA_GAIN_CODE <
  1186. data->delta_gain_code[i])
  1187. data->delta_gain_code[i] =
  1188. CHAIN_NOISE_MAX_DELTA_GAIN_CODE;
  1189. data->delta_gain_code[i] =
  1190. (data->delta_gain_code[i] | (1 << 2));
  1191. } else
  1192. data->delta_gain_code[i] = 0;
  1193. }
  1194. IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
  1195. data->delta_gain_code[0],
  1196. data->delta_gain_code[1],
  1197. data->delta_gain_code[2]);
  1198. /* Differential gain gets sent to uCode only once */
  1199. if (!data->radio_write) {
  1200. struct iwl4965_calibration_cmd cmd;
  1201. data->radio_write = 1;
  1202. memset(&cmd, 0, sizeof(cmd));
  1203. cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
  1204. cmd.diff_gain_a = data->delta_gain_code[0];
  1205. cmd.diff_gain_b = data->delta_gain_code[1];
  1206. cmd.diff_gain_c = data->delta_gain_code[2];
  1207. rc = iwl4965_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
  1208. sizeof(cmd), &cmd);
  1209. if (rc)
  1210. IWL_DEBUG_CALIB("fail sending cmd "
  1211. "REPLY_PHY_CALIBRATION_CMD \n");
  1212. /* TODO we might want recalculate
  1213. * rx_chain in rxon cmd */
  1214. /* Mark so we run this algo only once! */
  1215. data->state = IWL_CHAIN_NOISE_CALIBRATED;
  1216. }
  1217. data->chain_noise_a = 0;
  1218. data->chain_noise_b = 0;
  1219. data->chain_noise_c = 0;
  1220. data->chain_signal_a = 0;
  1221. data->chain_signal_b = 0;
  1222. data->chain_signal_c = 0;
  1223. data->beacon_count = 0;
  1224. }
  1225. return;
  1226. }
  1227. static void iwl4965_sensitivity_calibration(struct iwl4965_priv *priv,
  1228. struct iwl4965_notif_statistics *resp)
  1229. {
  1230. int rc = 0;
  1231. u32 rx_enable_time;
  1232. u32 fa_cck;
  1233. u32 fa_ofdm;
  1234. u32 bad_plcp_cck;
  1235. u32 bad_plcp_ofdm;
  1236. u32 norm_fa_ofdm;
  1237. u32 norm_fa_cck;
  1238. struct iwl4965_sensitivity_data *data = NULL;
  1239. struct statistics_rx_non_phy *rx_info = &(resp->rx.general);
  1240. struct statistics_rx *statistics = &(resp->rx);
  1241. unsigned long flags;
  1242. struct statistics_general_data statis;
  1243. data = &(priv->sensitivity_data);
  1244. if (!iwl4965_is_associated(priv)) {
  1245. IWL_DEBUG_CALIB("<< - not associated\n");
  1246. return;
  1247. }
  1248. spin_lock_irqsave(&priv->lock, flags);
  1249. if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
  1250. IWL_DEBUG_CALIB("<< invalid data.\n");
  1251. spin_unlock_irqrestore(&priv->lock, flags);
  1252. return;
  1253. }
  1254. /* Extract Statistics: */
  1255. rx_enable_time = le32_to_cpu(rx_info->channel_load);
  1256. fa_cck = le32_to_cpu(statistics->cck.false_alarm_cnt);
  1257. fa_ofdm = le32_to_cpu(statistics->ofdm.false_alarm_cnt);
  1258. bad_plcp_cck = le32_to_cpu(statistics->cck.plcp_err);
  1259. bad_plcp_ofdm = le32_to_cpu(statistics->ofdm.plcp_err);
  1260. statis.beacon_silence_rssi_a =
  1261. le32_to_cpu(statistics->general.beacon_silence_rssi_a);
  1262. statis.beacon_silence_rssi_b =
  1263. le32_to_cpu(statistics->general.beacon_silence_rssi_b);
  1264. statis.beacon_silence_rssi_c =
  1265. le32_to_cpu(statistics->general.beacon_silence_rssi_c);
  1266. statis.beacon_energy_a =
  1267. le32_to_cpu(statistics->general.beacon_energy_a);
  1268. statis.beacon_energy_b =
  1269. le32_to_cpu(statistics->general.beacon_energy_b);
  1270. statis.beacon_energy_c =
  1271. le32_to_cpu(statistics->general.beacon_energy_c);
  1272. spin_unlock_irqrestore(&priv->lock, flags);
  1273. IWL_DEBUG_CALIB("rx_enable_time = %u usecs\n", rx_enable_time);
  1274. if (!rx_enable_time) {
  1275. IWL_DEBUG_CALIB("<< RX Enable Time == 0! \n");
  1276. return;
  1277. }
  1278. /* These statistics increase monotonically, and do not reset
  1279. * at each beacon. Calculate difference from last value, or just
  1280. * use the new statistics value if it has reset or wrapped around. */
  1281. if (data->last_bad_plcp_cnt_cck > bad_plcp_cck)
  1282. data->last_bad_plcp_cnt_cck = bad_plcp_cck;
  1283. else {
  1284. bad_plcp_cck -= data->last_bad_plcp_cnt_cck;
  1285. data->last_bad_plcp_cnt_cck += bad_plcp_cck;
  1286. }
  1287. if (data->last_bad_plcp_cnt_ofdm > bad_plcp_ofdm)
  1288. data->last_bad_plcp_cnt_ofdm = bad_plcp_ofdm;
  1289. else {
  1290. bad_plcp_ofdm -= data->last_bad_plcp_cnt_ofdm;
  1291. data->last_bad_plcp_cnt_ofdm += bad_plcp_ofdm;
  1292. }
  1293. if (data->last_fa_cnt_ofdm > fa_ofdm)
  1294. data->last_fa_cnt_ofdm = fa_ofdm;
  1295. else {
  1296. fa_ofdm -= data->last_fa_cnt_ofdm;
  1297. data->last_fa_cnt_ofdm += fa_ofdm;
  1298. }
  1299. if (data->last_fa_cnt_cck > fa_cck)
  1300. data->last_fa_cnt_cck = fa_cck;
  1301. else {
  1302. fa_cck -= data->last_fa_cnt_cck;
  1303. data->last_fa_cnt_cck += fa_cck;
  1304. }
  1305. /* Total aborted signal locks */
  1306. norm_fa_ofdm = fa_ofdm + bad_plcp_ofdm;
  1307. norm_fa_cck = fa_cck + bad_plcp_cck;
  1308. IWL_DEBUG_CALIB("cck: fa %u badp %u ofdm: fa %u badp %u\n", fa_cck,
  1309. bad_plcp_cck, fa_ofdm, bad_plcp_ofdm);
  1310. iwl4965_sens_auto_corr_ofdm(priv, norm_fa_ofdm, rx_enable_time);
  1311. iwl4965_sens_energy_cck(priv, norm_fa_cck, rx_enable_time, &statis);
  1312. rc |= iwl4965_sensitivity_write(priv, CMD_ASYNC);
  1313. return;
  1314. }
  1315. static void iwl4965_bg_sensitivity_work(struct work_struct *work)
  1316. {
  1317. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
  1318. sensitivity_work);
  1319. mutex_lock(&priv->mutex);
  1320. if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
  1321. test_bit(STATUS_SCANNING, &priv->status)) {
  1322. mutex_unlock(&priv->mutex);
  1323. return;
  1324. }
  1325. if (priv->start_calib) {
  1326. iwl4965_noise_calibration(priv, &priv->statistics);
  1327. if (priv->sensitivity_data.state ==
  1328. IWL_SENS_CALIB_NEED_REINIT) {
  1329. iwl4965_init_sensitivity(priv, CMD_ASYNC, 0);
  1330. priv->sensitivity_data.state = IWL_SENS_CALIB_ALLOWED;
  1331. } else
  1332. iwl4965_sensitivity_calibration(priv,
  1333. &priv->statistics);
  1334. }
  1335. mutex_unlock(&priv->mutex);
  1336. return;
  1337. }
  1338. #endif /*CONFIG_IWL4965_SENSITIVITY*/
  1339. static void iwl4965_bg_txpower_work(struct work_struct *work)
  1340. {
  1341. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
  1342. txpower_work);
  1343. /* If a scan happened to start before we got here
  1344. * then just return; the statistics notification will
  1345. * kick off another scheduled work to compensate for
  1346. * any temperature delta we missed here. */
  1347. if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
  1348. test_bit(STATUS_SCANNING, &priv->status))
  1349. return;
  1350. mutex_lock(&priv->mutex);
  1351. /* Regardless of if we are assocaited, we must reconfigure the
  1352. * TX power since frames can be sent on non-radar channels while
  1353. * not associated */
  1354. iwl4965_hw_reg_send_txpower(priv);
  1355. /* Update last_temperature to keep is_calib_needed from running
  1356. * when it isn't needed... */
  1357. priv->last_temperature = priv->temperature;
  1358. mutex_unlock(&priv->mutex);
  1359. }
  1360. /*
  1361. * Acquire priv->lock before calling this function !
  1362. */
  1363. static void iwl4965_set_wr_ptrs(struct iwl4965_priv *priv, int txq_id, u32 index)
  1364. {
  1365. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  1366. (index & 0xff) | (txq_id << 8));
  1367. iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(txq_id), index);
  1368. }
  1369. /**
  1370. * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
  1371. * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
  1372. * @scd_retry: (1) Indicates queue will be used in aggregation mode
  1373. *
  1374. * NOTE: Acquire priv->lock before calling this function !
  1375. */
  1376. static void iwl4965_tx_queue_set_status(struct iwl4965_priv *priv,
  1377. struct iwl4965_tx_queue *txq,
  1378. int tx_fifo_id, int scd_retry)
  1379. {
  1380. int txq_id = txq->q.id;
  1381. /* Find out whether to activate Tx queue */
  1382. int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
  1383. /* Set up and activate */
  1384. iwl4965_write_prph(priv, KDR_SCD_QUEUE_STATUS_BITS(txq_id),
  1385. (active << SCD_QUEUE_STTS_REG_POS_ACTIVE) |
  1386. (tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) |
  1387. (scd_retry << SCD_QUEUE_STTS_REG_POS_WSL) |
  1388. (scd_retry << SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
  1389. SCD_QUEUE_STTS_REG_MSK);
  1390. txq->sched_retry = scd_retry;
  1391. IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
  1392. active ? "Activate" : "Deactivate",
  1393. scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
  1394. }
  1395. static const u16 default_queue_to_tx_fifo[] = {
  1396. IWL_TX_FIFO_AC3,
  1397. IWL_TX_FIFO_AC2,
  1398. IWL_TX_FIFO_AC1,
  1399. IWL_TX_FIFO_AC0,
  1400. IWL_CMD_FIFO_NUM,
  1401. IWL_TX_FIFO_HCCA_1,
  1402. IWL_TX_FIFO_HCCA_2
  1403. };
  1404. static inline void iwl4965_txq_ctx_activate(struct iwl4965_priv *priv, int txq_id)
  1405. {
  1406. set_bit(txq_id, &priv->txq_ctx_active_msk);
  1407. }
  1408. static inline void iwl4965_txq_ctx_deactivate(struct iwl4965_priv *priv, int txq_id)
  1409. {
  1410. clear_bit(txq_id, &priv->txq_ctx_active_msk);
  1411. }
  1412. int iwl4965_alive_notify(struct iwl4965_priv *priv)
  1413. {
  1414. u32 a;
  1415. int i = 0;
  1416. unsigned long flags;
  1417. int rc;
  1418. spin_lock_irqsave(&priv->lock, flags);
  1419. #ifdef CONFIG_IWL4965_SENSITIVITY
  1420. memset(&(priv->sensitivity_data), 0,
  1421. sizeof(struct iwl4965_sensitivity_data));
  1422. memset(&(priv->chain_noise_data), 0,
  1423. sizeof(struct iwl4965_chain_noise_data));
  1424. for (i = 0; i < NUM_RX_CHAINS; i++)
  1425. priv->chain_noise_data.delta_gain_code[i] =
  1426. CHAIN_NOISE_DELTA_GAIN_INIT_VAL;
  1427. #endif /* CONFIG_IWL4965_SENSITIVITY*/
  1428. rc = iwl4965_grab_nic_access(priv);
  1429. if (rc) {
  1430. spin_unlock_irqrestore(&priv->lock, flags);
  1431. return rc;
  1432. }
  1433. /* Clear 4965's internal Tx Scheduler data base */
  1434. priv->scd_base_addr = iwl4965_read_prph(priv, KDR_SCD_SRAM_BASE_ADDR);
  1435. a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET;
  1436. for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4)
  1437. iwl4965_write_targ_mem(priv, a, 0);
  1438. for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4)
  1439. iwl4965_write_targ_mem(priv, a, 0);
  1440. for (; a < sizeof(u16) * priv->hw_setting.max_txq_num; a += 4)
  1441. iwl4965_write_targ_mem(priv, a, 0);
  1442. /* Tel 4965 where to find Tx byte count tables */
  1443. iwl4965_write_prph(priv, KDR_SCD_DRAM_BASE_ADDR,
  1444. (priv->hw_setting.shared_phys +
  1445. offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
  1446. /* Disable chain mode for all queues */
  1447. iwl4965_write_prph(priv, KDR_SCD_QUEUECHAIN_SEL, 0);
  1448. /* Initialize each Tx queue (including the command queue) */
  1449. for (i = 0; i < priv->hw_setting.max_txq_num; i++) {
  1450. /* TFD circular buffer read/write indexes */
  1451. iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(i), 0);
  1452. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
  1453. /* Max Tx Window size for Scheduler-ACK mode */
  1454. iwl4965_write_targ_mem(priv, priv->scd_base_addr +
  1455. SCD_CONTEXT_QUEUE_OFFSET(i),
  1456. (SCD_WIN_SIZE <<
  1457. SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
  1458. SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
  1459. /* Frame limit */
  1460. iwl4965_write_targ_mem(priv, priv->scd_base_addr +
  1461. SCD_CONTEXT_QUEUE_OFFSET(i) +
  1462. sizeof(u32),
  1463. (SCD_FRAME_LIMIT <<
  1464. SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
  1465. SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
  1466. }
  1467. iwl4965_write_prph(priv, KDR_SCD_INTERRUPT_MASK,
  1468. (1 << priv->hw_setting.max_txq_num) - 1);
  1469. /* Activate all Tx DMA/FIFO channels */
  1470. iwl4965_write_prph(priv, KDR_SCD_TXFACT,
  1471. SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
  1472. iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
  1473. /* Map each Tx/cmd queue to its corresponding fifo */
  1474. for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
  1475. int ac = default_queue_to_tx_fifo[i];
  1476. iwl4965_txq_ctx_activate(priv, i);
  1477. iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
  1478. }
  1479. iwl4965_release_nic_access(priv);
  1480. spin_unlock_irqrestore(&priv->lock, flags);
  1481. return 0;
  1482. }
  1483. /**
  1484. * iwl4965_hw_set_hw_setting
  1485. *
  1486. * Called when initializing driver
  1487. */
  1488. int iwl4965_hw_set_hw_setting(struct iwl4965_priv *priv)
  1489. {
  1490. /* Allocate area for Tx byte count tables and Rx queue status */
  1491. priv->hw_setting.shared_virt =
  1492. pci_alloc_consistent(priv->pci_dev,
  1493. sizeof(struct iwl4965_shared),
  1494. &priv->hw_setting.shared_phys);
  1495. if (!priv->hw_setting.shared_virt)
  1496. return -1;
  1497. memset(priv->hw_setting.shared_virt, 0, sizeof(struct iwl4965_shared));
  1498. priv->hw_setting.max_txq_num = iwl4965_param_queues_num;
  1499. priv->hw_setting.tx_cmd_len = sizeof(struct iwl4965_tx_cmd);
  1500. priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
  1501. priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
  1502. if (iwl4965_param_amsdu_size_8K)
  1503. priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE_8K;
  1504. else
  1505. priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE_4K;
  1506. priv->hw_setting.max_pkt_size = priv->hw_setting.rx_buf_size - 256;
  1507. priv->hw_setting.max_stations = IWL4965_STATION_COUNT;
  1508. priv->hw_setting.bcast_sta_id = IWL4965_BROADCAST_ID;
  1509. priv->hw_setting.tx_ant_num = 2;
  1510. return 0;
  1511. }
  1512. /**
  1513. * iwl4965_hw_txq_ctx_free - Free TXQ Context
  1514. *
  1515. * Destroy all TX DMA queues and structures
  1516. */
  1517. void iwl4965_hw_txq_ctx_free(struct iwl4965_priv *priv)
  1518. {
  1519. int txq_id;
  1520. /* Tx queues */
  1521. for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
  1522. iwl4965_tx_queue_free(priv, &priv->txq[txq_id]);
  1523. /* Keep-warm buffer */
  1524. iwl4965_kw_free(priv);
  1525. }
  1526. /**
  1527. * iwl4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
  1528. *
  1529. * Does NOT advance any TFD circular buffer read/write indexes
  1530. * Does NOT free the TFD itself (which is within circular buffer)
  1531. */
  1532. int iwl4965_hw_txq_free_tfd(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  1533. {
  1534. struct iwl4965_tfd_frame *bd_tmp = (struct iwl4965_tfd_frame *)&txq->bd[0];
  1535. struct iwl4965_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
  1536. struct pci_dev *dev = priv->pci_dev;
  1537. int i;
  1538. int counter = 0;
  1539. int index, is_odd;
  1540. /* Host command buffers stay mapped in memory, nothing to clean */
  1541. if (txq->q.id == IWL_CMD_QUEUE_NUM)
  1542. return 0;
  1543. /* Sanity check on number of chunks */
  1544. counter = IWL_GET_BITS(*bd, num_tbs);
  1545. if (counter > MAX_NUM_OF_TBS) {
  1546. IWL_ERROR("Too many chunks: %i\n", counter);
  1547. /* @todo issue fatal error, it is quite serious situation */
  1548. return 0;
  1549. }
  1550. /* Unmap chunks, if any.
  1551. * TFD info for odd chunks is different format than for even chunks. */
  1552. for (i = 0; i < counter; i++) {
  1553. index = i / 2;
  1554. is_odd = i & 0x1;
  1555. if (is_odd)
  1556. pci_unmap_single(
  1557. dev,
  1558. IWL_GET_BITS(bd->pa[index], tb2_addr_lo16) |
  1559. (IWL_GET_BITS(bd->pa[index],
  1560. tb2_addr_hi20) << 16),
  1561. IWL_GET_BITS(bd->pa[index], tb2_len),
  1562. PCI_DMA_TODEVICE);
  1563. else if (i > 0)
  1564. pci_unmap_single(dev,
  1565. le32_to_cpu(bd->pa[index].tb1_addr),
  1566. IWL_GET_BITS(bd->pa[index], tb1_len),
  1567. PCI_DMA_TODEVICE);
  1568. /* Free SKB, if any, for this chunk */
  1569. if (txq->txb[txq->q.read_ptr].skb[i]) {
  1570. struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[i];
  1571. dev_kfree_skb(skb);
  1572. txq->txb[txq->q.read_ptr].skb[i] = NULL;
  1573. }
  1574. }
  1575. return 0;
  1576. }
  1577. int iwl4965_hw_reg_set_txpower(struct iwl4965_priv *priv, s8 power)
  1578. {
  1579. IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
  1580. return -EINVAL;
  1581. }
  1582. static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
  1583. {
  1584. s32 sign = 1;
  1585. if (num < 0) {
  1586. sign = -sign;
  1587. num = -num;
  1588. }
  1589. if (denom < 0) {
  1590. sign = -sign;
  1591. denom = -denom;
  1592. }
  1593. *res = 1;
  1594. *res = ((num * 2 + denom) / (denom * 2)) * sign;
  1595. return 1;
  1596. }
  1597. /**
  1598. * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
  1599. *
  1600. * Determines power supply voltage compensation for txpower calculations.
  1601. * Returns number of 1/2-dB steps to subtract from gain table index,
  1602. * to compensate for difference between power supply voltage during
  1603. * factory measurements, vs. current power supply voltage.
  1604. *
  1605. * Voltage indication is higher for lower voltage.
  1606. * Lower voltage requires more gain (lower gain table index).
  1607. */
  1608. static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
  1609. s32 current_voltage)
  1610. {
  1611. s32 comp = 0;
  1612. if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
  1613. (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
  1614. return 0;
  1615. iwl4965_math_div_round(current_voltage - eeprom_voltage,
  1616. TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
  1617. if (current_voltage > eeprom_voltage)
  1618. comp *= 2;
  1619. if ((comp < -2) || (comp > 2))
  1620. comp = 0;
  1621. return comp;
  1622. }
  1623. static const struct iwl4965_channel_info *
  1624. iwl4965_get_channel_txpower_info(struct iwl4965_priv *priv,
  1625. enum ieee80211_band band, u16 channel)
  1626. {
  1627. const struct iwl4965_channel_info *ch_info;
  1628. ch_info = iwl4965_get_channel_info(priv, band, channel);
  1629. if (!is_channel_valid(ch_info))
  1630. return NULL;
  1631. return ch_info;
  1632. }
  1633. static s32 iwl4965_get_tx_atten_grp(u16 channel)
  1634. {
  1635. if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
  1636. channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
  1637. return CALIB_CH_GROUP_5;
  1638. if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
  1639. channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
  1640. return CALIB_CH_GROUP_1;
  1641. if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
  1642. channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
  1643. return CALIB_CH_GROUP_2;
  1644. if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
  1645. channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
  1646. return CALIB_CH_GROUP_3;
  1647. if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
  1648. channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
  1649. return CALIB_CH_GROUP_4;
  1650. IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
  1651. return -1;
  1652. }
  1653. static u32 iwl4965_get_sub_band(const struct iwl4965_priv *priv, u32 channel)
  1654. {
  1655. s32 b = -1;
  1656. for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
  1657. if (priv->eeprom.calib_info.band_info[b].ch_from == 0)
  1658. continue;
  1659. if ((channel >= priv->eeprom.calib_info.band_info[b].ch_from)
  1660. && (channel <= priv->eeprom.calib_info.band_info[b].ch_to))
  1661. break;
  1662. }
  1663. return b;
  1664. }
  1665. static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
  1666. {
  1667. s32 val;
  1668. if (x2 == x1)
  1669. return y1;
  1670. else {
  1671. iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
  1672. return val + y2;
  1673. }
  1674. }
  1675. /**
  1676. * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
  1677. *
  1678. * Interpolates factory measurements from the two sample channels within a
  1679. * sub-band, to apply to channel of interest. Interpolation is proportional to
  1680. * differences in channel frequencies, which is proportional to differences
  1681. * in channel number.
  1682. */
  1683. static int iwl4965_interpolate_chan(struct iwl4965_priv *priv, u32 channel,
  1684. struct iwl4965_eeprom_calib_ch_info *chan_info)
  1685. {
  1686. s32 s = -1;
  1687. u32 c;
  1688. u32 m;
  1689. const struct iwl4965_eeprom_calib_measure *m1;
  1690. const struct iwl4965_eeprom_calib_measure *m2;
  1691. struct iwl4965_eeprom_calib_measure *omeas;
  1692. u32 ch_i1;
  1693. u32 ch_i2;
  1694. s = iwl4965_get_sub_band(priv, channel);
  1695. if (s >= EEPROM_TX_POWER_BANDS) {
  1696. IWL_ERROR("Tx Power can not find channel %d ", channel);
  1697. return -1;
  1698. }
  1699. ch_i1 = priv->eeprom.calib_info.band_info[s].ch1.ch_num;
  1700. ch_i2 = priv->eeprom.calib_info.band_info[s].ch2.ch_num;
  1701. chan_info->ch_num = (u8) channel;
  1702. IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
  1703. channel, s, ch_i1, ch_i2);
  1704. for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
  1705. for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
  1706. m1 = &(priv->eeprom.calib_info.band_info[s].ch1.
  1707. measurements[c][m]);
  1708. m2 = &(priv->eeprom.calib_info.band_info[s].ch2.
  1709. measurements[c][m]);
  1710. omeas = &(chan_info->measurements[c][m]);
  1711. omeas->actual_pow =
  1712. (u8) iwl4965_interpolate_value(channel, ch_i1,
  1713. m1->actual_pow,
  1714. ch_i2,
  1715. m2->actual_pow);
  1716. omeas->gain_idx =
  1717. (u8) iwl4965_interpolate_value(channel, ch_i1,
  1718. m1->gain_idx, ch_i2,
  1719. m2->gain_idx);
  1720. omeas->temperature =
  1721. (u8) iwl4965_interpolate_value(channel, ch_i1,
  1722. m1->temperature,
  1723. ch_i2,
  1724. m2->temperature);
  1725. omeas->pa_det =
  1726. (s8) iwl4965_interpolate_value(channel, ch_i1,
  1727. m1->pa_det, ch_i2,
  1728. m2->pa_det);
  1729. IWL_DEBUG_TXPOWER
  1730. ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
  1731. m1->actual_pow, m2->actual_pow, omeas->actual_pow);
  1732. IWL_DEBUG_TXPOWER
  1733. ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
  1734. m1->gain_idx, m2->gain_idx, omeas->gain_idx);
  1735. IWL_DEBUG_TXPOWER
  1736. ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
  1737. m1->pa_det, m2->pa_det, omeas->pa_det);
  1738. IWL_DEBUG_TXPOWER
  1739. ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
  1740. m1->temperature, m2->temperature,
  1741. omeas->temperature);
  1742. }
  1743. }
  1744. return 0;
  1745. }
  1746. /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
  1747. * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
  1748. static s32 back_off_table[] = {
  1749. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
  1750. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
  1751. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
  1752. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
  1753. 10 /* CCK */
  1754. };
  1755. /* Thermal compensation values for txpower for various frequency ranges ...
  1756. * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
  1757. static struct iwl4965_txpower_comp_entry {
  1758. s32 degrees_per_05db_a;
  1759. s32 degrees_per_05db_a_denom;
  1760. } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
  1761. {9, 2}, /* group 0 5.2, ch 34-43 */
  1762. {4, 1}, /* group 1 5.2, ch 44-70 */
  1763. {4, 1}, /* group 2 5.2, ch 71-124 */
  1764. {4, 1}, /* group 3 5.2, ch 125-200 */
  1765. {3, 1} /* group 4 2.4, ch all */
  1766. };
  1767. static s32 get_min_power_index(s32 rate_power_index, u32 band)
  1768. {
  1769. if (!band) {
  1770. if ((rate_power_index & 7) <= 4)
  1771. return MIN_TX_GAIN_INDEX_52GHZ_EXT;
  1772. }
  1773. return MIN_TX_GAIN_INDEX;
  1774. }
  1775. struct gain_entry {
  1776. u8 dsp;
  1777. u8 radio;
  1778. };
  1779. static const struct gain_entry gain_table[2][108] = {
  1780. /* 5.2GHz power gain index table */
  1781. {
  1782. {123, 0x3F}, /* highest txpower */
  1783. {117, 0x3F},
  1784. {110, 0x3F},
  1785. {104, 0x3F},
  1786. {98, 0x3F},
  1787. {110, 0x3E},
  1788. {104, 0x3E},
  1789. {98, 0x3E},
  1790. {110, 0x3D},
  1791. {104, 0x3D},
  1792. {98, 0x3D},
  1793. {110, 0x3C},
  1794. {104, 0x3C},
  1795. {98, 0x3C},
  1796. {110, 0x3B},
  1797. {104, 0x3B},
  1798. {98, 0x3B},
  1799. {110, 0x3A},
  1800. {104, 0x3A},
  1801. {98, 0x3A},
  1802. {110, 0x39},
  1803. {104, 0x39},
  1804. {98, 0x39},
  1805. {110, 0x38},
  1806. {104, 0x38},
  1807. {98, 0x38},
  1808. {110, 0x37},
  1809. {104, 0x37},
  1810. {98, 0x37},
  1811. {110, 0x36},
  1812. {104, 0x36},
  1813. {98, 0x36},
  1814. {110, 0x35},
  1815. {104, 0x35},
  1816. {98, 0x35},
  1817. {110, 0x34},
  1818. {104, 0x34},
  1819. {98, 0x34},
  1820. {110, 0x33},
  1821. {104, 0x33},
  1822. {98, 0x33},
  1823. {110, 0x32},
  1824. {104, 0x32},
  1825. {98, 0x32},
  1826. {110, 0x31},
  1827. {104, 0x31},
  1828. {98, 0x31},
  1829. {110, 0x30},
  1830. {104, 0x30},
  1831. {98, 0x30},
  1832. {110, 0x25},
  1833. {104, 0x25},
  1834. {98, 0x25},
  1835. {110, 0x24},
  1836. {104, 0x24},
  1837. {98, 0x24},
  1838. {110, 0x23},
  1839. {104, 0x23},
  1840. {98, 0x23},
  1841. {110, 0x22},
  1842. {104, 0x18},
  1843. {98, 0x18},
  1844. {110, 0x17},
  1845. {104, 0x17},
  1846. {98, 0x17},
  1847. {110, 0x16},
  1848. {104, 0x16},
  1849. {98, 0x16},
  1850. {110, 0x15},
  1851. {104, 0x15},
  1852. {98, 0x15},
  1853. {110, 0x14},
  1854. {104, 0x14},
  1855. {98, 0x14},
  1856. {110, 0x13},
  1857. {104, 0x13},
  1858. {98, 0x13},
  1859. {110, 0x12},
  1860. {104, 0x08},
  1861. {98, 0x08},
  1862. {110, 0x07},
  1863. {104, 0x07},
  1864. {98, 0x07},
  1865. {110, 0x06},
  1866. {104, 0x06},
  1867. {98, 0x06},
  1868. {110, 0x05},
  1869. {104, 0x05},
  1870. {98, 0x05},
  1871. {110, 0x04},
  1872. {104, 0x04},
  1873. {98, 0x04},
  1874. {110, 0x03},
  1875. {104, 0x03},
  1876. {98, 0x03},
  1877. {110, 0x02},
  1878. {104, 0x02},
  1879. {98, 0x02},
  1880. {110, 0x01},
  1881. {104, 0x01},
  1882. {98, 0x01},
  1883. {110, 0x00},
  1884. {104, 0x00},
  1885. {98, 0x00},
  1886. {93, 0x00},
  1887. {88, 0x00},
  1888. {83, 0x00},
  1889. {78, 0x00},
  1890. },
  1891. /* 2.4GHz power gain index table */
  1892. {
  1893. {110, 0x3f}, /* highest txpower */
  1894. {104, 0x3f},
  1895. {98, 0x3f},
  1896. {110, 0x3e},
  1897. {104, 0x3e},
  1898. {98, 0x3e},
  1899. {110, 0x3d},
  1900. {104, 0x3d},
  1901. {98, 0x3d},
  1902. {110, 0x3c},
  1903. {104, 0x3c},
  1904. {98, 0x3c},
  1905. {110, 0x3b},
  1906. {104, 0x3b},
  1907. {98, 0x3b},
  1908. {110, 0x3a},
  1909. {104, 0x3a},
  1910. {98, 0x3a},
  1911. {110, 0x39},
  1912. {104, 0x39},
  1913. {98, 0x39},
  1914. {110, 0x38},
  1915. {104, 0x38},
  1916. {98, 0x38},
  1917. {110, 0x37},
  1918. {104, 0x37},
  1919. {98, 0x37},
  1920. {110, 0x36},
  1921. {104, 0x36},
  1922. {98, 0x36},
  1923. {110, 0x35},
  1924. {104, 0x35},
  1925. {98, 0x35},
  1926. {110, 0x34},
  1927. {104, 0x34},
  1928. {98, 0x34},
  1929. {110, 0x33},
  1930. {104, 0x33},
  1931. {98, 0x33},
  1932. {110, 0x32},
  1933. {104, 0x32},
  1934. {98, 0x32},
  1935. {110, 0x31},
  1936. {104, 0x31},
  1937. {98, 0x31},
  1938. {110, 0x30},
  1939. {104, 0x30},
  1940. {98, 0x30},
  1941. {110, 0x6},
  1942. {104, 0x6},
  1943. {98, 0x6},
  1944. {110, 0x5},
  1945. {104, 0x5},
  1946. {98, 0x5},
  1947. {110, 0x4},
  1948. {104, 0x4},
  1949. {98, 0x4},
  1950. {110, 0x3},
  1951. {104, 0x3},
  1952. {98, 0x3},
  1953. {110, 0x2},
  1954. {104, 0x2},
  1955. {98, 0x2},
  1956. {110, 0x1},
  1957. {104, 0x1},
  1958. {98, 0x1},
  1959. {110, 0x0},
  1960. {104, 0x0},
  1961. {98, 0x0},
  1962. {97, 0},
  1963. {96, 0},
  1964. {95, 0},
  1965. {94, 0},
  1966. {93, 0},
  1967. {92, 0},
  1968. {91, 0},
  1969. {90, 0},
  1970. {89, 0},
  1971. {88, 0},
  1972. {87, 0},
  1973. {86, 0},
  1974. {85, 0},
  1975. {84, 0},
  1976. {83, 0},
  1977. {82, 0},
  1978. {81, 0},
  1979. {80, 0},
  1980. {79, 0},
  1981. {78, 0},
  1982. {77, 0},
  1983. {76, 0},
  1984. {75, 0},
  1985. {74, 0},
  1986. {73, 0},
  1987. {72, 0},
  1988. {71, 0},
  1989. {70, 0},
  1990. {69, 0},
  1991. {68, 0},
  1992. {67, 0},
  1993. {66, 0},
  1994. {65, 0},
  1995. {64, 0},
  1996. {63, 0},
  1997. {62, 0},
  1998. {61, 0},
  1999. {60, 0},
  2000. {59, 0},
  2001. }
  2002. };
  2003. static int iwl4965_fill_txpower_tbl(struct iwl4965_priv *priv, u8 band, u16 channel,
  2004. u8 is_fat, u8 ctrl_chan_high,
  2005. struct iwl4965_tx_power_db *tx_power_tbl)
  2006. {
  2007. u8 saturation_power;
  2008. s32 target_power;
  2009. s32 user_target_power;
  2010. s32 power_limit;
  2011. s32 current_temp;
  2012. s32 reg_limit;
  2013. s32 current_regulatory;
  2014. s32 txatten_grp = CALIB_CH_GROUP_MAX;
  2015. int i;
  2016. int c;
  2017. const struct iwl4965_channel_info *ch_info = NULL;
  2018. struct iwl4965_eeprom_calib_ch_info ch_eeprom_info;
  2019. const struct iwl4965_eeprom_calib_measure *measurement;
  2020. s16 voltage;
  2021. s32 init_voltage;
  2022. s32 voltage_compensation;
  2023. s32 degrees_per_05db_num;
  2024. s32 degrees_per_05db_denom;
  2025. s32 factory_temp;
  2026. s32 temperature_comp[2];
  2027. s32 factory_gain_index[2];
  2028. s32 factory_actual_pwr[2];
  2029. s32 power_index;
  2030. /* Sanity check requested level (dBm) */
  2031. if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
  2032. IWL_WARNING("Requested user TXPOWER %d below limit.\n",
  2033. priv->user_txpower_limit);
  2034. return -EINVAL;
  2035. }
  2036. if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
  2037. IWL_WARNING("Requested user TXPOWER %d above limit.\n",
  2038. priv->user_txpower_limit);
  2039. return -EINVAL;
  2040. }
  2041. /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
  2042. * are used for indexing into txpower table) */
  2043. user_target_power = 2 * priv->user_txpower_limit;
  2044. /* Get current (RXON) channel, band, width */
  2045. ch_info =
  2046. iwl4965_get_channel_txpower_info(priv, priv->band, channel);
  2047. IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
  2048. is_fat);
  2049. if (!ch_info)
  2050. return -EINVAL;
  2051. /* get txatten group, used to select 1) thermal txpower adjustment
  2052. * and 2) mimo txpower balance between Tx chains. */
  2053. txatten_grp = iwl4965_get_tx_atten_grp(channel);
  2054. if (txatten_grp < 0)
  2055. return -EINVAL;
  2056. IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
  2057. channel, txatten_grp);
  2058. if (is_fat) {
  2059. if (ctrl_chan_high)
  2060. channel -= 2;
  2061. else
  2062. channel += 2;
  2063. }
  2064. /* hardware txpower limits ...
  2065. * saturation (clipping distortion) txpowers are in half-dBm */
  2066. if (band)
  2067. saturation_power = priv->eeprom.calib_info.saturation_power24;
  2068. else
  2069. saturation_power = priv->eeprom.calib_info.saturation_power52;
  2070. if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
  2071. saturation_power > IWL_TX_POWER_SATURATION_MAX) {
  2072. if (band)
  2073. saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
  2074. else
  2075. saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
  2076. }
  2077. /* regulatory txpower limits ... reg_limit values are in half-dBm,
  2078. * max_power_avg values are in dBm, convert * 2 */
  2079. if (is_fat)
  2080. reg_limit = ch_info->fat_max_power_avg * 2;
  2081. else
  2082. reg_limit = ch_info->max_power_avg * 2;
  2083. if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
  2084. (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
  2085. if (band)
  2086. reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
  2087. else
  2088. reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
  2089. }
  2090. /* Interpolate txpower calibration values for this channel,
  2091. * based on factory calibration tests on spaced channels. */
  2092. iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
  2093. /* calculate tx gain adjustment based on power supply voltage */
  2094. voltage = priv->eeprom.calib_info.voltage;
  2095. init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
  2096. voltage_compensation =
  2097. iwl4965_get_voltage_compensation(voltage, init_voltage);
  2098. IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
  2099. init_voltage,
  2100. voltage, voltage_compensation);
  2101. /* get current temperature (Celsius) */
  2102. current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
  2103. current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
  2104. current_temp = KELVIN_TO_CELSIUS(current_temp);
  2105. /* select thermal txpower adjustment params, based on channel group
  2106. * (same frequency group used for mimo txatten adjustment) */
  2107. degrees_per_05db_num =
  2108. tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
  2109. degrees_per_05db_denom =
  2110. tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
  2111. /* get per-chain txpower values from factory measurements */
  2112. for (c = 0; c < 2; c++) {
  2113. measurement = &ch_eeprom_info.measurements[c][1];
  2114. /* txgain adjustment (in half-dB steps) based on difference
  2115. * between factory and current temperature */
  2116. factory_temp = measurement->temperature;
  2117. iwl4965_math_div_round((current_temp - factory_temp) *
  2118. degrees_per_05db_denom,
  2119. degrees_per_05db_num,
  2120. &temperature_comp[c]);
  2121. factory_gain_index[c] = measurement->gain_idx;
  2122. factory_actual_pwr[c] = measurement->actual_pow;
  2123. IWL_DEBUG_TXPOWER("chain = %d\n", c);
  2124. IWL_DEBUG_TXPOWER("fctry tmp %d, "
  2125. "curr tmp %d, comp %d steps\n",
  2126. factory_temp, current_temp,
  2127. temperature_comp[c]);
  2128. IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
  2129. factory_gain_index[c],
  2130. factory_actual_pwr[c]);
  2131. }
  2132. /* for each of 33 bit-rates (including 1 for CCK) */
  2133. for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
  2134. u8 is_mimo_rate;
  2135. union iwl4965_tx_power_dual_stream tx_power;
  2136. /* for mimo, reduce each chain's txpower by half
  2137. * (3dB, 6 steps), so total output power is regulatory
  2138. * compliant. */
  2139. if (i & 0x8) {
  2140. current_regulatory = reg_limit -
  2141. IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
  2142. is_mimo_rate = 1;
  2143. } else {
  2144. current_regulatory = reg_limit;
  2145. is_mimo_rate = 0;
  2146. }
  2147. /* find txpower limit, either hardware or regulatory */
  2148. power_limit = saturation_power - back_off_table[i];
  2149. if (power_limit > current_regulatory)
  2150. power_limit = current_regulatory;
  2151. /* reduce user's txpower request if necessary
  2152. * for this rate on this channel */
  2153. target_power = user_target_power;
  2154. if (target_power > power_limit)
  2155. target_power = power_limit;
  2156. IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
  2157. i, saturation_power - back_off_table[i],
  2158. current_regulatory, user_target_power,
  2159. target_power);
  2160. /* for each of 2 Tx chains (radio transmitters) */
  2161. for (c = 0; c < 2; c++) {
  2162. s32 atten_value;
  2163. if (is_mimo_rate)
  2164. atten_value =
  2165. (s32)le32_to_cpu(priv->card_alive_init.
  2166. tx_atten[txatten_grp][c]);
  2167. else
  2168. atten_value = 0;
  2169. /* calculate index; higher index means lower txpower */
  2170. power_index = (u8) (factory_gain_index[c] -
  2171. (target_power -
  2172. factory_actual_pwr[c]) -
  2173. temperature_comp[c] -
  2174. voltage_compensation +
  2175. atten_value);
  2176. /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
  2177. power_index); */
  2178. if (power_index < get_min_power_index(i, band))
  2179. power_index = get_min_power_index(i, band);
  2180. /* adjust 5 GHz index to support negative indexes */
  2181. if (!band)
  2182. power_index += 9;
  2183. /* CCK, rate 32, reduce txpower for CCK */
  2184. if (i == POWER_TABLE_CCK_ENTRY)
  2185. power_index +=
  2186. IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
  2187. /* stay within the table! */
  2188. if (power_index > 107) {
  2189. IWL_WARNING("txpower index %d > 107\n",
  2190. power_index);
  2191. power_index = 107;
  2192. }
  2193. if (power_index < 0) {
  2194. IWL_WARNING("txpower index %d < 0\n",
  2195. power_index);
  2196. power_index = 0;
  2197. }
  2198. /* fill txpower command for this rate/chain */
  2199. tx_power.s.radio_tx_gain[c] =
  2200. gain_table[band][power_index].radio;
  2201. tx_power.s.dsp_predis_atten[c] =
  2202. gain_table[band][power_index].dsp;
  2203. IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
  2204. "gain 0x%02x dsp %d\n",
  2205. c, atten_value, power_index,
  2206. tx_power.s.radio_tx_gain[c],
  2207. tx_power.s.dsp_predis_atten[c]);
  2208. }/* for each chain */
  2209. tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
  2210. }/* for each rate */
  2211. return 0;
  2212. }
  2213. /**
  2214. * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
  2215. *
  2216. * Uses the active RXON for channel, band, and characteristics (fat, high)
  2217. * The power limit is taken from priv->user_txpower_limit.
  2218. */
  2219. int iwl4965_hw_reg_send_txpower(struct iwl4965_priv *priv)
  2220. {
  2221. struct iwl4965_txpowertable_cmd cmd = { 0 };
  2222. int rc = 0;
  2223. u8 band = 0;
  2224. u8 is_fat = 0;
  2225. u8 ctrl_chan_high = 0;
  2226. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2227. /* If this gets hit a lot, switch it to a BUG() and catch
  2228. * the stack trace to find out who is calling this during
  2229. * a scan. */
  2230. IWL_WARNING("TX Power requested while scanning!\n");
  2231. return -EAGAIN;
  2232. }
  2233. band = priv->band == IEEE80211_BAND_2GHZ;
  2234. is_fat = is_fat_channel(priv->active_rxon.flags);
  2235. if (is_fat &&
  2236. (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
  2237. ctrl_chan_high = 1;
  2238. cmd.band = band;
  2239. cmd.channel = priv->active_rxon.channel;
  2240. rc = iwl4965_fill_txpower_tbl(priv, band,
  2241. le16_to_cpu(priv->active_rxon.channel),
  2242. is_fat, ctrl_chan_high, &cmd.tx_power);
  2243. if (rc)
  2244. return rc;
  2245. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
  2246. return rc;
  2247. }
  2248. int iwl4965_hw_channel_switch(struct iwl4965_priv *priv, u16 channel)
  2249. {
  2250. int rc;
  2251. u8 band = 0;
  2252. u8 is_fat = 0;
  2253. u8 ctrl_chan_high = 0;
  2254. struct iwl4965_channel_switch_cmd cmd = { 0 };
  2255. const struct iwl4965_channel_info *ch_info;
  2256. band = priv->band == IEEE80211_BAND_2GHZ;
  2257. ch_info = iwl4965_get_channel_info(priv, priv->band, channel);
  2258. is_fat = is_fat_channel(priv->staging_rxon.flags);
  2259. if (is_fat &&
  2260. (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
  2261. ctrl_chan_high = 1;
  2262. cmd.band = band;
  2263. cmd.expect_beacon = 0;
  2264. cmd.channel = cpu_to_le16(channel);
  2265. cmd.rxon_flags = priv->active_rxon.flags;
  2266. cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
  2267. cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
  2268. if (ch_info)
  2269. cmd.expect_beacon = is_channel_radar(ch_info);
  2270. else
  2271. cmd.expect_beacon = 1;
  2272. rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
  2273. ctrl_chan_high, &cmd.tx_power);
  2274. if (rc) {
  2275. IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
  2276. return rc;
  2277. }
  2278. rc = iwl4965_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
  2279. return rc;
  2280. }
  2281. #define RTS_HCCA_RETRY_LIMIT 3
  2282. #define RTS_DFAULT_RETRY_LIMIT 60
  2283. void iwl4965_hw_build_tx_cmd_rate(struct iwl4965_priv *priv,
  2284. struct iwl4965_cmd *cmd,
  2285. struct ieee80211_tx_control *ctrl,
  2286. struct ieee80211_hdr *hdr, int sta_id,
  2287. int is_hcca)
  2288. {
  2289. struct iwl4965_tx_cmd *tx = &cmd->cmd.tx;
  2290. u8 rts_retry_limit = 0;
  2291. u8 data_retry_limit = 0;
  2292. u16 fc = le16_to_cpu(hdr->frame_control);
  2293. u8 rate_plcp;
  2294. u16 rate_flags = 0;
  2295. int rate_idx = min(ctrl->tx_rate->hw_value & 0xffff, IWL_RATE_COUNT - 1);
  2296. rate_plcp = iwl4965_rates[rate_idx].plcp;
  2297. rts_retry_limit = (is_hcca) ?
  2298. RTS_HCCA_RETRY_LIMIT : RTS_DFAULT_RETRY_LIMIT;
  2299. if ((rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE))
  2300. rate_flags |= RATE_MCS_CCK_MSK;
  2301. if (ieee80211_is_probe_response(fc)) {
  2302. data_retry_limit = 3;
  2303. if (data_retry_limit < rts_retry_limit)
  2304. rts_retry_limit = data_retry_limit;
  2305. } else
  2306. data_retry_limit = IWL_DEFAULT_TX_RETRY;
  2307. if (priv->data_retry_limit != -1)
  2308. data_retry_limit = priv->data_retry_limit;
  2309. if (ieee80211_is_data(fc)) {
  2310. tx->initial_rate_index = 0;
  2311. tx->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
  2312. } else {
  2313. switch (fc & IEEE80211_FCTL_STYPE) {
  2314. case IEEE80211_STYPE_AUTH:
  2315. case IEEE80211_STYPE_DEAUTH:
  2316. case IEEE80211_STYPE_ASSOC_REQ:
  2317. case IEEE80211_STYPE_REASSOC_REQ:
  2318. if (tx->tx_flags & TX_CMD_FLG_RTS_MSK) {
  2319. tx->tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2320. tx->tx_flags |= TX_CMD_FLG_CTS_MSK;
  2321. }
  2322. break;
  2323. default:
  2324. break;
  2325. }
  2326. /* Alternate between antenna A and B for successive frames */
  2327. if (priv->use_ant_b_for_management_frame) {
  2328. priv->use_ant_b_for_management_frame = 0;
  2329. rate_flags |= RATE_MCS_ANT_B_MSK;
  2330. } else {
  2331. priv->use_ant_b_for_management_frame = 1;
  2332. rate_flags |= RATE_MCS_ANT_A_MSK;
  2333. }
  2334. }
  2335. tx->rts_retry_limit = rts_retry_limit;
  2336. tx->data_retry_limit = data_retry_limit;
  2337. tx->rate_n_flags = iwl4965_hw_set_rate_n_flags(rate_plcp, rate_flags);
  2338. }
  2339. int iwl4965_hw_get_rx_read(struct iwl4965_priv *priv)
  2340. {
  2341. struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
  2342. return IWL_GET_BITS(*shared_data, rb_closed_stts_rb_num);
  2343. }
  2344. int iwl4965_hw_get_temperature(struct iwl4965_priv *priv)
  2345. {
  2346. return priv->temperature;
  2347. }
  2348. unsigned int iwl4965_hw_get_beacon_cmd(struct iwl4965_priv *priv,
  2349. struct iwl4965_frame *frame, u8 rate)
  2350. {
  2351. struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
  2352. unsigned int frame_size;
  2353. tx_beacon_cmd = &frame->u.beacon;
  2354. memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
  2355. tx_beacon_cmd->tx.sta_id = IWL4965_BROADCAST_ID;
  2356. tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2357. frame_size = iwl4965_fill_beacon_frame(priv,
  2358. tx_beacon_cmd->frame,
  2359. iwl4965_broadcast_addr,
  2360. sizeof(frame->u) - sizeof(*tx_beacon_cmd));
  2361. BUG_ON(frame_size > MAX_MPDU_SIZE);
  2362. tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
  2363. if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
  2364. tx_beacon_cmd->tx.rate_n_flags =
  2365. iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
  2366. else
  2367. tx_beacon_cmd->tx.rate_n_flags =
  2368. iwl4965_hw_set_rate_n_flags(rate, 0);
  2369. tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
  2370. TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
  2371. return (sizeof(*tx_beacon_cmd) + frame_size);
  2372. }
  2373. /*
  2374. * Tell 4965 where to find circular buffer of Tx Frame Descriptors for
  2375. * given Tx queue, and enable the DMA channel used for that queue.
  2376. *
  2377. * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
  2378. * channels supported in hardware.
  2379. */
  2380. int iwl4965_hw_tx_queue_init(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  2381. {
  2382. int rc;
  2383. unsigned long flags;
  2384. int txq_id = txq->q.id;
  2385. spin_lock_irqsave(&priv->lock, flags);
  2386. rc = iwl4965_grab_nic_access(priv);
  2387. if (rc) {
  2388. spin_unlock_irqrestore(&priv->lock, flags);
  2389. return rc;
  2390. }
  2391. /* Circular buffer (TFD queue in DRAM) physical base address */
  2392. iwl4965_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
  2393. txq->q.dma_addr >> 8);
  2394. /* Enable DMA channel, using same id as for TFD queue */
  2395. iwl4965_write_direct32(
  2396. priv, IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
  2397. IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
  2398. IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL);
  2399. iwl4965_release_nic_access(priv);
  2400. spin_unlock_irqrestore(&priv->lock, flags);
  2401. return 0;
  2402. }
  2403. int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl4965_priv *priv, void *ptr,
  2404. dma_addr_t addr, u16 len)
  2405. {
  2406. int index, is_odd;
  2407. struct iwl4965_tfd_frame *tfd = ptr;
  2408. u32 num_tbs = IWL_GET_BITS(*tfd, num_tbs);
  2409. /* Each TFD can point to a maximum 20 Tx buffers */
  2410. if ((num_tbs >= MAX_NUM_OF_TBS) || (num_tbs < 0)) {
  2411. IWL_ERROR("Error can not send more than %d chunks\n",
  2412. MAX_NUM_OF_TBS);
  2413. return -EINVAL;
  2414. }
  2415. index = num_tbs / 2;
  2416. is_odd = num_tbs & 0x1;
  2417. if (!is_odd) {
  2418. tfd->pa[index].tb1_addr = cpu_to_le32(addr);
  2419. IWL_SET_BITS(tfd->pa[index], tb1_addr_hi,
  2420. iwl_get_dma_hi_address(addr));
  2421. IWL_SET_BITS(tfd->pa[index], tb1_len, len);
  2422. } else {
  2423. IWL_SET_BITS(tfd->pa[index], tb2_addr_lo16,
  2424. (u32) (addr & 0xffff));
  2425. IWL_SET_BITS(tfd->pa[index], tb2_addr_hi20, addr >> 16);
  2426. IWL_SET_BITS(tfd->pa[index], tb2_len, len);
  2427. }
  2428. IWL_SET_BITS(*tfd, num_tbs, num_tbs + 1);
  2429. return 0;
  2430. }
  2431. static void iwl4965_hw_card_show_info(struct iwl4965_priv *priv)
  2432. {
  2433. u16 hw_version = priv->eeprom.board_revision_4965;
  2434. IWL_DEBUG_INFO("4965ABGN HW Version %u.%u.%u\n",
  2435. ((hw_version >> 8) & 0x0F),
  2436. ((hw_version >> 8) >> 4), (hw_version & 0x00FF));
  2437. IWL_DEBUG_INFO("4965ABGN PBA Number %.16s\n",
  2438. priv->eeprom.board_pba_number_4965);
  2439. }
  2440. #define IWL_TX_CRC_SIZE 4
  2441. #define IWL_TX_DELIMITER_SIZE 4
  2442. /**
  2443. * iwl4965_tx_queue_update_wr_ptr - Set up entry in Tx byte-count array
  2444. */
  2445. int iwl4965_tx_queue_update_wr_ptr(struct iwl4965_priv *priv,
  2446. struct iwl4965_tx_queue *txq, u16 byte_cnt)
  2447. {
  2448. int len;
  2449. int txq_id = txq->q.id;
  2450. struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
  2451. if (txq->need_update == 0)
  2452. return 0;
  2453. len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
  2454. /* Set up byte count within first 256 entries */
  2455. IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
  2456. tfd_offset[txq->q.write_ptr], byte_cnt, len);
  2457. /* If within first 64 entries, duplicate at end */
  2458. if (txq->q.write_ptr < IWL4965_MAX_WIN_SIZE)
  2459. IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
  2460. tfd_offset[IWL4965_QUEUE_SIZE + txq->q.write_ptr],
  2461. byte_cnt, len);
  2462. return 0;
  2463. }
  2464. /**
  2465. * iwl4965_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
  2466. *
  2467. * Selects how many and which Rx receivers/antennas/chains to use.
  2468. * This should not be used for scan command ... it puts data in wrong place.
  2469. */
  2470. void iwl4965_set_rxon_chain(struct iwl4965_priv *priv)
  2471. {
  2472. u8 is_single = is_single_stream(priv);
  2473. u8 idle_state, rx_state;
  2474. priv->staging_rxon.rx_chain = 0;
  2475. rx_state = idle_state = 3;
  2476. /* Tell uCode which antennas are actually connected.
  2477. * Before first association, we assume all antennas are connected.
  2478. * Just after first association, iwl4965_noise_calibration()
  2479. * checks which antennas actually *are* connected. */
  2480. priv->staging_rxon.rx_chain |=
  2481. cpu_to_le16(priv->valid_antenna << RXON_RX_CHAIN_VALID_POS);
  2482. /* How many receivers should we use? */
  2483. iwl4965_get_rx_chain_counter(priv, &idle_state, &rx_state);
  2484. priv->staging_rxon.rx_chain |=
  2485. cpu_to_le16(rx_state << RXON_RX_CHAIN_MIMO_CNT_POS);
  2486. priv->staging_rxon.rx_chain |=
  2487. cpu_to_le16(idle_state << RXON_RX_CHAIN_CNT_POS);
  2488. if (!is_single && (rx_state >= 2) &&
  2489. !test_bit(STATUS_POWER_PMI, &priv->status))
  2490. priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
  2491. else
  2492. priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
  2493. IWL_DEBUG_ASSOC("rx chain %X\n", priv->staging_rxon.rx_chain);
  2494. }
  2495. /**
  2496. * sign_extend - Sign extend a value using specified bit as sign-bit
  2497. *
  2498. * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
  2499. * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
  2500. *
  2501. * @param oper value to sign extend
  2502. * @param index 0 based bit index (0<=index<32) to sign bit
  2503. */
  2504. static s32 sign_extend(u32 oper, int index)
  2505. {
  2506. u8 shift = 31 - index;
  2507. return (s32)(oper << shift) >> shift;
  2508. }
  2509. /**
  2510. * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
  2511. * @statistics: Provides the temperature reading from the uCode
  2512. *
  2513. * A return of <0 indicates bogus data in the statistics
  2514. */
  2515. int iwl4965_get_temperature(const struct iwl4965_priv *priv)
  2516. {
  2517. s32 temperature;
  2518. s32 vt;
  2519. s32 R1, R2, R3;
  2520. u32 R4;
  2521. if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
  2522. (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
  2523. IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
  2524. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
  2525. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
  2526. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
  2527. R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
  2528. } else {
  2529. IWL_DEBUG_TEMP("Running temperature calibration\n");
  2530. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
  2531. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
  2532. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
  2533. R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
  2534. }
  2535. /*
  2536. * Temperature is only 23 bits, so sign extend out to 32.
  2537. *
  2538. * NOTE If we haven't received a statistics notification yet
  2539. * with an updated temperature, use R4 provided to us in the
  2540. * "initialize" ALIVE response.
  2541. */
  2542. if (!test_bit(STATUS_TEMPERATURE, &priv->status))
  2543. vt = sign_extend(R4, 23);
  2544. else
  2545. vt = sign_extend(
  2546. le32_to_cpu(priv->statistics.general.temperature), 23);
  2547. IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
  2548. R1, R2, R3, vt);
  2549. if (R3 == R1) {
  2550. IWL_ERROR("Calibration conflict R1 == R3\n");
  2551. return -1;
  2552. }
  2553. /* Calculate temperature in degrees Kelvin, adjust by 97%.
  2554. * Add offset to center the adjustment around 0 degrees Centigrade. */
  2555. temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
  2556. temperature /= (R3 - R1);
  2557. temperature = (temperature * 97) / 100 +
  2558. TEMPERATURE_CALIB_KELVIN_OFFSET;
  2559. IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
  2560. KELVIN_TO_CELSIUS(temperature));
  2561. return temperature;
  2562. }
  2563. /* Adjust Txpower only if temperature variance is greater than threshold. */
  2564. #define IWL_TEMPERATURE_THRESHOLD 3
  2565. /**
  2566. * iwl4965_is_temp_calib_needed - determines if new calibration is needed
  2567. *
  2568. * If the temperature changed has changed sufficiently, then a recalibration
  2569. * is needed.
  2570. *
  2571. * Assumes caller will replace priv->last_temperature once calibration
  2572. * executed.
  2573. */
  2574. static int iwl4965_is_temp_calib_needed(struct iwl4965_priv *priv)
  2575. {
  2576. int temp_diff;
  2577. if (!test_bit(STATUS_STATISTICS, &priv->status)) {
  2578. IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
  2579. return 0;
  2580. }
  2581. temp_diff = priv->temperature - priv->last_temperature;
  2582. /* get absolute value */
  2583. if (temp_diff < 0) {
  2584. IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
  2585. temp_diff = -temp_diff;
  2586. } else if (temp_diff == 0)
  2587. IWL_DEBUG_POWER("Same temp, \n");
  2588. else
  2589. IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
  2590. if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
  2591. IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
  2592. return 0;
  2593. }
  2594. IWL_DEBUG_POWER("Thermal txpower calib needed\n");
  2595. return 1;
  2596. }
  2597. /* Calculate noise level, based on measurements during network silence just
  2598. * before arriving beacon. This measurement can be done only if we know
  2599. * exactly when to expect beacons, therefore only when we're associated. */
  2600. static void iwl4965_rx_calc_noise(struct iwl4965_priv *priv)
  2601. {
  2602. struct statistics_rx_non_phy *rx_info
  2603. = &(priv->statistics.rx.general);
  2604. int num_active_rx = 0;
  2605. int total_silence = 0;
  2606. int bcn_silence_a =
  2607. le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
  2608. int bcn_silence_b =
  2609. le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
  2610. int bcn_silence_c =
  2611. le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
  2612. if (bcn_silence_a) {
  2613. total_silence += bcn_silence_a;
  2614. num_active_rx++;
  2615. }
  2616. if (bcn_silence_b) {
  2617. total_silence += bcn_silence_b;
  2618. num_active_rx++;
  2619. }
  2620. if (bcn_silence_c) {
  2621. total_silence += bcn_silence_c;
  2622. num_active_rx++;
  2623. }
  2624. /* Average among active antennas */
  2625. if (num_active_rx)
  2626. priv->last_rx_noise = (total_silence / num_active_rx) - 107;
  2627. else
  2628. priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  2629. IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
  2630. bcn_silence_a, bcn_silence_b, bcn_silence_c,
  2631. priv->last_rx_noise);
  2632. }
  2633. void iwl4965_hw_rx_statistics(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  2634. {
  2635. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2636. int change;
  2637. s32 temp;
  2638. IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
  2639. (int)sizeof(priv->statistics), pkt->len);
  2640. change = ((priv->statistics.general.temperature !=
  2641. pkt->u.stats.general.temperature) ||
  2642. ((priv->statistics.flag &
  2643. STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
  2644. (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
  2645. memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
  2646. set_bit(STATUS_STATISTICS, &priv->status);
  2647. /* Reschedule the statistics timer to occur in
  2648. * REG_RECALIB_PERIOD seconds to ensure we get a
  2649. * thermal update even if the uCode doesn't give
  2650. * us one */
  2651. mod_timer(&priv->statistics_periodic, jiffies +
  2652. msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
  2653. if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
  2654. (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
  2655. iwl4965_rx_calc_noise(priv);
  2656. #ifdef CONFIG_IWL4965_SENSITIVITY
  2657. queue_work(priv->workqueue, &priv->sensitivity_work);
  2658. #endif
  2659. }
  2660. /* If the hardware hasn't reported a change in
  2661. * temperature then don't bother computing a
  2662. * calibrated temperature value */
  2663. if (!change)
  2664. return;
  2665. temp = iwl4965_get_temperature(priv);
  2666. if (temp < 0)
  2667. return;
  2668. if (priv->temperature != temp) {
  2669. if (priv->temperature)
  2670. IWL_DEBUG_TEMP("Temperature changed "
  2671. "from %dC to %dC\n",
  2672. KELVIN_TO_CELSIUS(priv->temperature),
  2673. KELVIN_TO_CELSIUS(temp));
  2674. else
  2675. IWL_DEBUG_TEMP("Temperature "
  2676. "initialized to %dC\n",
  2677. KELVIN_TO_CELSIUS(temp));
  2678. }
  2679. priv->temperature = temp;
  2680. set_bit(STATUS_TEMPERATURE, &priv->status);
  2681. if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
  2682. iwl4965_is_temp_calib_needed(priv))
  2683. queue_work(priv->workqueue, &priv->txpower_work);
  2684. }
  2685. static void iwl4965_add_radiotap(struct iwl4965_priv *priv,
  2686. struct sk_buff *skb,
  2687. struct iwl4965_rx_phy_res *rx_start,
  2688. struct ieee80211_rx_status *stats,
  2689. u32 ampdu_status)
  2690. {
  2691. s8 signal = stats->ssi;
  2692. s8 noise = 0;
  2693. int rate = stats->rate_idx;
  2694. u64 tsf = stats->mactime;
  2695. __le16 phy_flags_hw = rx_start->phy_flags;
  2696. struct iwl4965_rt_rx_hdr {
  2697. struct ieee80211_radiotap_header rt_hdr;
  2698. __le64 rt_tsf; /* TSF */
  2699. u8 rt_flags; /* radiotap packet flags */
  2700. u8 rt_rate; /* rate in 500kb/s */
  2701. __le16 rt_channelMHz; /* channel in MHz */
  2702. __le16 rt_chbitmask; /* channel bitfield */
  2703. s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
  2704. s8 rt_dbmnoise;
  2705. u8 rt_antenna; /* antenna number */
  2706. } __attribute__ ((packed)) *iwl4965_rt;
  2707. /* TODO: We won't have enough headroom for HT frames. Fix it later. */
  2708. if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
  2709. if (net_ratelimit())
  2710. printk(KERN_ERR "not enough headroom [%d] for "
  2711. "radiotap head [%zd]\n",
  2712. skb_headroom(skb), sizeof(*iwl4965_rt));
  2713. return;
  2714. }
  2715. /* put radiotap header in front of 802.11 header and data */
  2716. iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
  2717. /* initialise radiotap header */
  2718. iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  2719. iwl4965_rt->rt_hdr.it_pad = 0;
  2720. /* total header + data */
  2721. put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
  2722. &iwl4965_rt->rt_hdr.it_len);
  2723. /* Indicate all the fields we add to the radiotap header */
  2724. put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  2725. (1 << IEEE80211_RADIOTAP_FLAGS) |
  2726. (1 << IEEE80211_RADIOTAP_RATE) |
  2727. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  2728. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  2729. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  2730. (1 << IEEE80211_RADIOTAP_ANTENNA)),
  2731. &iwl4965_rt->rt_hdr.it_present);
  2732. /* Zero the flags, we'll add to them as we go */
  2733. iwl4965_rt->rt_flags = 0;
  2734. put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
  2735. iwl4965_rt->rt_dbmsignal = signal;
  2736. iwl4965_rt->rt_dbmnoise = noise;
  2737. /* Convert the channel frequency and set the flags */
  2738. put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
  2739. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  2740. put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
  2741. IEEE80211_CHAN_5GHZ),
  2742. &iwl4965_rt->rt_chbitmask);
  2743. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  2744. put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
  2745. IEEE80211_CHAN_2GHZ),
  2746. &iwl4965_rt->rt_chbitmask);
  2747. else /* 802.11g */
  2748. put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
  2749. IEEE80211_CHAN_2GHZ),
  2750. &iwl4965_rt->rt_chbitmask);
  2751. if (rate == -1)
  2752. iwl4965_rt->rt_rate = 0;
  2753. else
  2754. iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee;
  2755. /*
  2756. * "antenna number"
  2757. *
  2758. * It seems that the antenna field in the phy flags value
  2759. * is actually a bitfield. This is undefined by radiotap,
  2760. * it wants an actual antenna number but I always get "7"
  2761. * for most legacy frames I receive indicating that the
  2762. * same frame was received on all three RX chains.
  2763. *
  2764. * I think this field should be removed in favour of a
  2765. * new 802.11n radiotap field "RX chains" that is defined
  2766. * as a bitmask.
  2767. */
  2768. iwl4965_rt->rt_antenna =
  2769. le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
  2770. /* set the preamble flag if appropriate */
  2771. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  2772. iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  2773. stats->flag |= RX_FLAG_RADIOTAP;
  2774. }
  2775. static void iwl4965_handle_data_packet(struct iwl4965_priv *priv, int is_data,
  2776. int include_phy,
  2777. struct iwl4965_rx_mem_buffer *rxb,
  2778. struct ieee80211_rx_status *stats)
  2779. {
  2780. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  2781. struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
  2782. (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
  2783. struct ieee80211_hdr *hdr;
  2784. u16 len;
  2785. __le32 *rx_end;
  2786. unsigned int skblen;
  2787. u32 ampdu_status;
  2788. if (!include_phy && priv->last_phy_res[0])
  2789. rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
  2790. if (!rx_start) {
  2791. IWL_ERROR("MPDU frame without a PHY data\n");
  2792. return;
  2793. }
  2794. if (include_phy) {
  2795. hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
  2796. rx_start->cfg_phy_cnt);
  2797. len = le16_to_cpu(rx_start->byte_count);
  2798. rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
  2799. sizeof(struct iwl4965_rx_phy_res) +
  2800. rx_start->cfg_phy_cnt + len);
  2801. } else {
  2802. struct iwl4965_rx_mpdu_res_start *amsdu =
  2803. (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
  2804. hdr = (struct ieee80211_hdr *)(pkt->u.raw +
  2805. sizeof(struct iwl4965_rx_mpdu_res_start));
  2806. len = le16_to_cpu(amsdu->byte_count);
  2807. rx_start->byte_count = amsdu->byte_count;
  2808. rx_end = (__le32 *) (((u8 *) hdr) + len);
  2809. }
  2810. if (len > priv->hw_setting.max_pkt_size || len < 16) {
  2811. IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
  2812. return;
  2813. }
  2814. ampdu_status = le32_to_cpu(*rx_end);
  2815. skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
  2816. /* start from MAC */
  2817. skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
  2818. skb_put(rxb->skb, len); /* end where data ends */
  2819. /* We only process data packets if the interface is open */
  2820. if (unlikely(!priv->is_open)) {
  2821. IWL_DEBUG_DROP_LIMIT
  2822. ("Dropping packet while interface is not open.\n");
  2823. return;
  2824. }
  2825. stats->flag = 0;
  2826. hdr = (struct ieee80211_hdr *)rxb->skb->data;
  2827. if (iwl4965_param_hwcrypto)
  2828. iwl4965_set_decrypted_flag(priv, rxb->skb, ampdu_status, stats);
  2829. if (priv->add_radiotap)
  2830. iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
  2831. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  2832. priv->alloc_rxb_skb--;
  2833. rxb->skb = NULL;
  2834. #ifdef LED
  2835. priv->led_packets += len;
  2836. iwl4965_setup_activity_timer(priv);
  2837. #endif
  2838. }
  2839. /* Calc max signal level (dBm) among 3 possible receivers */
  2840. static int iwl4965_calc_rssi(struct iwl4965_rx_phy_res *rx_resp)
  2841. {
  2842. /* data from PHY/DSP regarding signal strength, etc.,
  2843. * contents are always there, not configurable by host. */
  2844. struct iwl4965_rx_non_cfg_phy *ncphy =
  2845. (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
  2846. u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
  2847. >> IWL_AGC_DB_POS;
  2848. u32 valid_antennae =
  2849. (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
  2850. >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
  2851. u8 max_rssi = 0;
  2852. u32 i;
  2853. /* Find max rssi among 3 possible receivers.
  2854. * These values are measured by the digital signal processor (DSP).
  2855. * They should stay fairly constant even as the signal strength varies,
  2856. * if the radio's automatic gain control (AGC) is working right.
  2857. * AGC value (see below) will provide the "interesting" info. */
  2858. for (i = 0; i < 3; i++)
  2859. if (valid_antennae & (1 << i))
  2860. max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
  2861. IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
  2862. ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
  2863. max_rssi, agc);
  2864. /* dBm = max_rssi dB - agc dB - constant.
  2865. * Higher AGC (higher radio gain) means lower signal. */
  2866. return (max_rssi - agc - IWL_RSSI_OFFSET);
  2867. }
  2868. #ifdef CONFIG_IWL4965_HT
  2869. /* Parsed Information Elements */
  2870. struct ieee802_11_elems {
  2871. u8 *ds_params;
  2872. u8 ds_params_len;
  2873. u8 *tim;
  2874. u8 tim_len;
  2875. u8 *ibss_params;
  2876. u8 ibss_params_len;
  2877. u8 *erp_info;
  2878. u8 erp_info_len;
  2879. u8 *ht_cap_param;
  2880. u8 ht_cap_param_len;
  2881. u8 *ht_extra_param;
  2882. u8 ht_extra_param_len;
  2883. };
  2884. static int parse_elems(u8 *start, size_t len, struct ieee802_11_elems *elems)
  2885. {
  2886. size_t left = len;
  2887. u8 *pos = start;
  2888. int unknown = 0;
  2889. memset(elems, 0, sizeof(*elems));
  2890. while (left >= 2) {
  2891. u8 id, elen;
  2892. id = *pos++;
  2893. elen = *pos++;
  2894. left -= 2;
  2895. if (elen > left)
  2896. return -1;
  2897. switch (id) {
  2898. case WLAN_EID_DS_PARAMS:
  2899. elems->ds_params = pos;
  2900. elems->ds_params_len = elen;
  2901. break;
  2902. case WLAN_EID_TIM:
  2903. elems->tim = pos;
  2904. elems->tim_len = elen;
  2905. break;
  2906. case WLAN_EID_IBSS_PARAMS:
  2907. elems->ibss_params = pos;
  2908. elems->ibss_params_len = elen;
  2909. break;
  2910. case WLAN_EID_ERP_INFO:
  2911. elems->erp_info = pos;
  2912. elems->erp_info_len = elen;
  2913. break;
  2914. case WLAN_EID_HT_CAPABILITY:
  2915. elems->ht_cap_param = pos;
  2916. elems->ht_cap_param_len = elen;
  2917. break;
  2918. case WLAN_EID_HT_EXTRA_INFO:
  2919. elems->ht_extra_param = pos;
  2920. elems->ht_extra_param_len = elen;
  2921. break;
  2922. default:
  2923. unknown++;
  2924. break;
  2925. }
  2926. left -= elen;
  2927. pos += elen;
  2928. }
  2929. return 0;
  2930. }
  2931. void iwl4965_init_ht_hw_capab(struct ieee80211_ht_info *ht_info,
  2932. enum ieee80211_band band)
  2933. {
  2934. ht_info->cap = 0;
  2935. memset(ht_info->supp_mcs_set, 0, 16);
  2936. ht_info->ht_supported = 1;
  2937. if (band == IEEE80211_BAND_5GHZ) {
  2938. ht_info->cap |= (u16)IEEE80211_HT_CAP_SUP_WIDTH;
  2939. ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_40;
  2940. ht_info->supp_mcs_set[4] = 0x01;
  2941. }
  2942. ht_info->cap |= (u16)IEEE80211_HT_CAP_GRN_FLD;
  2943. ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_20;
  2944. ht_info->cap |= (u16)(IEEE80211_HT_CAP_MIMO_PS &
  2945. (IWL_MIMO_PS_NONE << 2));
  2946. if (iwl4965_param_amsdu_size_8K) {
  2947. printk(KERN_DEBUG "iwl4965 in A-MSDU 8K support mode\n");
  2948. ht_info->cap |= (u16)IEEE80211_HT_CAP_MAX_AMSDU;
  2949. }
  2950. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  2951. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  2952. ht_info->supp_mcs_set[0] = 0xFF;
  2953. ht_info->supp_mcs_set[1] = 0xFF;
  2954. }
  2955. #endif /* CONFIG_IWL4965_HT */
  2956. static void iwl4965_sta_modify_ps_wake(struct iwl4965_priv *priv, int sta_id)
  2957. {
  2958. unsigned long flags;
  2959. spin_lock_irqsave(&priv->sta_lock, flags);
  2960. priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
  2961. priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
  2962. priv->stations[sta_id].sta.sta.modify_mask = 0;
  2963. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  2964. spin_unlock_irqrestore(&priv->sta_lock, flags);
  2965. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  2966. }
  2967. static void iwl4965_update_ps_mode(struct iwl4965_priv *priv, u16 ps_bit, u8 *addr)
  2968. {
  2969. /* FIXME: need locking over ps_status ??? */
  2970. u8 sta_id = iwl4965_hw_find_station(priv, addr);
  2971. if (sta_id != IWL_INVALID_STATION) {
  2972. u8 sta_awake = priv->stations[sta_id].
  2973. ps_status == STA_PS_STATUS_WAKE;
  2974. if (sta_awake && ps_bit)
  2975. priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
  2976. else if (!sta_awake && !ps_bit) {
  2977. iwl4965_sta_modify_ps_wake(priv, sta_id);
  2978. priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
  2979. }
  2980. }
  2981. }
  2982. #ifdef CONFIG_IWL4965_DEBUG
  2983. /**
  2984. * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions
  2985. *
  2986. * You may hack this function to show different aspects of received frames,
  2987. * including selective frame dumps.
  2988. * group100 parameter selects whether to show 1 out of 100 good frames.
  2989. *
  2990. * TODO: This was originally written for 3945, need to audit for
  2991. * proper operation with 4965.
  2992. */
  2993. static void iwl4965_dbg_report_frame(struct iwl4965_priv *priv,
  2994. struct iwl4965_rx_packet *pkt,
  2995. struct ieee80211_hdr *header, int group100)
  2996. {
  2997. u32 to_us;
  2998. u32 print_summary = 0;
  2999. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  3000. u32 hundred = 0;
  3001. u32 dataframe = 0;
  3002. u16 fc;
  3003. u16 seq_ctl;
  3004. u16 channel;
  3005. u16 phy_flags;
  3006. int rate_sym;
  3007. u16 length;
  3008. u16 status;
  3009. u16 bcn_tmr;
  3010. u32 tsf_low;
  3011. u64 tsf;
  3012. u8 rssi;
  3013. u8 agc;
  3014. u16 sig_avg;
  3015. u16 noise_diff;
  3016. struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  3017. struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  3018. struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
  3019. u8 *data = IWL_RX_DATA(pkt);
  3020. if (likely(!(iwl4965_debug_level & IWL_DL_RX)))
  3021. return;
  3022. /* MAC header */
  3023. fc = le16_to_cpu(header->frame_control);
  3024. seq_ctl = le16_to_cpu(header->seq_ctrl);
  3025. /* metadata */
  3026. channel = le16_to_cpu(rx_hdr->channel);
  3027. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  3028. rate_sym = rx_hdr->rate;
  3029. length = le16_to_cpu(rx_hdr->len);
  3030. /* end-of-frame status and timestamp */
  3031. status = le32_to_cpu(rx_end->status);
  3032. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  3033. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  3034. tsf = le64_to_cpu(rx_end->timestamp);
  3035. /* signal statistics */
  3036. rssi = rx_stats->rssi;
  3037. agc = rx_stats->agc;
  3038. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  3039. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  3040. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  3041. /* if data frame is to us and all is good,
  3042. * (optionally) print summary for only 1 out of every 100 */
  3043. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  3044. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  3045. dataframe = 1;
  3046. if (!group100)
  3047. print_summary = 1; /* print each frame */
  3048. else if (priv->framecnt_to_us < 100) {
  3049. priv->framecnt_to_us++;
  3050. print_summary = 0;
  3051. } else {
  3052. priv->framecnt_to_us = 0;
  3053. print_summary = 1;
  3054. hundred = 1;
  3055. }
  3056. } else {
  3057. /* print summary for all other frames */
  3058. print_summary = 1;
  3059. }
  3060. if (print_summary) {
  3061. char *title;
  3062. int rate_idx;
  3063. u32 bitrate;
  3064. if (hundred)
  3065. title = "100Frames";
  3066. else if (fc & IEEE80211_FCTL_RETRY)
  3067. title = "Retry";
  3068. else if (ieee80211_is_assoc_response(fc))
  3069. title = "AscRsp";
  3070. else if (ieee80211_is_reassoc_response(fc))
  3071. title = "RasRsp";
  3072. else if (ieee80211_is_probe_response(fc)) {
  3073. title = "PrbRsp";
  3074. print_dump = 1; /* dump frame contents */
  3075. } else if (ieee80211_is_beacon(fc)) {
  3076. title = "Beacon";
  3077. print_dump = 1; /* dump frame contents */
  3078. } else if (ieee80211_is_atim(fc))
  3079. title = "ATIM";
  3080. else if (ieee80211_is_auth(fc))
  3081. title = "Auth";
  3082. else if (ieee80211_is_deauth(fc))
  3083. title = "DeAuth";
  3084. else if (ieee80211_is_disassoc(fc))
  3085. title = "DisAssoc";
  3086. else
  3087. title = "Frame";
  3088. rate_idx = iwl4965_hwrate_to_plcp_idx(rate_sym);
  3089. if (unlikely(rate_idx == -1))
  3090. bitrate = 0;
  3091. else
  3092. bitrate = iwl4965_rates[rate_idx].ieee / 2;
  3093. /* print frame summary.
  3094. * MAC addresses show just the last byte (for brevity),
  3095. * but you can hack it to show more, if you'd like to. */
  3096. if (dataframe)
  3097. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  3098. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  3099. title, fc, header->addr1[5],
  3100. length, rssi, channel, bitrate);
  3101. else {
  3102. /* src/dst addresses assume managed mode */
  3103. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  3104. "src=0x%02x, rssi=%u, tim=%lu usec, "
  3105. "phy=0x%02x, chnl=%d\n",
  3106. title, fc, header->addr1[5],
  3107. header->addr3[5], rssi,
  3108. tsf_low - priv->scan_start_tsf,
  3109. phy_flags, channel);
  3110. }
  3111. }
  3112. if (print_dump)
  3113. iwl4965_print_hex_dump(IWL_DL_RX, data, length);
  3114. }
  3115. #else
  3116. static inline void iwl4965_dbg_report_frame(struct iwl4965_priv *priv,
  3117. struct iwl4965_rx_packet *pkt,
  3118. struct ieee80211_hdr *header,
  3119. int group100)
  3120. {
  3121. }
  3122. #endif
  3123. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  3124. /* Called for REPLY_4965_RX (legacy ABG frames), or
  3125. * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
  3126. static void iwl4965_rx_reply_rx(struct iwl4965_priv *priv,
  3127. struct iwl4965_rx_mem_buffer *rxb)
  3128. {
  3129. struct ieee80211_hdr *header;
  3130. struct ieee80211_rx_status rx_status;
  3131. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3132. /* Use phy data (Rx signal strength, etc.) contained within
  3133. * this rx packet for legacy frames,
  3134. * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
  3135. int include_phy = (pkt->hdr.cmd == REPLY_4965_RX);
  3136. struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
  3137. (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
  3138. (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
  3139. __le32 *rx_end;
  3140. unsigned int len = 0;
  3141. u16 fc;
  3142. u8 network_packet;
  3143. rx_status.mactime = le64_to_cpu(rx_start->timestamp);
  3144. rx_status.freq = ieee80211chan2mhz(le16_to_cpu(rx_start->channel));
  3145. rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
  3146. IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  3147. rx_status.rate_idx = iwl4965_hwrate_to_plcp_idx(
  3148. le32_to_cpu(rx_start->rate_n_flags));
  3149. if (rx_status.band == IEEE80211_BAND_5GHZ)
  3150. rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
  3151. rx_status.antenna = 0;
  3152. rx_status.flag = 0;
  3153. if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
  3154. IWL_DEBUG_DROP
  3155. ("dsp size out of range [0,20]: "
  3156. "%d/n", rx_start->cfg_phy_cnt);
  3157. return;
  3158. }
  3159. if (!include_phy) {
  3160. if (priv->last_phy_res[0])
  3161. rx_start = (struct iwl4965_rx_phy_res *)
  3162. &priv->last_phy_res[1];
  3163. else
  3164. rx_start = NULL;
  3165. }
  3166. if (!rx_start) {
  3167. IWL_ERROR("MPDU frame without a PHY data\n");
  3168. return;
  3169. }
  3170. if (include_phy) {
  3171. header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
  3172. + rx_start->cfg_phy_cnt);
  3173. len = le16_to_cpu(rx_start->byte_count);
  3174. rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
  3175. sizeof(struct iwl4965_rx_phy_res) + len);
  3176. } else {
  3177. struct iwl4965_rx_mpdu_res_start *amsdu =
  3178. (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
  3179. header = (void *)(pkt->u.raw +
  3180. sizeof(struct iwl4965_rx_mpdu_res_start));
  3181. len = le16_to_cpu(amsdu->byte_count);
  3182. rx_end = (__le32 *) (pkt->u.raw +
  3183. sizeof(struct iwl4965_rx_mpdu_res_start) + len);
  3184. }
  3185. if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
  3186. !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
  3187. IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
  3188. le32_to_cpu(*rx_end));
  3189. return;
  3190. }
  3191. priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
  3192. /* Find max signal strength (dBm) among 3 antenna/receiver chains */
  3193. rx_status.ssi = iwl4965_calc_rssi(rx_start);
  3194. /* Meaningful noise values are available only from beacon statistics,
  3195. * which are gathered only when associated, and indicate noise
  3196. * only for the associated network channel ...
  3197. * Ignore these noise values while scanning (other channels) */
  3198. if (iwl4965_is_associated(priv) &&
  3199. !test_bit(STATUS_SCANNING, &priv->status)) {
  3200. rx_status.noise = priv->last_rx_noise;
  3201. rx_status.signal = iwl4965_calc_sig_qual(rx_status.ssi,
  3202. rx_status.noise);
  3203. } else {
  3204. rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  3205. rx_status.signal = iwl4965_calc_sig_qual(rx_status.ssi, 0);
  3206. }
  3207. /* Reset beacon noise level if not associated. */
  3208. if (!iwl4965_is_associated(priv))
  3209. priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  3210. /* Set "1" to report good data frames in groups of 100 */
  3211. /* FIXME: need to optimze the call: */
  3212. iwl4965_dbg_report_frame(priv, pkt, header, 1);
  3213. IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
  3214. rx_status.ssi, rx_status.noise, rx_status.signal,
  3215. rx_status.mactime);
  3216. network_packet = iwl4965_is_network_packet(priv, header);
  3217. if (network_packet) {
  3218. priv->last_rx_rssi = rx_status.ssi;
  3219. priv->last_beacon_time = priv->ucode_beacon_time;
  3220. priv->last_tsf = le64_to_cpu(rx_start->timestamp);
  3221. }
  3222. fc = le16_to_cpu(header->frame_control);
  3223. switch (fc & IEEE80211_FCTL_FTYPE) {
  3224. case IEEE80211_FTYPE_MGMT:
  3225. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  3226. iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
  3227. header->addr2);
  3228. switch (fc & IEEE80211_FCTL_STYPE) {
  3229. case IEEE80211_STYPE_PROBE_RESP:
  3230. case IEEE80211_STYPE_BEACON:
  3231. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA &&
  3232. !compare_ether_addr(header->addr2, priv->bssid)) ||
  3233. (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
  3234. !compare_ether_addr(header->addr3, priv->bssid))) {
  3235. struct ieee80211_mgmt *mgmt =
  3236. (struct ieee80211_mgmt *)header;
  3237. u64 timestamp =
  3238. le64_to_cpu(mgmt->u.beacon.timestamp);
  3239. priv->timestamp0 = timestamp & 0xFFFFFFFF;
  3240. priv->timestamp1 =
  3241. (timestamp >> 32) & 0xFFFFFFFF;
  3242. priv->beacon_int = le16_to_cpu(
  3243. mgmt->u.beacon.beacon_int);
  3244. if (priv->call_post_assoc_from_beacon &&
  3245. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  3246. priv->call_post_assoc_from_beacon = 0;
  3247. queue_work(priv->workqueue,
  3248. &priv->post_associate.work);
  3249. }
  3250. }
  3251. break;
  3252. case IEEE80211_STYPE_ACTION:
  3253. break;
  3254. /*
  3255. * TODO: Use the new callback function from
  3256. * mac80211 instead of sniffing these packets.
  3257. */
  3258. case IEEE80211_STYPE_ASSOC_RESP:
  3259. case IEEE80211_STYPE_REASSOC_RESP:
  3260. if (network_packet) {
  3261. #ifdef CONFIG_IWL4965_HT
  3262. u8 *pos = NULL;
  3263. struct ieee802_11_elems elems;
  3264. #endif /*CONFIG_IWL4965_HT */
  3265. struct ieee80211_mgmt *mgnt =
  3266. (struct ieee80211_mgmt *)header;
  3267. /* We have just associated, give some
  3268. * time for the 4-way handshake if
  3269. * any. Don't start scan too early. */
  3270. priv->next_scan_jiffies = jiffies +
  3271. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  3272. priv->assoc_id = (~((1 << 15) | (1 << 14))
  3273. & le16_to_cpu(mgnt->u.assoc_resp.aid));
  3274. priv->assoc_capability =
  3275. le16_to_cpu(
  3276. mgnt->u.assoc_resp.capab_info);
  3277. #ifdef CONFIG_IWL4965_HT
  3278. pos = mgnt->u.assoc_resp.variable;
  3279. if (!parse_elems(pos,
  3280. len - (pos - (u8 *) mgnt),
  3281. &elems)) {
  3282. if (elems.ht_extra_param &&
  3283. elems.ht_cap_param)
  3284. break;
  3285. }
  3286. #endif /*CONFIG_IWL4965_HT */
  3287. /* assoc_id is 0 no association */
  3288. if (!priv->assoc_id)
  3289. break;
  3290. if (priv->beacon_int)
  3291. queue_work(priv->workqueue,
  3292. &priv->post_associate.work);
  3293. else
  3294. priv->call_post_assoc_from_beacon = 1;
  3295. }
  3296. break;
  3297. case IEEE80211_STYPE_PROBE_REQ:
  3298. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  3299. !iwl4965_is_associated(priv)) {
  3300. DECLARE_MAC_BUF(mac1);
  3301. DECLARE_MAC_BUF(mac2);
  3302. DECLARE_MAC_BUF(mac3);
  3303. IWL_DEBUG_DROP("Dropping (non network): "
  3304. "%s, %s, %s\n",
  3305. print_mac(mac1, header->addr1),
  3306. print_mac(mac2, header->addr2),
  3307. print_mac(mac3, header->addr3));
  3308. return;
  3309. }
  3310. }
  3311. iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status);
  3312. break;
  3313. case IEEE80211_FTYPE_CTL:
  3314. #ifdef CONFIG_IWL4965_HT
  3315. switch (fc & IEEE80211_FCTL_STYPE) {
  3316. case IEEE80211_STYPE_BACK_REQ:
  3317. IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
  3318. iwl4965_handle_data_packet(priv, 0, include_phy,
  3319. rxb, &rx_status);
  3320. break;
  3321. default:
  3322. break;
  3323. }
  3324. #endif
  3325. break;
  3326. case IEEE80211_FTYPE_DATA: {
  3327. DECLARE_MAC_BUF(mac1);
  3328. DECLARE_MAC_BUF(mac2);
  3329. DECLARE_MAC_BUF(mac3);
  3330. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  3331. iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
  3332. header->addr2);
  3333. if (unlikely(!network_packet))
  3334. IWL_DEBUG_DROP("Dropping (non network): "
  3335. "%s, %s, %s\n",
  3336. print_mac(mac1, header->addr1),
  3337. print_mac(mac2, header->addr2),
  3338. print_mac(mac3, header->addr3));
  3339. else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
  3340. IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
  3341. print_mac(mac1, header->addr1),
  3342. print_mac(mac2, header->addr2),
  3343. print_mac(mac3, header->addr3));
  3344. else
  3345. iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
  3346. &rx_status);
  3347. break;
  3348. }
  3349. default:
  3350. break;
  3351. }
  3352. }
  3353. /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
  3354. * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
  3355. static void iwl4965_rx_reply_rx_phy(struct iwl4965_priv *priv,
  3356. struct iwl4965_rx_mem_buffer *rxb)
  3357. {
  3358. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3359. priv->last_phy_res[0] = 1;
  3360. memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
  3361. sizeof(struct iwl4965_rx_phy_res));
  3362. }
  3363. static void iwl4965_rx_missed_beacon_notif(struct iwl4965_priv *priv,
  3364. struct iwl4965_rx_mem_buffer *rxb)
  3365. {
  3366. #ifdef CONFIG_IWL4965_SENSITIVITY
  3367. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3368. struct iwl4965_missed_beacon_notif *missed_beacon;
  3369. missed_beacon = &pkt->u.missed_beacon;
  3370. if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
  3371. IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
  3372. le32_to_cpu(missed_beacon->consequtive_missed_beacons),
  3373. le32_to_cpu(missed_beacon->total_missed_becons),
  3374. le32_to_cpu(missed_beacon->num_recvd_beacons),
  3375. le32_to_cpu(missed_beacon->num_expected_beacons));
  3376. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  3377. if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)))
  3378. queue_work(priv->workqueue, &priv->sensitivity_work);
  3379. }
  3380. #endif /*CONFIG_IWL4965_SENSITIVITY*/
  3381. }
  3382. #ifdef CONFIG_IWL4965_HT
  3383. /**
  3384. * iwl4965_sta_modify_enable_tid_tx - Enable Tx for this TID in station table
  3385. */
  3386. static void iwl4965_sta_modify_enable_tid_tx(struct iwl4965_priv *priv,
  3387. int sta_id, int tid)
  3388. {
  3389. unsigned long flags;
  3390. /* Remove "disable" flag, to enable Tx for this TID */
  3391. spin_lock_irqsave(&priv->sta_lock, flags);
  3392. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
  3393. priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
  3394. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  3395. spin_unlock_irqrestore(&priv->sta_lock, flags);
  3396. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  3397. }
  3398. /**
  3399. * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
  3400. *
  3401. * Go through block-ack's bitmap of ACK'd frames, update driver's record of
  3402. * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
  3403. */
  3404. static int iwl4965_tx_status_reply_compressed_ba(struct iwl4965_priv *priv,
  3405. struct iwl4965_ht_agg *agg,
  3406. struct iwl4965_compressed_ba_resp*
  3407. ba_resp)
  3408. {
  3409. int i, sh, ack;
  3410. u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
  3411. u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
  3412. u64 bitmap;
  3413. int successes = 0;
  3414. struct ieee80211_tx_status *tx_status;
  3415. if (unlikely(!agg->wait_for_ba)) {
  3416. IWL_ERROR("Received BA when not expected\n");
  3417. return -EINVAL;
  3418. }
  3419. /* Mark that the expected block-ack response arrived */
  3420. agg->wait_for_ba = 0;
  3421. IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
  3422. /* Calculate shift to align block-ack bits with our Tx window bits */
  3423. sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
  3424. if (sh < 0) /* tbw something is wrong with indices */
  3425. sh += 0x100;
  3426. /* don't use 64-bit values for now */
  3427. bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
  3428. if (agg->frame_count > (64 - sh)) {
  3429. IWL_DEBUG_TX_REPLY("more frames than bitmap size");
  3430. return -1;
  3431. }
  3432. /* check for success or failure according to the
  3433. * transmitted bitmap and block-ack bitmap */
  3434. bitmap &= agg->bitmap;
  3435. /* For each frame attempted in aggregation,
  3436. * update driver's record of tx frame's status. */
  3437. for (i = 0; i < agg->frame_count ; i++) {
  3438. ack = bitmap & (1 << i);
  3439. successes += !!ack;
  3440. IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
  3441. ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
  3442. agg->start_idx + i);
  3443. }
  3444. tx_status = &priv->txq[scd_flow].txb[agg->start_idx].status;
  3445. tx_status->flags = IEEE80211_TX_STATUS_ACK;
  3446. tx_status->flags |= IEEE80211_TX_STATUS_AMPDU;
  3447. tx_status->ampdu_ack_map = successes;
  3448. tx_status->ampdu_ack_len = agg->frame_count;
  3449. /* FIXME Wrong rate
  3450. tx_status->control.tx_rate = agg->rate_n_flags;
  3451. */
  3452. IWL_DEBUG_TX_REPLY("Bitmap %llx\n", bitmap);
  3453. return 0;
  3454. }
  3455. /**
  3456. * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
  3457. */
  3458. static void iwl4965_tx_queue_stop_scheduler(struct iwl4965_priv *priv,
  3459. u16 txq_id)
  3460. {
  3461. /* Simply stop the queue, but don't change any configuration;
  3462. * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
  3463. iwl4965_write_prph(priv,
  3464. KDR_SCD_QUEUE_STATUS_BITS(txq_id),
  3465. (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)|
  3466. (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
  3467. }
  3468. /**
  3469. * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
  3470. */
  3471. static int iwl4965_tx_queue_agg_disable(struct iwl4965_priv *priv, u16 txq_id,
  3472. u16 ssn_idx, u8 tx_fifo)
  3473. {
  3474. if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
  3475. IWL_WARNING("queue number too small: %d, must be > %d\n",
  3476. txq_id, IWL_BACK_QUEUE_FIRST_ID);
  3477. return -EINVAL;
  3478. }
  3479. iwl4965_tx_queue_stop_scheduler(priv, txq_id);
  3480. iwl4965_clear_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
  3481. priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
  3482. priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
  3483. /* supposes that ssn_idx is valid (!= 0xFFF) */
  3484. iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
  3485. iwl4965_clear_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
  3486. iwl4965_txq_ctx_deactivate(priv, txq_id);
  3487. iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
  3488. return 0;
  3489. }
  3490. int iwl4965_check_empty_hw_queue(struct iwl4965_priv *priv, int sta_id,
  3491. u8 tid, int txq_id)
  3492. {
  3493. struct iwl4965_queue *q = &priv->txq[txq_id].q;
  3494. u8 *addr = priv->stations[sta_id].sta.sta.addr;
  3495. struct iwl4965_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
  3496. switch (priv->stations[sta_id].tid[tid].agg.state) {
  3497. case IWL_EMPTYING_HW_QUEUE_DELBA:
  3498. /* We are reclaiming the last packet of the */
  3499. /* aggregated HW queue */
  3500. if (txq_id == tid_data->agg.txq_id &&
  3501. q->read_ptr == q->write_ptr) {
  3502. u16 ssn = SEQ_TO_SN(tid_data->seq_number);
  3503. int tx_fifo = default_tid_to_tx_fifo[tid];
  3504. IWL_DEBUG_HT("HW queue empty: continue DELBA flow\n");
  3505. iwl4965_tx_queue_agg_disable(priv, txq_id,
  3506. ssn, tx_fifo);
  3507. tid_data->agg.state = IWL_AGG_OFF;
  3508. ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid);
  3509. }
  3510. break;
  3511. case IWL_EMPTYING_HW_QUEUE_ADDBA:
  3512. /* We are reclaiming the last packet of the queue */
  3513. if (tid_data->tfds_in_queue == 0) {
  3514. IWL_DEBUG_HT("HW queue empty: continue ADDBA flow\n");
  3515. tid_data->agg.state = IWL_AGG_ON;
  3516. ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid);
  3517. }
  3518. break;
  3519. }
  3520. return 0;
  3521. }
  3522. /**
  3523. * iwl4965_queue_dec_wrap - Decrement queue index, wrap back to end if needed
  3524. * @index -- current index
  3525. * @n_bd -- total number of entries in queue (s/b power of 2)
  3526. */
  3527. static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
  3528. {
  3529. return (index == 0) ? n_bd - 1 : index - 1;
  3530. }
  3531. /**
  3532. * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
  3533. *
  3534. * Handles block-acknowledge notification from device, which reports success
  3535. * of frames sent via aggregation.
  3536. */
  3537. static void iwl4965_rx_reply_compressed_ba(struct iwl4965_priv *priv,
  3538. struct iwl4965_rx_mem_buffer *rxb)
  3539. {
  3540. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3541. struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
  3542. int index;
  3543. struct iwl4965_tx_queue *txq = NULL;
  3544. struct iwl4965_ht_agg *agg;
  3545. DECLARE_MAC_BUF(mac);
  3546. /* "flow" corresponds to Tx queue */
  3547. u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
  3548. /* "ssn" is start of block-ack Tx window, corresponds to index
  3549. * (in Tx queue's circular buffer) of first TFD/frame in window */
  3550. u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
  3551. if (scd_flow >= ARRAY_SIZE(priv->txq)) {
  3552. IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
  3553. return;
  3554. }
  3555. txq = &priv->txq[scd_flow];
  3556. agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
  3557. /* Find index just before block-ack window */
  3558. index = iwl4965_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
  3559. /* TODO: Need to get this copy more safely - now good for debug */
  3560. IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
  3561. "sta_id = %d\n",
  3562. agg->wait_for_ba,
  3563. print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
  3564. ba_resp->sta_id);
  3565. IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
  3566. "%d, scd_ssn = %d\n",
  3567. ba_resp->tid,
  3568. ba_resp->seq_ctl,
  3569. ba_resp->bitmap,
  3570. ba_resp->scd_flow,
  3571. ba_resp->scd_ssn);
  3572. IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
  3573. agg->start_idx,
  3574. agg->bitmap);
  3575. /* Update driver's record of ACK vs. not for each frame in window */
  3576. iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
  3577. /* Release all TFDs before the SSN, i.e. all TFDs in front of
  3578. * block-ack window (we assume that they've been successfully
  3579. * transmitted ... if not, it's too late anyway). */
  3580. if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
  3581. int freed = iwl4965_tx_queue_reclaim(priv, scd_flow, index);
  3582. priv->stations[ba_resp->sta_id].
  3583. tid[ba_resp->tid].tfds_in_queue -= freed;
  3584. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  3585. priv->mac80211_registered &&
  3586. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  3587. ieee80211_wake_queue(priv->hw, scd_flow);
  3588. iwl4965_check_empty_hw_queue(priv, ba_resp->sta_id,
  3589. ba_resp->tid, scd_flow);
  3590. }
  3591. }
  3592. /**
  3593. * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
  3594. */
  3595. static int iwl4965_tx_queue_set_q2ratid(struct iwl4965_priv *priv, u16 ra_tid,
  3596. u16 txq_id)
  3597. {
  3598. u32 tbl_dw_addr;
  3599. u32 tbl_dw;
  3600. u16 scd_q2ratid;
  3601. scd_q2ratid = ra_tid & SCD_QUEUE_RA_TID_MAP_RATID_MSK;
  3602. tbl_dw_addr = priv->scd_base_addr +
  3603. SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
  3604. tbl_dw = iwl4965_read_targ_mem(priv, tbl_dw_addr);
  3605. if (txq_id & 0x1)
  3606. tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
  3607. else
  3608. tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
  3609. iwl4965_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
  3610. return 0;
  3611. }
  3612. /**
  3613. * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
  3614. *
  3615. * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID,
  3616. * i.e. it must be one of the higher queues used for aggregation
  3617. */
  3618. static int iwl4965_tx_queue_agg_enable(struct iwl4965_priv *priv, int txq_id,
  3619. int tx_fifo, int sta_id, int tid,
  3620. u16 ssn_idx)
  3621. {
  3622. unsigned long flags;
  3623. int rc;
  3624. u16 ra_tid;
  3625. if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
  3626. IWL_WARNING("queue number too small: %d, must be > %d\n",
  3627. txq_id, IWL_BACK_QUEUE_FIRST_ID);
  3628. ra_tid = BUILD_RAxTID(sta_id, tid);
  3629. /* Modify device's station table to Tx this TID */
  3630. iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
  3631. spin_lock_irqsave(&priv->lock, flags);
  3632. rc = iwl4965_grab_nic_access(priv);
  3633. if (rc) {
  3634. spin_unlock_irqrestore(&priv->lock, flags);
  3635. return rc;
  3636. }
  3637. /* Stop this Tx queue before configuring it */
  3638. iwl4965_tx_queue_stop_scheduler(priv, txq_id);
  3639. /* Map receiver-address / traffic-ID to this queue */
  3640. iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
  3641. /* Set this queue as a chain-building queue */
  3642. iwl4965_set_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
  3643. /* Place first TFD at index corresponding to start sequence number.
  3644. * Assumes that ssn_idx is valid (!= 0xFFF) */
  3645. priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
  3646. priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
  3647. iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
  3648. /* Set up Tx window size and frame limit for this queue */
  3649. iwl4965_write_targ_mem(priv,
  3650. priv->scd_base_addr + SCD_CONTEXT_QUEUE_OFFSET(txq_id),
  3651. (SCD_WIN_SIZE << SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
  3652. SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
  3653. iwl4965_write_targ_mem(priv, priv->scd_base_addr +
  3654. SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
  3655. (SCD_FRAME_LIMIT << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
  3656. & SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
  3657. iwl4965_set_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
  3658. /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
  3659. iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
  3660. iwl4965_release_nic_access(priv);
  3661. spin_unlock_irqrestore(&priv->lock, flags);
  3662. return 0;
  3663. }
  3664. #endif /* CONFIG_IWL4965_HT */
  3665. /**
  3666. * iwl4965_add_station - Initialize a station's hardware rate table
  3667. *
  3668. * The uCode's station table contains a table of fallback rates
  3669. * for automatic fallback during transmission.
  3670. *
  3671. * NOTE: This sets up a default set of values. These will be replaced later
  3672. * if the driver's iwl-4965-rs rate scaling algorithm is used, instead of
  3673. * rc80211_simple.
  3674. *
  3675. * NOTE: Run REPLY_ADD_STA command to set up station table entry, before
  3676. * calling this function (which runs REPLY_TX_LINK_QUALITY_CMD,
  3677. * which requires station table entry to exist).
  3678. */
  3679. void iwl4965_add_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  3680. {
  3681. int i, r;
  3682. struct iwl4965_link_quality_cmd link_cmd = {
  3683. .reserved1 = 0,
  3684. };
  3685. u16 rate_flags;
  3686. /* Set up the rate scaling to start at selected rate, fall back
  3687. * all the way down to 1M in IEEE order, and then spin on 1M */
  3688. if (is_ap)
  3689. r = IWL_RATE_54M_INDEX;
  3690. else if (priv->band == IEEE80211_BAND_5GHZ)
  3691. r = IWL_RATE_6M_INDEX;
  3692. else
  3693. r = IWL_RATE_1M_INDEX;
  3694. for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
  3695. rate_flags = 0;
  3696. if (r >= IWL_FIRST_CCK_RATE && r <= IWL_LAST_CCK_RATE)
  3697. rate_flags |= RATE_MCS_CCK_MSK;
  3698. /* Use Tx antenna B only */
  3699. rate_flags |= RATE_MCS_ANT_B_MSK;
  3700. rate_flags &= ~RATE_MCS_ANT_A_MSK;
  3701. link_cmd.rs_table[i].rate_n_flags =
  3702. iwl4965_hw_set_rate_n_flags(iwl4965_rates[r].plcp, rate_flags);
  3703. r = iwl4965_get_prev_ieee_rate(r);
  3704. }
  3705. link_cmd.general_params.single_stream_ant_msk = 2;
  3706. link_cmd.general_params.dual_stream_ant_msk = 3;
  3707. link_cmd.agg_params.agg_dis_start_th = 3;
  3708. link_cmd.agg_params.agg_time_limit = cpu_to_le16(4000);
  3709. /* Update the rate scaling for control frame Tx to AP */
  3710. link_cmd.sta_id = is_ap ? IWL_AP_ID : IWL4965_BROADCAST_ID;
  3711. iwl4965_send_cmd_pdu(priv, REPLY_TX_LINK_QUALITY_CMD, sizeof(link_cmd),
  3712. &link_cmd);
  3713. }
  3714. #ifdef CONFIG_IWL4965_HT
  3715. static u8 iwl4965_is_channel_extension(struct iwl4965_priv *priv,
  3716. enum ieee80211_band band,
  3717. u16 channel, u8 extension_chan_offset)
  3718. {
  3719. const struct iwl4965_channel_info *ch_info;
  3720. ch_info = iwl4965_get_channel_info(priv, band, channel);
  3721. if (!is_channel_valid(ch_info))
  3722. return 0;
  3723. if (extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_AUTO)
  3724. return 0;
  3725. if ((ch_info->fat_extension_channel == extension_chan_offset) ||
  3726. (ch_info->fat_extension_channel == HT_IE_EXT_CHANNEL_MAX))
  3727. return 1;
  3728. return 0;
  3729. }
  3730. static u8 iwl4965_is_fat_tx_allowed(struct iwl4965_priv *priv,
  3731. struct ieee80211_ht_info *sta_ht_inf)
  3732. {
  3733. struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
  3734. if ((!iwl_ht_conf->is_ht) ||
  3735. (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ) ||
  3736. (iwl_ht_conf->extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_AUTO))
  3737. return 0;
  3738. if (sta_ht_inf) {
  3739. if ((!sta_ht_inf->ht_supported) ||
  3740. (!(sta_ht_inf->cap & IEEE80211_HT_CAP_SUP_WIDTH)))
  3741. return 0;
  3742. }
  3743. return (iwl4965_is_channel_extension(priv, priv->band,
  3744. iwl_ht_conf->control_channel,
  3745. iwl_ht_conf->extension_chan_offset));
  3746. }
  3747. void iwl4965_set_rxon_ht(struct iwl4965_priv *priv, struct iwl_ht_info *ht_info)
  3748. {
  3749. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  3750. u32 val;
  3751. if (!ht_info->is_ht)
  3752. return;
  3753. /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */
  3754. if (iwl4965_is_fat_tx_allowed(priv, NULL))
  3755. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK;
  3756. else
  3757. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  3758. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  3759. if (le16_to_cpu(rxon->channel) != ht_info->control_channel) {
  3760. IWL_DEBUG_ASSOC("control diff than current %d %d\n",
  3761. le16_to_cpu(rxon->channel),
  3762. ht_info->control_channel);
  3763. rxon->channel = cpu_to_le16(ht_info->control_channel);
  3764. return;
  3765. }
  3766. /* Note: control channel is opposite of extension channel */
  3767. switch (ht_info->extension_chan_offset) {
  3768. case IWL_EXT_CHANNEL_OFFSET_ABOVE:
  3769. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  3770. break;
  3771. case IWL_EXT_CHANNEL_OFFSET_BELOW:
  3772. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3773. break;
  3774. case IWL_EXT_CHANNEL_OFFSET_AUTO:
  3775. rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
  3776. break;
  3777. default:
  3778. rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
  3779. break;
  3780. }
  3781. val = ht_info->ht_protection;
  3782. rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS);
  3783. iwl4965_set_rxon_chain(priv);
  3784. IWL_DEBUG_ASSOC("supported HT rate 0x%X %X "
  3785. "rxon flags 0x%X operation mode :0x%X "
  3786. "extension channel offset 0x%x "
  3787. "control chan %d\n",
  3788. ht_info->supp_mcs_set[0], ht_info->supp_mcs_set[1],
  3789. le32_to_cpu(rxon->flags), ht_info->ht_protection,
  3790. ht_info->extension_chan_offset,
  3791. ht_info->control_channel);
  3792. return;
  3793. }
  3794. void iwl4965_set_ht_add_station(struct iwl4965_priv *priv, u8 index,
  3795. struct ieee80211_ht_info *sta_ht_inf)
  3796. {
  3797. __le32 sta_flags;
  3798. u8 mimo_ps_mode;
  3799. if (!sta_ht_inf || !sta_ht_inf->ht_supported)
  3800. goto done;
  3801. mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2;
  3802. sta_flags = priv->stations[index].sta.station_flags;
  3803. sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
  3804. switch (mimo_ps_mode) {
  3805. case WLAN_HT_CAP_MIMO_PS_STATIC:
  3806. sta_flags |= STA_FLG_MIMO_DIS_MSK;
  3807. break;
  3808. case WLAN_HT_CAP_MIMO_PS_DYNAMIC:
  3809. sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
  3810. break;
  3811. case WLAN_HT_CAP_MIMO_PS_DISABLED:
  3812. break;
  3813. default:
  3814. IWL_WARNING("Invalid MIMO PS mode %d", mimo_ps_mode);
  3815. break;
  3816. }
  3817. sta_flags |= cpu_to_le32(
  3818. (u32)sta_ht_inf->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
  3819. sta_flags |= cpu_to_le32(
  3820. (u32)sta_ht_inf->ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
  3821. if (iwl4965_is_fat_tx_allowed(priv, sta_ht_inf))
  3822. sta_flags |= STA_FLG_FAT_EN_MSK;
  3823. else
  3824. sta_flags &= ~STA_FLG_FAT_EN_MSK;
  3825. priv->stations[index].sta.station_flags = sta_flags;
  3826. done:
  3827. return;
  3828. }
  3829. static void iwl4965_sta_modify_add_ba_tid(struct iwl4965_priv *priv,
  3830. int sta_id, int tid, u16 ssn)
  3831. {
  3832. unsigned long flags;
  3833. spin_lock_irqsave(&priv->sta_lock, flags);
  3834. priv->stations[sta_id].sta.station_flags_msk = 0;
  3835. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
  3836. priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
  3837. priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
  3838. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  3839. spin_unlock_irqrestore(&priv->sta_lock, flags);
  3840. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  3841. }
  3842. static void iwl4965_sta_modify_del_ba_tid(struct iwl4965_priv *priv,
  3843. int sta_id, int tid)
  3844. {
  3845. unsigned long flags;
  3846. spin_lock_irqsave(&priv->sta_lock, flags);
  3847. priv->stations[sta_id].sta.station_flags_msk = 0;
  3848. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
  3849. priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
  3850. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  3851. spin_unlock_irqrestore(&priv->sta_lock, flags);
  3852. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  3853. }
  3854. /*
  3855. * Find first available (lowest unused) Tx Queue, mark it "active".
  3856. * Called only when finding queue for aggregation.
  3857. * Should never return anything < 7, because they should already
  3858. * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6).
  3859. */
  3860. static int iwl4965_txq_ctx_activate_free(struct iwl4965_priv *priv)
  3861. {
  3862. int txq_id;
  3863. for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
  3864. if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
  3865. return txq_id;
  3866. return -1;
  3867. }
  3868. static int iwl4965_mac_ht_tx_agg_start(struct ieee80211_hw *hw, const u8 *da,
  3869. u16 tid, u16 *start_seq_num)
  3870. {
  3871. struct iwl4965_priv *priv = hw->priv;
  3872. int sta_id;
  3873. int tx_fifo;
  3874. int txq_id;
  3875. int ssn = -1;
  3876. int rc = 0;
  3877. unsigned long flags;
  3878. struct iwl4965_tid_data *tid_data;
  3879. DECLARE_MAC_BUF(mac);
  3880. if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
  3881. tx_fifo = default_tid_to_tx_fifo[tid];
  3882. else
  3883. return -EINVAL;
  3884. IWL_WARNING("%s on da = %s tid = %d\n",
  3885. __func__, print_mac(mac, da), tid);
  3886. sta_id = iwl4965_hw_find_station(priv, da);
  3887. if (sta_id == IWL_INVALID_STATION)
  3888. return -ENXIO;
  3889. if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
  3890. IWL_ERROR("Start AGG when state is not IWL_AGG_OFF !\n");
  3891. return -ENXIO;
  3892. }
  3893. txq_id = iwl4965_txq_ctx_activate_free(priv);
  3894. if (txq_id == -1)
  3895. return -ENXIO;
  3896. spin_lock_irqsave(&priv->sta_lock, flags);
  3897. tid_data = &priv->stations[sta_id].tid[tid];
  3898. ssn = SEQ_TO_SN(tid_data->seq_number);
  3899. tid_data->agg.txq_id = txq_id;
  3900. spin_unlock_irqrestore(&priv->sta_lock, flags);
  3901. *start_seq_num = ssn;
  3902. rc = iwl4965_tx_queue_agg_enable(priv, txq_id, tx_fifo,
  3903. sta_id, tid, ssn);
  3904. if (rc)
  3905. return rc;
  3906. rc = 0;
  3907. if (tid_data->tfds_in_queue == 0) {
  3908. printk(KERN_ERR "HW queue is empty\n");
  3909. tid_data->agg.state = IWL_AGG_ON;
  3910. ieee80211_start_tx_ba_cb_irqsafe(hw, da, tid);
  3911. } else {
  3912. IWL_DEBUG_HT("HW queue is NOT empty: %d packets in HW queue\n",
  3913. tid_data->tfds_in_queue);
  3914. tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
  3915. }
  3916. return rc;
  3917. }
  3918. static int iwl4965_mac_ht_tx_agg_stop(struct ieee80211_hw *hw, const u8 *da,
  3919. u16 tid)
  3920. {
  3921. struct iwl4965_priv *priv = hw->priv;
  3922. int tx_fifo_id, txq_id, sta_id, ssn = -1;
  3923. struct iwl4965_tid_data *tid_data;
  3924. int rc, write_ptr, read_ptr;
  3925. unsigned long flags;
  3926. DECLARE_MAC_BUF(mac);
  3927. if (!da) {
  3928. IWL_ERROR("da = NULL\n");
  3929. return -EINVAL;
  3930. }
  3931. if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
  3932. tx_fifo_id = default_tid_to_tx_fifo[tid];
  3933. else
  3934. return -EINVAL;
  3935. sta_id = iwl4965_hw_find_station(priv, da);
  3936. if (sta_id == IWL_INVALID_STATION)
  3937. return -ENXIO;
  3938. if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON)
  3939. IWL_WARNING("Stopping AGG while state not IWL_AGG_ON\n");
  3940. tid_data = &priv->stations[sta_id].tid[tid];
  3941. ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
  3942. txq_id = tid_data->agg.txq_id;
  3943. write_ptr = priv->txq[txq_id].q.write_ptr;
  3944. read_ptr = priv->txq[txq_id].q.read_ptr;
  3945. /* The queue is not empty */
  3946. if (write_ptr != read_ptr) {
  3947. IWL_DEBUG_HT("Stopping a non empty AGG HW QUEUE\n");
  3948. priv->stations[sta_id].tid[tid].agg.state =
  3949. IWL_EMPTYING_HW_QUEUE_DELBA;
  3950. return 0;
  3951. }
  3952. IWL_DEBUG_HT("HW queue empty\n");;
  3953. priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
  3954. spin_lock_irqsave(&priv->lock, flags);
  3955. rc = iwl4965_grab_nic_access(priv);
  3956. if (rc) {
  3957. spin_unlock_irqrestore(&priv->lock, flags);
  3958. return rc;
  3959. }
  3960. rc = iwl4965_tx_queue_agg_disable(priv, txq_id, ssn, tx_fifo_id);
  3961. iwl4965_release_nic_access(priv);
  3962. spin_unlock_irqrestore(&priv->lock, flags);
  3963. if (rc)
  3964. return rc;
  3965. ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, da, tid);
  3966. IWL_DEBUG_INFO("iwl4965_mac_ht_tx_agg_stop on da=%s tid=%d\n",
  3967. print_mac(mac, da), tid);
  3968. return 0;
  3969. }
  3970. int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
  3971. enum ieee80211_ampdu_mlme_action action,
  3972. const u8 *addr, u16 tid, u16 *ssn)
  3973. {
  3974. struct iwl4965_priv *priv = hw->priv;
  3975. int sta_id;
  3976. DECLARE_MAC_BUF(mac);
  3977. IWL_DEBUG_HT("A-MPDU action on da=%s tid=%d ",
  3978. print_mac(mac, addr), tid);
  3979. sta_id = iwl4965_hw_find_station(priv, addr);
  3980. switch (action) {
  3981. case IEEE80211_AMPDU_RX_START:
  3982. IWL_DEBUG_HT("start Rx\n");
  3983. iwl4965_sta_modify_add_ba_tid(priv, sta_id, tid, *ssn);
  3984. break;
  3985. case IEEE80211_AMPDU_RX_STOP:
  3986. IWL_DEBUG_HT("stop Rx\n");
  3987. iwl4965_sta_modify_del_ba_tid(priv, sta_id, tid);
  3988. break;
  3989. case IEEE80211_AMPDU_TX_START:
  3990. IWL_DEBUG_HT("start Tx\n");
  3991. return iwl4965_mac_ht_tx_agg_start(hw, addr, tid, ssn);
  3992. case IEEE80211_AMPDU_TX_STOP:
  3993. IWL_DEBUG_HT("stop Tx\n");
  3994. return iwl4965_mac_ht_tx_agg_stop(hw, addr, tid);
  3995. default:
  3996. IWL_DEBUG_HT("unknown\n");
  3997. return -EINVAL;
  3998. break;
  3999. }
  4000. return 0;
  4001. }
  4002. #endif /* CONFIG_IWL4965_HT */
  4003. /* Set up 4965-specific Rx frame reply handlers */
  4004. void iwl4965_hw_rx_handler_setup(struct iwl4965_priv *priv)
  4005. {
  4006. /* Legacy Rx frames */
  4007. priv->rx_handlers[REPLY_4965_RX] = iwl4965_rx_reply_rx;
  4008. /* High-throughput (HT) Rx frames */
  4009. priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
  4010. priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
  4011. priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
  4012. iwl4965_rx_missed_beacon_notif;
  4013. #ifdef CONFIG_IWL4965_HT
  4014. priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
  4015. #endif /* CONFIG_IWL4965_HT */
  4016. }
  4017. void iwl4965_hw_setup_deferred_work(struct iwl4965_priv *priv)
  4018. {
  4019. INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
  4020. INIT_WORK(&priv->statistics_work, iwl4965_bg_statistics_work);
  4021. #ifdef CONFIG_IWL4965_SENSITIVITY
  4022. INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work);
  4023. #endif
  4024. init_timer(&priv->statistics_periodic);
  4025. priv->statistics_periodic.data = (unsigned long)priv;
  4026. priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
  4027. }
  4028. void iwl4965_hw_cancel_deferred_work(struct iwl4965_priv *priv)
  4029. {
  4030. del_timer_sync(&priv->statistics_periodic);
  4031. cancel_delayed_work(&priv->init_alive_start);
  4032. }
  4033. struct pci_device_id iwl4965_hw_card_ids[] = {
  4034. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4229)},
  4035. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4230)},
  4036. {0}
  4037. };
  4038. /*
  4039. * The device's EEPROM semaphore prevents conflicts between driver and uCode
  4040. * when accessing the EEPROM; each access is a series of pulses to/from the
  4041. * EEPROM chip, not a single event, so even reads could conflict if they
  4042. * weren't arbitrated by the semaphore.
  4043. */
  4044. int iwl4965_eeprom_acquire_semaphore(struct iwl4965_priv *priv)
  4045. {
  4046. u16 count;
  4047. int rc;
  4048. for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
  4049. /* Request semaphore */
  4050. iwl4965_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  4051. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
  4052. /* See if we got it */
  4053. rc = iwl4965_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
  4054. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
  4055. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
  4056. EEPROM_SEM_TIMEOUT);
  4057. if (rc >= 0) {
  4058. IWL_DEBUG_IO("Acquired semaphore after %d tries.\n",
  4059. count+1);
  4060. return rc;
  4061. }
  4062. }
  4063. return rc;
  4064. }
  4065. MODULE_DEVICE_TABLE(pci, iwl4965_hw_card_ids);