ispccdc.c 63 KB

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  1. /*
  2. * ispccdc.c
  3. *
  4. * TI OMAP3 ISP - CCDC module
  5. *
  6. * Copyright (C) 2009-2010 Nokia Corporation
  7. * Copyright (C) 2009 Texas Instruments, Inc.
  8. *
  9. * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10. * Sakari Ailus <sakari.ailus@iki.fi>
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  24. * 02110-1301 USA
  25. */
  26. #include <linux/module.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/delay.h>
  29. #include <linux/device.h>
  30. #include <linux/dma-mapping.h>
  31. #include <linux/mm.h>
  32. #include <linux/sched.h>
  33. #include <media/v4l2-event.h>
  34. #include "isp.h"
  35. #include "ispreg.h"
  36. #include "ispccdc.h"
  37. static struct v4l2_mbus_framefmt *
  38. __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  39. unsigned int pad, enum v4l2_subdev_format_whence which);
  40. static const unsigned int ccdc_fmts[] = {
  41. V4L2_MBUS_FMT_Y8_1X8,
  42. V4L2_MBUS_FMT_Y10_1X10,
  43. V4L2_MBUS_FMT_Y12_1X12,
  44. V4L2_MBUS_FMT_SGRBG8_1X8,
  45. V4L2_MBUS_FMT_SRGGB8_1X8,
  46. V4L2_MBUS_FMT_SBGGR8_1X8,
  47. V4L2_MBUS_FMT_SGBRG8_1X8,
  48. V4L2_MBUS_FMT_SGRBG10_1X10,
  49. V4L2_MBUS_FMT_SRGGB10_1X10,
  50. V4L2_MBUS_FMT_SBGGR10_1X10,
  51. V4L2_MBUS_FMT_SGBRG10_1X10,
  52. V4L2_MBUS_FMT_SGRBG12_1X12,
  53. V4L2_MBUS_FMT_SRGGB12_1X12,
  54. V4L2_MBUS_FMT_SBGGR12_1X12,
  55. V4L2_MBUS_FMT_SGBRG12_1X12,
  56. };
  57. /*
  58. * ccdc_print_status - Print current CCDC Module register values.
  59. * @ccdc: Pointer to ISP CCDC device.
  60. *
  61. * Also prints other debug information stored in the CCDC module.
  62. */
  63. #define CCDC_PRINT_REGISTER(isp, name)\
  64. dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
  65. isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
  66. static void ccdc_print_status(struct isp_ccdc_device *ccdc)
  67. {
  68. struct isp_device *isp = to_isp_device(ccdc);
  69. dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
  70. CCDC_PRINT_REGISTER(isp, PCR);
  71. CCDC_PRINT_REGISTER(isp, SYN_MODE);
  72. CCDC_PRINT_REGISTER(isp, HD_VD_WID);
  73. CCDC_PRINT_REGISTER(isp, PIX_LINES);
  74. CCDC_PRINT_REGISTER(isp, HORZ_INFO);
  75. CCDC_PRINT_REGISTER(isp, VERT_START);
  76. CCDC_PRINT_REGISTER(isp, VERT_LINES);
  77. CCDC_PRINT_REGISTER(isp, CULLING);
  78. CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
  79. CCDC_PRINT_REGISTER(isp, SDOFST);
  80. CCDC_PRINT_REGISTER(isp, SDR_ADDR);
  81. CCDC_PRINT_REGISTER(isp, CLAMP);
  82. CCDC_PRINT_REGISTER(isp, DCSUB);
  83. CCDC_PRINT_REGISTER(isp, COLPTN);
  84. CCDC_PRINT_REGISTER(isp, BLKCMP);
  85. CCDC_PRINT_REGISTER(isp, FPC);
  86. CCDC_PRINT_REGISTER(isp, FPC_ADDR);
  87. CCDC_PRINT_REGISTER(isp, VDINT);
  88. CCDC_PRINT_REGISTER(isp, ALAW);
  89. CCDC_PRINT_REGISTER(isp, REC656IF);
  90. CCDC_PRINT_REGISTER(isp, CFG);
  91. CCDC_PRINT_REGISTER(isp, FMTCFG);
  92. CCDC_PRINT_REGISTER(isp, FMT_HORZ);
  93. CCDC_PRINT_REGISTER(isp, FMT_VERT);
  94. CCDC_PRINT_REGISTER(isp, PRGEVEN0);
  95. CCDC_PRINT_REGISTER(isp, PRGEVEN1);
  96. CCDC_PRINT_REGISTER(isp, PRGODD0);
  97. CCDC_PRINT_REGISTER(isp, PRGODD1);
  98. CCDC_PRINT_REGISTER(isp, VP_OUT);
  99. CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
  100. CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
  101. CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
  102. CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
  103. dev_dbg(isp->dev, "--------------------------------------------\n");
  104. }
  105. /*
  106. * omap3isp_ccdc_busy - Get busy state of the CCDC.
  107. * @ccdc: Pointer to ISP CCDC device.
  108. */
  109. int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
  110. {
  111. struct isp_device *isp = to_isp_device(ccdc);
  112. return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
  113. ISPCCDC_PCR_BUSY;
  114. }
  115. /* -----------------------------------------------------------------------------
  116. * Lens Shading Compensation
  117. */
  118. /*
  119. * ccdc_lsc_validate_config - Check that LSC configuration is valid.
  120. * @ccdc: Pointer to ISP CCDC device.
  121. * @lsc_cfg: the LSC configuration to check.
  122. *
  123. * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
  124. */
  125. static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
  126. struct omap3isp_ccdc_lsc_config *lsc_cfg)
  127. {
  128. struct isp_device *isp = to_isp_device(ccdc);
  129. struct v4l2_mbus_framefmt *format;
  130. unsigned int paxel_width, paxel_height;
  131. unsigned int paxel_shift_x, paxel_shift_y;
  132. unsigned int min_width, min_height, min_size;
  133. unsigned int input_width, input_height;
  134. paxel_shift_x = lsc_cfg->gain_mode_m;
  135. paxel_shift_y = lsc_cfg->gain_mode_n;
  136. if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
  137. (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
  138. dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
  139. return -EINVAL;
  140. }
  141. if (lsc_cfg->offset & 3) {
  142. dev_dbg(isp->dev, "CCDC: LSC: Offset must be a multiple of "
  143. "4\n");
  144. return -EINVAL;
  145. }
  146. if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
  147. dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
  148. return -EINVAL;
  149. }
  150. format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
  151. V4L2_SUBDEV_FORMAT_ACTIVE);
  152. input_width = format->width;
  153. input_height = format->height;
  154. /* Calculate minimum bytesize for validation */
  155. paxel_width = 1 << paxel_shift_x;
  156. min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
  157. >> paxel_shift_x) + 1;
  158. paxel_height = 1 << paxel_shift_y;
  159. min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
  160. >> paxel_shift_y) + 1;
  161. min_size = 4 * min_width * min_height;
  162. if (min_size > lsc_cfg->size) {
  163. dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
  164. return -EINVAL;
  165. }
  166. if (lsc_cfg->offset < (min_width * 4)) {
  167. dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
  168. return -EINVAL;
  169. }
  170. if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
  171. dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
  172. return -EINVAL;
  173. }
  174. return 0;
  175. }
  176. /*
  177. * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
  178. * @ccdc: Pointer to ISP CCDC device.
  179. */
  180. static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc, u32 addr)
  181. {
  182. isp_reg_writel(to_isp_device(ccdc), addr,
  183. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
  184. }
  185. /*
  186. * ccdc_lsc_setup_regs - Configures the lens shading compensation module
  187. * @ccdc: Pointer to ISP CCDC device.
  188. */
  189. static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
  190. struct omap3isp_ccdc_lsc_config *cfg)
  191. {
  192. struct isp_device *isp = to_isp_device(ccdc);
  193. int reg;
  194. isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
  195. ISPCCDC_LSC_TABLE_OFFSET);
  196. reg = 0;
  197. reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
  198. reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
  199. reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
  200. isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
  201. reg = 0;
  202. reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
  203. reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
  204. reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
  205. reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
  206. isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
  207. ISPCCDC_LSC_INITIAL);
  208. }
  209. static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
  210. {
  211. struct isp_device *isp = to_isp_device(ccdc);
  212. unsigned int wait;
  213. isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
  214. OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  215. /* timeout 1 ms */
  216. for (wait = 0; wait < 1000; wait++) {
  217. if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
  218. IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
  219. isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
  220. OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  221. return 0;
  222. }
  223. rmb();
  224. udelay(1);
  225. }
  226. return -ETIMEDOUT;
  227. }
  228. /*
  229. * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
  230. * @ccdc: Pointer to ISP CCDC device.
  231. * @enable: 0 Disables LSC, 1 Enables LSC.
  232. */
  233. static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
  234. {
  235. struct isp_device *isp = to_isp_device(ccdc);
  236. const struct v4l2_mbus_framefmt *format =
  237. __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
  238. V4L2_SUBDEV_FORMAT_ACTIVE);
  239. if ((format->code != V4L2_MBUS_FMT_SGRBG10_1X10) &&
  240. (format->code != V4L2_MBUS_FMT_SRGGB10_1X10) &&
  241. (format->code != V4L2_MBUS_FMT_SBGGR10_1X10) &&
  242. (format->code != V4L2_MBUS_FMT_SGBRG10_1X10))
  243. return -EINVAL;
  244. if (enable)
  245. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
  246. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
  247. ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
  248. if (enable) {
  249. if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
  250. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
  251. ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
  252. ccdc->lsc.state = LSC_STATE_STOPPED;
  253. dev_warn(to_device(ccdc), "LSC prefecth timeout\n");
  254. return -ETIMEDOUT;
  255. }
  256. ccdc->lsc.state = LSC_STATE_RUNNING;
  257. } else {
  258. ccdc->lsc.state = LSC_STATE_STOPPING;
  259. }
  260. return 0;
  261. }
  262. static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
  263. {
  264. struct isp_device *isp = to_isp_device(ccdc);
  265. return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
  266. ISPCCDC_LSC_BUSY;
  267. }
  268. /* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
  269. * @ccdc: Pointer to ISP CCDC device
  270. * @req: New configuration request
  271. *
  272. * context: in_interrupt()
  273. */
  274. static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
  275. struct ispccdc_lsc_config_req *req)
  276. {
  277. if (!req->enable)
  278. return -EINVAL;
  279. if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
  280. dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
  281. return -EINVAL;
  282. }
  283. if (ccdc_lsc_busy(ccdc))
  284. return -EBUSY;
  285. ccdc_lsc_setup_regs(ccdc, &req->config);
  286. ccdc_lsc_program_table(ccdc, req->table);
  287. return 0;
  288. }
  289. /*
  290. * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
  291. * @ccdc: Pointer to ISP CCDC device.
  292. *
  293. * Disables LSC, and defers enablement to shadow registers update time.
  294. */
  295. static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
  296. {
  297. struct isp_device *isp = to_isp_device(ccdc);
  298. /*
  299. * From OMAP3 TRM: When this event is pending, the module
  300. * goes into transparent mode (output =input). Normal
  301. * operation can be resumed at the start of the next frame
  302. * after:
  303. * 1) Clearing this event
  304. * 2) Disabling the LSC module
  305. * 3) Enabling it
  306. */
  307. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
  308. ISPCCDC_LSC_ENABLE);
  309. ccdc->lsc.state = LSC_STATE_STOPPED;
  310. }
  311. static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
  312. struct ispccdc_lsc_config_req *req)
  313. {
  314. struct isp_device *isp = to_isp_device(ccdc);
  315. if (req == NULL)
  316. return;
  317. if (req->iovm)
  318. dma_unmap_sg(isp->dev, req->iovm->sgt->sgl,
  319. req->iovm->sgt->nents, DMA_TO_DEVICE);
  320. if (req->table)
  321. iommu_vfree(isp->iommu, req->table);
  322. kfree(req);
  323. }
  324. static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
  325. struct list_head *queue)
  326. {
  327. struct ispccdc_lsc_config_req *req, *n;
  328. unsigned long flags;
  329. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  330. list_for_each_entry_safe(req, n, queue, list) {
  331. list_del(&req->list);
  332. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  333. ccdc_lsc_free_request(ccdc, req);
  334. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  335. }
  336. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  337. }
  338. static void ccdc_lsc_free_table_work(struct work_struct *work)
  339. {
  340. struct isp_ccdc_device *ccdc;
  341. struct ispccdc_lsc *lsc;
  342. lsc = container_of(work, struct ispccdc_lsc, table_work);
  343. ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
  344. ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
  345. }
  346. /*
  347. * ccdc_lsc_config - Configure the LSC module from a userspace request
  348. *
  349. * Store the request LSC configuration in the LSC engine request pointer. The
  350. * configuration will be applied to the hardware when the CCDC will be enabled,
  351. * or at the next LSC interrupt if the CCDC is already running.
  352. */
  353. static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
  354. struct omap3isp_ccdc_update_config *config)
  355. {
  356. struct isp_device *isp = to_isp_device(ccdc);
  357. struct ispccdc_lsc_config_req *req;
  358. unsigned long flags;
  359. void *table;
  360. u16 update;
  361. int ret;
  362. update = config->update &
  363. (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
  364. if (!update)
  365. return 0;
  366. if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
  367. dev_dbg(to_device(ccdc), "%s: Both LSC configuration and table "
  368. "need to be supplied\n", __func__);
  369. return -EINVAL;
  370. }
  371. req = kzalloc(sizeof(*req), GFP_KERNEL);
  372. if (req == NULL)
  373. return -ENOMEM;
  374. if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
  375. if (copy_from_user(&req->config, config->lsc_cfg,
  376. sizeof(req->config))) {
  377. ret = -EFAULT;
  378. goto done;
  379. }
  380. req->enable = 1;
  381. req->table = iommu_vmalloc(isp->iommu, 0, req->config.size,
  382. IOMMU_FLAG);
  383. if (IS_ERR_VALUE(req->table)) {
  384. req->table = 0;
  385. ret = -ENOMEM;
  386. goto done;
  387. }
  388. req->iovm = find_iovm_area(isp->iommu, req->table);
  389. if (req->iovm == NULL) {
  390. ret = -ENOMEM;
  391. goto done;
  392. }
  393. if (!dma_map_sg(isp->dev, req->iovm->sgt->sgl,
  394. req->iovm->sgt->nents, DMA_TO_DEVICE)) {
  395. ret = -ENOMEM;
  396. req->iovm = NULL;
  397. goto done;
  398. }
  399. dma_sync_sg_for_cpu(isp->dev, req->iovm->sgt->sgl,
  400. req->iovm->sgt->nents, DMA_TO_DEVICE);
  401. table = da_to_va(isp->iommu, req->table);
  402. if (copy_from_user(table, config->lsc, req->config.size)) {
  403. ret = -EFAULT;
  404. goto done;
  405. }
  406. dma_sync_sg_for_device(isp->dev, req->iovm->sgt->sgl,
  407. req->iovm->sgt->nents, DMA_TO_DEVICE);
  408. }
  409. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  410. if (ccdc->lsc.request) {
  411. list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
  412. schedule_work(&ccdc->lsc.table_work);
  413. }
  414. ccdc->lsc.request = req;
  415. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  416. ret = 0;
  417. done:
  418. if (ret < 0)
  419. ccdc_lsc_free_request(ccdc, req);
  420. return ret;
  421. }
  422. static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
  423. {
  424. unsigned long flags;
  425. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  426. if (ccdc->lsc.active) {
  427. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  428. return 1;
  429. }
  430. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  431. return 0;
  432. }
  433. static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
  434. {
  435. struct ispccdc_lsc *lsc = &ccdc->lsc;
  436. if (lsc->state != LSC_STATE_STOPPED)
  437. return -EINVAL;
  438. if (lsc->active) {
  439. list_add_tail(&lsc->active->list, &lsc->free_queue);
  440. lsc->active = NULL;
  441. }
  442. if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
  443. omap3isp_sbl_disable(to_isp_device(ccdc),
  444. OMAP3_ISP_SBL_CCDC_LSC_READ);
  445. list_add_tail(&lsc->request->list, &lsc->free_queue);
  446. lsc->request = NULL;
  447. goto done;
  448. }
  449. lsc->active = lsc->request;
  450. lsc->request = NULL;
  451. __ccdc_lsc_enable(ccdc, 1);
  452. done:
  453. if (!list_empty(&lsc->free_queue))
  454. schedule_work(&lsc->table_work);
  455. return 0;
  456. }
  457. /* -----------------------------------------------------------------------------
  458. * Parameters configuration
  459. */
  460. /*
  461. * ccdc_configure_clamp - Configure optical-black or digital clamping
  462. * @ccdc: Pointer to ISP CCDC device.
  463. *
  464. * The CCDC performs either optical-black or digital clamp. Configure and enable
  465. * the selected clamp method.
  466. */
  467. static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
  468. {
  469. struct isp_device *isp = to_isp_device(ccdc);
  470. u32 clamp;
  471. if (ccdc->obclamp) {
  472. clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
  473. clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
  474. clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
  475. clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
  476. isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
  477. } else {
  478. isp_reg_writel(isp, ccdc->clamp.dcsubval,
  479. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
  480. }
  481. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
  482. ISPCCDC_CLAMP_CLAMPEN,
  483. ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
  484. }
  485. /*
  486. * ccdc_configure_fpc - Configure Faulty Pixel Correction
  487. * @ccdc: Pointer to ISP CCDC device.
  488. */
  489. static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
  490. {
  491. struct isp_device *isp = to_isp_device(ccdc);
  492. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
  493. if (!ccdc->fpc_en)
  494. return;
  495. isp_reg_writel(isp, ccdc->fpc.fpcaddr, OMAP3_ISP_IOMEM_CCDC,
  496. ISPCCDC_FPC_ADDR);
  497. /* The FPNUM field must be set before enabling FPC. */
  498. isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
  499. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
  500. isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
  501. ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
  502. }
  503. /*
  504. * ccdc_configure_black_comp - Configure Black Level Compensation.
  505. * @ccdc: Pointer to ISP CCDC device.
  506. */
  507. static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
  508. {
  509. struct isp_device *isp = to_isp_device(ccdc);
  510. u32 blcomp;
  511. blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
  512. blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
  513. blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
  514. blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
  515. isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
  516. }
  517. /*
  518. * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
  519. * @ccdc: Pointer to ISP CCDC device.
  520. */
  521. static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
  522. {
  523. struct isp_device *isp = to_isp_device(ccdc);
  524. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
  525. ISPCCDC_SYN_MODE_LPF,
  526. ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
  527. }
  528. /*
  529. * ccdc_configure_alaw - Configure A-law compression.
  530. * @ccdc: Pointer to ISP CCDC device.
  531. */
  532. static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
  533. {
  534. struct isp_device *isp = to_isp_device(ccdc);
  535. u32 alaw = 0;
  536. switch (ccdc->syncif.datsz) {
  537. case 8:
  538. return;
  539. case 10:
  540. alaw = ISPCCDC_ALAW_GWDI_9_0;
  541. break;
  542. case 11:
  543. alaw = ISPCCDC_ALAW_GWDI_10_1;
  544. break;
  545. case 12:
  546. alaw = ISPCCDC_ALAW_GWDI_11_2;
  547. break;
  548. case 13:
  549. alaw = ISPCCDC_ALAW_GWDI_12_3;
  550. break;
  551. }
  552. if (ccdc->alaw)
  553. alaw |= ISPCCDC_ALAW_CCDTBL;
  554. isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
  555. }
  556. /*
  557. * ccdc_config_imgattr - Configure sensor image specific attributes.
  558. * @ccdc: Pointer to ISP CCDC device.
  559. * @colptn: Color pattern of the sensor.
  560. */
  561. static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
  562. {
  563. struct isp_device *isp = to_isp_device(ccdc);
  564. isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
  565. }
  566. /*
  567. * ccdc_config - Set CCDC configuration from userspace
  568. * @ccdc: Pointer to ISP CCDC device.
  569. * @userspace_add: Structure containing CCDC configuration sent from userspace.
  570. *
  571. * Returns 0 if successful, -EINVAL if the pointer to the configuration
  572. * structure is null, or the copy_from_user function fails to copy user space
  573. * memory to kernel space memory.
  574. */
  575. static int ccdc_config(struct isp_ccdc_device *ccdc,
  576. struct omap3isp_ccdc_update_config *ccdc_struct)
  577. {
  578. struct isp_device *isp = to_isp_device(ccdc);
  579. unsigned long flags;
  580. spin_lock_irqsave(&ccdc->lock, flags);
  581. ccdc->shadow_update = 1;
  582. spin_unlock_irqrestore(&ccdc->lock, flags);
  583. if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
  584. ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
  585. ccdc->update |= OMAP3ISP_CCDC_ALAW;
  586. }
  587. if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
  588. ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
  589. ccdc->update |= OMAP3ISP_CCDC_LPF;
  590. }
  591. if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
  592. if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
  593. sizeof(ccdc->clamp))) {
  594. ccdc->shadow_update = 0;
  595. return -EFAULT;
  596. }
  597. ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
  598. ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
  599. }
  600. if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
  601. if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
  602. sizeof(ccdc->blcomp))) {
  603. ccdc->shadow_update = 0;
  604. return -EFAULT;
  605. }
  606. ccdc->update |= OMAP3ISP_CCDC_BCOMP;
  607. }
  608. ccdc->shadow_update = 0;
  609. if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
  610. u32 table_old = 0;
  611. u32 table_new;
  612. u32 size;
  613. if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
  614. return -EBUSY;
  615. ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
  616. if (ccdc->fpc_en) {
  617. if (copy_from_user(&ccdc->fpc, ccdc_struct->fpc,
  618. sizeof(ccdc->fpc)))
  619. return -EFAULT;
  620. /*
  621. * table_new must be 64-bytes aligned, but it's
  622. * already done by iommu_vmalloc().
  623. */
  624. size = ccdc->fpc.fpnum * 4;
  625. table_new = iommu_vmalloc(isp->iommu, 0, size,
  626. IOMMU_FLAG);
  627. if (IS_ERR_VALUE(table_new))
  628. return -ENOMEM;
  629. if (copy_from_user(da_to_va(isp->iommu, table_new),
  630. (__force void __user *)
  631. ccdc->fpc.fpcaddr, size)) {
  632. iommu_vfree(isp->iommu, table_new);
  633. return -EFAULT;
  634. }
  635. table_old = ccdc->fpc.fpcaddr;
  636. ccdc->fpc.fpcaddr = table_new;
  637. }
  638. ccdc_configure_fpc(ccdc);
  639. if (table_old != 0)
  640. iommu_vfree(isp->iommu, table_old);
  641. }
  642. return ccdc_lsc_config(ccdc, ccdc_struct);
  643. }
  644. static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
  645. {
  646. if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
  647. ccdc_configure_alaw(ccdc);
  648. ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
  649. }
  650. if (ccdc->update & OMAP3ISP_CCDC_LPF) {
  651. ccdc_configure_lpf(ccdc);
  652. ccdc->update &= ~OMAP3ISP_CCDC_LPF;
  653. }
  654. if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
  655. ccdc_configure_clamp(ccdc);
  656. ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
  657. }
  658. if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
  659. ccdc_configure_black_comp(ccdc);
  660. ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
  661. }
  662. }
  663. /*
  664. * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
  665. * @dev: Pointer to ISP device
  666. */
  667. void omap3isp_ccdc_restore_context(struct isp_device *isp)
  668. {
  669. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  670. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
  671. ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
  672. | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
  673. ccdc_apply_controls(ccdc);
  674. ccdc_configure_fpc(ccdc);
  675. }
  676. /* -----------------------------------------------------------------------------
  677. * Format- and pipeline-related configuration helpers
  678. */
  679. /*
  680. * ccdc_config_vp - Configure the Video Port.
  681. * @ccdc: Pointer to ISP CCDC device.
  682. */
  683. static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
  684. {
  685. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  686. struct isp_device *isp = to_isp_device(ccdc);
  687. unsigned long l3_ick = pipe->l3_ick;
  688. unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
  689. unsigned int div = 0;
  690. u32 fmtcfg_vp;
  691. fmtcfg_vp = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG)
  692. & ~(ISPCCDC_FMTCFG_VPIN_MASK | ISPCCDC_FMTCFG_VPIF_FRQ_MASK);
  693. switch (ccdc->syncif.datsz) {
  694. case 8:
  695. case 10:
  696. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0;
  697. break;
  698. case 11:
  699. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1;
  700. break;
  701. case 12:
  702. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2;
  703. break;
  704. case 13:
  705. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3;
  706. break;
  707. };
  708. if (pipe->input)
  709. div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
  710. else if (ccdc->vpcfg.pixelclk)
  711. div = l3_ick / ccdc->vpcfg.pixelclk;
  712. div = clamp(div, 2U, max_div);
  713. fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
  714. isp_reg_writel(isp, fmtcfg_vp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
  715. }
  716. /*
  717. * ccdc_enable_vp - Enable Video Port.
  718. * @ccdc: Pointer to ISP CCDC device.
  719. * @enable: 0 Disables VP, 1 Enables VP
  720. *
  721. * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
  722. */
  723. static void ccdc_enable_vp(struct isp_ccdc_device *ccdc, u8 enable)
  724. {
  725. struct isp_device *isp = to_isp_device(ccdc);
  726. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG,
  727. ISPCCDC_FMTCFG_VPEN, enable ? ISPCCDC_FMTCFG_VPEN : 0);
  728. }
  729. /*
  730. * ccdc_config_outlineoffset - Configure memory saving output line offset
  731. * @ccdc: Pointer to ISP CCDC device.
  732. * @offset: Address offset to start a new line. Must be twice the
  733. * Output width and aligned on 32 byte boundary
  734. * @oddeven: Specifies the odd/even line pattern to be chosen to store the
  735. * output.
  736. * @numlines: Set the value 0-3 for +1-4lines, 4-7 for -1-4lines.
  737. *
  738. * - Configures the output line offset when stored in memory
  739. * - Sets the odd/even line pattern to store the output
  740. * (EVENEVEN (1), ODDEVEN (2), EVENODD (3), ODDODD (4))
  741. * - Configures the number of even and odd line fields in case of rearranging
  742. * the lines.
  743. */
  744. static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
  745. u32 offset, u8 oddeven, u8 numlines)
  746. {
  747. struct isp_device *isp = to_isp_device(ccdc);
  748. isp_reg_writel(isp, offset & 0xffff,
  749. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HSIZE_OFF);
  750. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  751. ISPCCDC_SDOFST_FINV);
  752. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  753. ISPCCDC_SDOFST_FOFST_4L);
  754. switch (oddeven) {
  755. case EVENEVEN:
  756. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  757. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT);
  758. break;
  759. case ODDEVEN:
  760. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  761. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT);
  762. break;
  763. case EVENODD:
  764. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  765. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT);
  766. break;
  767. case ODDODD:
  768. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  769. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT);
  770. break;
  771. default:
  772. break;
  773. }
  774. }
  775. /*
  776. * ccdc_set_outaddr - Set memory address to save output image
  777. * @ccdc: Pointer to ISP CCDC device.
  778. * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
  779. *
  780. * Sets the memory address where the output will be saved.
  781. */
  782. static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
  783. {
  784. struct isp_device *isp = to_isp_device(ccdc);
  785. isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
  786. }
  787. /*
  788. * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
  789. * @ccdc: Pointer to ISP CCDC device.
  790. * @max_rate: Maximum calculated data rate.
  791. *
  792. * Returns in *max_rate less value between calculated and passed
  793. */
  794. void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
  795. unsigned int *max_rate)
  796. {
  797. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  798. unsigned int rate;
  799. if (pipe == NULL)
  800. return;
  801. /*
  802. * TRM says that for parallel sensors the maximum data rate
  803. * should be 90% form L3/2 clock, otherwise just L3/2.
  804. */
  805. if (ccdc->input == CCDC_INPUT_PARALLEL)
  806. rate = pipe->l3_ick / 2 * 9 / 10;
  807. else
  808. rate = pipe->l3_ick / 2;
  809. *max_rate = min(*max_rate, rate);
  810. }
  811. /*
  812. * ccdc_config_sync_if - Set CCDC sync interface configuration
  813. * @ccdc: Pointer to ISP CCDC device.
  814. * @syncif: Structure containing the sync parameters like field state, CCDC in
  815. * master/slave mode, raw/yuv data, polarity of data, field, hs, vs
  816. * signals.
  817. */
  818. static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
  819. struct ispccdc_syncif *syncif)
  820. {
  821. struct isp_device *isp = to_isp_device(ccdc);
  822. u32 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC,
  823. ISPCCDC_SYN_MODE);
  824. syn_mode |= ISPCCDC_SYN_MODE_VDHDEN;
  825. if (syncif->fldstat)
  826. syn_mode |= ISPCCDC_SYN_MODE_FLDSTAT;
  827. else
  828. syn_mode &= ~ISPCCDC_SYN_MODE_FLDSTAT;
  829. syn_mode &= ~ISPCCDC_SYN_MODE_DATSIZ_MASK;
  830. switch (syncif->datsz) {
  831. case 8:
  832. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
  833. break;
  834. case 10:
  835. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
  836. break;
  837. case 11:
  838. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
  839. break;
  840. case 12:
  841. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
  842. break;
  843. };
  844. if (syncif->fldmode)
  845. syn_mode |= ISPCCDC_SYN_MODE_FLDMODE;
  846. else
  847. syn_mode &= ~ISPCCDC_SYN_MODE_FLDMODE;
  848. if (syncif->datapol)
  849. syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
  850. else
  851. syn_mode &= ~ISPCCDC_SYN_MODE_DATAPOL;
  852. if (syncif->fldpol)
  853. syn_mode |= ISPCCDC_SYN_MODE_FLDPOL;
  854. else
  855. syn_mode &= ~ISPCCDC_SYN_MODE_FLDPOL;
  856. if (syncif->hdpol)
  857. syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
  858. else
  859. syn_mode &= ~ISPCCDC_SYN_MODE_HDPOL;
  860. if (syncif->vdpol)
  861. syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
  862. else
  863. syn_mode &= ~ISPCCDC_SYN_MODE_VDPOL;
  864. if (syncif->ccdc_mastermode) {
  865. syn_mode |= ISPCCDC_SYN_MODE_FLDOUT | ISPCCDC_SYN_MODE_VDHDOUT;
  866. isp_reg_writel(isp,
  867. syncif->hs_width << ISPCCDC_HD_VD_WID_HDW_SHIFT
  868. | syncif->vs_width << ISPCCDC_HD_VD_WID_VDW_SHIFT,
  869. OMAP3_ISP_IOMEM_CCDC,
  870. ISPCCDC_HD_VD_WID);
  871. isp_reg_writel(isp,
  872. syncif->ppln << ISPCCDC_PIX_LINES_PPLN_SHIFT
  873. | syncif->hlprf << ISPCCDC_PIX_LINES_HLPRF_SHIFT,
  874. OMAP3_ISP_IOMEM_CCDC,
  875. ISPCCDC_PIX_LINES);
  876. } else
  877. syn_mode &= ~(ISPCCDC_SYN_MODE_FLDOUT |
  878. ISPCCDC_SYN_MODE_VDHDOUT);
  879. isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  880. if (!syncif->bt_r656_en)
  881. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
  882. ISPCCDC_REC656IF_R656ON);
  883. }
  884. /* CCDC formats descriptions */
  885. static const u32 ccdc_sgrbg_pattern =
  886. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  887. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  888. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  889. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  890. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  891. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  892. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  893. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  894. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  895. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  896. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  897. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  898. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  899. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  900. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  901. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  902. static const u32 ccdc_srggb_pattern =
  903. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  904. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  905. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  906. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  907. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  908. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  909. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  910. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  911. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  912. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  913. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  914. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  915. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  916. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  917. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  918. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  919. static const u32 ccdc_sbggr_pattern =
  920. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  921. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  922. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  923. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  924. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  925. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  926. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  927. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  928. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  929. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  930. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  931. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  932. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  933. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  934. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  935. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  936. static const u32 ccdc_sgbrg_pattern =
  937. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  938. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  939. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  940. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  941. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  942. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  943. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  944. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  945. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  946. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  947. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  948. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  949. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  950. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  951. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  952. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  953. static void ccdc_configure(struct isp_ccdc_device *ccdc)
  954. {
  955. struct isp_device *isp = to_isp_device(ccdc);
  956. struct isp_parallel_platform_data *pdata = NULL;
  957. struct v4l2_subdev *sensor;
  958. struct v4l2_mbus_framefmt *format;
  959. const struct isp_format_info *fmt_info;
  960. struct v4l2_subdev_format fmt_src;
  961. unsigned int depth_out;
  962. unsigned int depth_in = 0;
  963. struct media_pad *pad;
  964. unsigned long flags;
  965. unsigned int shift;
  966. u32 syn_mode;
  967. u32 ccdc_pattern;
  968. pad = media_entity_remote_source(&ccdc->pads[CCDC_PAD_SINK]);
  969. sensor = media_entity_to_v4l2_subdev(pad->entity);
  970. if (ccdc->input == CCDC_INPUT_PARALLEL)
  971. pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
  972. ->bus.parallel;
  973. /* Compute shift value for lane shifter to configure the bridge. */
  974. fmt_src.pad = pad->index;
  975. fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  976. if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
  977. fmt_info = omap3isp_video_format_info(fmt_src.format.code);
  978. depth_in = fmt_info->bpp;
  979. }
  980. fmt_info = omap3isp_video_format_info
  981. (isp->isp_ccdc.formats[CCDC_PAD_SINK].code);
  982. depth_out = fmt_info->bpp;
  983. shift = depth_in - depth_out;
  984. omap3isp_configure_bridge(isp, ccdc->input, pdata, shift);
  985. ccdc->syncif.datsz = depth_out;
  986. ccdc->syncif.hdpol = pdata ? pdata->hs_pol : 0;
  987. ccdc->syncif.vdpol = pdata ? pdata->vs_pol : 0;
  988. ccdc_config_sync_if(ccdc, &ccdc->syncif);
  989. /* CCDC_PAD_SINK */
  990. format = &ccdc->formats[CCDC_PAD_SINK];
  991. syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  992. /* Use the raw, unprocessed data when writing to memory. The H3A and
  993. * histogram modules are still fed with lens shading corrected data.
  994. */
  995. syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
  996. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  997. syn_mode |= ISPCCDC_SYN_MODE_WEN;
  998. else
  999. syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
  1000. if (ccdc->output & CCDC_OUTPUT_RESIZER)
  1001. syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
  1002. else
  1003. syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
  1004. /* Use PACK8 mode for 1byte per pixel formats. */
  1005. if (omap3isp_video_format_info(format->code)->bpp <= 8)
  1006. syn_mode |= ISPCCDC_SYN_MODE_PACK8;
  1007. else
  1008. syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
  1009. isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  1010. /* Mosaic filter */
  1011. switch (format->code) {
  1012. case V4L2_MBUS_FMT_SRGGB10_1X10:
  1013. case V4L2_MBUS_FMT_SRGGB12_1X12:
  1014. ccdc_pattern = ccdc_srggb_pattern;
  1015. break;
  1016. case V4L2_MBUS_FMT_SBGGR10_1X10:
  1017. case V4L2_MBUS_FMT_SBGGR12_1X12:
  1018. ccdc_pattern = ccdc_sbggr_pattern;
  1019. break;
  1020. case V4L2_MBUS_FMT_SGBRG10_1X10:
  1021. case V4L2_MBUS_FMT_SGBRG12_1X12:
  1022. ccdc_pattern = ccdc_sgbrg_pattern;
  1023. break;
  1024. default:
  1025. /* Use GRBG */
  1026. ccdc_pattern = ccdc_sgrbg_pattern;
  1027. break;
  1028. }
  1029. ccdc_config_imgattr(ccdc, ccdc_pattern);
  1030. /* Generate VD0 on the last line of the image and VD1 on the
  1031. * 2/3 height line.
  1032. */
  1033. isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
  1034. ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
  1035. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
  1036. /* CCDC_PAD_SOURCE_OF */
  1037. format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
  1038. isp_reg_writel(isp, (0 << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
  1039. ((format->width - 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT),
  1040. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
  1041. isp_reg_writel(isp, 0 << ISPCCDC_VERT_START_SLV0_SHIFT,
  1042. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
  1043. isp_reg_writel(isp, (format->height - 1)
  1044. << ISPCCDC_VERT_LINES_NLV_SHIFT,
  1045. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
  1046. ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value, 0, 0);
  1047. /* CCDC_PAD_SOURCE_VP */
  1048. format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
  1049. isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
  1050. (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
  1051. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
  1052. isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
  1053. ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
  1054. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
  1055. isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
  1056. (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
  1057. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
  1058. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1059. if (ccdc->lsc.request == NULL)
  1060. goto unlock;
  1061. WARN_ON(ccdc->lsc.active);
  1062. /* Get last good LSC configuration. If it is not supported for
  1063. * the current active resolution discard it.
  1064. */
  1065. if (ccdc->lsc.active == NULL &&
  1066. __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
  1067. ccdc->lsc.active = ccdc->lsc.request;
  1068. } else {
  1069. list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
  1070. schedule_work(&ccdc->lsc.table_work);
  1071. }
  1072. ccdc->lsc.request = NULL;
  1073. unlock:
  1074. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1075. ccdc_apply_controls(ccdc);
  1076. }
  1077. static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
  1078. {
  1079. struct isp_device *isp = to_isp_device(ccdc);
  1080. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
  1081. ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
  1082. }
  1083. static int ccdc_disable(struct isp_ccdc_device *ccdc)
  1084. {
  1085. unsigned long flags;
  1086. int ret = 0;
  1087. spin_lock_irqsave(&ccdc->lock, flags);
  1088. if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
  1089. ccdc->stopping = CCDC_STOP_REQUEST;
  1090. spin_unlock_irqrestore(&ccdc->lock, flags);
  1091. ret = wait_event_timeout(ccdc->wait,
  1092. ccdc->stopping == CCDC_STOP_FINISHED,
  1093. msecs_to_jiffies(2000));
  1094. if (ret == 0) {
  1095. ret = -ETIMEDOUT;
  1096. dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
  1097. }
  1098. omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
  1099. mutex_lock(&ccdc->ioctl_lock);
  1100. ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
  1101. ccdc->lsc.request = ccdc->lsc.active;
  1102. ccdc->lsc.active = NULL;
  1103. cancel_work_sync(&ccdc->lsc.table_work);
  1104. ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
  1105. mutex_unlock(&ccdc->ioctl_lock);
  1106. ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
  1107. return ret > 0 ? 0 : ret;
  1108. }
  1109. static void ccdc_enable(struct isp_ccdc_device *ccdc)
  1110. {
  1111. if (ccdc_lsc_is_configured(ccdc))
  1112. __ccdc_lsc_enable(ccdc, 1);
  1113. __ccdc_enable(ccdc, 1);
  1114. }
  1115. /* -----------------------------------------------------------------------------
  1116. * Interrupt handling
  1117. */
  1118. /*
  1119. * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
  1120. * @ccdc: Pointer to ISP CCDC device.
  1121. *
  1122. * Returns zero if the CCDC is idle and the image has been written to
  1123. * memory, too.
  1124. */
  1125. static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
  1126. {
  1127. struct isp_device *isp = to_isp_device(ccdc);
  1128. return omap3isp_ccdc_busy(ccdc)
  1129. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
  1130. ISPSBL_CCDC_WR_0_DATA_READY)
  1131. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
  1132. ISPSBL_CCDC_WR_0_DATA_READY)
  1133. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
  1134. ISPSBL_CCDC_WR_0_DATA_READY)
  1135. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
  1136. ISPSBL_CCDC_WR_0_DATA_READY);
  1137. }
  1138. /*
  1139. * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
  1140. * @ccdc: Pointer to ISP CCDC device.
  1141. * @max_wait: Max retry count in us for wait for idle/busy transition.
  1142. */
  1143. static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
  1144. unsigned int max_wait)
  1145. {
  1146. unsigned int wait = 0;
  1147. if (max_wait == 0)
  1148. max_wait = 10000; /* 10 ms */
  1149. for (wait = 0; wait <= max_wait; wait++) {
  1150. if (!ccdc_sbl_busy(ccdc))
  1151. return 0;
  1152. rmb();
  1153. udelay(1);
  1154. }
  1155. return -EBUSY;
  1156. }
  1157. /* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
  1158. * @ccdc: Pointer to ISP CCDC device.
  1159. * @event: Pointing which event trigger handler
  1160. *
  1161. * Return 1 when the event and stopping request combination is satisfied,
  1162. * zero otherwise.
  1163. */
  1164. static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
  1165. {
  1166. int rval = 0;
  1167. switch ((ccdc->stopping & 3) | event) {
  1168. case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
  1169. if (ccdc->lsc.state != LSC_STATE_STOPPED)
  1170. __ccdc_lsc_enable(ccdc, 0);
  1171. __ccdc_enable(ccdc, 0);
  1172. ccdc->stopping = CCDC_STOP_EXECUTED;
  1173. return 1;
  1174. case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
  1175. ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
  1176. if (ccdc->lsc.state == LSC_STATE_STOPPED)
  1177. ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
  1178. rval = 1;
  1179. break;
  1180. case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
  1181. ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
  1182. rval = 1;
  1183. break;
  1184. case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
  1185. return 1;
  1186. }
  1187. if (ccdc->stopping == CCDC_STOP_FINISHED) {
  1188. wake_up(&ccdc->wait);
  1189. rval = 1;
  1190. }
  1191. return rval;
  1192. }
  1193. static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
  1194. {
  1195. struct video_device *vdev = &ccdc->subdev.devnode;
  1196. struct v4l2_event event;
  1197. memset(&event, 0, sizeof(event));
  1198. event.type = V4L2_EVENT_OMAP3ISP_HS_VS;
  1199. v4l2_event_queue(vdev, &event);
  1200. }
  1201. /*
  1202. * ccdc_lsc_isr - Handle LSC events
  1203. * @ccdc: Pointer to ISP CCDC device.
  1204. * @events: LSC events
  1205. */
  1206. static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
  1207. {
  1208. unsigned long flags;
  1209. if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
  1210. ccdc_lsc_error_handler(ccdc);
  1211. ccdc->error = 1;
  1212. dev_dbg(to_device(ccdc), "lsc prefetch error\n");
  1213. }
  1214. if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
  1215. return;
  1216. /* LSC_DONE interrupt occur, there are two cases
  1217. * 1. stopping for reconfiguration
  1218. * 2. stopping because of STREAM OFF command
  1219. */
  1220. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1221. if (ccdc->lsc.state == LSC_STATE_STOPPING)
  1222. ccdc->lsc.state = LSC_STATE_STOPPED;
  1223. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
  1224. goto done;
  1225. if (ccdc->lsc.state != LSC_STATE_RECONFIG)
  1226. goto done;
  1227. /* LSC is in STOPPING state, change to the new state */
  1228. ccdc->lsc.state = LSC_STATE_STOPPED;
  1229. /* This is an exception. Start of frame and LSC_DONE interrupt
  1230. * have been received on the same time. Skip this event and wait
  1231. * for better times.
  1232. */
  1233. if (events & IRQ0STATUS_HS_VS_IRQ)
  1234. goto done;
  1235. /* The LSC engine is stopped at this point. Enable it if there's a
  1236. * pending request.
  1237. */
  1238. if (ccdc->lsc.request == NULL)
  1239. goto done;
  1240. ccdc_lsc_enable(ccdc);
  1241. done:
  1242. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1243. }
  1244. static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
  1245. {
  1246. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  1247. struct isp_device *isp = to_isp_device(ccdc);
  1248. struct isp_buffer *buffer;
  1249. int restart = 0;
  1250. /* The CCDC generates VD0 interrupts even when disabled (the datasheet
  1251. * doesn't explicitly state if that's supposed to happen or not, so it
  1252. * can be considered as a hardware bug or as a feature, but we have to
  1253. * deal with it anyway). Disabling the CCDC when no buffer is available
  1254. * would thus not be enough, we need to handle the situation explicitly.
  1255. */
  1256. if (list_empty(&ccdc->video_out.dmaqueue))
  1257. goto done;
  1258. /* We're in continuous mode, and memory writes were disabled due to a
  1259. * buffer underrun. Reenable them now that we have a buffer. The buffer
  1260. * address has been set in ccdc_video_queue.
  1261. */
  1262. if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
  1263. restart = 1;
  1264. ccdc->underrun = 0;
  1265. goto done;
  1266. }
  1267. if (ccdc_sbl_wait_idle(ccdc, 1000)) {
  1268. dev_info(isp->dev, "CCDC won't become idle!\n");
  1269. goto done;
  1270. }
  1271. buffer = omap3isp_video_buffer_next(&ccdc->video_out, ccdc->error);
  1272. if (buffer != NULL) {
  1273. ccdc_set_outaddr(ccdc, buffer->isp_addr);
  1274. restart = 1;
  1275. }
  1276. pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
  1277. if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
  1278. isp_pipeline_ready(pipe))
  1279. omap3isp_pipeline_set_stream(pipe,
  1280. ISP_PIPELINE_STREAM_SINGLESHOT);
  1281. done:
  1282. ccdc->error = 0;
  1283. return restart;
  1284. }
  1285. /*
  1286. * ccdc_vd0_isr - Handle VD0 event
  1287. * @ccdc: Pointer to ISP CCDC device.
  1288. *
  1289. * Executes LSC deferred enablement before next frame starts.
  1290. */
  1291. static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
  1292. {
  1293. unsigned long flags;
  1294. int restart = 0;
  1295. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1296. restart = ccdc_isr_buffer(ccdc);
  1297. spin_lock_irqsave(&ccdc->lock, flags);
  1298. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
  1299. spin_unlock_irqrestore(&ccdc->lock, flags);
  1300. return;
  1301. }
  1302. if (!ccdc->shadow_update)
  1303. ccdc_apply_controls(ccdc);
  1304. spin_unlock_irqrestore(&ccdc->lock, flags);
  1305. if (restart)
  1306. ccdc_enable(ccdc);
  1307. }
  1308. /*
  1309. * ccdc_vd1_isr - Handle VD1 event
  1310. * @ccdc: Pointer to ISP CCDC device.
  1311. */
  1312. static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
  1313. {
  1314. unsigned long flags;
  1315. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1316. /*
  1317. * Depending on the CCDC pipeline state, CCDC stopping should be
  1318. * handled differently. In SINGLESHOT we emulate an internal CCDC
  1319. * stopping because the CCDC hw works only in continuous mode.
  1320. * When CONTINUOUS pipeline state is used and the CCDC writes it's
  1321. * data to memory the CCDC and LSC are stopped immediately but
  1322. * without change the CCDC stopping state machine. The CCDC
  1323. * stopping state machine should be used only when user request
  1324. * for stopping is received (SINGLESHOT is an exeption).
  1325. */
  1326. switch (ccdc->state) {
  1327. case ISP_PIPELINE_STREAM_SINGLESHOT:
  1328. ccdc->stopping = CCDC_STOP_REQUEST;
  1329. break;
  1330. case ISP_PIPELINE_STREAM_CONTINUOUS:
  1331. if (ccdc->output & CCDC_OUTPUT_MEMORY) {
  1332. if (ccdc->lsc.state != LSC_STATE_STOPPED)
  1333. __ccdc_lsc_enable(ccdc, 0);
  1334. __ccdc_enable(ccdc, 0);
  1335. }
  1336. break;
  1337. case ISP_PIPELINE_STREAM_STOPPED:
  1338. break;
  1339. }
  1340. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
  1341. goto done;
  1342. if (ccdc->lsc.request == NULL)
  1343. goto done;
  1344. /*
  1345. * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
  1346. * do the appropriate changes in registers
  1347. */
  1348. if (ccdc->lsc.state == LSC_STATE_RUNNING) {
  1349. __ccdc_lsc_enable(ccdc, 0);
  1350. ccdc->lsc.state = LSC_STATE_RECONFIG;
  1351. goto done;
  1352. }
  1353. /* LSC has been in STOPPED state, enable it */
  1354. if (ccdc->lsc.state == LSC_STATE_STOPPED)
  1355. ccdc_lsc_enable(ccdc);
  1356. done:
  1357. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1358. }
  1359. /*
  1360. * omap3isp_ccdc_isr - Configure CCDC during interframe time.
  1361. * @ccdc: Pointer to ISP CCDC device.
  1362. * @events: CCDC events
  1363. */
  1364. int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
  1365. {
  1366. if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
  1367. return 0;
  1368. if (events & IRQ0STATUS_CCDC_VD1_IRQ)
  1369. ccdc_vd1_isr(ccdc);
  1370. ccdc_lsc_isr(ccdc, events);
  1371. if (events & IRQ0STATUS_CCDC_VD0_IRQ)
  1372. ccdc_vd0_isr(ccdc);
  1373. if (events & IRQ0STATUS_HS_VS_IRQ)
  1374. ccdc_hs_vs_isr(ccdc);
  1375. return 0;
  1376. }
  1377. /* -----------------------------------------------------------------------------
  1378. * ISP video operations
  1379. */
  1380. static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
  1381. {
  1382. struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
  1383. if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
  1384. return -ENODEV;
  1385. ccdc_set_outaddr(ccdc, buffer->isp_addr);
  1386. /* We now have a buffer queued on the output, restart the pipeline
  1387. * on the next CCDC interrupt if running in continuous mode (or when
  1388. * starting the stream).
  1389. */
  1390. ccdc->underrun = 1;
  1391. return 0;
  1392. }
  1393. static const struct isp_video_operations ccdc_video_ops = {
  1394. .queue = ccdc_video_queue,
  1395. };
  1396. /* -----------------------------------------------------------------------------
  1397. * V4L2 subdev operations
  1398. */
  1399. /*
  1400. * ccdc_ioctl - CCDC module private ioctl's
  1401. * @sd: ISP CCDC V4L2 subdevice
  1402. * @cmd: ioctl command
  1403. * @arg: ioctl argument
  1404. *
  1405. * Return 0 on success or a negative error code otherwise.
  1406. */
  1407. static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
  1408. {
  1409. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1410. int ret;
  1411. switch (cmd) {
  1412. case VIDIOC_OMAP3ISP_CCDC_CFG:
  1413. mutex_lock(&ccdc->ioctl_lock);
  1414. ret = ccdc_config(ccdc, arg);
  1415. mutex_unlock(&ccdc->ioctl_lock);
  1416. break;
  1417. default:
  1418. return -ENOIOCTLCMD;
  1419. }
  1420. return ret;
  1421. }
  1422. static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
  1423. struct v4l2_event_subscription *sub)
  1424. {
  1425. if (sub->type != V4L2_EVENT_OMAP3ISP_HS_VS)
  1426. return -EINVAL;
  1427. return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS);
  1428. }
  1429. static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
  1430. struct v4l2_event_subscription *sub)
  1431. {
  1432. return v4l2_event_unsubscribe(fh, sub);
  1433. }
  1434. /*
  1435. * ccdc_set_stream - Enable/Disable streaming on the CCDC module
  1436. * @sd: ISP CCDC V4L2 subdevice
  1437. * @enable: Enable/disable stream
  1438. *
  1439. * When writing to memory, the CCDC hardware can't be enabled without a memory
  1440. * buffer to write to. As the s_stream operation is called in response to a
  1441. * STREAMON call without any buffer queued yet, just update the enabled field
  1442. * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
  1443. *
  1444. * When not writing to memory enable the CCDC immediately.
  1445. */
  1446. static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
  1447. {
  1448. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1449. struct isp_device *isp = to_isp_device(ccdc);
  1450. int ret = 0;
  1451. if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
  1452. if (enable == ISP_PIPELINE_STREAM_STOPPED)
  1453. return 0;
  1454. omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
  1455. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  1456. ISPCCDC_CFG_VDLC);
  1457. ccdc_configure(ccdc);
  1458. /* TODO: Don't configure the video port if all of its output
  1459. * links are inactive.
  1460. */
  1461. ccdc_config_vp(ccdc);
  1462. ccdc_enable_vp(ccdc, 1);
  1463. ccdc->error = 0;
  1464. ccdc_print_status(ccdc);
  1465. }
  1466. switch (enable) {
  1467. case ISP_PIPELINE_STREAM_CONTINUOUS:
  1468. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1469. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1470. if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
  1471. ccdc_enable(ccdc);
  1472. ccdc->underrun = 0;
  1473. break;
  1474. case ISP_PIPELINE_STREAM_SINGLESHOT:
  1475. if (ccdc->output & CCDC_OUTPUT_MEMORY &&
  1476. ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
  1477. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1478. ccdc_enable(ccdc);
  1479. break;
  1480. case ISP_PIPELINE_STREAM_STOPPED:
  1481. ret = ccdc_disable(ccdc);
  1482. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1483. omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1484. omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
  1485. ccdc->underrun = 0;
  1486. break;
  1487. }
  1488. ccdc->state = enable;
  1489. return ret;
  1490. }
  1491. static struct v4l2_mbus_framefmt *
  1492. __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1493. unsigned int pad, enum v4l2_subdev_format_whence which)
  1494. {
  1495. if (which == V4L2_SUBDEV_FORMAT_TRY)
  1496. return v4l2_subdev_get_try_format(fh, pad);
  1497. else
  1498. return &ccdc->formats[pad];
  1499. }
  1500. /*
  1501. * ccdc_try_format - Try video format on a pad
  1502. * @ccdc: ISP CCDC device
  1503. * @fh : V4L2 subdev file handle
  1504. * @pad: Pad number
  1505. * @fmt: Format
  1506. */
  1507. static void
  1508. ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1509. unsigned int pad, struct v4l2_mbus_framefmt *fmt,
  1510. enum v4l2_subdev_format_whence which)
  1511. {
  1512. struct v4l2_mbus_framefmt *format;
  1513. const struct isp_format_info *info;
  1514. unsigned int width = fmt->width;
  1515. unsigned int height = fmt->height;
  1516. unsigned int i;
  1517. switch (pad) {
  1518. case CCDC_PAD_SINK:
  1519. /* TODO: If the CCDC output formatter pad is connected directly
  1520. * to the resizer, only YUV formats can be used.
  1521. */
  1522. for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
  1523. if (fmt->code == ccdc_fmts[i])
  1524. break;
  1525. }
  1526. /* If not found, use SGRBG10 as default */
  1527. if (i >= ARRAY_SIZE(ccdc_fmts))
  1528. fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
  1529. /* Clamp the input size. */
  1530. fmt->width = clamp_t(u32, width, 32, 4096);
  1531. fmt->height = clamp_t(u32, height, 32, 4096);
  1532. break;
  1533. case CCDC_PAD_SOURCE_OF:
  1534. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
  1535. memcpy(fmt, format, sizeof(*fmt));
  1536. /* The data formatter truncates the number of horizontal output
  1537. * pixels to a multiple of 16. To avoid clipping data, allow
  1538. * callers to request an output size bigger than the input size
  1539. * up to the nearest multiple of 16.
  1540. */
  1541. fmt->width = clamp_t(u32, width, 32, (fmt->width + 15) & ~15);
  1542. fmt->width &= ~15;
  1543. fmt->height = clamp_t(u32, height, 32, fmt->height);
  1544. break;
  1545. case CCDC_PAD_SOURCE_VP:
  1546. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
  1547. memcpy(fmt, format, sizeof(*fmt));
  1548. /* The video port interface truncates the data to 10 bits. */
  1549. info = omap3isp_video_format_info(fmt->code);
  1550. fmt->code = info->truncated;
  1551. /* The number of lines that can be clocked out from the video
  1552. * port output must be at least one line less than the number
  1553. * of input lines.
  1554. */
  1555. fmt->width = clamp_t(u32, width, 32, fmt->width);
  1556. fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
  1557. break;
  1558. }
  1559. /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
  1560. * stored on 2 bytes.
  1561. */
  1562. fmt->colorspace = V4L2_COLORSPACE_SRGB;
  1563. fmt->field = V4L2_FIELD_NONE;
  1564. }
  1565. /*
  1566. * ccdc_enum_mbus_code - Handle pixel format enumeration
  1567. * @sd : pointer to v4l2 subdev structure
  1568. * @fh : V4L2 subdev file handle
  1569. * @code : pointer to v4l2_subdev_mbus_code_enum structure
  1570. * return -EINVAL or zero on success
  1571. */
  1572. static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
  1573. struct v4l2_subdev_fh *fh,
  1574. struct v4l2_subdev_mbus_code_enum *code)
  1575. {
  1576. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1577. struct v4l2_mbus_framefmt *format;
  1578. switch (code->pad) {
  1579. case CCDC_PAD_SINK:
  1580. if (code->index >= ARRAY_SIZE(ccdc_fmts))
  1581. return -EINVAL;
  1582. code->code = ccdc_fmts[code->index];
  1583. break;
  1584. case CCDC_PAD_SOURCE_OF:
  1585. case CCDC_PAD_SOURCE_VP:
  1586. /* No format conversion inside CCDC */
  1587. if (code->index != 0)
  1588. return -EINVAL;
  1589. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK,
  1590. V4L2_SUBDEV_FORMAT_TRY);
  1591. code->code = format->code;
  1592. break;
  1593. default:
  1594. return -EINVAL;
  1595. }
  1596. return 0;
  1597. }
  1598. static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
  1599. struct v4l2_subdev_fh *fh,
  1600. struct v4l2_subdev_frame_size_enum *fse)
  1601. {
  1602. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1603. struct v4l2_mbus_framefmt format;
  1604. if (fse->index != 0)
  1605. return -EINVAL;
  1606. format.code = fse->code;
  1607. format.width = 1;
  1608. format.height = 1;
  1609. ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
  1610. fse->min_width = format.width;
  1611. fse->min_height = format.height;
  1612. if (format.code != fse->code)
  1613. return -EINVAL;
  1614. format.code = fse->code;
  1615. format.width = -1;
  1616. format.height = -1;
  1617. ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
  1618. fse->max_width = format.width;
  1619. fse->max_height = format.height;
  1620. return 0;
  1621. }
  1622. /*
  1623. * ccdc_get_format - Retrieve the video format on a pad
  1624. * @sd : ISP CCDC V4L2 subdevice
  1625. * @fh : V4L2 subdev file handle
  1626. * @fmt: Format
  1627. *
  1628. * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
  1629. * to the format type.
  1630. */
  1631. static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1632. struct v4l2_subdev_format *fmt)
  1633. {
  1634. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1635. struct v4l2_mbus_framefmt *format;
  1636. format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
  1637. if (format == NULL)
  1638. return -EINVAL;
  1639. fmt->format = *format;
  1640. return 0;
  1641. }
  1642. /*
  1643. * ccdc_set_format - Set the video format on a pad
  1644. * @sd : ISP CCDC V4L2 subdevice
  1645. * @fh : V4L2 subdev file handle
  1646. * @fmt: Format
  1647. *
  1648. * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
  1649. * to the format type.
  1650. */
  1651. static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1652. struct v4l2_subdev_format *fmt)
  1653. {
  1654. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1655. struct v4l2_mbus_framefmt *format;
  1656. format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
  1657. if (format == NULL)
  1658. return -EINVAL;
  1659. ccdc_try_format(ccdc, fh, fmt->pad, &fmt->format, fmt->which);
  1660. *format = fmt->format;
  1661. /* Propagate the format from sink to source */
  1662. if (fmt->pad == CCDC_PAD_SINK) {
  1663. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF,
  1664. fmt->which);
  1665. *format = fmt->format;
  1666. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format,
  1667. fmt->which);
  1668. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_VP,
  1669. fmt->which);
  1670. *format = fmt->format;
  1671. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_VP, format,
  1672. fmt->which);
  1673. }
  1674. return 0;
  1675. }
  1676. /*
  1677. * ccdc_init_formats - Initialize formats on all pads
  1678. * @sd: ISP CCDC V4L2 subdevice
  1679. * @fh: V4L2 subdev file handle
  1680. *
  1681. * Initialize all pad formats with default values. If fh is not NULL, try
  1682. * formats are initialized on the file handle. Otherwise active formats are
  1683. * initialized on the device.
  1684. */
  1685. static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
  1686. {
  1687. struct v4l2_subdev_format format;
  1688. memset(&format, 0, sizeof(format));
  1689. format.pad = CCDC_PAD_SINK;
  1690. format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
  1691. format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
  1692. format.format.width = 4096;
  1693. format.format.height = 4096;
  1694. ccdc_set_format(sd, fh, &format);
  1695. return 0;
  1696. }
  1697. /* V4L2 subdev core operations */
  1698. static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
  1699. .ioctl = ccdc_ioctl,
  1700. .subscribe_event = ccdc_subscribe_event,
  1701. .unsubscribe_event = ccdc_unsubscribe_event,
  1702. };
  1703. /* V4L2 subdev video operations */
  1704. static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
  1705. .s_stream = ccdc_set_stream,
  1706. };
  1707. /* V4L2 subdev pad operations */
  1708. static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
  1709. .enum_mbus_code = ccdc_enum_mbus_code,
  1710. .enum_frame_size = ccdc_enum_frame_size,
  1711. .get_fmt = ccdc_get_format,
  1712. .set_fmt = ccdc_set_format,
  1713. };
  1714. /* V4L2 subdev operations */
  1715. static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
  1716. .core = &ccdc_v4l2_core_ops,
  1717. .video = &ccdc_v4l2_video_ops,
  1718. .pad = &ccdc_v4l2_pad_ops,
  1719. };
  1720. /* V4L2 subdev internal operations */
  1721. static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
  1722. .open = ccdc_init_formats,
  1723. };
  1724. /* -----------------------------------------------------------------------------
  1725. * Media entity operations
  1726. */
  1727. /*
  1728. * ccdc_link_setup - Setup CCDC connections
  1729. * @entity: CCDC media entity
  1730. * @local: Pad at the local end of the link
  1731. * @remote: Pad at the remote end of the link
  1732. * @flags: Link flags
  1733. *
  1734. * return -EINVAL or zero on success
  1735. */
  1736. static int ccdc_link_setup(struct media_entity *entity,
  1737. const struct media_pad *local,
  1738. const struct media_pad *remote, u32 flags)
  1739. {
  1740. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1741. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1742. struct isp_device *isp = to_isp_device(ccdc);
  1743. switch (local->index | media_entity_type(remote->entity)) {
  1744. case CCDC_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
  1745. /* Read from the sensor (parallel interface), CCP2, CSI2a or
  1746. * CSI2c.
  1747. */
  1748. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  1749. ccdc->input = CCDC_INPUT_NONE;
  1750. break;
  1751. }
  1752. if (ccdc->input != CCDC_INPUT_NONE)
  1753. return -EBUSY;
  1754. if (remote->entity == &isp->isp_ccp2.subdev.entity)
  1755. ccdc->input = CCDC_INPUT_CCP2B;
  1756. else if (remote->entity == &isp->isp_csi2a.subdev.entity)
  1757. ccdc->input = CCDC_INPUT_CSI2A;
  1758. else if (remote->entity == &isp->isp_csi2c.subdev.entity)
  1759. ccdc->input = CCDC_INPUT_CSI2C;
  1760. else
  1761. ccdc->input = CCDC_INPUT_PARALLEL;
  1762. break;
  1763. /*
  1764. * The ISP core doesn't support pipelines with multiple video outputs.
  1765. * Revisit this when it will be implemented, and return -EBUSY for now.
  1766. */
  1767. case CCDC_PAD_SOURCE_VP | MEDIA_ENT_T_V4L2_SUBDEV:
  1768. /* Write to preview engine, histogram and H3A. When none of
  1769. * those links are active, the video port can be disabled.
  1770. */
  1771. if (flags & MEDIA_LNK_FL_ENABLED) {
  1772. if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
  1773. return -EBUSY;
  1774. ccdc->output |= CCDC_OUTPUT_PREVIEW;
  1775. } else {
  1776. ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
  1777. }
  1778. break;
  1779. case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_DEVNODE:
  1780. /* Write to memory */
  1781. if (flags & MEDIA_LNK_FL_ENABLED) {
  1782. if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
  1783. return -EBUSY;
  1784. ccdc->output |= CCDC_OUTPUT_MEMORY;
  1785. } else {
  1786. ccdc->output &= ~CCDC_OUTPUT_MEMORY;
  1787. }
  1788. break;
  1789. case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_V4L2_SUBDEV:
  1790. /* Write to resizer */
  1791. if (flags & MEDIA_LNK_FL_ENABLED) {
  1792. if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
  1793. return -EBUSY;
  1794. ccdc->output |= CCDC_OUTPUT_RESIZER;
  1795. } else {
  1796. ccdc->output &= ~CCDC_OUTPUT_RESIZER;
  1797. }
  1798. break;
  1799. default:
  1800. return -EINVAL;
  1801. }
  1802. return 0;
  1803. }
  1804. /* media operations */
  1805. static const struct media_entity_operations ccdc_media_ops = {
  1806. .link_setup = ccdc_link_setup,
  1807. };
  1808. /*
  1809. * ccdc_init_entities - Initialize V4L2 subdev and media entity
  1810. * @ccdc: ISP CCDC module
  1811. *
  1812. * Return 0 on success and a negative error code on failure.
  1813. */
  1814. static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
  1815. {
  1816. struct v4l2_subdev *sd = &ccdc->subdev;
  1817. struct media_pad *pads = ccdc->pads;
  1818. struct media_entity *me = &sd->entity;
  1819. int ret;
  1820. ccdc->input = CCDC_INPUT_NONE;
  1821. v4l2_subdev_init(sd, &ccdc_v4l2_ops);
  1822. sd->internal_ops = &ccdc_v4l2_internal_ops;
  1823. strlcpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
  1824. sd->grp_id = 1 << 16; /* group ID for isp subdevs */
  1825. v4l2_set_subdevdata(sd, ccdc);
  1826. sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
  1827. pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1828. pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
  1829. pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
  1830. me->ops = &ccdc_media_ops;
  1831. ret = media_entity_init(me, CCDC_PADS_NUM, pads, 0);
  1832. if (ret < 0)
  1833. return ret;
  1834. ccdc_init_formats(sd, NULL);
  1835. ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  1836. ccdc->video_out.ops = &ccdc_video_ops;
  1837. ccdc->video_out.isp = to_isp_device(ccdc);
  1838. ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
  1839. ccdc->video_out.bpl_alignment = 32;
  1840. ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
  1841. if (ret < 0)
  1842. return ret;
  1843. /* Connect the CCDC subdev to the video node. */
  1844. ret = media_entity_create_link(&ccdc->subdev.entity, CCDC_PAD_SOURCE_OF,
  1845. &ccdc->video_out.video.entity, 0, 0);
  1846. if (ret < 0)
  1847. return ret;
  1848. return 0;
  1849. }
  1850. void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
  1851. {
  1852. media_entity_cleanup(&ccdc->subdev.entity);
  1853. v4l2_device_unregister_subdev(&ccdc->subdev);
  1854. omap3isp_video_unregister(&ccdc->video_out);
  1855. }
  1856. int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
  1857. struct v4l2_device *vdev)
  1858. {
  1859. int ret;
  1860. /* Register the subdev and video node. */
  1861. ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
  1862. if (ret < 0)
  1863. goto error;
  1864. ret = omap3isp_video_register(&ccdc->video_out, vdev);
  1865. if (ret < 0)
  1866. goto error;
  1867. return 0;
  1868. error:
  1869. omap3isp_ccdc_unregister_entities(ccdc);
  1870. return ret;
  1871. }
  1872. /* -----------------------------------------------------------------------------
  1873. * ISP CCDC initialisation and cleanup
  1874. */
  1875. /*
  1876. * omap3isp_ccdc_init - CCDC module initialization.
  1877. * @dev: Device pointer specific to the OMAP3 ISP.
  1878. *
  1879. * TODO: Get the initialisation values from platform data.
  1880. *
  1881. * Return 0 on success or a negative error code otherwise.
  1882. */
  1883. int omap3isp_ccdc_init(struct isp_device *isp)
  1884. {
  1885. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  1886. spin_lock_init(&ccdc->lock);
  1887. init_waitqueue_head(&ccdc->wait);
  1888. mutex_init(&ccdc->ioctl_lock);
  1889. ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
  1890. INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
  1891. ccdc->lsc.state = LSC_STATE_STOPPED;
  1892. INIT_LIST_HEAD(&ccdc->lsc.free_queue);
  1893. spin_lock_init(&ccdc->lsc.req_lock);
  1894. ccdc->syncif.ccdc_mastermode = 0;
  1895. ccdc->syncif.datapol = 0;
  1896. ccdc->syncif.datsz = 0;
  1897. ccdc->syncif.fldmode = 0;
  1898. ccdc->syncif.fldout = 0;
  1899. ccdc->syncif.fldpol = 0;
  1900. ccdc->syncif.fldstat = 0;
  1901. ccdc->clamp.oblen = 0;
  1902. ccdc->clamp.dcsubval = 0;
  1903. ccdc->vpcfg.pixelclk = 0;
  1904. ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
  1905. ccdc_apply_controls(ccdc);
  1906. return ccdc_init_entities(ccdc);
  1907. }
  1908. /*
  1909. * omap3isp_ccdc_cleanup - CCDC module cleanup.
  1910. * @dev: Device pointer specific to the OMAP3 ISP.
  1911. */
  1912. void omap3isp_ccdc_cleanup(struct isp_device *isp)
  1913. {
  1914. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  1915. /* Free LSC requests. As the CCDC is stopped there's no active request,
  1916. * so only the pending request and the free queue need to be handled.
  1917. */
  1918. ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
  1919. cancel_work_sync(&ccdc->lsc.table_work);
  1920. ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
  1921. if (ccdc->fpc.fpcaddr != 0)
  1922. iommu_vfree(isp->iommu, ccdc->fpc.fpcaddr);
  1923. }