tilcdc_drv.h 4.3 KB

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  1. /*
  2. * Copyright (C) 2012 Texas Instruments
  3. * Author: Rob Clark <robdclark@gmail.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #ifndef __TILCDC_DRV_H__
  18. #define __TILCDC_DRV_H__
  19. #include <linux/clk.h>
  20. #include <linux/cpufreq.h>
  21. #include <linux/module.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/pm.h>
  24. #include <linux/pm_runtime.h>
  25. #include <linux/slab.h>
  26. #include <linux/of.h>
  27. #include <linux/of_device.h>
  28. #include <linux/list.h>
  29. #include <drm/drmP.h>
  30. #include <drm/drm_crtc_helper.h>
  31. #include <drm/drm_gem_cma_helper.h>
  32. #include <drm/drm_fb_cma_helper.h>
  33. struct tilcdc_drm_private {
  34. void __iomem *mmio;
  35. struct clk *disp_clk; /* display dpll */
  36. struct clk *clk; /* functional clock */
  37. int rev; /* IP revision */
  38. /* don't attempt resolutions w/ higher W * H * Hz: */
  39. uint32_t max_bandwidth;
  40. /* register contents saved across suspend/resume: */
  41. u32 saved_register[12];
  42. #ifdef CONFIG_CPU_FREQ
  43. struct notifier_block freq_transition;
  44. unsigned int lcd_fck_rate;
  45. #endif
  46. struct workqueue_struct *wq;
  47. struct drm_fbdev_cma *fbdev;
  48. struct drm_crtc *crtc;
  49. unsigned int num_encoders;
  50. struct drm_encoder *encoders[8];
  51. unsigned int num_connectors;
  52. struct drm_connector *connectors[8];
  53. };
  54. /* Sub-module for display. Since we don't know at compile time what panels
  55. * or display adapter(s) might be present (for ex, off chip dvi/tfp410,
  56. * hdmi encoder, various lcd panels), the connector/encoder(s) are split into
  57. * separate drivers. If they are probed and found to be present, they
  58. * register themselves with tilcdc_register_module().
  59. */
  60. struct tilcdc_module;
  61. struct tilcdc_module_ops {
  62. /* create appropriate encoders/connectors: */
  63. int (*modeset_init)(struct tilcdc_module *mod, struct drm_device *dev);
  64. void (*destroy)(struct tilcdc_module *mod);
  65. #ifdef CONFIG_DEBUG_FS
  66. /* create debugfs nodes (can be NULL): */
  67. int (*debugfs_init)(struct tilcdc_module *mod, struct drm_minor *minor);
  68. /* cleanup debugfs nodes (can be NULL): */
  69. void (*debugfs_cleanup)(struct tilcdc_module *mod, struct drm_minor *minor);
  70. #endif
  71. };
  72. struct tilcdc_module {
  73. const char *name;
  74. struct list_head list;
  75. const struct tilcdc_module_ops *funcs;
  76. };
  77. void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
  78. const struct tilcdc_module_ops *funcs);
  79. void tilcdc_module_cleanup(struct tilcdc_module *mod);
  80. /* Panel config that needs to be set in the crtc, but is not coming from
  81. * the mode timings. The display module is expected to call
  82. * tilcdc_crtc_set_panel_info() to set this during modeset.
  83. */
  84. struct tilcdc_panel_info {
  85. /* AC Bias Pin Frequency */
  86. uint32_t ac_bias;
  87. /* AC Bias Pin Transitions per Interrupt */
  88. uint32_t ac_bias_intrpt;
  89. /* DMA burst size */
  90. uint32_t dma_burst_sz;
  91. /* Bits per pixel */
  92. uint32_t bpp;
  93. /* FIFO DMA Request Delay */
  94. uint32_t fdd;
  95. /* TFT Alternative Signal Mapping (Only for active) */
  96. bool tft_alt_mode;
  97. /* Invert pixel clock */
  98. bool invert_pxl_clk;
  99. /* Horizontal and Vertical Sync Edge: 0=rising 1=falling */
  100. uint32_t sync_edge;
  101. /* Horizontal and Vertical Sync: Control: 0=ignore */
  102. uint32_t sync_ctrl;
  103. /* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */
  104. uint32_t raster_order;
  105. /* DMA FIFO threshold */
  106. uint32_t fifo_th;
  107. };
  108. #define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
  109. struct drm_crtc *tilcdc_crtc_create(struct drm_device *dev);
  110. void tilcdc_crtc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file);
  111. irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc);
  112. void tilcdc_crtc_update_clk(struct drm_crtc *crtc);
  113. void tilcdc_crtc_set_panel_info(struct drm_crtc *crtc,
  114. const struct tilcdc_panel_info *info);
  115. int tilcdc_crtc_mode_valid(struct drm_crtc *crtc, struct drm_display_mode *mode);
  116. int tilcdc_crtc_max_width(struct drm_crtc *crtc);
  117. #endif /* __TILCDC_DRV_H__ */