mpt2sas_base.c 130 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2010 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/kernel.h>
  43. #include <linux/module.h>
  44. #include <linux/errno.h>
  45. #include <linux/init.h>
  46. #include <linux/slab.h>
  47. #include <linux/types.h>
  48. #include <linux/pci.h>
  49. #include <linux/kdev_t.h>
  50. #include <linux/blkdev.h>
  51. #include <linux/delay.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/dma-mapping.h>
  54. #include <linux/sort.h>
  55. #include <linux/io.h>
  56. #include <linux/time.h>
  57. #include <linux/kthread.h>
  58. #include <linux/aer.h>
  59. #include "mpt2sas_base.h"
  60. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  61. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  62. #define MAX_HBA_QUEUE_DEPTH 30000
  63. #define MAX_CHAIN_DEPTH 100000
  64. static int max_queue_depth = -1;
  65. module_param(max_queue_depth, int, 0);
  66. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  67. static int max_sgl_entries = -1;
  68. module_param(max_sgl_entries, int, 0);
  69. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  70. static int msix_disable = -1;
  71. module_param(msix_disable, int, 0);
  72. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  73. static int missing_delay[2] = {-1, -1};
  74. module_param_array(missing_delay, int, NULL, 0);
  75. MODULE_PARM_DESC(missing_delay, " device missing delay , io missing delay");
  76. static int mpt2sas_fwfault_debug;
  77. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  78. "and halt firmware - (default=0)");
  79. static int disable_discovery = -1;
  80. module_param(disable_discovery, int, 0);
  81. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  82. /**
  83. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  84. *
  85. */
  86. static int
  87. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  88. {
  89. int ret = param_set_int(val, kp);
  90. struct MPT2SAS_ADAPTER *ioc;
  91. if (ret)
  92. return ret;
  93. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  94. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  95. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  96. return 0;
  97. }
  98. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  99. param_get_int, &mpt2sas_fwfault_debug, 0644);
  100. /**
  101. * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc
  102. * @arg: input argument, used to derive ioc
  103. *
  104. * Return 0 if controller is removed from pci subsystem.
  105. * Return -1 for other case.
  106. */
  107. static int mpt2sas_remove_dead_ioc_func(void *arg)
  108. {
  109. struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg;
  110. struct pci_dev *pdev;
  111. if ((ioc == NULL))
  112. return -1;
  113. pdev = ioc->pdev;
  114. if ((pdev == NULL))
  115. return -1;
  116. pci_remove_bus_device(pdev);
  117. return 0;
  118. }
  119. /**
  120. * _base_fault_reset_work - workq handling ioc fault conditions
  121. * @work: input argument, used to derive ioc
  122. * Context: sleep.
  123. *
  124. * Return nothing.
  125. */
  126. static void
  127. _base_fault_reset_work(struct work_struct *work)
  128. {
  129. struct MPT2SAS_ADAPTER *ioc =
  130. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  131. unsigned long flags;
  132. u32 doorbell;
  133. int rc;
  134. struct task_struct *p;
  135. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  136. if (ioc->shost_recovery)
  137. goto rearm_timer;
  138. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  139. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  140. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
  141. printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n",
  142. ioc->name, __func__);
  143. /*
  144. * Call _scsih_flush_pending_cmds callback so that we flush all
  145. * pending commands back to OS. This call is required to aovid
  146. * deadlock at block layer. Dead IOC will fail to do diag reset,
  147. * and this call is safe since dead ioc will never return any
  148. * command back from HW.
  149. */
  150. ioc->schedule_dead_ioc_flush_running_cmds(ioc);
  151. /*
  152. * Set remove_host flag early since kernel thread will
  153. * take some time to execute.
  154. */
  155. ioc->remove_host = 1;
  156. /*Remove the Dead Host */
  157. p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc,
  158. "mpt2sas_dead_ioc_%d", ioc->id);
  159. if (IS_ERR(p)) {
  160. printk(MPT2SAS_ERR_FMT
  161. "%s: Running mpt2sas_dead_ioc thread failed !!!!\n",
  162. ioc->name, __func__);
  163. } else {
  164. printk(MPT2SAS_ERR_FMT
  165. "%s: Running mpt2sas_dead_ioc thread success !!!!\n",
  166. ioc->name, __func__);
  167. }
  168. return; /* don't rearm timer */
  169. }
  170. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  171. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  172. FORCE_BIG_HAMMER);
  173. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  174. __func__, (rc == 0) ? "success" : "failed");
  175. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  176. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  177. mpt2sas_base_fault_info(ioc, doorbell &
  178. MPI2_DOORBELL_DATA_MASK);
  179. }
  180. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  181. rearm_timer:
  182. if (ioc->fault_reset_work_q)
  183. queue_delayed_work(ioc->fault_reset_work_q,
  184. &ioc->fault_reset_work,
  185. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  186. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  187. }
  188. /**
  189. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  190. * @ioc: per adapter object
  191. * Context: sleep.
  192. *
  193. * Return nothing.
  194. */
  195. void
  196. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  197. {
  198. unsigned long flags;
  199. if (ioc->fault_reset_work_q)
  200. return;
  201. /* initialize fault polling */
  202. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  203. snprintf(ioc->fault_reset_work_q_name,
  204. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  205. ioc->fault_reset_work_q =
  206. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  207. if (!ioc->fault_reset_work_q) {
  208. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  209. ioc->name, __func__, __LINE__);
  210. return;
  211. }
  212. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  213. if (ioc->fault_reset_work_q)
  214. queue_delayed_work(ioc->fault_reset_work_q,
  215. &ioc->fault_reset_work,
  216. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  217. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  218. }
  219. /**
  220. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  221. * @ioc: per adapter object
  222. * Context: sleep.
  223. *
  224. * Return nothing.
  225. */
  226. void
  227. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  228. {
  229. unsigned long flags;
  230. struct workqueue_struct *wq;
  231. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  232. wq = ioc->fault_reset_work_q;
  233. ioc->fault_reset_work_q = NULL;
  234. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  235. if (wq) {
  236. if (!cancel_delayed_work(&ioc->fault_reset_work))
  237. flush_workqueue(wq);
  238. destroy_workqueue(wq);
  239. }
  240. }
  241. /**
  242. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  243. * @ioc: per adapter object
  244. * @fault_code: fault code
  245. *
  246. * Return nothing.
  247. */
  248. void
  249. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  250. {
  251. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  252. ioc->name, fault_code);
  253. }
  254. /**
  255. * mpt2sas_halt_firmware - halt's mpt controller firmware
  256. * @ioc: per adapter object
  257. *
  258. * For debugging timeout related issues. Writing 0xCOFFEE00
  259. * to the doorbell register will halt controller firmware. With
  260. * the purpose to stop both driver and firmware, the enduser can
  261. * obtain a ring buffer from controller UART.
  262. */
  263. void
  264. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  265. {
  266. u32 doorbell;
  267. if (!ioc->fwfault_debug)
  268. return;
  269. dump_stack();
  270. doorbell = readl(&ioc->chip->Doorbell);
  271. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  272. mpt2sas_base_fault_info(ioc , doorbell);
  273. else {
  274. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  275. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  276. "timeout\n", ioc->name);
  277. }
  278. panic("panic in %s\n", __func__);
  279. }
  280. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  281. /**
  282. * _base_sas_ioc_info - verbose translation of the ioc status
  283. * @ioc: per adapter object
  284. * @mpi_reply: reply mf payload returned from firmware
  285. * @request_hdr: request mf
  286. *
  287. * Return nothing.
  288. */
  289. static void
  290. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  291. MPI2RequestHeader_t *request_hdr)
  292. {
  293. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  294. MPI2_IOCSTATUS_MASK;
  295. char *desc = NULL;
  296. u16 frame_sz;
  297. char *func_str = NULL;
  298. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  299. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  300. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  301. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  302. return;
  303. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  304. return;
  305. switch (ioc_status) {
  306. /****************************************************************************
  307. * Common IOCStatus values for all replies
  308. ****************************************************************************/
  309. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  310. desc = "invalid function";
  311. break;
  312. case MPI2_IOCSTATUS_BUSY:
  313. desc = "busy";
  314. break;
  315. case MPI2_IOCSTATUS_INVALID_SGL:
  316. desc = "invalid sgl";
  317. break;
  318. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  319. desc = "internal error";
  320. break;
  321. case MPI2_IOCSTATUS_INVALID_VPID:
  322. desc = "invalid vpid";
  323. break;
  324. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  325. desc = "insufficient resources";
  326. break;
  327. case MPI2_IOCSTATUS_INVALID_FIELD:
  328. desc = "invalid field";
  329. break;
  330. case MPI2_IOCSTATUS_INVALID_STATE:
  331. desc = "invalid state";
  332. break;
  333. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  334. desc = "op state not supported";
  335. break;
  336. /****************************************************************************
  337. * Config IOCStatus values
  338. ****************************************************************************/
  339. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  340. desc = "config invalid action";
  341. break;
  342. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  343. desc = "config invalid type";
  344. break;
  345. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  346. desc = "config invalid page";
  347. break;
  348. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  349. desc = "config invalid data";
  350. break;
  351. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  352. desc = "config no defaults";
  353. break;
  354. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  355. desc = "config cant commit";
  356. break;
  357. /****************************************************************************
  358. * SCSI IO Reply
  359. ****************************************************************************/
  360. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  361. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  362. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  363. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  364. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  365. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  366. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  367. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  368. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  369. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  370. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  371. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  372. break;
  373. /****************************************************************************
  374. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  375. ****************************************************************************/
  376. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  377. desc = "eedp guard error";
  378. break;
  379. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  380. desc = "eedp ref tag error";
  381. break;
  382. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  383. desc = "eedp app tag error";
  384. break;
  385. /****************************************************************************
  386. * SCSI Target values
  387. ****************************************************************************/
  388. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  389. desc = "target invalid io index";
  390. break;
  391. case MPI2_IOCSTATUS_TARGET_ABORTED:
  392. desc = "target aborted";
  393. break;
  394. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  395. desc = "target no conn retryable";
  396. break;
  397. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  398. desc = "target no connection";
  399. break;
  400. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  401. desc = "target xfer count mismatch";
  402. break;
  403. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  404. desc = "target data offset error";
  405. break;
  406. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  407. desc = "target too much write data";
  408. break;
  409. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  410. desc = "target iu too short";
  411. break;
  412. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  413. desc = "target ack nak timeout";
  414. break;
  415. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  416. desc = "target nak received";
  417. break;
  418. /****************************************************************************
  419. * Serial Attached SCSI values
  420. ****************************************************************************/
  421. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  422. desc = "smp request failed";
  423. break;
  424. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  425. desc = "smp data overrun";
  426. break;
  427. /****************************************************************************
  428. * Diagnostic Buffer Post / Diagnostic Release values
  429. ****************************************************************************/
  430. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  431. desc = "diagnostic released";
  432. break;
  433. default:
  434. break;
  435. }
  436. if (!desc)
  437. return;
  438. switch (request_hdr->Function) {
  439. case MPI2_FUNCTION_CONFIG:
  440. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  441. func_str = "config_page";
  442. break;
  443. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  444. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  445. func_str = "task_mgmt";
  446. break;
  447. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  448. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  449. func_str = "sas_iounit_ctl";
  450. break;
  451. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  452. frame_sz = sizeof(Mpi2SepRequest_t);
  453. func_str = "enclosure";
  454. break;
  455. case MPI2_FUNCTION_IOC_INIT:
  456. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  457. func_str = "ioc_init";
  458. break;
  459. case MPI2_FUNCTION_PORT_ENABLE:
  460. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  461. func_str = "port_enable";
  462. break;
  463. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  464. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  465. func_str = "smp_passthru";
  466. break;
  467. default:
  468. frame_sz = 32;
  469. func_str = "unknown";
  470. break;
  471. }
  472. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  473. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  474. _debug_dump_mf(request_hdr, frame_sz/4);
  475. }
  476. /**
  477. * _base_display_event_data - verbose translation of firmware asyn events
  478. * @ioc: per adapter object
  479. * @mpi_reply: reply mf payload returned from firmware
  480. *
  481. * Return nothing.
  482. */
  483. static void
  484. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  485. Mpi2EventNotificationReply_t *mpi_reply)
  486. {
  487. char *desc = NULL;
  488. u16 event;
  489. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  490. return;
  491. event = le16_to_cpu(mpi_reply->Event);
  492. switch (event) {
  493. case MPI2_EVENT_LOG_DATA:
  494. desc = "Log Data";
  495. break;
  496. case MPI2_EVENT_STATE_CHANGE:
  497. desc = "Status Change";
  498. break;
  499. case MPI2_EVENT_HARD_RESET_RECEIVED:
  500. desc = "Hard Reset Received";
  501. break;
  502. case MPI2_EVENT_EVENT_CHANGE:
  503. desc = "Event Change";
  504. break;
  505. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  506. desc = "Device Status Change";
  507. break;
  508. case MPI2_EVENT_IR_OPERATION_STATUS:
  509. if (!ioc->hide_ir_msg)
  510. desc = "IR Operation Status";
  511. break;
  512. case MPI2_EVENT_SAS_DISCOVERY:
  513. {
  514. Mpi2EventDataSasDiscovery_t *event_data =
  515. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  516. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  517. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  518. "start" : "stop");
  519. if (event_data->DiscoveryStatus)
  520. printk("discovery_status(0x%08x)",
  521. le32_to_cpu(event_data->DiscoveryStatus));
  522. printk("\n");
  523. return;
  524. }
  525. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  526. desc = "SAS Broadcast Primitive";
  527. break;
  528. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  529. desc = "SAS Init Device Status Change";
  530. break;
  531. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  532. desc = "SAS Init Table Overflow";
  533. break;
  534. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  535. desc = "SAS Topology Change List";
  536. break;
  537. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  538. desc = "SAS Enclosure Device Status Change";
  539. break;
  540. case MPI2_EVENT_IR_VOLUME:
  541. if (!ioc->hide_ir_msg)
  542. desc = "IR Volume";
  543. break;
  544. case MPI2_EVENT_IR_PHYSICAL_DISK:
  545. if (!ioc->hide_ir_msg)
  546. desc = "IR Physical Disk";
  547. break;
  548. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  549. if (!ioc->hide_ir_msg)
  550. desc = "IR Configuration Change List";
  551. break;
  552. case MPI2_EVENT_LOG_ENTRY_ADDED:
  553. if (!ioc->hide_ir_msg)
  554. desc = "Log Entry Added";
  555. break;
  556. }
  557. if (!desc)
  558. return;
  559. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  560. }
  561. #endif
  562. /**
  563. * _base_sas_log_info - verbose translation of firmware log info
  564. * @ioc: per adapter object
  565. * @log_info: log info
  566. *
  567. * Return nothing.
  568. */
  569. static void
  570. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  571. {
  572. union loginfo_type {
  573. u32 loginfo;
  574. struct {
  575. u32 subcode:16;
  576. u32 code:8;
  577. u32 originator:4;
  578. u32 bus_type:4;
  579. } dw;
  580. };
  581. union loginfo_type sas_loginfo;
  582. char *originator_str = NULL;
  583. sas_loginfo.loginfo = log_info;
  584. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  585. return;
  586. /* each nexus loss loginfo */
  587. if (log_info == 0x31170000)
  588. return;
  589. /* eat the loginfos associated with task aborts */
  590. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  591. 0x31140000 || log_info == 0x31130000))
  592. return;
  593. switch (sas_loginfo.dw.originator) {
  594. case 0:
  595. originator_str = "IOP";
  596. break;
  597. case 1:
  598. originator_str = "PL";
  599. break;
  600. case 2:
  601. if (!ioc->hide_ir_msg)
  602. originator_str = "IR";
  603. else
  604. originator_str = "WarpDrive";
  605. break;
  606. }
  607. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  608. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  609. originator_str, sas_loginfo.dw.code,
  610. sas_loginfo.dw.subcode);
  611. }
  612. /**
  613. * _base_display_reply_info -
  614. * @ioc: per adapter object
  615. * @smid: system request message index
  616. * @msix_index: MSIX table index supplied by the OS
  617. * @reply: reply message frame(lower 32bit addr)
  618. *
  619. * Return nothing.
  620. */
  621. static void
  622. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  623. u32 reply)
  624. {
  625. MPI2DefaultReply_t *mpi_reply;
  626. u16 ioc_status;
  627. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  628. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  629. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  630. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  631. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  632. _base_sas_ioc_info(ioc , mpi_reply,
  633. mpt2sas_base_get_msg_frame(ioc, smid));
  634. }
  635. #endif
  636. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  637. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  638. }
  639. /**
  640. * mpt2sas_base_done - base internal command completion routine
  641. * @ioc: per adapter object
  642. * @smid: system request message index
  643. * @msix_index: MSIX table index supplied by the OS
  644. * @reply: reply message frame(lower 32bit addr)
  645. *
  646. * Return 1 meaning mf should be freed from _base_interrupt
  647. * 0 means the mf is freed from this function.
  648. */
  649. u8
  650. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  651. u32 reply)
  652. {
  653. MPI2DefaultReply_t *mpi_reply;
  654. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  655. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  656. return 1;
  657. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  658. return 1;
  659. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  660. if (mpi_reply) {
  661. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  662. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  663. }
  664. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  665. complete(&ioc->base_cmds.done);
  666. return 1;
  667. }
  668. /**
  669. * _base_async_event - main callback handler for firmware asyn events
  670. * @ioc: per adapter object
  671. * @msix_index: MSIX table index supplied by the OS
  672. * @reply: reply message frame(lower 32bit addr)
  673. *
  674. * Return 1 meaning mf should be freed from _base_interrupt
  675. * 0 means the mf is freed from this function.
  676. */
  677. static u8
  678. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  679. {
  680. Mpi2EventNotificationReply_t *mpi_reply;
  681. Mpi2EventAckRequest_t *ack_request;
  682. u16 smid;
  683. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  684. if (!mpi_reply)
  685. return 1;
  686. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  687. return 1;
  688. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  689. _base_display_event_data(ioc, mpi_reply);
  690. #endif
  691. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  692. goto out;
  693. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  694. if (!smid) {
  695. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  696. ioc->name, __func__);
  697. goto out;
  698. }
  699. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  700. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  701. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  702. ack_request->Event = mpi_reply->Event;
  703. ack_request->EventContext = mpi_reply->EventContext;
  704. ack_request->VF_ID = 0; /* TODO */
  705. ack_request->VP_ID = 0;
  706. mpt2sas_base_put_smid_default(ioc, smid);
  707. out:
  708. /* scsih callback handler */
  709. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  710. /* ctl callback handler */
  711. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  712. return 1;
  713. }
  714. /**
  715. * _base_get_cb_idx - obtain the callback index
  716. * @ioc: per adapter object
  717. * @smid: system request message index
  718. *
  719. * Return callback index.
  720. */
  721. static u8
  722. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  723. {
  724. int i;
  725. u8 cb_idx;
  726. if (smid < ioc->hi_priority_smid) {
  727. i = smid - 1;
  728. cb_idx = ioc->scsi_lookup[i].cb_idx;
  729. } else if (smid < ioc->internal_smid) {
  730. i = smid - ioc->hi_priority_smid;
  731. cb_idx = ioc->hpr_lookup[i].cb_idx;
  732. } else if (smid <= ioc->hba_queue_depth) {
  733. i = smid - ioc->internal_smid;
  734. cb_idx = ioc->internal_lookup[i].cb_idx;
  735. } else
  736. cb_idx = 0xFF;
  737. return cb_idx;
  738. }
  739. /**
  740. * _base_mask_interrupts - disable interrupts
  741. * @ioc: per adapter object
  742. *
  743. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  744. *
  745. * Return nothing.
  746. */
  747. static void
  748. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  749. {
  750. u32 him_register;
  751. ioc->mask_interrupts = 1;
  752. him_register = readl(&ioc->chip->HostInterruptMask);
  753. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  754. writel(him_register, &ioc->chip->HostInterruptMask);
  755. readl(&ioc->chip->HostInterruptMask);
  756. }
  757. /**
  758. * _base_unmask_interrupts - enable interrupts
  759. * @ioc: per adapter object
  760. *
  761. * Enabling only Reply Interrupts
  762. *
  763. * Return nothing.
  764. */
  765. static void
  766. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  767. {
  768. u32 him_register;
  769. him_register = readl(&ioc->chip->HostInterruptMask);
  770. him_register &= ~MPI2_HIM_RIM;
  771. writel(him_register, &ioc->chip->HostInterruptMask);
  772. ioc->mask_interrupts = 0;
  773. }
  774. union reply_descriptor {
  775. u64 word;
  776. struct {
  777. u32 low;
  778. u32 high;
  779. } u;
  780. };
  781. /**
  782. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  783. * @irq: irq number (not used)
  784. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  785. * @r: pt_regs pointer (not used)
  786. *
  787. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  788. */
  789. static irqreturn_t
  790. _base_interrupt(int irq, void *bus_id)
  791. {
  792. struct adapter_reply_queue *reply_q = bus_id;
  793. union reply_descriptor rd;
  794. u32 completed_cmds;
  795. u8 request_desript_type;
  796. u16 smid;
  797. u8 cb_idx;
  798. u32 reply;
  799. u8 msix_index = reply_q->msix_index;
  800. struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
  801. Mpi2ReplyDescriptorsUnion_t *rpf;
  802. u8 rc;
  803. if (ioc->mask_interrupts)
  804. return IRQ_NONE;
  805. if (!atomic_add_unless(&reply_q->busy, 1, 1))
  806. return IRQ_NONE;
  807. rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
  808. request_desript_type = rpf->Default.ReplyFlags
  809. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  810. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
  811. atomic_dec(&reply_q->busy);
  812. return IRQ_NONE;
  813. }
  814. completed_cmds = 0;
  815. cb_idx = 0xFF;
  816. do {
  817. rd.word = le64_to_cpu(rpf->Words);
  818. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  819. goto out;
  820. reply = 0;
  821. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  822. if (request_desript_type ==
  823. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  824. reply = le32_to_cpu
  825. (rpf->AddressReply.ReplyFrameAddress);
  826. if (reply > ioc->reply_dma_max_address ||
  827. reply < ioc->reply_dma_min_address)
  828. reply = 0;
  829. } else if (request_desript_type ==
  830. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  831. goto next;
  832. else if (request_desript_type ==
  833. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  834. goto next;
  835. if (smid)
  836. cb_idx = _base_get_cb_idx(ioc, smid);
  837. if (smid && cb_idx != 0xFF) {
  838. rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
  839. reply);
  840. if (reply)
  841. _base_display_reply_info(ioc, smid, msix_index,
  842. reply);
  843. if (rc)
  844. mpt2sas_base_free_smid(ioc, smid);
  845. }
  846. if (!smid)
  847. _base_async_event(ioc, msix_index, reply);
  848. /* reply free queue handling */
  849. if (reply) {
  850. ioc->reply_free_host_index =
  851. (ioc->reply_free_host_index ==
  852. (ioc->reply_free_queue_depth - 1)) ?
  853. 0 : ioc->reply_free_host_index + 1;
  854. ioc->reply_free[ioc->reply_free_host_index] =
  855. cpu_to_le32(reply);
  856. wmb();
  857. writel(ioc->reply_free_host_index,
  858. &ioc->chip->ReplyFreeHostIndex);
  859. }
  860. next:
  861. rpf->Words = cpu_to_le64(ULLONG_MAX);
  862. reply_q->reply_post_host_index =
  863. (reply_q->reply_post_host_index ==
  864. (ioc->reply_post_queue_depth - 1)) ? 0 :
  865. reply_q->reply_post_host_index + 1;
  866. request_desript_type =
  867. reply_q->reply_post_free[reply_q->reply_post_host_index].
  868. Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  869. completed_cmds++;
  870. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  871. goto out;
  872. if (!reply_q->reply_post_host_index)
  873. rpf = reply_q->reply_post_free;
  874. else
  875. rpf++;
  876. } while (1);
  877. out:
  878. if (!completed_cmds) {
  879. atomic_dec(&reply_q->busy);
  880. return IRQ_NONE;
  881. }
  882. wmb();
  883. if (ioc->is_warpdrive) {
  884. writel(reply_q->reply_post_host_index,
  885. ioc->reply_post_host_index[msix_index]);
  886. atomic_dec(&reply_q->busy);
  887. return IRQ_HANDLED;
  888. }
  889. writel(reply_q->reply_post_host_index | (msix_index <<
  890. MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
  891. atomic_dec(&reply_q->busy);
  892. return IRQ_HANDLED;
  893. }
  894. /**
  895. * _base_is_controller_msix_enabled - is controller support muli-reply queues
  896. * @ioc: per adapter object
  897. *
  898. */
  899. static inline int
  900. _base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
  901. {
  902. return (ioc->facts.IOCCapabilities &
  903. MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
  904. }
  905. /**
  906. * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
  907. * @ioc: per adapter object
  908. * Context: ISR conext
  909. *
  910. * Called when a Task Management request has completed. We want
  911. * to flush the other reply queues so all the outstanding IO has been
  912. * completed back to OS before we process the TM completetion.
  913. *
  914. * Return nothing.
  915. */
  916. void
  917. mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  918. {
  919. struct adapter_reply_queue *reply_q;
  920. /* If MSIX capability is turned off
  921. * then multi-queues are not enabled
  922. */
  923. if (!_base_is_controller_msix_enabled(ioc))
  924. return;
  925. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  926. if (ioc->shost_recovery)
  927. return;
  928. /* TMs are on msix_index == 0 */
  929. if (reply_q->msix_index == 0)
  930. continue;
  931. _base_interrupt(reply_q->vector, (void *)reply_q);
  932. }
  933. }
  934. /**
  935. * mpt2sas_base_release_callback_handler - clear interrupt callback handler
  936. * @cb_idx: callback index
  937. *
  938. * Return nothing.
  939. */
  940. void
  941. mpt2sas_base_release_callback_handler(u8 cb_idx)
  942. {
  943. mpt_callbacks[cb_idx] = NULL;
  944. }
  945. /**
  946. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  947. * @cb_func: callback function
  948. *
  949. * Returns cb_func.
  950. */
  951. u8
  952. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  953. {
  954. u8 cb_idx;
  955. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  956. if (mpt_callbacks[cb_idx] == NULL)
  957. break;
  958. mpt_callbacks[cb_idx] = cb_func;
  959. return cb_idx;
  960. }
  961. /**
  962. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  963. *
  964. * Return nothing.
  965. */
  966. void
  967. mpt2sas_base_initialize_callback_handler(void)
  968. {
  969. u8 cb_idx;
  970. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  971. mpt2sas_base_release_callback_handler(cb_idx);
  972. }
  973. /**
  974. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  975. * @ioc: per adapter object
  976. * @paddr: virtual address for SGE
  977. *
  978. * Create a zero length scatter gather entry to insure the IOCs hardware has
  979. * something to use if the target device goes brain dead and tries
  980. * to send data even when none is asked for.
  981. *
  982. * Return nothing.
  983. */
  984. void
  985. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  986. {
  987. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  988. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  989. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  990. MPI2_SGE_FLAGS_SHIFT);
  991. ioc->base_add_sg_single(paddr, flags_length, -1);
  992. }
  993. /**
  994. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  995. * @paddr: virtual address for SGE
  996. * @flags_length: SGE flags and data transfer length
  997. * @dma_addr: Physical address
  998. *
  999. * Return nothing.
  1000. */
  1001. static void
  1002. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1003. {
  1004. Mpi2SGESimple32_t *sgel = paddr;
  1005. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  1006. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1007. sgel->FlagsLength = cpu_to_le32(flags_length);
  1008. sgel->Address = cpu_to_le32(dma_addr);
  1009. }
  1010. /**
  1011. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  1012. * @paddr: virtual address for SGE
  1013. * @flags_length: SGE flags and data transfer length
  1014. * @dma_addr: Physical address
  1015. *
  1016. * Return nothing.
  1017. */
  1018. static void
  1019. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1020. {
  1021. Mpi2SGESimple64_t *sgel = paddr;
  1022. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  1023. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1024. sgel->FlagsLength = cpu_to_le32(flags_length);
  1025. sgel->Address = cpu_to_le64(dma_addr);
  1026. }
  1027. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  1028. /**
  1029. * _base_config_dma_addressing - set dma addressing
  1030. * @ioc: per adapter object
  1031. * @pdev: PCI device struct
  1032. *
  1033. * Returns 0 for success, non-zero for failure.
  1034. */
  1035. static int
  1036. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  1037. {
  1038. struct sysinfo s;
  1039. char *desc = NULL;
  1040. if (sizeof(dma_addr_t) > 4) {
  1041. const uint64_t required_mask =
  1042. dma_get_required_mask(&pdev->dev);
  1043. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  1044. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  1045. DMA_BIT_MASK(64))) {
  1046. ioc->base_add_sg_single = &_base_add_sg_single_64;
  1047. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  1048. desc = "64";
  1049. goto out;
  1050. }
  1051. }
  1052. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  1053. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  1054. ioc->base_add_sg_single = &_base_add_sg_single_32;
  1055. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  1056. desc = "32";
  1057. } else
  1058. return -ENODEV;
  1059. out:
  1060. si_meminfo(&s);
  1061. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  1062. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  1063. return 0;
  1064. }
  1065. /**
  1066. * _base_check_enable_msix - checks MSIX capabable.
  1067. * @ioc: per adapter object
  1068. *
  1069. * Check to see if card is capable of MSIX, and set number
  1070. * of available msix vectors
  1071. */
  1072. static int
  1073. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1074. {
  1075. int base;
  1076. u16 message_control;
  1077. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1078. if (!base) {
  1079. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1080. "supported\n", ioc->name));
  1081. return -EINVAL;
  1082. }
  1083. /* get msix vector count */
  1084. /* NUMA_IO not supported for older controllers */
  1085. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
  1086. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
  1087. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
  1088. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
  1089. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
  1090. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
  1091. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
  1092. ioc->msix_vector_count = 1;
  1093. else {
  1094. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1095. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1096. }
  1097. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1098. "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
  1099. return 0;
  1100. }
  1101. /**
  1102. * _base_free_irq - free irq
  1103. * @ioc: per adapter object
  1104. *
  1105. * Freeing respective reply_queue from the list.
  1106. */
  1107. static void
  1108. _base_free_irq(struct MPT2SAS_ADAPTER *ioc)
  1109. {
  1110. struct adapter_reply_queue *reply_q, *next;
  1111. if (list_empty(&ioc->reply_queue_list))
  1112. return;
  1113. list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
  1114. list_del(&reply_q->list);
  1115. synchronize_irq(reply_q->vector);
  1116. free_irq(reply_q->vector, reply_q);
  1117. kfree(reply_q);
  1118. }
  1119. }
  1120. /**
  1121. * _base_request_irq - request irq
  1122. * @ioc: per adapter object
  1123. * @index: msix index into vector table
  1124. * @vector: irq vector
  1125. *
  1126. * Inserting respective reply_queue into the list.
  1127. */
  1128. static int
  1129. _base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
  1130. {
  1131. struct adapter_reply_queue *reply_q;
  1132. int r;
  1133. reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
  1134. if (!reply_q) {
  1135. printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
  1136. ioc->name, (int)sizeof(struct adapter_reply_queue));
  1137. return -ENOMEM;
  1138. }
  1139. reply_q->ioc = ioc;
  1140. reply_q->msix_index = index;
  1141. reply_q->vector = vector;
  1142. atomic_set(&reply_q->busy, 0);
  1143. if (ioc->msix_enable)
  1144. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
  1145. MPT2SAS_DRIVER_NAME, ioc->id, index);
  1146. else
  1147. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
  1148. MPT2SAS_DRIVER_NAME, ioc->id);
  1149. r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
  1150. reply_q);
  1151. if (r) {
  1152. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1153. reply_q->name, vector);
  1154. kfree(reply_q);
  1155. return -EBUSY;
  1156. }
  1157. INIT_LIST_HEAD(&reply_q->list);
  1158. list_add_tail(&reply_q->list, &ioc->reply_queue_list);
  1159. return 0;
  1160. }
  1161. /**
  1162. * _base_assign_reply_queues - assigning msix index for each cpu
  1163. * @ioc: per adapter object
  1164. *
  1165. * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
  1166. *
  1167. * It would nice if we could call irq_set_affinity, however it is not
  1168. * an exported symbol
  1169. */
  1170. static void
  1171. _base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  1172. {
  1173. struct adapter_reply_queue *reply_q;
  1174. int cpu_id;
  1175. int cpu_grouping, loop, grouping, grouping_mod;
  1176. if (!_base_is_controller_msix_enabled(ioc))
  1177. return;
  1178. memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
  1179. /* when there are more cpus than available msix vectors,
  1180. * then group cpus togeather on same irq
  1181. */
  1182. if (ioc->cpu_count > ioc->msix_vector_count) {
  1183. grouping = ioc->cpu_count / ioc->msix_vector_count;
  1184. grouping_mod = ioc->cpu_count % ioc->msix_vector_count;
  1185. if (grouping < 2 || (grouping == 2 && !grouping_mod))
  1186. cpu_grouping = 2;
  1187. else if (grouping < 4 || (grouping == 4 && !grouping_mod))
  1188. cpu_grouping = 4;
  1189. else if (grouping < 8 || (grouping == 8 && !grouping_mod))
  1190. cpu_grouping = 8;
  1191. else
  1192. cpu_grouping = 16;
  1193. } else
  1194. cpu_grouping = 0;
  1195. loop = 0;
  1196. reply_q = list_entry(ioc->reply_queue_list.next,
  1197. struct adapter_reply_queue, list);
  1198. for_each_online_cpu(cpu_id) {
  1199. if (!cpu_grouping) {
  1200. ioc->cpu_msix_table[cpu_id] = reply_q->msix_index;
  1201. reply_q = list_entry(reply_q->list.next,
  1202. struct adapter_reply_queue, list);
  1203. } else {
  1204. if (loop < cpu_grouping) {
  1205. ioc->cpu_msix_table[cpu_id] =
  1206. reply_q->msix_index;
  1207. loop++;
  1208. } else {
  1209. reply_q = list_entry(reply_q->list.next,
  1210. struct adapter_reply_queue, list);
  1211. ioc->cpu_msix_table[cpu_id] =
  1212. reply_q->msix_index;
  1213. loop = 1;
  1214. }
  1215. }
  1216. }
  1217. }
  1218. /**
  1219. * _base_disable_msix - disables msix
  1220. * @ioc: per adapter object
  1221. *
  1222. */
  1223. static void
  1224. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1225. {
  1226. if (ioc->msix_enable) {
  1227. pci_disable_msix(ioc->pdev);
  1228. ioc->msix_enable = 0;
  1229. }
  1230. }
  1231. /**
  1232. * _base_enable_msix - enables msix, failback to io_apic
  1233. * @ioc: per adapter object
  1234. *
  1235. */
  1236. static int
  1237. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1238. {
  1239. struct msix_entry *entries, *a;
  1240. int r;
  1241. int i;
  1242. u8 try_msix = 0;
  1243. INIT_LIST_HEAD(&ioc->reply_queue_list);
  1244. if (msix_disable == -1 || msix_disable == 0)
  1245. try_msix = 1;
  1246. if (!try_msix)
  1247. goto try_ioapic;
  1248. if (_base_check_enable_msix(ioc) != 0)
  1249. goto try_ioapic;
  1250. ioc->reply_queue_count = min_t(int, ioc->cpu_count,
  1251. ioc->msix_vector_count);
  1252. entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
  1253. GFP_KERNEL);
  1254. if (!entries) {
  1255. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
  1256. "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
  1257. __LINE__, __func__));
  1258. goto try_ioapic;
  1259. }
  1260. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
  1261. a->entry = i;
  1262. r = pci_enable_msix(ioc->pdev, entries, ioc->reply_queue_count);
  1263. if (r) {
  1264. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1265. "failed (r=%d) !!!\n", ioc->name, r));
  1266. kfree(entries);
  1267. goto try_ioapic;
  1268. }
  1269. ioc->msix_enable = 1;
  1270. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
  1271. r = _base_request_irq(ioc, i, a->vector);
  1272. if (r) {
  1273. _base_free_irq(ioc);
  1274. _base_disable_msix(ioc);
  1275. kfree(entries);
  1276. goto try_ioapic;
  1277. }
  1278. }
  1279. kfree(entries);
  1280. return 0;
  1281. /* failback to io_apic interrupt routing */
  1282. try_ioapic:
  1283. r = _base_request_irq(ioc, 0, ioc->pdev->irq);
  1284. return r;
  1285. }
  1286. /**
  1287. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1288. * @ioc: per adapter object
  1289. *
  1290. * Returns 0 for success, non-zero for failure.
  1291. */
  1292. int
  1293. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1294. {
  1295. struct pci_dev *pdev = ioc->pdev;
  1296. u32 memap_sz;
  1297. u32 pio_sz;
  1298. int i, r = 0;
  1299. u64 pio_chip = 0;
  1300. u64 chip_phys = 0;
  1301. struct adapter_reply_queue *reply_q;
  1302. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1303. ioc->name, __func__));
  1304. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1305. if (pci_enable_device_mem(pdev)) {
  1306. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1307. "failed\n", ioc->name);
  1308. return -ENODEV;
  1309. }
  1310. if (pci_request_selected_regions(pdev, ioc->bars,
  1311. MPT2SAS_DRIVER_NAME)) {
  1312. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1313. "failed\n", ioc->name);
  1314. r = -ENODEV;
  1315. goto out_fail;
  1316. }
  1317. /* AER (Advanced Error Reporting) hooks */
  1318. pci_enable_pcie_error_reporting(pdev);
  1319. pci_set_master(pdev);
  1320. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1321. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1322. ioc->name, pci_name(pdev));
  1323. r = -ENODEV;
  1324. goto out_fail;
  1325. }
  1326. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1327. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1328. if (pio_sz)
  1329. continue;
  1330. pio_chip = (u64)pci_resource_start(pdev, i);
  1331. pio_sz = pci_resource_len(pdev, i);
  1332. } else {
  1333. if (memap_sz)
  1334. continue;
  1335. /* verify memory resource is valid before using */
  1336. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1337. ioc->chip_phys = pci_resource_start(pdev, i);
  1338. chip_phys = (u64)ioc->chip_phys;
  1339. memap_sz = pci_resource_len(pdev, i);
  1340. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1341. if (ioc->chip == NULL) {
  1342. printk(MPT2SAS_ERR_FMT "unable to map "
  1343. "adapter memory!\n", ioc->name);
  1344. r = -EINVAL;
  1345. goto out_fail;
  1346. }
  1347. }
  1348. }
  1349. }
  1350. _base_mask_interrupts(ioc);
  1351. r = _base_enable_msix(ioc);
  1352. if (r)
  1353. goto out_fail;
  1354. list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
  1355. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1356. reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1357. "IO-APIC enabled"), reply_q->vector);
  1358. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1359. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1360. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1361. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1362. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1363. pci_save_state(pdev);
  1364. return 0;
  1365. out_fail:
  1366. if (ioc->chip_phys)
  1367. iounmap(ioc->chip);
  1368. ioc->chip_phys = 0;
  1369. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1370. pci_disable_pcie_error_reporting(pdev);
  1371. pci_disable_device(pdev);
  1372. return r;
  1373. }
  1374. /**
  1375. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1376. * @ioc: per adapter object
  1377. * @smid: system request message index(smid zero is invalid)
  1378. *
  1379. * Returns virt pointer to message frame.
  1380. */
  1381. void *
  1382. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1383. {
  1384. return (void *)(ioc->request + (smid * ioc->request_sz));
  1385. }
  1386. /**
  1387. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1388. * @ioc: per adapter object
  1389. * @smid: system request message index
  1390. *
  1391. * Returns virt pointer to sense buffer.
  1392. */
  1393. void *
  1394. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1395. {
  1396. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1397. }
  1398. /**
  1399. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1400. * @ioc: per adapter object
  1401. * @smid: system request message index
  1402. *
  1403. * Returns phys pointer to the low 32bit address of the sense buffer.
  1404. */
  1405. __le32
  1406. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1407. {
  1408. return cpu_to_le32(ioc->sense_dma +
  1409. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1410. }
  1411. /**
  1412. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1413. * @ioc: per adapter object
  1414. * @phys_addr: lower 32 physical addr of the reply
  1415. *
  1416. * Converts 32bit lower physical addr into a virt address.
  1417. */
  1418. void *
  1419. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1420. {
  1421. if (!phys_addr)
  1422. return NULL;
  1423. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1424. }
  1425. /**
  1426. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1427. * @ioc: per adapter object
  1428. * @cb_idx: callback index
  1429. *
  1430. * Returns smid (zero is invalid)
  1431. */
  1432. u16
  1433. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1434. {
  1435. unsigned long flags;
  1436. struct request_tracker *request;
  1437. u16 smid;
  1438. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1439. if (list_empty(&ioc->internal_free_list)) {
  1440. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1441. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1442. ioc->name, __func__);
  1443. return 0;
  1444. }
  1445. request = list_entry(ioc->internal_free_list.next,
  1446. struct request_tracker, tracker_list);
  1447. request->cb_idx = cb_idx;
  1448. smid = request->smid;
  1449. list_del(&request->tracker_list);
  1450. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1451. return smid;
  1452. }
  1453. /**
  1454. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1455. * @ioc: per adapter object
  1456. * @cb_idx: callback index
  1457. * @scmd: pointer to scsi command object
  1458. *
  1459. * Returns smid (zero is invalid)
  1460. */
  1461. u16
  1462. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1463. struct scsi_cmnd *scmd)
  1464. {
  1465. unsigned long flags;
  1466. struct scsiio_tracker *request;
  1467. u16 smid;
  1468. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1469. if (list_empty(&ioc->free_list)) {
  1470. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1471. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1472. ioc->name, __func__);
  1473. return 0;
  1474. }
  1475. request = list_entry(ioc->free_list.next,
  1476. struct scsiio_tracker, tracker_list);
  1477. request->scmd = scmd;
  1478. request->cb_idx = cb_idx;
  1479. smid = request->smid;
  1480. list_del(&request->tracker_list);
  1481. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1482. return smid;
  1483. }
  1484. /**
  1485. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1486. * @ioc: per adapter object
  1487. * @cb_idx: callback index
  1488. *
  1489. * Returns smid (zero is invalid)
  1490. */
  1491. u16
  1492. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1493. {
  1494. unsigned long flags;
  1495. struct request_tracker *request;
  1496. u16 smid;
  1497. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1498. if (list_empty(&ioc->hpr_free_list)) {
  1499. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1500. return 0;
  1501. }
  1502. request = list_entry(ioc->hpr_free_list.next,
  1503. struct request_tracker, tracker_list);
  1504. request->cb_idx = cb_idx;
  1505. smid = request->smid;
  1506. list_del(&request->tracker_list);
  1507. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1508. return smid;
  1509. }
  1510. /**
  1511. * mpt2sas_base_free_smid - put smid back on free_list
  1512. * @ioc: per adapter object
  1513. * @smid: system request message index
  1514. *
  1515. * Return nothing.
  1516. */
  1517. void
  1518. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1519. {
  1520. unsigned long flags;
  1521. int i;
  1522. struct chain_tracker *chain_req, *next;
  1523. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1524. if (smid < ioc->hi_priority_smid) {
  1525. /* scsiio queue */
  1526. i = smid - 1;
  1527. if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
  1528. list_for_each_entry_safe(chain_req, next,
  1529. &ioc->scsi_lookup[i].chain_list, tracker_list) {
  1530. list_del_init(&chain_req->tracker_list);
  1531. list_add_tail(&chain_req->tracker_list,
  1532. &ioc->free_chain_list);
  1533. }
  1534. }
  1535. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1536. ioc->scsi_lookup[i].scmd = NULL;
  1537. ioc->scsi_lookup[i].direct_io = 0;
  1538. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1539. &ioc->free_list);
  1540. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1541. /*
  1542. * See _wait_for_commands_to_complete() call with regards
  1543. * to this code.
  1544. */
  1545. if (ioc->shost_recovery && ioc->pending_io_count) {
  1546. if (ioc->pending_io_count == 1)
  1547. wake_up(&ioc->reset_wq);
  1548. ioc->pending_io_count--;
  1549. }
  1550. return;
  1551. } else if (smid < ioc->internal_smid) {
  1552. /* hi-priority */
  1553. i = smid - ioc->hi_priority_smid;
  1554. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1555. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1556. &ioc->hpr_free_list);
  1557. } else if (smid <= ioc->hba_queue_depth) {
  1558. /* internal queue */
  1559. i = smid - ioc->internal_smid;
  1560. ioc->internal_lookup[i].cb_idx = 0xFF;
  1561. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1562. &ioc->internal_free_list);
  1563. }
  1564. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1565. }
  1566. /**
  1567. * _base_writeq - 64 bit write to MMIO
  1568. * @ioc: per adapter object
  1569. * @b: data payload
  1570. * @addr: address in MMIO space
  1571. * @writeq_lock: spin lock
  1572. *
  1573. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1574. * care of 32 bit environment where its not quarenteed to send the entire word
  1575. * in one transfer.
  1576. */
  1577. #ifndef writeq
  1578. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1579. spinlock_t *writeq_lock)
  1580. {
  1581. unsigned long flags;
  1582. __u64 data_out = cpu_to_le64(b);
  1583. spin_lock_irqsave(writeq_lock, flags);
  1584. writel((u32)(data_out), addr);
  1585. writel((u32)(data_out >> 32), (addr + 4));
  1586. spin_unlock_irqrestore(writeq_lock, flags);
  1587. }
  1588. #else
  1589. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1590. spinlock_t *writeq_lock)
  1591. {
  1592. writeq(cpu_to_le64(b), addr);
  1593. }
  1594. #endif
  1595. static inline u8
  1596. _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
  1597. {
  1598. return ioc->cpu_msix_table[smp_processor_id()];
  1599. }
  1600. /**
  1601. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1602. * @ioc: per adapter object
  1603. * @smid: system request message index
  1604. * @handle: device handle
  1605. *
  1606. * Return nothing.
  1607. */
  1608. void
  1609. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1610. {
  1611. Mpi2RequestDescriptorUnion_t descriptor;
  1612. u64 *request = (u64 *)&descriptor;
  1613. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1614. descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
  1615. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1616. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1617. descriptor.SCSIIO.LMID = 0;
  1618. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1619. &ioc->scsi_lookup_lock);
  1620. }
  1621. /**
  1622. * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
  1623. * @ioc: per adapter object
  1624. * @smid: system request message index
  1625. *
  1626. * Return nothing.
  1627. */
  1628. void
  1629. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1630. {
  1631. Mpi2RequestDescriptorUnion_t descriptor;
  1632. u64 *request = (u64 *)&descriptor;
  1633. descriptor.HighPriority.RequestFlags =
  1634. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1635. descriptor.HighPriority.MSIxIndex = 0;
  1636. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1637. descriptor.HighPriority.LMID = 0;
  1638. descriptor.HighPriority.Reserved1 = 0;
  1639. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1640. &ioc->scsi_lookup_lock);
  1641. }
  1642. /**
  1643. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1644. * @ioc: per adapter object
  1645. * @smid: system request message index
  1646. *
  1647. * Return nothing.
  1648. */
  1649. void
  1650. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1651. {
  1652. Mpi2RequestDescriptorUnion_t descriptor;
  1653. u64 *request = (u64 *)&descriptor;
  1654. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1655. descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
  1656. descriptor.Default.SMID = cpu_to_le16(smid);
  1657. descriptor.Default.LMID = 0;
  1658. descriptor.Default.DescriptorTypeDependent = 0;
  1659. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1660. &ioc->scsi_lookup_lock);
  1661. }
  1662. /**
  1663. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1664. * @ioc: per adapter object
  1665. * @smid: system request message index
  1666. * @io_index: value used to track the IO
  1667. *
  1668. * Return nothing.
  1669. */
  1670. void
  1671. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1672. u16 io_index)
  1673. {
  1674. Mpi2RequestDescriptorUnion_t descriptor;
  1675. u64 *request = (u64 *)&descriptor;
  1676. descriptor.SCSITarget.RequestFlags =
  1677. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1678. descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
  1679. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1680. descriptor.SCSITarget.LMID = 0;
  1681. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1682. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1683. &ioc->scsi_lookup_lock);
  1684. }
  1685. /**
  1686. * _base_display_dell_branding - Disply branding string
  1687. * @ioc: per adapter object
  1688. *
  1689. * Return nothing.
  1690. */
  1691. static void
  1692. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1693. {
  1694. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1695. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1696. return;
  1697. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1698. switch (ioc->pdev->subsystem_device) {
  1699. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1700. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1701. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1702. break;
  1703. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1704. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1705. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1706. break;
  1707. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1708. strncpy(dell_branding,
  1709. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1710. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1711. break;
  1712. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1713. strncpy(dell_branding,
  1714. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1715. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1716. break;
  1717. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1718. strncpy(dell_branding,
  1719. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1720. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1721. break;
  1722. case MPT2SAS_DELL_PERC_H200_SSDID:
  1723. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1724. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1725. break;
  1726. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1727. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1728. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1729. break;
  1730. default:
  1731. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1732. break;
  1733. }
  1734. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1735. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1736. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1737. ioc->pdev->subsystem_device);
  1738. }
  1739. /**
  1740. * _base_display_intel_branding - Display branding string
  1741. * @ioc: per adapter object
  1742. *
  1743. * Return nothing.
  1744. */
  1745. static void
  1746. _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
  1747. {
  1748. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
  1749. return;
  1750. switch (ioc->pdev->device) {
  1751. case MPI2_MFGPAGE_DEVID_SAS2008:
  1752. switch (ioc->pdev->subsystem_device) {
  1753. case MPT2SAS_INTEL_RMS2LL080_SSDID:
  1754. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1755. MPT2SAS_INTEL_RMS2LL080_BRANDING);
  1756. break;
  1757. case MPT2SAS_INTEL_RMS2LL040_SSDID:
  1758. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1759. MPT2SAS_INTEL_RMS2LL040_BRANDING);
  1760. break;
  1761. case MPT2SAS_INTEL_RAMSDALE_SSDID:
  1762. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1763. MPT2SAS_INTEL_RAMSDALE_BRANDING);
  1764. break;
  1765. default:
  1766. break;
  1767. }
  1768. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1769. switch (ioc->pdev->subsystem_device) {
  1770. case MPT2SAS_INTEL_RS25GB008_SSDID:
  1771. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1772. MPT2SAS_INTEL_RS25GB008_BRANDING);
  1773. break;
  1774. case MPT2SAS_INTEL_RMS25JB080_SSDID:
  1775. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1776. MPT2SAS_INTEL_RMS25JB080_BRANDING);
  1777. break;
  1778. case MPT2SAS_INTEL_RMS25JB040_SSDID:
  1779. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1780. MPT2SAS_INTEL_RMS25JB040_BRANDING);
  1781. break;
  1782. case MPT2SAS_INTEL_RMS25KB080_SSDID:
  1783. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1784. MPT2SAS_INTEL_RMS25KB080_BRANDING);
  1785. break;
  1786. case MPT2SAS_INTEL_RMS25KB040_SSDID:
  1787. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1788. MPT2SAS_INTEL_RMS25KB040_BRANDING);
  1789. break;
  1790. default:
  1791. break;
  1792. }
  1793. default:
  1794. break;
  1795. }
  1796. }
  1797. /**
  1798. * _base_display_hp_branding - Display branding string
  1799. * @ioc: per adapter object
  1800. *
  1801. * Return nothing.
  1802. */
  1803. static void
  1804. _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
  1805. {
  1806. if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
  1807. return;
  1808. switch (ioc->pdev->device) {
  1809. case MPI2_MFGPAGE_DEVID_SAS2004:
  1810. switch (ioc->pdev->subsystem_device) {
  1811. case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
  1812. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1813. MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
  1814. break;
  1815. default:
  1816. break;
  1817. }
  1818. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1819. switch (ioc->pdev->subsystem_device) {
  1820. case MPT2SAS_HP_2_4_INTERNAL_SSDID:
  1821. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1822. MPT2SAS_HP_2_4_INTERNAL_BRANDING);
  1823. break;
  1824. case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
  1825. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1826. MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
  1827. break;
  1828. case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
  1829. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1830. MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
  1831. break;
  1832. case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
  1833. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1834. MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
  1835. break;
  1836. default:
  1837. break;
  1838. }
  1839. default:
  1840. break;
  1841. }
  1842. }
  1843. /**
  1844. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1845. * @ioc: per adapter object
  1846. *
  1847. * Return nothing.
  1848. */
  1849. static void
  1850. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1851. {
  1852. int i = 0;
  1853. char desc[16];
  1854. u8 revision;
  1855. u32 iounit_pg1_flags;
  1856. u32 bios_version;
  1857. bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
  1858. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1859. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1860. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1861. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1862. ioc->name, desc,
  1863. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1864. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1865. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1866. ioc->facts.FWVersion.Word & 0x000000FF,
  1867. revision,
  1868. (bios_version & 0xFF000000) >> 24,
  1869. (bios_version & 0x00FF0000) >> 16,
  1870. (bios_version & 0x0000FF00) >> 8,
  1871. bios_version & 0x000000FF);
  1872. _base_display_dell_branding(ioc);
  1873. _base_display_intel_branding(ioc);
  1874. _base_display_hp_branding(ioc);
  1875. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1876. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1877. printk("Initiator");
  1878. i++;
  1879. }
  1880. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1881. printk("%sTarget", i ? "," : "");
  1882. i++;
  1883. }
  1884. i = 0;
  1885. printk("), ");
  1886. printk("Capabilities=(");
  1887. if (!ioc->hide_ir_msg) {
  1888. if (ioc->facts.IOCCapabilities &
  1889. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1890. printk("Raid");
  1891. i++;
  1892. }
  1893. }
  1894. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1895. printk("%sTLR", i ? "," : "");
  1896. i++;
  1897. }
  1898. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1899. printk("%sMulticast", i ? "," : "");
  1900. i++;
  1901. }
  1902. if (ioc->facts.IOCCapabilities &
  1903. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1904. printk("%sBIDI Target", i ? "," : "");
  1905. i++;
  1906. }
  1907. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1908. printk("%sEEDP", i ? "," : "");
  1909. i++;
  1910. }
  1911. if (ioc->facts.IOCCapabilities &
  1912. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1913. printk("%sSnapshot Buffer", i ? "," : "");
  1914. i++;
  1915. }
  1916. if (ioc->facts.IOCCapabilities &
  1917. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1918. printk("%sDiag Trace Buffer", i ? "," : "");
  1919. i++;
  1920. }
  1921. if (ioc->facts.IOCCapabilities &
  1922. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1923. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1924. i++;
  1925. }
  1926. if (ioc->facts.IOCCapabilities &
  1927. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1928. printk("%sTask Set Full", i ? "," : "");
  1929. i++;
  1930. }
  1931. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1932. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1933. printk("%sNCQ", i ? "," : "");
  1934. i++;
  1935. }
  1936. printk(")\n");
  1937. }
  1938. /**
  1939. * _base_update_missing_delay - change the missing delay timers
  1940. * @ioc: per adapter object
  1941. * @device_missing_delay: amount of time till device is reported missing
  1942. * @io_missing_delay: interval IO is returned when there is a missing device
  1943. *
  1944. * Return nothing.
  1945. *
  1946. * Passed on the command line, this function will modify the device missing
  1947. * delay, as well as the io missing delay. This should be called at driver
  1948. * load time.
  1949. */
  1950. static void
  1951. _base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
  1952. u16 device_missing_delay, u8 io_missing_delay)
  1953. {
  1954. u16 dmd, dmd_new, dmd_orignal;
  1955. u8 io_missing_delay_original;
  1956. u16 sz;
  1957. Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
  1958. Mpi2ConfigReply_t mpi_reply;
  1959. u8 num_phys = 0;
  1960. u16 ioc_status;
  1961. mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
  1962. if (!num_phys)
  1963. return;
  1964. sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
  1965. sizeof(Mpi2SasIOUnit1PhyData_t));
  1966. sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
  1967. if (!sas_iounit_pg1) {
  1968. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1969. ioc->name, __FILE__, __LINE__, __func__);
  1970. goto out;
  1971. }
  1972. if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
  1973. sas_iounit_pg1, sz))) {
  1974. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1975. ioc->name, __FILE__, __LINE__, __func__);
  1976. goto out;
  1977. }
  1978. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
  1979. MPI2_IOCSTATUS_MASK;
  1980. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  1981. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1982. ioc->name, __FILE__, __LINE__, __func__);
  1983. goto out;
  1984. }
  1985. /* device missing delay */
  1986. dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
  1987. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1988. dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  1989. else
  1990. dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  1991. dmd_orignal = dmd;
  1992. if (device_missing_delay > 0x7F) {
  1993. dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
  1994. device_missing_delay;
  1995. dmd = dmd / 16;
  1996. dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
  1997. } else
  1998. dmd = device_missing_delay;
  1999. sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
  2000. /* io missing delay */
  2001. io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
  2002. sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
  2003. if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
  2004. sz)) {
  2005. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  2006. dmd_new = (dmd &
  2007. MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  2008. else
  2009. dmd_new =
  2010. dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  2011. printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
  2012. "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
  2013. printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
  2014. "new(%d)\n", ioc->name, io_missing_delay_original,
  2015. io_missing_delay);
  2016. ioc->device_missing_delay = dmd_new;
  2017. ioc->io_missing_delay = io_missing_delay;
  2018. }
  2019. out:
  2020. kfree(sas_iounit_pg1);
  2021. }
  2022. /**
  2023. * _base_static_config_pages - static start of day config pages
  2024. * @ioc: per adapter object
  2025. *
  2026. * Return nothing.
  2027. */
  2028. static void
  2029. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  2030. {
  2031. Mpi2ConfigReply_t mpi_reply;
  2032. u32 iounit_pg1_flags;
  2033. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  2034. if (ioc->ir_firmware)
  2035. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  2036. &ioc->manu_pg10);
  2037. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  2038. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  2039. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  2040. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  2041. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2042. _base_display_ioc_capabilities(ioc);
  2043. /*
  2044. * Enable task_set_full handling in iounit_pg1 when the
  2045. * facts capabilities indicate that its supported.
  2046. */
  2047. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  2048. if ((ioc->facts.IOCCapabilities &
  2049. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  2050. iounit_pg1_flags &=
  2051. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2052. else
  2053. iounit_pg1_flags |=
  2054. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2055. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  2056. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2057. }
  2058. /**
  2059. * _base_release_memory_pools - release memory
  2060. * @ioc: per adapter object
  2061. *
  2062. * Free memory allocated from _base_allocate_memory_pools.
  2063. *
  2064. * Return nothing.
  2065. */
  2066. static void
  2067. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  2068. {
  2069. int i;
  2070. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2071. __func__));
  2072. if (ioc->request) {
  2073. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  2074. ioc->request, ioc->request_dma);
  2075. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  2076. ": free\n", ioc->name, ioc->request));
  2077. ioc->request = NULL;
  2078. }
  2079. if (ioc->sense) {
  2080. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  2081. if (ioc->sense_dma_pool)
  2082. pci_pool_destroy(ioc->sense_dma_pool);
  2083. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  2084. ": free\n", ioc->name, ioc->sense));
  2085. ioc->sense = NULL;
  2086. }
  2087. if (ioc->reply) {
  2088. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  2089. if (ioc->reply_dma_pool)
  2090. pci_pool_destroy(ioc->reply_dma_pool);
  2091. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  2092. ": free\n", ioc->name, ioc->reply));
  2093. ioc->reply = NULL;
  2094. }
  2095. if (ioc->reply_free) {
  2096. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  2097. ioc->reply_free_dma);
  2098. if (ioc->reply_free_dma_pool)
  2099. pci_pool_destroy(ioc->reply_free_dma_pool);
  2100. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  2101. "(0x%p): free\n", ioc->name, ioc->reply_free));
  2102. ioc->reply_free = NULL;
  2103. }
  2104. if (ioc->reply_post_free) {
  2105. pci_pool_free(ioc->reply_post_free_dma_pool,
  2106. ioc->reply_post_free, ioc->reply_post_free_dma);
  2107. if (ioc->reply_post_free_dma_pool)
  2108. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  2109. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2110. "reply_post_free_pool(0x%p): free\n", ioc->name,
  2111. ioc->reply_post_free));
  2112. ioc->reply_post_free = NULL;
  2113. }
  2114. if (ioc->config_page) {
  2115. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2116. "config_page(0x%p): free\n", ioc->name,
  2117. ioc->config_page));
  2118. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  2119. ioc->config_page, ioc->config_page_dma);
  2120. }
  2121. if (ioc->scsi_lookup) {
  2122. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  2123. ioc->scsi_lookup = NULL;
  2124. }
  2125. kfree(ioc->hpr_lookup);
  2126. kfree(ioc->internal_lookup);
  2127. if (ioc->chain_lookup) {
  2128. for (i = 0; i < ioc->chain_depth; i++) {
  2129. if (ioc->chain_lookup[i].chain_buffer)
  2130. pci_pool_free(ioc->chain_dma_pool,
  2131. ioc->chain_lookup[i].chain_buffer,
  2132. ioc->chain_lookup[i].chain_buffer_dma);
  2133. }
  2134. if (ioc->chain_dma_pool)
  2135. pci_pool_destroy(ioc->chain_dma_pool);
  2136. free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
  2137. ioc->chain_lookup = NULL;
  2138. }
  2139. }
  2140. /**
  2141. * _base_allocate_memory_pools - allocate start of day memory pools
  2142. * @ioc: per adapter object
  2143. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2144. *
  2145. * Returns 0 success, anything else error
  2146. */
  2147. static int
  2148. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2149. {
  2150. struct mpt2sas_facts *facts;
  2151. u16 max_sge_elements;
  2152. u16 chains_needed_per_io;
  2153. u32 sz, total_sz, reply_post_free_sz;
  2154. u32 retry_sz;
  2155. u16 max_request_credit;
  2156. int i;
  2157. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2158. __func__));
  2159. retry_sz = 0;
  2160. facts = &ioc->facts;
  2161. /* command line tunables for max sgl entries */
  2162. if (max_sgl_entries != -1) {
  2163. ioc->shost->sg_tablesize = (max_sgl_entries <
  2164. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  2165. MPT2SAS_SG_DEPTH;
  2166. } else {
  2167. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  2168. }
  2169. /* command line tunables for max controller queue depth */
  2170. if (max_queue_depth != -1)
  2171. max_request_credit = (max_queue_depth < facts->RequestCredit)
  2172. ? max_queue_depth : facts->RequestCredit;
  2173. else
  2174. max_request_credit = min_t(u16, facts->RequestCredit,
  2175. MAX_HBA_QUEUE_DEPTH);
  2176. ioc->hba_queue_depth = max_request_credit;
  2177. ioc->hi_priority_depth = facts->HighPriorityCredit;
  2178. ioc->internal_depth = ioc->hi_priority_depth + 5;
  2179. /* request frame size */
  2180. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  2181. /* reply frame size */
  2182. ioc->reply_sz = facts->ReplyFrameSize * 4;
  2183. retry_allocation:
  2184. total_sz = 0;
  2185. /* calculate number of sg elements left over in the 1st frame */
  2186. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  2187. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  2188. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  2189. /* now do the same for a chain buffer */
  2190. max_sge_elements = ioc->request_sz - ioc->sge_size;
  2191. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  2192. ioc->chain_offset_value_for_main_message =
  2193. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  2194. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  2195. /*
  2196. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  2197. */
  2198. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  2199. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  2200. + 1;
  2201. if (chains_needed_per_io > facts->MaxChainDepth) {
  2202. chains_needed_per_io = facts->MaxChainDepth;
  2203. ioc->shost->sg_tablesize = min_t(u16,
  2204. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  2205. * chains_needed_per_io), ioc->shost->sg_tablesize);
  2206. }
  2207. ioc->chains_needed_per_io = chains_needed_per_io;
  2208. /* reply free queue sizing - taking into account for 64 FW events */
  2209. ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
  2210. /* align the reply post queue on the next 16 count boundary */
  2211. if (!ioc->reply_free_queue_depth % 16)
  2212. ioc->reply_post_queue_depth = ioc->reply_free_queue_depth + 16;
  2213. else
  2214. ioc->reply_post_queue_depth = ioc->reply_free_queue_depth +
  2215. 32 - (ioc->reply_free_queue_depth % 16);
  2216. if (ioc->reply_post_queue_depth >
  2217. facts->MaxReplyDescriptorPostQueueDepth) {
  2218. ioc->reply_post_queue_depth = min_t(u16,
  2219. (facts->MaxReplyDescriptorPostQueueDepth -
  2220. (facts->MaxReplyDescriptorPostQueueDepth % 16)),
  2221. (ioc->hba_queue_depth - (ioc->hba_queue_depth % 16)));
  2222. ioc->reply_free_queue_depth = ioc->reply_post_queue_depth - 16;
  2223. ioc->hba_queue_depth = ioc->reply_free_queue_depth - 64;
  2224. }
  2225. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  2226. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  2227. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  2228. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  2229. ioc->chains_needed_per_io));
  2230. ioc->scsiio_depth = ioc->hba_queue_depth -
  2231. ioc->hi_priority_depth - ioc->internal_depth;
  2232. /* set the scsi host can_queue depth
  2233. * with some internal commands that could be outstanding
  2234. */
  2235. ioc->shost->can_queue = ioc->scsiio_depth - (2);
  2236. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  2237. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  2238. /* contiguous pool for request and chains, 16 byte align, one extra "
  2239. * "frame for smid=0
  2240. */
  2241. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  2242. sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
  2243. /* hi-priority queue */
  2244. sz += (ioc->hi_priority_depth * ioc->request_sz);
  2245. /* internal queue */
  2246. sz += (ioc->internal_depth * ioc->request_sz);
  2247. ioc->request_dma_sz = sz;
  2248. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  2249. if (!ioc->request) {
  2250. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2251. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2252. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  2253. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2254. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  2255. goto out;
  2256. retry_sz += 64;
  2257. ioc->hba_queue_depth = max_request_credit - retry_sz;
  2258. goto retry_allocation;
  2259. }
  2260. if (retry_sz)
  2261. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2262. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2263. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  2264. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2265. /* hi-priority queue */
  2266. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  2267. ioc->request_sz);
  2268. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  2269. ioc->request_sz);
  2270. /* internal queue */
  2271. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  2272. ioc->request_sz);
  2273. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  2274. ioc->request_sz);
  2275. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  2276. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2277. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  2278. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  2279. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  2280. ioc->name, (unsigned long long) ioc->request_dma));
  2281. total_sz += sz;
  2282. sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
  2283. ioc->scsi_lookup_pages = get_order(sz);
  2284. ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
  2285. GFP_KERNEL, ioc->scsi_lookup_pages);
  2286. if (!ioc->scsi_lookup) {
  2287. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  2288. "sz(%d)\n", ioc->name, (int)sz);
  2289. goto out;
  2290. }
  2291. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  2292. "depth(%d)\n", ioc->name, ioc->request,
  2293. ioc->scsiio_depth));
  2294. ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
  2295. sz = ioc->chain_depth * sizeof(struct chain_tracker);
  2296. ioc->chain_pages = get_order(sz);
  2297. ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
  2298. GFP_KERNEL, ioc->chain_pages);
  2299. ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
  2300. ioc->request_sz, 16, 0);
  2301. if (!ioc->chain_dma_pool) {
  2302. printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
  2303. "failed\n", ioc->name);
  2304. goto out;
  2305. }
  2306. for (i = 0; i < ioc->chain_depth; i++) {
  2307. ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
  2308. ioc->chain_dma_pool , GFP_KERNEL,
  2309. &ioc->chain_lookup[i].chain_buffer_dma);
  2310. if (!ioc->chain_lookup[i].chain_buffer) {
  2311. ioc->chain_depth = i;
  2312. goto chain_done;
  2313. }
  2314. total_sz += ioc->request_sz;
  2315. }
  2316. chain_done:
  2317. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
  2318. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2319. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  2320. ioc->request_sz))/1024));
  2321. /* initialize hi-priority queue smid's */
  2322. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  2323. sizeof(struct request_tracker), GFP_KERNEL);
  2324. if (!ioc->hpr_lookup) {
  2325. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  2326. ioc->name);
  2327. goto out;
  2328. }
  2329. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  2330. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  2331. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  2332. ioc->hi_priority_depth, ioc->hi_priority_smid));
  2333. /* initialize internal queue smid's */
  2334. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  2335. sizeof(struct request_tracker), GFP_KERNEL);
  2336. if (!ioc->internal_lookup) {
  2337. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  2338. ioc->name);
  2339. goto out;
  2340. }
  2341. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  2342. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  2343. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  2344. ioc->internal_depth, ioc->internal_smid));
  2345. /* sense buffers, 4 byte align */
  2346. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  2347. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  2348. 0);
  2349. if (!ioc->sense_dma_pool) {
  2350. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  2351. ioc->name);
  2352. goto out;
  2353. }
  2354. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  2355. &ioc->sense_dma);
  2356. if (!ioc->sense) {
  2357. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  2358. ioc->name);
  2359. goto out;
  2360. }
  2361. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2362. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  2363. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  2364. SCSI_SENSE_BUFFERSIZE, sz/1024));
  2365. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  2366. ioc->name, (unsigned long long)ioc->sense_dma));
  2367. total_sz += sz;
  2368. /* reply pool, 4 byte align */
  2369. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  2370. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  2371. 0);
  2372. if (!ioc->reply_dma_pool) {
  2373. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  2374. ioc->name);
  2375. goto out;
  2376. }
  2377. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  2378. &ioc->reply_dma);
  2379. if (!ioc->reply) {
  2380. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  2381. ioc->name);
  2382. goto out;
  2383. }
  2384. ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
  2385. ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
  2386. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  2387. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  2388. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  2389. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  2390. ioc->name, (unsigned long long)ioc->reply_dma));
  2391. total_sz += sz;
  2392. /* reply free queue, 16 byte align */
  2393. sz = ioc->reply_free_queue_depth * 4;
  2394. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  2395. ioc->pdev, sz, 16, 0);
  2396. if (!ioc->reply_free_dma_pool) {
  2397. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  2398. "failed\n", ioc->name);
  2399. goto out;
  2400. }
  2401. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  2402. &ioc->reply_free_dma);
  2403. if (!ioc->reply_free) {
  2404. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  2405. "failed\n", ioc->name);
  2406. goto out;
  2407. }
  2408. memset(ioc->reply_free, 0, sz);
  2409. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  2410. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  2411. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  2412. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  2413. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  2414. total_sz += sz;
  2415. /* reply post queue, 16 byte align */
  2416. reply_post_free_sz = ioc->reply_post_queue_depth *
  2417. sizeof(Mpi2DefaultReplyDescriptor_t);
  2418. if (_base_is_controller_msix_enabled(ioc))
  2419. sz = reply_post_free_sz * ioc->reply_queue_count;
  2420. else
  2421. sz = reply_post_free_sz;
  2422. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  2423. ioc->pdev, sz, 16, 0);
  2424. if (!ioc->reply_post_free_dma_pool) {
  2425. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  2426. "failed\n", ioc->name);
  2427. goto out;
  2428. }
  2429. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  2430. GFP_KERNEL, &ioc->reply_post_free_dma);
  2431. if (!ioc->reply_post_free) {
  2432. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2433. "failed\n", ioc->name);
  2434. goto out;
  2435. }
  2436. memset(ioc->reply_post_free, 0, sz);
  2437. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2438. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2439. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2440. sz/1024));
  2441. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2442. "(0x%llx)\n", ioc->name, (unsigned long long)
  2443. ioc->reply_post_free_dma));
  2444. total_sz += sz;
  2445. ioc->config_page_sz = 512;
  2446. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2447. ioc->config_page_sz, &ioc->config_page_dma);
  2448. if (!ioc->config_page) {
  2449. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2450. "failed\n", ioc->name);
  2451. goto out;
  2452. }
  2453. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2454. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2455. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2456. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2457. total_sz += ioc->config_page_sz;
  2458. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2459. ioc->name, total_sz/1024);
  2460. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2461. "Max Controller Queue Depth(%d)\n",
  2462. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2463. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2464. ioc->name, ioc->shost->sg_tablesize);
  2465. return 0;
  2466. out:
  2467. return -ENOMEM;
  2468. }
  2469. /**
  2470. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2471. * @ioc: Pointer to MPT_ADAPTER structure
  2472. * @cooked: Request raw or cooked IOC state
  2473. *
  2474. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2475. * Doorbell bits in MPI_IOC_STATE_MASK.
  2476. */
  2477. u32
  2478. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2479. {
  2480. u32 s, sc;
  2481. s = readl(&ioc->chip->Doorbell);
  2482. sc = s & MPI2_IOC_STATE_MASK;
  2483. return cooked ? sc : s;
  2484. }
  2485. /**
  2486. * _base_wait_on_iocstate - waiting on a particular ioc state
  2487. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2488. * @timeout: timeout in second
  2489. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2490. *
  2491. * Returns 0 for success, non-zero for failure.
  2492. */
  2493. static int
  2494. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2495. int sleep_flag)
  2496. {
  2497. u32 count, cntdn;
  2498. u32 current_state;
  2499. count = 0;
  2500. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2501. do {
  2502. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2503. if (current_state == ioc_state)
  2504. return 0;
  2505. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2506. break;
  2507. if (sleep_flag == CAN_SLEEP)
  2508. msleep(1);
  2509. else
  2510. udelay(500);
  2511. count++;
  2512. } while (--cntdn);
  2513. return current_state;
  2514. }
  2515. /**
  2516. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2517. * a write to the doorbell)
  2518. * @ioc: per adapter object
  2519. * @timeout: timeout in second
  2520. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2521. *
  2522. * Returns 0 for success, non-zero for failure.
  2523. *
  2524. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2525. */
  2526. static int
  2527. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2528. int sleep_flag)
  2529. {
  2530. u32 cntdn, count;
  2531. u32 int_status;
  2532. count = 0;
  2533. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2534. do {
  2535. int_status = readl(&ioc->chip->HostInterruptStatus);
  2536. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2537. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2538. "successful count(%d), timeout(%d)\n", ioc->name,
  2539. __func__, count, timeout));
  2540. return 0;
  2541. }
  2542. if (sleep_flag == CAN_SLEEP)
  2543. msleep(1);
  2544. else
  2545. udelay(500);
  2546. count++;
  2547. } while (--cntdn);
  2548. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2549. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2550. return -EFAULT;
  2551. }
  2552. /**
  2553. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2554. * @ioc: per adapter object
  2555. * @timeout: timeout in second
  2556. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2557. *
  2558. * Returns 0 for success, non-zero for failure.
  2559. *
  2560. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2561. * doorbell.
  2562. */
  2563. static int
  2564. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2565. int sleep_flag)
  2566. {
  2567. u32 cntdn, count;
  2568. u32 int_status;
  2569. u32 doorbell;
  2570. count = 0;
  2571. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2572. do {
  2573. int_status = readl(&ioc->chip->HostInterruptStatus);
  2574. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2575. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2576. "successful count(%d), timeout(%d)\n", ioc->name,
  2577. __func__, count, timeout));
  2578. return 0;
  2579. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2580. doorbell = readl(&ioc->chip->Doorbell);
  2581. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2582. MPI2_IOC_STATE_FAULT) {
  2583. mpt2sas_base_fault_info(ioc , doorbell);
  2584. return -EFAULT;
  2585. }
  2586. } else if (int_status == 0xFFFFFFFF)
  2587. goto out;
  2588. if (sleep_flag == CAN_SLEEP)
  2589. msleep(1);
  2590. else
  2591. udelay(500);
  2592. count++;
  2593. } while (--cntdn);
  2594. out:
  2595. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2596. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2597. return -EFAULT;
  2598. }
  2599. /**
  2600. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2601. * @ioc: per adapter object
  2602. * @timeout: timeout in second
  2603. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2604. *
  2605. * Returns 0 for success, non-zero for failure.
  2606. *
  2607. */
  2608. static int
  2609. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2610. int sleep_flag)
  2611. {
  2612. u32 cntdn, count;
  2613. u32 doorbell_reg;
  2614. count = 0;
  2615. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2616. do {
  2617. doorbell_reg = readl(&ioc->chip->Doorbell);
  2618. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2619. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2620. "successful count(%d), timeout(%d)\n", ioc->name,
  2621. __func__, count, timeout));
  2622. return 0;
  2623. }
  2624. if (sleep_flag == CAN_SLEEP)
  2625. msleep(1);
  2626. else
  2627. udelay(500);
  2628. count++;
  2629. } while (--cntdn);
  2630. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2631. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2632. return -EFAULT;
  2633. }
  2634. /**
  2635. * _base_send_ioc_reset - send doorbell reset
  2636. * @ioc: per adapter object
  2637. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2638. * @timeout: timeout in second
  2639. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2640. *
  2641. * Returns 0 for success, non-zero for failure.
  2642. */
  2643. static int
  2644. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2645. int sleep_flag)
  2646. {
  2647. u32 ioc_state;
  2648. int r = 0;
  2649. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2650. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2651. ioc->name, __func__);
  2652. return -EFAULT;
  2653. }
  2654. if (!(ioc->facts.IOCCapabilities &
  2655. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2656. return -EFAULT;
  2657. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2658. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2659. &ioc->chip->Doorbell);
  2660. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2661. r = -EFAULT;
  2662. goto out;
  2663. }
  2664. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2665. timeout, sleep_flag);
  2666. if (ioc_state) {
  2667. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2668. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2669. r = -EFAULT;
  2670. goto out;
  2671. }
  2672. out:
  2673. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2674. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2675. return r;
  2676. }
  2677. /**
  2678. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2679. * @ioc: per adapter object
  2680. * @request_bytes: request length
  2681. * @request: pointer having request payload
  2682. * @reply_bytes: reply length
  2683. * @reply: pointer to reply payload
  2684. * @timeout: timeout in second
  2685. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2686. *
  2687. * Returns 0 for success, non-zero for failure.
  2688. */
  2689. static int
  2690. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2691. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2692. {
  2693. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2694. int i;
  2695. u8 failed;
  2696. u16 dummy;
  2697. __le32 *mfp;
  2698. /* make sure doorbell is not in use */
  2699. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2700. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2701. " (line=%d)\n", ioc->name, __LINE__);
  2702. return -EFAULT;
  2703. }
  2704. /* clear pending doorbell interrupts from previous state changes */
  2705. if (readl(&ioc->chip->HostInterruptStatus) &
  2706. MPI2_HIS_IOC2SYS_DB_STATUS)
  2707. writel(0, &ioc->chip->HostInterruptStatus);
  2708. /* send message to ioc */
  2709. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2710. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2711. &ioc->chip->Doorbell);
  2712. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2713. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2714. "int failed (line=%d)\n", ioc->name, __LINE__);
  2715. return -EFAULT;
  2716. }
  2717. writel(0, &ioc->chip->HostInterruptStatus);
  2718. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2719. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2720. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2721. return -EFAULT;
  2722. }
  2723. /* send message 32-bits at a time */
  2724. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2725. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2726. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2727. failed = 1;
  2728. }
  2729. if (failed) {
  2730. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2731. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2732. return -EFAULT;
  2733. }
  2734. /* now wait for the reply */
  2735. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2736. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2737. "int failed (line=%d)\n", ioc->name, __LINE__);
  2738. return -EFAULT;
  2739. }
  2740. /* read the first two 16-bits, it gives the total length of the reply */
  2741. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2742. & MPI2_DOORBELL_DATA_MASK);
  2743. writel(0, &ioc->chip->HostInterruptStatus);
  2744. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2745. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2746. "int failed (line=%d)\n", ioc->name, __LINE__);
  2747. return -EFAULT;
  2748. }
  2749. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2750. & MPI2_DOORBELL_DATA_MASK);
  2751. writel(0, &ioc->chip->HostInterruptStatus);
  2752. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2753. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2754. printk(MPT2SAS_ERR_FMT "doorbell "
  2755. "handshake int failed (line=%d)\n", ioc->name,
  2756. __LINE__);
  2757. return -EFAULT;
  2758. }
  2759. if (i >= reply_bytes/2) /* overflow case */
  2760. dummy = readl(&ioc->chip->Doorbell);
  2761. else
  2762. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2763. & MPI2_DOORBELL_DATA_MASK);
  2764. writel(0, &ioc->chip->HostInterruptStatus);
  2765. }
  2766. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2767. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2768. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2769. " (line=%d)\n", ioc->name, __LINE__));
  2770. }
  2771. writel(0, &ioc->chip->HostInterruptStatus);
  2772. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2773. mfp = (__le32 *)reply;
  2774. printk(KERN_INFO "\toffset:data\n");
  2775. for (i = 0; i < reply_bytes/4; i++)
  2776. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2777. le32_to_cpu(mfp[i]));
  2778. }
  2779. return 0;
  2780. }
  2781. /**
  2782. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2783. * @ioc: per adapter object
  2784. * @mpi_reply: the reply payload from FW
  2785. * @mpi_request: the request payload sent to FW
  2786. *
  2787. * The SAS IO Unit Control Request message allows the host to perform low-level
  2788. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2789. * to obtain the IOC assigned device handles for a device if it has other
  2790. * identifying information about the device, in addition allows the host to
  2791. * remove IOC resources associated with the device.
  2792. *
  2793. * Returns 0 for success, non-zero for failure.
  2794. */
  2795. int
  2796. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2797. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2798. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2799. {
  2800. u16 smid;
  2801. u32 ioc_state;
  2802. unsigned long timeleft;
  2803. u8 issue_reset;
  2804. int rc;
  2805. void *request;
  2806. u16 wait_state_count;
  2807. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2808. __func__));
  2809. mutex_lock(&ioc->base_cmds.mutex);
  2810. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2811. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2812. ioc->name, __func__);
  2813. rc = -EAGAIN;
  2814. goto out;
  2815. }
  2816. wait_state_count = 0;
  2817. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2818. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2819. if (wait_state_count++ == 10) {
  2820. printk(MPT2SAS_ERR_FMT
  2821. "%s: failed due to ioc not operational\n",
  2822. ioc->name, __func__);
  2823. rc = -EFAULT;
  2824. goto out;
  2825. }
  2826. ssleep(1);
  2827. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2828. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2829. "operational state(count=%d)\n", ioc->name,
  2830. __func__, wait_state_count);
  2831. }
  2832. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2833. if (!smid) {
  2834. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2835. ioc->name, __func__);
  2836. rc = -EAGAIN;
  2837. goto out;
  2838. }
  2839. rc = 0;
  2840. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2841. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2842. ioc->base_cmds.smid = smid;
  2843. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2844. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2845. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2846. ioc->ioc_link_reset_in_progress = 1;
  2847. init_completion(&ioc->base_cmds.done);
  2848. mpt2sas_base_put_smid_default(ioc, smid);
  2849. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2850. msecs_to_jiffies(10000));
  2851. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2852. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2853. ioc->ioc_link_reset_in_progress)
  2854. ioc->ioc_link_reset_in_progress = 0;
  2855. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2856. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2857. ioc->name, __func__);
  2858. _debug_dump_mf(mpi_request,
  2859. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2860. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2861. issue_reset = 1;
  2862. goto issue_host_reset;
  2863. }
  2864. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2865. memcpy(mpi_reply, ioc->base_cmds.reply,
  2866. sizeof(Mpi2SasIoUnitControlReply_t));
  2867. else
  2868. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2869. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2870. goto out;
  2871. issue_host_reset:
  2872. if (issue_reset)
  2873. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2874. FORCE_BIG_HAMMER);
  2875. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2876. rc = -EFAULT;
  2877. out:
  2878. mutex_unlock(&ioc->base_cmds.mutex);
  2879. return rc;
  2880. }
  2881. /**
  2882. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2883. * @ioc: per adapter object
  2884. * @mpi_reply: the reply payload from FW
  2885. * @mpi_request: the request payload sent to FW
  2886. *
  2887. * The SCSI Enclosure Processor request message causes the IOC to
  2888. * communicate with SES devices to control LED status signals.
  2889. *
  2890. * Returns 0 for success, non-zero for failure.
  2891. */
  2892. int
  2893. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2894. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2895. {
  2896. u16 smid;
  2897. u32 ioc_state;
  2898. unsigned long timeleft;
  2899. u8 issue_reset;
  2900. int rc;
  2901. void *request;
  2902. u16 wait_state_count;
  2903. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2904. __func__));
  2905. mutex_lock(&ioc->base_cmds.mutex);
  2906. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2907. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2908. ioc->name, __func__);
  2909. rc = -EAGAIN;
  2910. goto out;
  2911. }
  2912. wait_state_count = 0;
  2913. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2914. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2915. if (wait_state_count++ == 10) {
  2916. printk(MPT2SAS_ERR_FMT
  2917. "%s: failed due to ioc not operational\n",
  2918. ioc->name, __func__);
  2919. rc = -EFAULT;
  2920. goto out;
  2921. }
  2922. ssleep(1);
  2923. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2924. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2925. "operational state(count=%d)\n", ioc->name,
  2926. __func__, wait_state_count);
  2927. }
  2928. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2929. if (!smid) {
  2930. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2931. ioc->name, __func__);
  2932. rc = -EAGAIN;
  2933. goto out;
  2934. }
  2935. rc = 0;
  2936. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2937. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2938. ioc->base_cmds.smid = smid;
  2939. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2940. init_completion(&ioc->base_cmds.done);
  2941. mpt2sas_base_put_smid_default(ioc, smid);
  2942. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2943. msecs_to_jiffies(10000));
  2944. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2945. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2946. ioc->name, __func__);
  2947. _debug_dump_mf(mpi_request,
  2948. sizeof(Mpi2SepRequest_t)/4);
  2949. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2950. issue_reset = 1;
  2951. goto issue_host_reset;
  2952. }
  2953. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2954. memcpy(mpi_reply, ioc->base_cmds.reply,
  2955. sizeof(Mpi2SepReply_t));
  2956. else
  2957. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2958. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2959. goto out;
  2960. issue_host_reset:
  2961. if (issue_reset)
  2962. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2963. FORCE_BIG_HAMMER);
  2964. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2965. rc = -EFAULT;
  2966. out:
  2967. mutex_unlock(&ioc->base_cmds.mutex);
  2968. return rc;
  2969. }
  2970. /**
  2971. * _base_get_port_facts - obtain port facts reply and save in ioc
  2972. * @ioc: per adapter object
  2973. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2974. *
  2975. * Returns 0 for success, non-zero for failure.
  2976. */
  2977. static int
  2978. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2979. {
  2980. Mpi2PortFactsRequest_t mpi_request;
  2981. Mpi2PortFactsReply_t mpi_reply;
  2982. struct mpt2sas_port_facts *pfacts;
  2983. int mpi_reply_sz, mpi_request_sz, r;
  2984. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2985. __func__));
  2986. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2987. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2988. memset(&mpi_request, 0, mpi_request_sz);
  2989. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2990. mpi_request.PortNumber = port;
  2991. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2992. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2993. if (r != 0) {
  2994. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2995. ioc->name, __func__, r);
  2996. return r;
  2997. }
  2998. pfacts = &ioc->pfacts[port];
  2999. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  3000. pfacts->PortNumber = mpi_reply.PortNumber;
  3001. pfacts->VP_ID = mpi_reply.VP_ID;
  3002. pfacts->VF_ID = mpi_reply.VF_ID;
  3003. pfacts->MaxPostedCmdBuffers =
  3004. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  3005. return 0;
  3006. }
  3007. /**
  3008. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  3009. * @ioc: per adapter object
  3010. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3011. *
  3012. * Returns 0 for success, non-zero for failure.
  3013. */
  3014. static int
  3015. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3016. {
  3017. Mpi2IOCFactsRequest_t mpi_request;
  3018. Mpi2IOCFactsReply_t mpi_reply;
  3019. struct mpt2sas_facts *facts;
  3020. int mpi_reply_sz, mpi_request_sz, r;
  3021. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3022. __func__));
  3023. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  3024. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  3025. memset(&mpi_request, 0, mpi_request_sz);
  3026. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  3027. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3028. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3029. if (r != 0) {
  3030. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3031. ioc->name, __func__, r);
  3032. return r;
  3033. }
  3034. facts = &ioc->facts;
  3035. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  3036. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  3037. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  3038. facts->VP_ID = mpi_reply.VP_ID;
  3039. facts->VF_ID = mpi_reply.VF_ID;
  3040. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  3041. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  3042. facts->WhoInit = mpi_reply.WhoInit;
  3043. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  3044. facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
  3045. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  3046. facts->MaxReplyDescriptorPostQueueDepth =
  3047. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  3048. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  3049. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  3050. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  3051. ioc->ir_firmware = 1;
  3052. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  3053. facts->IOCRequestFrameSize =
  3054. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  3055. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  3056. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  3057. ioc->shost->max_id = -1;
  3058. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  3059. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  3060. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  3061. facts->HighPriorityCredit =
  3062. le16_to_cpu(mpi_reply.HighPriorityCredit);
  3063. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  3064. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  3065. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  3066. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  3067. facts->MaxChainDepth));
  3068. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  3069. "reply frame size(%d)\n", ioc->name,
  3070. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  3071. return 0;
  3072. }
  3073. /**
  3074. * _base_send_ioc_init - send ioc_init to firmware
  3075. * @ioc: per adapter object
  3076. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3077. *
  3078. * Returns 0 for success, non-zero for failure.
  3079. */
  3080. static int
  3081. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3082. {
  3083. Mpi2IOCInitRequest_t mpi_request;
  3084. Mpi2IOCInitReply_t mpi_reply;
  3085. int r;
  3086. struct timeval current_time;
  3087. u16 ioc_status;
  3088. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3089. __func__));
  3090. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  3091. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  3092. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  3093. mpi_request.VF_ID = 0; /* TODO */
  3094. mpi_request.VP_ID = 0;
  3095. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  3096. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  3097. if (_base_is_controller_msix_enabled(ioc))
  3098. mpi_request.HostMSIxVectors = ioc->reply_queue_count;
  3099. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  3100. mpi_request.ReplyDescriptorPostQueueDepth =
  3101. cpu_to_le16(ioc->reply_post_queue_depth);
  3102. mpi_request.ReplyFreeQueueDepth =
  3103. cpu_to_le16(ioc->reply_free_queue_depth);
  3104. mpi_request.SenseBufferAddressHigh =
  3105. cpu_to_le32((u64)ioc->sense_dma >> 32);
  3106. mpi_request.SystemReplyAddressHigh =
  3107. cpu_to_le32((u64)ioc->reply_dma >> 32);
  3108. mpi_request.SystemRequestFrameBaseAddress =
  3109. cpu_to_le64((u64)ioc->request_dma);
  3110. mpi_request.ReplyFreeQueueAddress =
  3111. cpu_to_le64((u64)ioc->reply_free_dma);
  3112. mpi_request.ReplyDescriptorPostQueueAddress =
  3113. cpu_to_le64((u64)ioc->reply_post_free_dma);
  3114. /* This time stamp specifies number of milliseconds
  3115. * since epoch ~ midnight January 1, 1970.
  3116. */
  3117. do_gettimeofday(&current_time);
  3118. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  3119. (current_time.tv_usec / 1000));
  3120. if (ioc->logging_level & MPT_DEBUG_INIT) {
  3121. __le32 *mfp;
  3122. int i;
  3123. mfp = (__le32 *)&mpi_request;
  3124. printk(KERN_INFO "\toffset:data\n");
  3125. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  3126. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  3127. le32_to_cpu(mfp[i]));
  3128. }
  3129. r = _base_handshake_req_reply_wait(ioc,
  3130. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  3131. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  3132. sleep_flag);
  3133. if (r != 0) {
  3134. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3135. ioc->name, __func__, r);
  3136. return r;
  3137. }
  3138. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  3139. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  3140. mpi_reply.IOCLogInfo) {
  3141. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  3142. r = -EIO;
  3143. }
  3144. return 0;
  3145. }
  3146. /**
  3147. * mpt2sas_port_enable_done - command completion routine for port enable
  3148. * @ioc: per adapter object
  3149. * @smid: system request message index
  3150. * @msix_index: MSIX table index supplied by the OS
  3151. * @reply: reply message frame(lower 32bit addr)
  3152. *
  3153. * Return 1 meaning mf should be freed from _base_interrupt
  3154. * 0 means the mf is freed from this function.
  3155. */
  3156. u8
  3157. mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  3158. u32 reply)
  3159. {
  3160. MPI2DefaultReply_t *mpi_reply;
  3161. u16 ioc_status;
  3162. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  3163. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  3164. return 1;
  3165. if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED)
  3166. return 1;
  3167. ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE;
  3168. if (mpi_reply) {
  3169. ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID;
  3170. memcpy(ioc->port_enable_cmds.reply, mpi_reply,
  3171. mpi_reply->MsgLength*4);
  3172. }
  3173. ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING;
  3174. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3175. if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
  3176. ioc->port_enable_failed = 1;
  3177. if (ioc->is_driver_loading) {
  3178. if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
  3179. mpt2sas_port_enable_complete(ioc);
  3180. return 1;
  3181. } else {
  3182. ioc->start_scan_failed = ioc_status;
  3183. ioc->start_scan = 0;
  3184. return 1;
  3185. }
  3186. }
  3187. complete(&ioc->port_enable_cmds.done);
  3188. return 1;
  3189. }
  3190. /**
  3191. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  3192. * @ioc: per adapter object
  3193. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3194. *
  3195. * Returns 0 for success, non-zero for failure.
  3196. */
  3197. static int
  3198. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3199. {
  3200. Mpi2PortEnableRequest_t *mpi_request;
  3201. Mpi2PortEnableReply_t *mpi_reply;
  3202. unsigned long timeleft;
  3203. int r = 0;
  3204. u16 smid;
  3205. u16 ioc_status;
  3206. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3207. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3208. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3209. ioc->name, __func__);
  3210. return -EAGAIN;
  3211. }
  3212. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3213. if (!smid) {
  3214. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3215. ioc->name, __func__);
  3216. return -EAGAIN;
  3217. }
  3218. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3219. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3220. ioc->port_enable_cmds.smid = smid;
  3221. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3222. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3223. init_completion(&ioc->port_enable_cmds.done);
  3224. mpt2sas_base_put_smid_default(ioc, smid);
  3225. timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
  3226. 300*HZ);
  3227. if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) {
  3228. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3229. ioc->name, __func__);
  3230. _debug_dump_mf(mpi_request,
  3231. sizeof(Mpi2PortEnableRequest_t)/4);
  3232. if (ioc->port_enable_cmds.status & MPT2_CMD_RESET)
  3233. r = -EFAULT;
  3234. else
  3235. r = -ETIME;
  3236. goto out;
  3237. }
  3238. mpi_reply = ioc->port_enable_cmds.reply;
  3239. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3240. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  3241. printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n",
  3242. ioc->name, __func__, ioc_status);
  3243. r = -EFAULT;
  3244. goto out;
  3245. }
  3246. out:
  3247. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3248. printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
  3249. "SUCCESS" : "FAILED"));
  3250. return r;
  3251. }
  3252. /**
  3253. * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply)
  3254. * @ioc: per adapter object
  3255. *
  3256. * Returns 0 for success, non-zero for failure.
  3257. */
  3258. int
  3259. mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc)
  3260. {
  3261. Mpi2PortEnableRequest_t *mpi_request;
  3262. u16 smid;
  3263. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3264. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3265. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3266. ioc->name, __func__);
  3267. return -EAGAIN;
  3268. }
  3269. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3270. if (!smid) {
  3271. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3272. ioc->name, __func__);
  3273. return -EAGAIN;
  3274. }
  3275. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3276. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3277. ioc->port_enable_cmds.smid = smid;
  3278. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3279. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3280. mpt2sas_base_put_smid_default(ioc, smid);
  3281. return 0;
  3282. }
  3283. /**
  3284. * _base_determine_wait_on_discovery - desposition
  3285. * @ioc: per adapter object
  3286. *
  3287. * Decide whether to wait on discovery to complete. Used to either
  3288. * locate boot device, or report volumes ahead of physical devices.
  3289. *
  3290. * Returns 1 for wait, 0 for don't wait
  3291. */
  3292. static int
  3293. _base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc)
  3294. {
  3295. /* We wait for discovery to complete if IR firmware is loaded.
  3296. * The sas topology events arrive before PD events, so we need time to
  3297. * turn on the bit in ioc->pd_handles to indicate PD
  3298. * Also, it maybe required to report Volumes ahead of physical
  3299. * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
  3300. */
  3301. if (ioc->ir_firmware)
  3302. return 1;
  3303. /* if no Bios, then we don't need to wait */
  3304. if (!ioc->bios_pg3.BiosVersion)
  3305. return 0;
  3306. /* Bios is present, then we drop down here.
  3307. *
  3308. * If there any entries in the Bios Page 2, then we wait
  3309. * for discovery to complete.
  3310. */
  3311. /* Current Boot Device */
  3312. if ((ioc->bios_pg2.CurrentBootDeviceForm &
  3313. MPI2_BIOSPAGE2_FORM_MASK) ==
  3314. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3315. /* Request Boot Device */
  3316. (ioc->bios_pg2.ReqBootDeviceForm &
  3317. MPI2_BIOSPAGE2_FORM_MASK) ==
  3318. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3319. /* Alternate Request Boot Device */
  3320. (ioc->bios_pg2.ReqAltBootDeviceForm &
  3321. MPI2_BIOSPAGE2_FORM_MASK) ==
  3322. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
  3323. return 0;
  3324. return 1;
  3325. }
  3326. /**
  3327. * _base_unmask_events - turn on notification for this event
  3328. * @ioc: per adapter object
  3329. * @event: firmware event
  3330. *
  3331. * The mask is stored in ioc->event_masks.
  3332. */
  3333. static void
  3334. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  3335. {
  3336. u32 desired_event;
  3337. if (event >= 128)
  3338. return;
  3339. desired_event = (1 << (event % 32));
  3340. if (event < 32)
  3341. ioc->event_masks[0] &= ~desired_event;
  3342. else if (event < 64)
  3343. ioc->event_masks[1] &= ~desired_event;
  3344. else if (event < 96)
  3345. ioc->event_masks[2] &= ~desired_event;
  3346. else if (event < 128)
  3347. ioc->event_masks[3] &= ~desired_event;
  3348. }
  3349. /**
  3350. * _base_event_notification - send event notification
  3351. * @ioc: per adapter object
  3352. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3353. *
  3354. * Returns 0 for success, non-zero for failure.
  3355. */
  3356. static int
  3357. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3358. {
  3359. Mpi2EventNotificationRequest_t *mpi_request;
  3360. unsigned long timeleft;
  3361. u16 smid;
  3362. int r = 0;
  3363. int i;
  3364. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3365. __func__));
  3366. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3367. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3368. ioc->name, __func__);
  3369. return -EAGAIN;
  3370. }
  3371. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  3372. if (!smid) {
  3373. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3374. ioc->name, __func__);
  3375. return -EAGAIN;
  3376. }
  3377. ioc->base_cmds.status = MPT2_CMD_PENDING;
  3378. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3379. ioc->base_cmds.smid = smid;
  3380. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  3381. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  3382. mpi_request->VF_ID = 0; /* TODO */
  3383. mpi_request->VP_ID = 0;
  3384. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3385. mpi_request->EventMasks[i] =
  3386. cpu_to_le32(ioc->event_masks[i]);
  3387. init_completion(&ioc->base_cmds.done);
  3388. mpt2sas_base_put_smid_default(ioc, smid);
  3389. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  3390. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  3391. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3392. ioc->name, __func__);
  3393. _debug_dump_mf(mpi_request,
  3394. sizeof(Mpi2EventNotificationRequest_t)/4);
  3395. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  3396. r = -EFAULT;
  3397. else
  3398. r = -ETIME;
  3399. } else
  3400. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  3401. ioc->name, __func__));
  3402. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3403. return r;
  3404. }
  3405. /**
  3406. * mpt2sas_base_validate_event_type - validating event types
  3407. * @ioc: per adapter object
  3408. * @event: firmware event
  3409. *
  3410. * This will turn on firmware event notification when application
  3411. * ask for that event. We don't mask events that are already enabled.
  3412. */
  3413. void
  3414. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  3415. {
  3416. int i, j;
  3417. u32 event_mask, desired_event;
  3418. u8 send_update_to_fw;
  3419. for (i = 0, send_update_to_fw = 0; i <
  3420. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  3421. event_mask = ~event_type[i];
  3422. desired_event = 1;
  3423. for (j = 0; j < 32; j++) {
  3424. if (!(event_mask & desired_event) &&
  3425. (ioc->event_masks[i] & desired_event)) {
  3426. ioc->event_masks[i] &= ~desired_event;
  3427. send_update_to_fw = 1;
  3428. }
  3429. desired_event = (desired_event << 1);
  3430. }
  3431. }
  3432. if (!send_update_to_fw)
  3433. return;
  3434. mutex_lock(&ioc->base_cmds.mutex);
  3435. _base_event_notification(ioc, CAN_SLEEP);
  3436. mutex_unlock(&ioc->base_cmds.mutex);
  3437. }
  3438. /**
  3439. * _base_diag_reset - the "big hammer" start of day reset
  3440. * @ioc: per adapter object
  3441. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3442. *
  3443. * Returns 0 for success, non-zero for failure.
  3444. */
  3445. static int
  3446. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3447. {
  3448. u32 host_diagnostic;
  3449. u32 ioc_state;
  3450. u32 count;
  3451. u32 hcb_size;
  3452. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  3453. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
  3454. ioc->name));
  3455. count = 0;
  3456. do {
  3457. /* Write magic sequence to WriteSequence register
  3458. * Loop until in diagnostic mode
  3459. */
  3460. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
  3461. "sequence\n", ioc->name));
  3462. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3463. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  3464. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  3465. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  3466. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3467. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3468. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3469. /* wait 100 msec */
  3470. if (sleep_flag == CAN_SLEEP)
  3471. msleep(100);
  3472. else
  3473. mdelay(100);
  3474. if (count++ > 20)
  3475. goto out;
  3476. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3477. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
  3478. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  3479. ioc->name, count, host_diagnostic));
  3480. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  3481. hcb_size = readl(&ioc->chip->HCBSize);
  3482. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
  3483. ioc->name));
  3484. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  3485. &ioc->chip->HostDiagnostic);
  3486. /* don't access any registers for 50 milliseconds */
  3487. msleep(50);
  3488. /* 300 second max wait */
  3489. for (count = 0; count < 3000000 ; count++) {
  3490. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3491. if (host_diagnostic == 0xFFFFFFFF)
  3492. goto out;
  3493. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  3494. break;
  3495. /* wait 100 msec */
  3496. if (sleep_flag == CAN_SLEEP)
  3497. msleep(1);
  3498. else
  3499. mdelay(1);
  3500. }
  3501. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  3502. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
  3503. "assuming the HCB Address points to good F/W\n",
  3504. ioc->name));
  3505. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  3506. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  3507. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  3508. drsprintk(ioc, printk(MPT2SAS_INFO_FMT
  3509. "re-enable the HCDW\n", ioc->name));
  3510. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  3511. &ioc->chip->HCBSize);
  3512. }
  3513. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
  3514. ioc->name));
  3515. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  3516. &ioc->chip->HostDiagnostic);
  3517. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
  3518. "diagnostic register\n", ioc->name));
  3519. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3520. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
  3521. "READY state\n", ioc->name));
  3522. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  3523. sleep_flag);
  3524. if (ioc_state) {
  3525. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  3526. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3527. goto out;
  3528. }
  3529. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3530. return 0;
  3531. out:
  3532. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3533. return -EFAULT;
  3534. }
  3535. /**
  3536. * _base_make_ioc_ready - put controller in READY state
  3537. * @ioc: per adapter object
  3538. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3539. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3540. *
  3541. * Returns 0 for success, non-zero for failure.
  3542. */
  3543. static int
  3544. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3545. enum reset_type type)
  3546. {
  3547. u32 ioc_state;
  3548. int rc;
  3549. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3550. __func__));
  3551. if (ioc->pci_error_recovery)
  3552. return 0;
  3553. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3554. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3555. ioc->name, __func__, ioc_state));
  3556. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3557. return 0;
  3558. if (ioc_state & MPI2_DOORBELL_USED) {
  3559. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
  3560. "active!\n", ioc->name));
  3561. goto issue_diag_reset;
  3562. }
  3563. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3564. mpt2sas_base_fault_info(ioc, ioc_state &
  3565. MPI2_DOORBELL_DATA_MASK);
  3566. goto issue_diag_reset;
  3567. }
  3568. if (type == FORCE_BIG_HAMMER)
  3569. goto issue_diag_reset;
  3570. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3571. if (!(_base_send_ioc_reset(ioc,
  3572. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
  3573. ioc->ioc_reset_count++;
  3574. return 0;
  3575. }
  3576. issue_diag_reset:
  3577. rc = _base_diag_reset(ioc, CAN_SLEEP);
  3578. ioc->ioc_reset_count++;
  3579. return rc;
  3580. }
  3581. /**
  3582. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3583. * @ioc: per adapter object
  3584. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3585. *
  3586. * Returns 0 for success, non-zero for failure.
  3587. */
  3588. static int
  3589. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3590. {
  3591. int r, i;
  3592. unsigned long flags;
  3593. u32 reply_address;
  3594. u16 smid;
  3595. struct _tr_list *delayed_tr, *delayed_tr_next;
  3596. u8 hide_flag;
  3597. struct adapter_reply_queue *reply_q;
  3598. long reply_post_free;
  3599. u32 reply_post_free_sz;
  3600. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3601. __func__));
  3602. /* clean the delayed target reset list */
  3603. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3604. &ioc->delayed_tr_list, list) {
  3605. list_del(&delayed_tr->list);
  3606. kfree(delayed_tr);
  3607. }
  3608. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3609. &ioc->delayed_tr_volume_list, list) {
  3610. list_del(&delayed_tr->list);
  3611. kfree(delayed_tr);
  3612. }
  3613. /* initialize the scsi lookup free list */
  3614. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3615. INIT_LIST_HEAD(&ioc->free_list);
  3616. smid = 1;
  3617. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3618. INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
  3619. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3620. ioc->scsi_lookup[i].smid = smid;
  3621. ioc->scsi_lookup[i].scmd = NULL;
  3622. ioc->scsi_lookup[i].direct_io = 0;
  3623. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3624. &ioc->free_list);
  3625. }
  3626. /* hi-priority queue */
  3627. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3628. smid = ioc->hi_priority_smid;
  3629. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3630. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3631. ioc->hpr_lookup[i].smid = smid;
  3632. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3633. &ioc->hpr_free_list);
  3634. }
  3635. /* internal queue */
  3636. INIT_LIST_HEAD(&ioc->internal_free_list);
  3637. smid = ioc->internal_smid;
  3638. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3639. ioc->internal_lookup[i].cb_idx = 0xFF;
  3640. ioc->internal_lookup[i].smid = smid;
  3641. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3642. &ioc->internal_free_list);
  3643. }
  3644. /* chain pool */
  3645. INIT_LIST_HEAD(&ioc->free_chain_list);
  3646. for (i = 0; i < ioc->chain_depth; i++)
  3647. list_add_tail(&ioc->chain_lookup[i].tracker_list,
  3648. &ioc->free_chain_list);
  3649. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3650. /* initialize Reply Free Queue */
  3651. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3652. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3653. ioc->reply_sz)
  3654. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3655. /* initialize reply queues */
  3656. if (ioc->is_driver_loading)
  3657. _base_assign_reply_queues(ioc);
  3658. /* initialize Reply Post Free Queue */
  3659. reply_post_free = (long)ioc->reply_post_free;
  3660. reply_post_free_sz = ioc->reply_post_queue_depth *
  3661. sizeof(Mpi2DefaultReplyDescriptor_t);
  3662. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3663. reply_q->reply_post_host_index = 0;
  3664. reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
  3665. reply_post_free;
  3666. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3667. reply_q->reply_post_free[i].Words =
  3668. cpu_to_le64(ULLONG_MAX);
  3669. if (!_base_is_controller_msix_enabled(ioc))
  3670. goto skip_init_reply_post_free_queue;
  3671. reply_post_free += reply_post_free_sz;
  3672. }
  3673. skip_init_reply_post_free_queue:
  3674. r = _base_send_ioc_init(ioc, sleep_flag);
  3675. if (r)
  3676. return r;
  3677. /* initialize reply free host index */
  3678. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3679. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3680. /* initialize reply post host index */
  3681. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3682. writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT,
  3683. &ioc->chip->ReplyPostHostIndex);
  3684. if (!_base_is_controller_msix_enabled(ioc))
  3685. goto skip_init_reply_post_host_index;
  3686. }
  3687. skip_init_reply_post_host_index:
  3688. _base_unmask_interrupts(ioc);
  3689. r = _base_event_notification(ioc, sleep_flag);
  3690. if (r)
  3691. return r;
  3692. if (sleep_flag == CAN_SLEEP)
  3693. _base_static_config_pages(ioc);
  3694. if (ioc->is_driver_loading) {
  3695. if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier
  3696. == 0x80) {
  3697. hide_flag = (u8) (ioc->manu_pg10.OEMSpecificFlags0 &
  3698. MFG_PAGE10_HIDE_SSDS_MASK);
  3699. if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
  3700. ioc->mfg_pg10_hide_flag = hide_flag;
  3701. }
  3702. ioc->wait_for_discovery_to_complete =
  3703. _base_determine_wait_on_discovery(ioc);
  3704. return r; /* scan_start and scan_finished support */
  3705. }
  3706. r = _base_send_port_enable(ioc, sleep_flag);
  3707. if (r)
  3708. return r;
  3709. return r;
  3710. }
  3711. /**
  3712. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3713. * @ioc: per adapter object
  3714. *
  3715. * Return nothing.
  3716. */
  3717. void
  3718. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3719. {
  3720. struct pci_dev *pdev = ioc->pdev;
  3721. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3722. __func__));
  3723. _base_mask_interrupts(ioc);
  3724. ioc->shost_recovery = 1;
  3725. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3726. ioc->shost_recovery = 0;
  3727. _base_free_irq(ioc);
  3728. _base_disable_msix(ioc);
  3729. if (ioc->chip_phys)
  3730. iounmap(ioc->chip);
  3731. ioc->chip_phys = 0;
  3732. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3733. pci_disable_pcie_error_reporting(pdev);
  3734. pci_disable_device(pdev);
  3735. return;
  3736. }
  3737. /**
  3738. * mpt2sas_base_attach - attach controller instance
  3739. * @ioc: per adapter object
  3740. *
  3741. * Returns 0 for success, non-zero for failure.
  3742. */
  3743. int
  3744. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3745. {
  3746. int r, i;
  3747. int cpu_id, last_cpu_id = 0;
  3748. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3749. __func__));
  3750. /* setup cpu_msix_table */
  3751. ioc->cpu_count = num_online_cpus();
  3752. for_each_online_cpu(cpu_id)
  3753. last_cpu_id = cpu_id;
  3754. ioc->cpu_msix_table_sz = last_cpu_id + 1;
  3755. ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
  3756. ioc->reply_queue_count = 1;
  3757. if (!ioc->cpu_msix_table) {
  3758. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  3759. "cpu_msix_table failed!!!\n", ioc->name));
  3760. r = -ENOMEM;
  3761. goto out_free_resources;
  3762. }
  3763. if (ioc->is_warpdrive) {
  3764. ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
  3765. sizeof(resource_size_t *), GFP_KERNEL);
  3766. if (!ioc->reply_post_host_index) {
  3767. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
  3768. "for cpu_msix_table failed!!!\n", ioc->name));
  3769. r = -ENOMEM;
  3770. goto out_free_resources;
  3771. }
  3772. }
  3773. r = mpt2sas_base_map_resources(ioc);
  3774. if (r)
  3775. goto out_free_resources;
  3776. if (ioc->is_warpdrive) {
  3777. ioc->reply_post_host_index[0] =
  3778. (resource_size_t *)&ioc->chip->ReplyPostHostIndex;
  3779. for (i = 1; i < ioc->cpu_msix_table_sz; i++)
  3780. ioc->reply_post_host_index[i] = (resource_size_t *)
  3781. ((u8 *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
  3782. * 4)));
  3783. }
  3784. pci_set_drvdata(ioc->pdev, ioc->shost);
  3785. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3786. if (r)
  3787. goto out_free_resources;
  3788. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3789. if (r)
  3790. goto out_free_resources;
  3791. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3792. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  3793. if (!ioc->pfacts) {
  3794. r = -ENOMEM;
  3795. goto out_free_resources;
  3796. }
  3797. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3798. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3799. if (r)
  3800. goto out_free_resources;
  3801. }
  3802. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3803. if (r)
  3804. goto out_free_resources;
  3805. init_waitqueue_head(&ioc->reset_wq);
  3806. /* allocate memory pd handle bitmask list */
  3807. ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
  3808. if (ioc->facts.MaxDevHandle % 8)
  3809. ioc->pd_handles_sz++;
  3810. ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
  3811. GFP_KERNEL);
  3812. if (!ioc->pd_handles) {
  3813. r = -ENOMEM;
  3814. goto out_free_resources;
  3815. }
  3816. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3817. /* base internal command bits */
  3818. mutex_init(&ioc->base_cmds.mutex);
  3819. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3820. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3821. /* port_enable command bits */
  3822. ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3823. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3824. /* transport internal command bits */
  3825. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3826. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3827. mutex_init(&ioc->transport_cmds.mutex);
  3828. /* scsih internal command bits */
  3829. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3830. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3831. mutex_init(&ioc->scsih_cmds.mutex);
  3832. /* task management internal command bits */
  3833. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3834. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3835. mutex_init(&ioc->tm_cmds.mutex);
  3836. /* config page internal command bits */
  3837. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3838. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3839. mutex_init(&ioc->config_cmds.mutex);
  3840. /* ctl module internal command bits */
  3841. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3842. ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
  3843. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3844. mutex_init(&ioc->ctl_cmds.mutex);
  3845. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3846. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3847. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
  3848. !ioc->ctl_cmds.sense) {
  3849. r = -ENOMEM;
  3850. goto out_free_resources;
  3851. }
  3852. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3853. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3854. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3855. r = -ENOMEM;
  3856. goto out_free_resources;
  3857. }
  3858. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3859. ioc->event_masks[i] = -1;
  3860. /* here we enable the events we care about */
  3861. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3862. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3863. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3864. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3865. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3866. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3867. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3868. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3869. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3870. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3871. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3872. if (r)
  3873. goto out_free_resources;
  3874. if (missing_delay[0] != -1 && missing_delay[1] != -1)
  3875. _base_update_missing_delay(ioc, missing_delay[0],
  3876. missing_delay[1]);
  3877. return 0;
  3878. out_free_resources:
  3879. ioc->remove_host = 1;
  3880. mpt2sas_base_free_resources(ioc);
  3881. _base_release_memory_pools(ioc);
  3882. pci_set_drvdata(ioc->pdev, NULL);
  3883. kfree(ioc->cpu_msix_table);
  3884. if (ioc->is_warpdrive)
  3885. kfree(ioc->reply_post_host_index);
  3886. kfree(ioc->pd_handles);
  3887. kfree(ioc->tm_cmds.reply);
  3888. kfree(ioc->transport_cmds.reply);
  3889. kfree(ioc->scsih_cmds.reply);
  3890. kfree(ioc->config_cmds.reply);
  3891. kfree(ioc->base_cmds.reply);
  3892. kfree(ioc->port_enable_cmds.reply);
  3893. kfree(ioc->ctl_cmds.reply);
  3894. kfree(ioc->ctl_cmds.sense);
  3895. kfree(ioc->pfacts);
  3896. ioc->ctl_cmds.reply = NULL;
  3897. ioc->base_cmds.reply = NULL;
  3898. ioc->tm_cmds.reply = NULL;
  3899. ioc->scsih_cmds.reply = NULL;
  3900. ioc->transport_cmds.reply = NULL;
  3901. ioc->config_cmds.reply = NULL;
  3902. ioc->pfacts = NULL;
  3903. return r;
  3904. }
  3905. /**
  3906. * mpt2sas_base_detach - remove controller instance
  3907. * @ioc: per adapter object
  3908. *
  3909. * Return nothing.
  3910. */
  3911. void
  3912. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3913. {
  3914. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3915. __func__));
  3916. mpt2sas_base_stop_watchdog(ioc);
  3917. mpt2sas_base_free_resources(ioc);
  3918. _base_release_memory_pools(ioc);
  3919. pci_set_drvdata(ioc->pdev, NULL);
  3920. kfree(ioc->cpu_msix_table);
  3921. if (ioc->is_warpdrive)
  3922. kfree(ioc->reply_post_host_index);
  3923. kfree(ioc->pd_handles);
  3924. kfree(ioc->pfacts);
  3925. kfree(ioc->ctl_cmds.reply);
  3926. kfree(ioc->ctl_cmds.sense);
  3927. kfree(ioc->base_cmds.reply);
  3928. kfree(ioc->port_enable_cmds.reply);
  3929. kfree(ioc->tm_cmds.reply);
  3930. kfree(ioc->transport_cmds.reply);
  3931. kfree(ioc->scsih_cmds.reply);
  3932. kfree(ioc->config_cmds.reply);
  3933. }
  3934. /**
  3935. * _base_reset_handler - reset callback handler (for base)
  3936. * @ioc: per adapter object
  3937. * @reset_phase: phase
  3938. *
  3939. * The handler for doing any required cleanup or initialization.
  3940. *
  3941. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3942. * MPT2_IOC_DONE_RESET
  3943. *
  3944. * Return nothing.
  3945. */
  3946. static void
  3947. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3948. {
  3949. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3950. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3951. switch (reset_phase) {
  3952. case MPT2_IOC_PRE_RESET:
  3953. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3954. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3955. break;
  3956. case MPT2_IOC_AFTER_RESET:
  3957. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3958. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3959. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3960. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3961. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3962. complete(&ioc->transport_cmds.done);
  3963. }
  3964. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3965. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3966. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3967. complete(&ioc->base_cmds.done);
  3968. }
  3969. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3970. ioc->port_enable_failed = 1;
  3971. ioc->port_enable_cmds.status |= MPT2_CMD_RESET;
  3972. mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
  3973. if (ioc->is_driver_loading) {
  3974. ioc->start_scan_failed =
  3975. MPI2_IOCSTATUS_INTERNAL_ERROR;
  3976. ioc->start_scan = 0;
  3977. ioc->port_enable_cmds.status =
  3978. MPT2_CMD_NOT_USED;
  3979. } else
  3980. complete(&ioc->port_enable_cmds.done);
  3981. }
  3982. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3983. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3984. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3985. ioc->config_cmds.smid = USHRT_MAX;
  3986. complete(&ioc->config_cmds.done);
  3987. }
  3988. break;
  3989. case MPT2_IOC_DONE_RESET:
  3990. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3991. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  3992. break;
  3993. }
  3994. }
  3995. /**
  3996. * _wait_for_commands_to_complete - reset controller
  3997. * @ioc: Pointer to MPT_ADAPTER structure
  3998. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3999. *
  4000. * This function waiting(3s) for all pending commands to complete
  4001. * prior to putting controller in reset.
  4002. */
  4003. static void
  4004. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  4005. {
  4006. u32 ioc_state;
  4007. unsigned long flags;
  4008. u16 i;
  4009. ioc->pending_io_count = 0;
  4010. if (sleep_flag != CAN_SLEEP)
  4011. return;
  4012. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  4013. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  4014. return;
  4015. /* pending command count */
  4016. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  4017. for (i = 0; i < ioc->scsiio_depth; i++)
  4018. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  4019. ioc->pending_io_count++;
  4020. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  4021. if (!ioc->pending_io_count)
  4022. return;
  4023. /* wait for pending commands to complete */
  4024. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
  4025. }
  4026. /**
  4027. * mpt2sas_base_hard_reset_handler - reset controller
  4028. * @ioc: Pointer to MPT_ADAPTER structure
  4029. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4030. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  4031. *
  4032. * Returns 0 for success, non-zero for failure.
  4033. */
  4034. int
  4035. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  4036. enum reset_type type)
  4037. {
  4038. int r;
  4039. unsigned long flags;
  4040. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
  4041. __func__));
  4042. if (ioc->pci_error_recovery) {
  4043. printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
  4044. ioc->name, __func__);
  4045. r = 0;
  4046. goto out_unlocked;
  4047. }
  4048. if (mpt2sas_fwfault_debug)
  4049. mpt2sas_halt_firmware(ioc);
  4050. /* TODO - What we really should be doing is pulling
  4051. * out all the code associated with NO_SLEEP; its never used.
  4052. * That is legacy code from mpt fusion driver, ported over.
  4053. * I will leave this BUG_ON here for now till its been resolved.
  4054. */
  4055. BUG_ON(sleep_flag == NO_SLEEP);
  4056. /* wait for an active reset in progress to complete */
  4057. if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
  4058. do {
  4059. ssleep(1);
  4060. } while (ioc->shost_recovery == 1);
  4061. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4062. __func__));
  4063. return ioc->ioc_reset_in_progress_status;
  4064. }
  4065. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4066. ioc->shost_recovery = 1;
  4067. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4068. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  4069. _wait_for_commands_to_complete(ioc, sleep_flag);
  4070. _base_mask_interrupts(ioc);
  4071. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  4072. if (r)
  4073. goto out;
  4074. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  4075. /* If this hard reset is called while port enable is active, then
  4076. * there is no reason to call make_ioc_operational
  4077. */
  4078. if (ioc->is_driver_loading && ioc->port_enable_failed) {
  4079. ioc->remove_host = 1;
  4080. r = -EFAULT;
  4081. goto out;
  4082. }
  4083. r = _base_make_ioc_operational(ioc, sleep_flag);
  4084. if (!r)
  4085. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  4086. out:
  4087. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
  4088. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  4089. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4090. ioc->ioc_reset_in_progress_status = r;
  4091. ioc->shost_recovery = 0;
  4092. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4093. mutex_unlock(&ioc->reset_in_progress_mutex);
  4094. out_unlocked:
  4095. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4096. __func__));
  4097. return r;
  4098. }