omap_hwmod.c 110 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011-2012 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <linux/slab.h>
  139. #include <linux/bootmem.h>
  140. #include "common.h"
  141. #include <plat/cpu.h>
  142. #include "clockdomain.h"
  143. #include "powerdomain.h"
  144. #include <plat/clock.h>
  145. #include <plat/omap_hwmod.h>
  146. #include <plat/prcm.h>
  147. #include "cm2xxx_3xxx.h"
  148. #include "cminst44xx.h"
  149. #include "cm33xx.h"
  150. #include "prm2xxx_3xxx.h"
  151. #include "prm44xx.h"
  152. #include "prm33xx.h"
  153. #include "prminst44xx.h"
  154. #include "mux.h"
  155. #include "pm.h"
  156. /* Maximum microseconds to wait for OMAP module to softreset */
  157. #define MAX_MODULE_SOFTRESET_WAIT 10000
  158. /* Name of the OMAP hwmod for the MPU */
  159. #define MPU_INITIATOR_NAME "mpu"
  160. /*
  161. * Number of struct omap_hwmod_link records per struct
  162. * omap_hwmod_ocp_if record (master->slave and slave->master)
  163. */
  164. #define LINKS_PER_OCP_IF 2
  165. /**
  166. * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
  167. * @enable_module: function to enable a module (via MODULEMODE)
  168. * @disable_module: function to disable a module (via MODULEMODE)
  169. *
  170. * XXX Eventually this functionality will be hidden inside the PRM/CM
  171. * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
  172. * conditionals in this code.
  173. */
  174. struct omap_hwmod_soc_ops {
  175. void (*enable_module)(struct omap_hwmod *oh);
  176. int (*disable_module)(struct omap_hwmod *oh);
  177. int (*wait_target_ready)(struct omap_hwmod *oh);
  178. int (*assert_hardreset)(struct omap_hwmod *oh,
  179. struct omap_hwmod_rst_info *ohri);
  180. int (*deassert_hardreset)(struct omap_hwmod *oh,
  181. struct omap_hwmod_rst_info *ohri);
  182. int (*is_hardreset_asserted)(struct omap_hwmod *oh,
  183. struct omap_hwmod_rst_info *ohri);
  184. int (*init_clkdm)(struct omap_hwmod *oh);
  185. };
  186. /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
  187. static struct omap_hwmod_soc_ops soc_ops;
  188. /* omap_hwmod_list contains all registered struct omap_hwmods */
  189. static LIST_HEAD(omap_hwmod_list);
  190. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  191. static struct omap_hwmod *mpu_oh;
  192. /* io_chain_lock: used to serialize reconfigurations of the I/O chain */
  193. static DEFINE_SPINLOCK(io_chain_lock);
  194. /*
  195. * linkspace: ptr to a buffer that struct omap_hwmod_link records are
  196. * allocated from - used to reduce the number of small memory
  197. * allocations, which has a significant impact on performance
  198. */
  199. static struct omap_hwmod_link *linkspace;
  200. /*
  201. * free_ls, max_ls: array indexes into linkspace; representing the
  202. * next free struct omap_hwmod_link index, and the maximum number of
  203. * struct omap_hwmod_link records allocated (respectively)
  204. */
  205. static unsigned short free_ls, max_ls, ls_supp;
  206. /* inited: set to true once the hwmod code is initialized */
  207. static bool inited;
  208. /* Private functions */
  209. /**
  210. * _fetch_next_ocp_if - return the next OCP interface in a list
  211. * @p: ptr to a ptr to the list_head inside the ocp_if to return
  212. * @i: pointer to the index of the element pointed to by @p in the list
  213. *
  214. * Return a pointer to the struct omap_hwmod_ocp_if record
  215. * containing the struct list_head pointed to by @p, and increment
  216. * @p such that a future call to this routine will return the next
  217. * record.
  218. */
  219. static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
  220. int *i)
  221. {
  222. struct omap_hwmod_ocp_if *oi;
  223. oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
  224. *p = (*p)->next;
  225. *i = *i + 1;
  226. return oi;
  227. }
  228. /**
  229. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  230. * @oh: struct omap_hwmod *
  231. *
  232. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  233. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  234. * OCP_SYSCONFIG register or 0 upon success.
  235. */
  236. static int _update_sysc_cache(struct omap_hwmod *oh)
  237. {
  238. if (!oh->class->sysc) {
  239. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  240. return -EINVAL;
  241. }
  242. /* XXX ensure module interface clock is up */
  243. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  244. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  245. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  246. return 0;
  247. }
  248. /**
  249. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  250. * @v: OCP_SYSCONFIG value to write
  251. * @oh: struct omap_hwmod *
  252. *
  253. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  254. * one. No return value.
  255. */
  256. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  257. {
  258. if (!oh->class->sysc) {
  259. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  260. return;
  261. }
  262. /* XXX ensure module interface clock is up */
  263. /* Module might have lost context, always update cache and register */
  264. oh->_sysc_cache = v;
  265. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  266. }
  267. /**
  268. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  269. * @oh: struct omap_hwmod *
  270. * @standbymode: MIDLEMODE field bits
  271. * @v: pointer to register contents to modify
  272. *
  273. * Update the master standby mode bits in @v to be @standbymode for
  274. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  275. * upon error or 0 upon success.
  276. */
  277. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  278. u32 *v)
  279. {
  280. u32 mstandby_mask;
  281. u8 mstandby_shift;
  282. if (!oh->class->sysc ||
  283. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  284. return -EINVAL;
  285. if (!oh->class->sysc->sysc_fields) {
  286. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  287. return -EINVAL;
  288. }
  289. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  290. mstandby_mask = (0x3 << mstandby_shift);
  291. *v &= ~mstandby_mask;
  292. *v |= __ffs(standbymode) << mstandby_shift;
  293. return 0;
  294. }
  295. /**
  296. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  297. * @oh: struct omap_hwmod *
  298. * @idlemode: SIDLEMODE field bits
  299. * @v: pointer to register contents to modify
  300. *
  301. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  302. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  303. * or 0 upon success.
  304. */
  305. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  306. {
  307. u32 sidle_mask;
  308. u8 sidle_shift;
  309. if (!oh->class->sysc ||
  310. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  311. return -EINVAL;
  312. if (!oh->class->sysc->sysc_fields) {
  313. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  314. return -EINVAL;
  315. }
  316. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  317. sidle_mask = (0x3 << sidle_shift);
  318. *v &= ~sidle_mask;
  319. *v |= __ffs(idlemode) << sidle_shift;
  320. return 0;
  321. }
  322. /**
  323. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  324. * @oh: struct omap_hwmod *
  325. * @clockact: CLOCKACTIVITY field bits
  326. * @v: pointer to register contents to modify
  327. *
  328. * Update the clockactivity mode bits in @v to be @clockact for the
  329. * @oh hwmod. Used for additional powersaving on some modules. Does
  330. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  331. * success.
  332. */
  333. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  334. {
  335. u32 clkact_mask;
  336. u8 clkact_shift;
  337. if (!oh->class->sysc ||
  338. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  339. return -EINVAL;
  340. if (!oh->class->sysc->sysc_fields) {
  341. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  342. return -EINVAL;
  343. }
  344. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  345. clkact_mask = (0x3 << clkact_shift);
  346. *v &= ~clkact_mask;
  347. *v |= clockact << clkact_shift;
  348. return 0;
  349. }
  350. /**
  351. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  352. * @oh: struct omap_hwmod *
  353. * @v: pointer to register contents to modify
  354. *
  355. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  356. * error or 0 upon success.
  357. */
  358. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  359. {
  360. u32 softrst_mask;
  361. if (!oh->class->sysc ||
  362. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  363. return -EINVAL;
  364. if (!oh->class->sysc->sysc_fields) {
  365. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  366. return -EINVAL;
  367. }
  368. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  369. *v |= softrst_mask;
  370. return 0;
  371. }
  372. /**
  373. * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
  374. * @oh: struct omap_hwmod *
  375. *
  376. * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
  377. * of some modules. When the DMA must perform read/write accesses, the
  378. * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
  379. * for power management, software must set the DMADISABLE bit back to 1.
  380. *
  381. * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
  382. * error or 0 upon success.
  383. */
  384. static int _set_dmadisable(struct omap_hwmod *oh)
  385. {
  386. u32 v;
  387. u32 dmadisable_mask;
  388. if (!oh->class->sysc ||
  389. !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
  390. return -EINVAL;
  391. if (!oh->class->sysc->sysc_fields) {
  392. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  393. return -EINVAL;
  394. }
  395. /* clocks must be on for this operation */
  396. if (oh->_state != _HWMOD_STATE_ENABLED) {
  397. pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
  398. return -EINVAL;
  399. }
  400. pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
  401. v = oh->_sysc_cache;
  402. dmadisable_mask =
  403. (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
  404. v |= dmadisable_mask;
  405. _write_sysconfig(v, oh);
  406. return 0;
  407. }
  408. /**
  409. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  410. * @oh: struct omap_hwmod *
  411. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  412. * @v: pointer to register contents to modify
  413. *
  414. * Update the module autoidle bit in @v to be @autoidle for the @oh
  415. * hwmod. The autoidle bit controls whether the module can gate
  416. * internal clocks automatically when it isn't doing anything; the
  417. * exact function of this bit varies on a per-module basis. This
  418. * function does not write to the hardware. Returns -EINVAL upon
  419. * error or 0 upon success.
  420. */
  421. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  422. u32 *v)
  423. {
  424. u32 autoidle_mask;
  425. u8 autoidle_shift;
  426. if (!oh->class->sysc ||
  427. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  428. return -EINVAL;
  429. if (!oh->class->sysc->sysc_fields) {
  430. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  431. return -EINVAL;
  432. }
  433. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  434. autoidle_mask = (0x1 << autoidle_shift);
  435. *v &= ~autoidle_mask;
  436. *v |= autoidle << autoidle_shift;
  437. return 0;
  438. }
  439. /**
  440. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  441. * @oh: struct omap_hwmod *
  442. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  443. *
  444. * Set or clear the I/O pad wakeup flag in the mux entries for the
  445. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  446. * in memory. If the hwmod is currently idled, and the new idle
  447. * values don't match the previous ones, this function will also
  448. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  449. * currently idled, this function won't touch the hardware: the new
  450. * mux settings are written to the SCM PADCTRL registers when the
  451. * hwmod is idled. No return value.
  452. */
  453. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  454. {
  455. struct omap_device_pad *pad;
  456. bool change = false;
  457. u16 prev_idle;
  458. int j;
  459. if (!oh->mux || !oh->mux->enabled)
  460. return;
  461. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  462. pad = oh->mux->pads_dynamic[j];
  463. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  464. continue;
  465. prev_idle = pad->idle;
  466. if (set_wake)
  467. pad->idle |= OMAP_WAKEUP_EN;
  468. else
  469. pad->idle &= ~OMAP_WAKEUP_EN;
  470. if (prev_idle != pad->idle)
  471. change = true;
  472. }
  473. if (change && oh->_state == _HWMOD_STATE_IDLE)
  474. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  475. }
  476. /**
  477. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  478. * @oh: struct omap_hwmod *
  479. *
  480. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  481. * upon error or 0 upon success.
  482. */
  483. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  484. {
  485. if (!oh->class->sysc ||
  486. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  487. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  488. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  489. return -EINVAL;
  490. if (!oh->class->sysc->sysc_fields) {
  491. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  492. return -EINVAL;
  493. }
  494. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  495. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  496. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  497. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  498. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  499. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  500. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  501. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  502. return 0;
  503. }
  504. /**
  505. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  506. * @oh: struct omap_hwmod *
  507. *
  508. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  509. * upon error or 0 upon success.
  510. */
  511. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  512. {
  513. if (!oh->class->sysc ||
  514. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  515. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  516. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  517. return -EINVAL;
  518. if (!oh->class->sysc->sysc_fields) {
  519. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  520. return -EINVAL;
  521. }
  522. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  523. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  524. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  525. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  526. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  527. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
  528. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  529. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  530. return 0;
  531. }
  532. /**
  533. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  534. * @oh: struct omap_hwmod *
  535. *
  536. * Prevent the hardware module @oh from entering idle while the
  537. * hardare module initiator @init_oh is active. Useful when a module
  538. * will be accessed by a particular initiator (e.g., if a module will
  539. * be accessed by the IVA, there should be a sleepdep between the IVA
  540. * initiator and the module). Only applies to modules in smart-idle
  541. * mode. If the clockdomain is marked as not needing autodeps, return
  542. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  543. * passes along clkdm_add_sleepdep() value upon success.
  544. */
  545. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  546. {
  547. if (!oh->_clk)
  548. return -EINVAL;
  549. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  550. return 0;
  551. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  552. }
  553. /**
  554. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  555. * @oh: struct omap_hwmod *
  556. *
  557. * Allow the hardware module @oh to enter idle while the hardare
  558. * module initiator @init_oh is active. Useful when a module will not
  559. * be accessed by a particular initiator (e.g., if a module will not
  560. * be accessed by the IVA, there should be no sleepdep between the IVA
  561. * initiator and the module). Only applies to modules in smart-idle
  562. * mode. If the clockdomain is marked as not needing autodeps, return
  563. * 0 without doing anything. Returns -EINVAL upon error or passes
  564. * along clkdm_del_sleepdep() value upon success.
  565. */
  566. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  567. {
  568. if (!oh->_clk)
  569. return -EINVAL;
  570. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  571. return 0;
  572. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  573. }
  574. /**
  575. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  576. * @oh: struct omap_hwmod *
  577. *
  578. * Called from _init_clocks(). Populates the @oh _clk (main
  579. * functional clock pointer) if a main_clk is present. Returns 0 on
  580. * success or -EINVAL on error.
  581. */
  582. static int _init_main_clk(struct omap_hwmod *oh)
  583. {
  584. int ret = 0;
  585. if (!oh->main_clk)
  586. return 0;
  587. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  588. if (!oh->_clk) {
  589. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  590. oh->name, oh->main_clk);
  591. return -EINVAL;
  592. }
  593. if (!oh->_clk->clkdm)
  594. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  595. oh->main_clk, oh->_clk->name);
  596. return ret;
  597. }
  598. /**
  599. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  600. * @oh: struct omap_hwmod *
  601. *
  602. * Called from _init_clocks(). Populates the @oh OCP slave interface
  603. * clock pointers. Returns 0 on success or -EINVAL on error.
  604. */
  605. static int _init_interface_clks(struct omap_hwmod *oh)
  606. {
  607. struct omap_hwmod_ocp_if *os;
  608. struct list_head *p;
  609. struct clk *c;
  610. int i = 0;
  611. int ret = 0;
  612. p = oh->slave_ports.next;
  613. while (i < oh->slaves_cnt) {
  614. os = _fetch_next_ocp_if(&p, &i);
  615. if (!os->clk)
  616. continue;
  617. c = omap_clk_get_by_name(os->clk);
  618. if (!c) {
  619. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  620. oh->name, os->clk);
  621. ret = -EINVAL;
  622. }
  623. os->_clk = c;
  624. }
  625. return ret;
  626. }
  627. /**
  628. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  629. * @oh: struct omap_hwmod *
  630. *
  631. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  632. * clock pointers. Returns 0 on success or -EINVAL on error.
  633. */
  634. static int _init_opt_clks(struct omap_hwmod *oh)
  635. {
  636. struct omap_hwmod_opt_clk *oc;
  637. struct clk *c;
  638. int i;
  639. int ret = 0;
  640. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  641. c = omap_clk_get_by_name(oc->clk);
  642. if (!c) {
  643. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  644. oh->name, oc->clk);
  645. ret = -EINVAL;
  646. }
  647. oc->_clk = c;
  648. }
  649. return ret;
  650. }
  651. /**
  652. * _enable_clocks - enable hwmod main clock and interface clocks
  653. * @oh: struct omap_hwmod *
  654. *
  655. * Enables all clocks necessary for register reads and writes to succeed
  656. * on the hwmod @oh. Returns 0.
  657. */
  658. static int _enable_clocks(struct omap_hwmod *oh)
  659. {
  660. struct omap_hwmod_ocp_if *os;
  661. struct list_head *p;
  662. int i = 0;
  663. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  664. if (oh->_clk)
  665. clk_enable(oh->_clk);
  666. p = oh->slave_ports.next;
  667. while (i < oh->slaves_cnt) {
  668. os = _fetch_next_ocp_if(&p, &i);
  669. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  670. clk_enable(os->_clk);
  671. }
  672. /* The opt clocks are controlled by the device driver. */
  673. return 0;
  674. }
  675. /**
  676. * _disable_clocks - disable hwmod main clock and interface clocks
  677. * @oh: struct omap_hwmod *
  678. *
  679. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  680. */
  681. static int _disable_clocks(struct omap_hwmod *oh)
  682. {
  683. struct omap_hwmod_ocp_if *os;
  684. struct list_head *p;
  685. int i = 0;
  686. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  687. if (oh->_clk)
  688. clk_disable(oh->_clk);
  689. p = oh->slave_ports.next;
  690. while (i < oh->slaves_cnt) {
  691. os = _fetch_next_ocp_if(&p, &i);
  692. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  693. clk_disable(os->_clk);
  694. }
  695. /* The opt clocks are controlled by the device driver. */
  696. return 0;
  697. }
  698. static void _enable_optional_clocks(struct omap_hwmod *oh)
  699. {
  700. struct omap_hwmod_opt_clk *oc;
  701. int i;
  702. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  703. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  704. if (oc->_clk) {
  705. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  706. oc->_clk->name);
  707. clk_enable(oc->_clk);
  708. }
  709. }
  710. static void _disable_optional_clocks(struct omap_hwmod *oh)
  711. {
  712. struct omap_hwmod_opt_clk *oc;
  713. int i;
  714. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  715. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  716. if (oc->_clk) {
  717. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  718. oc->_clk->name);
  719. clk_disable(oc->_clk);
  720. }
  721. }
  722. /**
  723. * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
  724. * @oh: struct omap_hwmod *
  725. *
  726. * Enables the PRCM module mode related to the hwmod @oh.
  727. * No return value.
  728. */
  729. static void _omap4_enable_module(struct omap_hwmod *oh)
  730. {
  731. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  732. return;
  733. pr_debug("omap_hwmod: %s: %s: %d\n",
  734. oh->name, __func__, oh->prcm.omap4.modulemode);
  735. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  736. oh->clkdm->prcm_partition,
  737. oh->clkdm->cm_inst,
  738. oh->clkdm->clkdm_offs,
  739. oh->prcm.omap4.clkctrl_offs);
  740. }
  741. /**
  742. * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
  743. * @oh: struct omap_hwmod *
  744. *
  745. * Enables the PRCM module mode related to the hwmod @oh.
  746. * No return value.
  747. */
  748. static void _am33xx_enable_module(struct omap_hwmod *oh)
  749. {
  750. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  751. return;
  752. pr_debug("omap_hwmod: %s: %s: %d\n",
  753. oh->name, __func__, oh->prcm.omap4.modulemode);
  754. am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
  755. oh->clkdm->clkdm_offs,
  756. oh->prcm.omap4.clkctrl_offs);
  757. }
  758. /**
  759. * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  760. * @oh: struct omap_hwmod *
  761. *
  762. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  763. * does not have an IDLEST bit or if the module successfully enters
  764. * slave idle; otherwise, pass along the return value of the
  765. * appropriate *_cm*_wait_module_idle() function.
  766. */
  767. static int _omap4_wait_target_disable(struct omap_hwmod *oh)
  768. {
  769. if (!oh || !oh->clkdm)
  770. return -EINVAL;
  771. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  772. return 0;
  773. if (oh->flags & HWMOD_NO_IDLEST)
  774. return 0;
  775. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  776. oh->clkdm->cm_inst,
  777. oh->clkdm->clkdm_offs,
  778. oh->prcm.omap4.clkctrl_offs);
  779. }
  780. /**
  781. * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
  782. * @oh: struct omap_hwmod *
  783. *
  784. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  785. * does not have an IDLEST bit or if the module successfully enters
  786. * slave idle; otherwise, pass along the return value of the
  787. * appropriate *_cm*_wait_module_idle() function.
  788. */
  789. static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
  790. {
  791. if (!oh)
  792. return -EINVAL;
  793. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  794. return 0;
  795. if (oh->flags & HWMOD_NO_IDLEST)
  796. return 0;
  797. return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
  798. oh->clkdm->clkdm_offs,
  799. oh->prcm.omap4.clkctrl_offs);
  800. }
  801. /**
  802. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  803. * @oh: struct omap_hwmod *oh
  804. *
  805. * Count and return the number of MPU IRQs associated with the hwmod
  806. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  807. * NULL.
  808. */
  809. static int _count_mpu_irqs(struct omap_hwmod *oh)
  810. {
  811. struct omap_hwmod_irq_info *ohii;
  812. int i = 0;
  813. if (!oh || !oh->mpu_irqs)
  814. return 0;
  815. do {
  816. ohii = &oh->mpu_irqs[i++];
  817. } while (ohii->irq != -1);
  818. return i-1;
  819. }
  820. /**
  821. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  822. * @oh: struct omap_hwmod *oh
  823. *
  824. * Count and return the number of SDMA request lines associated with
  825. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  826. * if @oh is NULL.
  827. */
  828. static int _count_sdma_reqs(struct omap_hwmod *oh)
  829. {
  830. struct omap_hwmod_dma_info *ohdi;
  831. int i = 0;
  832. if (!oh || !oh->sdma_reqs)
  833. return 0;
  834. do {
  835. ohdi = &oh->sdma_reqs[i++];
  836. } while (ohdi->dma_req != -1);
  837. return i-1;
  838. }
  839. /**
  840. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  841. * @oh: struct omap_hwmod *oh
  842. *
  843. * Count and return the number of address space ranges associated with
  844. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  845. * if @oh is NULL.
  846. */
  847. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  848. {
  849. struct omap_hwmod_addr_space *mem;
  850. int i = 0;
  851. if (!os || !os->addr)
  852. return 0;
  853. do {
  854. mem = &os->addr[i++];
  855. } while (mem->pa_start != mem->pa_end);
  856. return i-1;
  857. }
  858. /**
  859. * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
  860. * @oh: struct omap_hwmod * to operate on
  861. * @name: pointer to the name of the MPU interrupt number to fetch (optional)
  862. * @irq: pointer to an unsigned int to store the MPU IRQ number to
  863. *
  864. * Retrieve a MPU hardware IRQ line number named by @name associated
  865. * with the IP block pointed to by @oh. The IRQ number will be filled
  866. * into the address pointed to by @dma. When @name is non-null, the
  867. * IRQ line number associated with the named entry will be returned.
  868. * If @name is null, the first matching entry will be returned. Data
  869. * order is not meaningful in hwmod data, so callers are strongly
  870. * encouraged to use a non-null @name whenever possible to avoid
  871. * unpredictable effects if hwmod data is later added that causes data
  872. * ordering to change. Returns 0 upon success or a negative error
  873. * code upon error.
  874. */
  875. static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
  876. unsigned int *irq)
  877. {
  878. int i;
  879. bool found = false;
  880. if (!oh->mpu_irqs)
  881. return -ENOENT;
  882. i = 0;
  883. while (oh->mpu_irqs[i].irq != -1) {
  884. if (name == oh->mpu_irqs[i].name ||
  885. !strcmp(name, oh->mpu_irqs[i].name)) {
  886. found = true;
  887. break;
  888. }
  889. i++;
  890. }
  891. if (!found)
  892. return -ENOENT;
  893. *irq = oh->mpu_irqs[i].irq;
  894. return 0;
  895. }
  896. /**
  897. * _get_sdma_req_by_name - fetch SDMA request line ID by name
  898. * @oh: struct omap_hwmod * to operate on
  899. * @name: pointer to the name of the SDMA request line to fetch (optional)
  900. * @dma: pointer to an unsigned int to store the request line ID to
  901. *
  902. * Retrieve an SDMA request line ID named by @name on the IP block
  903. * pointed to by @oh. The ID will be filled into the address pointed
  904. * to by @dma. When @name is non-null, the request line ID associated
  905. * with the named entry will be returned. If @name is null, the first
  906. * matching entry will be returned. Data order is not meaningful in
  907. * hwmod data, so callers are strongly encouraged to use a non-null
  908. * @name whenever possible to avoid unpredictable effects if hwmod
  909. * data is later added that causes data ordering to change. Returns 0
  910. * upon success or a negative error code upon error.
  911. */
  912. static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
  913. unsigned int *dma)
  914. {
  915. int i;
  916. bool found = false;
  917. if (!oh->sdma_reqs)
  918. return -ENOENT;
  919. i = 0;
  920. while (oh->sdma_reqs[i].dma_req != -1) {
  921. if (name == oh->sdma_reqs[i].name ||
  922. !strcmp(name, oh->sdma_reqs[i].name)) {
  923. found = true;
  924. break;
  925. }
  926. i++;
  927. }
  928. if (!found)
  929. return -ENOENT;
  930. *dma = oh->sdma_reqs[i].dma_req;
  931. return 0;
  932. }
  933. /**
  934. * _get_addr_space_by_name - fetch address space start & end by name
  935. * @oh: struct omap_hwmod * to operate on
  936. * @name: pointer to the name of the address space to fetch (optional)
  937. * @pa_start: pointer to a u32 to store the starting address to
  938. * @pa_end: pointer to a u32 to store the ending address to
  939. *
  940. * Retrieve address space start and end addresses for the IP block
  941. * pointed to by @oh. The data will be filled into the addresses
  942. * pointed to by @pa_start and @pa_end. When @name is non-null, the
  943. * address space data associated with the named entry will be
  944. * returned. If @name is null, the first matching entry will be
  945. * returned. Data order is not meaningful in hwmod data, so callers
  946. * are strongly encouraged to use a non-null @name whenever possible
  947. * to avoid unpredictable effects if hwmod data is later added that
  948. * causes data ordering to change. Returns 0 upon success or a
  949. * negative error code upon error.
  950. */
  951. static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
  952. u32 *pa_start, u32 *pa_end)
  953. {
  954. int i, j;
  955. struct omap_hwmod_ocp_if *os;
  956. struct list_head *p = NULL;
  957. bool found = false;
  958. p = oh->slave_ports.next;
  959. i = 0;
  960. while (i < oh->slaves_cnt) {
  961. os = _fetch_next_ocp_if(&p, &i);
  962. if (!os->addr)
  963. return -ENOENT;
  964. j = 0;
  965. while (os->addr[j].pa_start != os->addr[j].pa_end) {
  966. if (name == os->addr[j].name ||
  967. !strcmp(name, os->addr[j].name)) {
  968. found = true;
  969. break;
  970. }
  971. j++;
  972. }
  973. if (found)
  974. break;
  975. }
  976. if (!found)
  977. return -ENOENT;
  978. *pa_start = os->addr[j].pa_start;
  979. *pa_end = os->addr[j].pa_end;
  980. return 0;
  981. }
  982. /**
  983. * _save_mpu_port_index - find and save the index to @oh's MPU port
  984. * @oh: struct omap_hwmod *
  985. *
  986. * Determines the array index of the OCP slave port that the MPU uses
  987. * to address the device, and saves it into the struct omap_hwmod.
  988. * Intended to be called during hwmod registration only. No return
  989. * value.
  990. */
  991. static void __init _save_mpu_port_index(struct omap_hwmod *oh)
  992. {
  993. struct omap_hwmod_ocp_if *os = NULL;
  994. struct list_head *p;
  995. int i = 0;
  996. if (!oh)
  997. return;
  998. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  999. p = oh->slave_ports.next;
  1000. while (i < oh->slaves_cnt) {
  1001. os = _fetch_next_ocp_if(&p, &i);
  1002. if (os->user & OCP_USER_MPU) {
  1003. oh->_mpu_port = os;
  1004. oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
  1005. break;
  1006. }
  1007. }
  1008. return;
  1009. }
  1010. /**
  1011. * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
  1012. * @oh: struct omap_hwmod *
  1013. *
  1014. * Given a pointer to a struct omap_hwmod record @oh, return a pointer
  1015. * to the struct omap_hwmod_ocp_if record that is used by the MPU to
  1016. * communicate with the IP block. This interface need not be directly
  1017. * connected to the MPU (and almost certainly is not), but is directly
  1018. * connected to the IP block represented by @oh. Returns a pointer
  1019. * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
  1020. * error or if there does not appear to be a path from the MPU to this
  1021. * IP block.
  1022. */
  1023. static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
  1024. {
  1025. if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
  1026. return NULL;
  1027. return oh->_mpu_port;
  1028. };
  1029. /**
  1030. * _find_mpu_rt_addr_space - return MPU register target address space for @oh
  1031. * @oh: struct omap_hwmod *
  1032. *
  1033. * Returns a pointer to the struct omap_hwmod_addr_space record representing
  1034. * the register target MPU address space; or returns NULL upon error.
  1035. */
  1036. static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
  1037. {
  1038. struct omap_hwmod_ocp_if *os;
  1039. struct omap_hwmod_addr_space *mem;
  1040. int found = 0, i = 0;
  1041. os = _find_mpu_rt_port(oh);
  1042. if (!os || !os->addr)
  1043. return NULL;
  1044. do {
  1045. mem = &os->addr[i++];
  1046. if (mem->flags & ADDR_TYPE_RT)
  1047. found = 1;
  1048. } while (!found && mem->pa_start != mem->pa_end);
  1049. return (found) ? mem : NULL;
  1050. }
  1051. /**
  1052. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  1053. * @oh: struct omap_hwmod *
  1054. *
  1055. * Ensure that the OCP_SYSCONFIG register for the IP block represented
  1056. * by @oh is set to indicate to the PRCM that the IP block is active.
  1057. * Usually this means placing the module into smart-idle mode and
  1058. * smart-standby, but if there is a bug in the automatic idle handling
  1059. * for the IP block, it may need to be placed into the force-idle or
  1060. * no-idle variants of these modes. No return value.
  1061. */
  1062. static void _enable_sysc(struct omap_hwmod *oh)
  1063. {
  1064. u8 idlemode, sf;
  1065. u32 v;
  1066. bool clkdm_act;
  1067. if (!oh->class->sysc)
  1068. return;
  1069. v = oh->_sysc_cache;
  1070. sf = oh->class->sysc->sysc_flags;
  1071. if (sf & SYSC_HAS_SIDLEMODE) {
  1072. clkdm_act = ((oh->clkdm &&
  1073. oh->clkdm->flags & CLKDM_ACTIVE_WITH_MPU) ||
  1074. (oh->_clk && oh->_clk->clkdm &&
  1075. oh->_clk->clkdm->flags & CLKDM_ACTIVE_WITH_MPU));
  1076. if (clkdm_act && !(oh->class->sysc->idlemodes &
  1077. (SIDLE_SMART | SIDLE_SMART_WKUP)))
  1078. idlemode = HWMOD_IDLEMODE_FORCE;
  1079. else
  1080. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  1081. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  1082. _set_slave_idlemode(oh, idlemode, &v);
  1083. }
  1084. if (sf & SYSC_HAS_MIDLEMODE) {
  1085. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1086. idlemode = HWMOD_IDLEMODE_NO;
  1087. } else {
  1088. if (sf & SYSC_HAS_ENAWAKEUP)
  1089. _enable_wakeup(oh, &v);
  1090. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1091. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1092. else
  1093. idlemode = HWMOD_IDLEMODE_SMART;
  1094. }
  1095. _set_master_standbymode(oh, idlemode, &v);
  1096. }
  1097. /*
  1098. * XXX The clock framework should handle this, by
  1099. * calling into this code. But this must wait until the
  1100. * clock structures are tagged with omap_hwmod entries
  1101. */
  1102. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  1103. (sf & SYSC_HAS_CLOCKACTIVITY))
  1104. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  1105. /* If slave is in SMARTIDLE, also enable wakeup */
  1106. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1107. _enable_wakeup(oh, &v);
  1108. _write_sysconfig(v, oh);
  1109. /*
  1110. * Set the autoidle bit only after setting the smartidle bit
  1111. * Setting this will not have any impact on the other modules.
  1112. */
  1113. if (sf & SYSC_HAS_AUTOIDLE) {
  1114. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  1115. 0 : 1;
  1116. _set_module_autoidle(oh, idlemode, &v);
  1117. _write_sysconfig(v, oh);
  1118. }
  1119. }
  1120. /**
  1121. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  1122. * @oh: struct omap_hwmod *
  1123. *
  1124. * If module is marked as SWSUP_SIDLE, force the module into slave
  1125. * idle; otherwise, configure it for smart-idle. If module is marked
  1126. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  1127. * configure it for smart-standby. No return value.
  1128. */
  1129. static void _idle_sysc(struct omap_hwmod *oh)
  1130. {
  1131. u8 idlemode, sf;
  1132. u32 v;
  1133. if (!oh->class->sysc)
  1134. return;
  1135. v = oh->_sysc_cache;
  1136. sf = oh->class->sysc->sysc_flags;
  1137. if (sf & SYSC_HAS_SIDLEMODE) {
  1138. /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
  1139. if (oh->flags & HWMOD_SWSUP_SIDLE ||
  1140. !(oh->class->sysc->idlemodes &
  1141. (SIDLE_SMART | SIDLE_SMART_WKUP)))
  1142. idlemode = HWMOD_IDLEMODE_FORCE;
  1143. else
  1144. idlemode = HWMOD_IDLEMODE_SMART;
  1145. _set_slave_idlemode(oh, idlemode, &v);
  1146. }
  1147. if (sf & SYSC_HAS_MIDLEMODE) {
  1148. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1149. idlemode = HWMOD_IDLEMODE_FORCE;
  1150. } else {
  1151. if (sf & SYSC_HAS_ENAWAKEUP)
  1152. _enable_wakeup(oh, &v);
  1153. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1154. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1155. else
  1156. idlemode = HWMOD_IDLEMODE_SMART;
  1157. }
  1158. _set_master_standbymode(oh, idlemode, &v);
  1159. }
  1160. /* If slave is in SMARTIDLE, also enable wakeup */
  1161. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1162. _enable_wakeup(oh, &v);
  1163. _write_sysconfig(v, oh);
  1164. }
  1165. /**
  1166. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  1167. * @oh: struct omap_hwmod *
  1168. *
  1169. * Force the module into slave idle and master suspend. No return
  1170. * value.
  1171. */
  1172. static void _shutdown_sysc(struct omap_hwmod *oh)
  1173. {
  1174. u32 v;
  1175. u8 sf;
  1176. if (!oh->class->sysc)
  1177. return;
  1178. v = oh->_sysc_cache;
  1179. sf = oh->class->sysc->sysc_flags;
  1180. if (sf & SYSC_HAS_SIDLEMODE)
  1181. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1182. if (sf & SYSC_HAS_MIDLEMODE)
  1183. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1184. if (sf & SYSC_HAS_AUTOIDLE)
  1185. _set_module_autoidle(oh, 1, &v);
  1186. _write_sysconfig(v, oh);
  1187. }
  1188. /**
  1189. * _lookup - find an omap_hwmod by name
  1190. * @name: find an omap_hwmod by name
  1191. *
  1192. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  1193. */
  1194. static struct omap_hwmod *_lookup(const char *name)
  1195. {
  1196. struct omap_hwmod *oh, *temp_oh;
  1197. oh = NULL;
  1198. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1199. if (!strcmp(name, temp_oh->name)) {
  1200. oh = temp_oh;
  1201. break;
  1202. }
  1203. }
  1204. return oh;
  1205. }
  1206. /**
  1207. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  1208. * @oh: struct omap_hwmod *
  1209. *
  1210. * Convert a clockdomain name stored in a struct omap_hwmod into a
  1211. * clockdomain pointer, and save it into the struct omap_hwmod.
  1212. * Return -EINVAL if the clkdm_name lookup failed.
  1213. */
  1214. static int _init_clkdm(struct omap_hwmod *oh)
  1215. {
  1216. if (!oh->clkdm_name)
  1217. return 0;
  1218. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  1219. if (!oh->clkdm) {
  1220. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  1221. oh->name, oh->clkdm_name);
  1222. return -EINVAL;
  1223. }
  1224. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  1225. oh->name, oh->clkdm_name);
  1226. return 0;
  1227. }
  1228. /**
  1229. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  1230. * well the clockdomain.
  1231. * @oh: struct omap_hwmod *
  1232. * @data: not used; pass NULL
  1233. *
  1234. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  1235. * Resolves all clock names embedded in the hwmod. Returns 0 on
  1236. * success, or a negative error code on failure.
  1237. */
  1238. static int _init_clocks(struct omap_hwmod *oh, void *data)
  1239. {
  1240. int ret = 0;
  1241. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1242. return 0;
  1243. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  1244. ret |= _init_main_clk(oh);
  1245. ret |= _init_interface_clks(oh);
  1246. ret |= _init_opt_clks(oh);
  1247. if (soc_ops.init_clkdm)
  1248. ret |= soc_ops.init_clkdm(oh);
  1249. if (!ret)
  1250. oh->_state = _HWMOD_STATE_CLKS_INITED;
  1251. else
  1252. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  1253. return ret;
  1254. }
  1255. /**
  1256. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1257. * @oh: struct omap_hwmod *
  1258. * @name: name of the reset line in the context of this hwmod
  1259. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1260. *
  1261. * Return the bit position of the reset line that match the
  1262. * input name. Return -ENOENT if not found.
  1263. */
  1264. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1265. struct omap_hwmod_rst_info *ohri)
  1266. {
  1267. int i;
  1268. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1269. const char *rst_line = oh->rst_lines[i].name;
  1270. if (!strcmp(rst_line, name)) {
  1271. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1272. ohri->st_shift = oh->rst_lines[i].st_shift;
  1273. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1274. oh->name, __func__, rst_line, ohri->rst_shift,
  1275. ohri->st_shift);
  1276. return 0;
  1277. }
  1278. }
  1279. return -ENOENT;
  1280. }
  1281. /**
  1282. * _assert_hardreset - assert the HW reset line of submodules
  1283. * contained in the hwmod module.
  1284. * @oh: struct omap_hwmod *
  1285. * @name: name of the reset line to lookup and assert
  1286. *
  1287. * Some IP like dsp, ipu or iva contain processor that require an HW
  1288. * reset line to be assert / deassert in order to enable fully the IP.
  1289. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1290. * asserting the hardreset line on the currently-booted SoC, or passes
  1291. * along the return value from _lookup_hardreset() or the SoC's
  1292. * assert_hardreset code.
  1293. */
  1294. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1295. {
  1296. struct omap_hwmod_rst_info ohri;
  1297. u8 ret = -EINVAL;
  1298. if (!oh)
  1299. return -EINVAL;
  1300. if (!soc_ops.assert_hardreset)
  1301. return -ENOSYS;
  1302. ret = _lookup_hardreset(oh, name, &ohri);
  1303. if (IS_ERR_VALUE(ret))
  1304. return ret;
  1305. ret = soc_ops.assert_hardreset(oh, &ohri);
  1306. return ret;
  1307. }
  1308. /**
  1309. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1310. * in the hwmod module.
  1311. * @oh: struct omap_hwmod *
  1312. * @name: name of the reset line to look up and deassert
  1313. *
  1314. * Some IP like dsp, ipu or iva contain processor that require an HW
  1315. * reset line to be assert / deassert in order to enable fully the IP.
  1316. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1317. * deasserting the hardreset line on the currently-booted SoC, or passes
  1318. * along the return value from _lookup_hardreset() or the SoC's
  1319. * deassert_hardreset code.
  1320. */
  1321. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1322. {
  1323. struct omap_hwmod_rst_info ohri;
  1324. int ret = -EINVAL;
  1325. if (!oh)
  1326. return -EINVAL;
  1327. if (!soc_ops.deassert_hardreset)
  1328. return -ENOSYS;
  1329. ret = _lookup_hardreset(oh, name, &ohri);
  1330. if (IS_ERR_VALUE(ret))
  1331. return ret;
  1332. ret = soc_ops.deassert_hardreset(oh, &ohri);
  1333. if (ret == -EBUSY)
  1334. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1335. return ret;
  1336. }
  1337. /**
  1338. * _read_hardreset - read the HW reset line state of submodules
  1339. * contained in the hwmod module
  1340. * @oh: struct omap_hwmod *
  1341. * @name: name of the reset line to look up and read
  1342. *
  1343. * Return the state of the reset line. Returns -EINVAL if @oh is
  1344. * null, -ENOSYS if we have no way of reading the hardreset line
  1345. * status on the currently-booted SoC, or passes along the return
  1346. * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
  1347. * code.
  1348. */
  1349. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1350. {
  1351. struct omap_hwmod_rst_info ohri;
  1352. u8 ret = -EINVAL;
  1353. if (!oh)
  1354. return -EINVAL;
  1355. if (!soc_ops.is_hardreset_asserted)
  1356. return -ENOSYS;
  1357. ret = _lookup_hardreset(oh, name, &ohri);
  1358. if (IS_ERR_VALUE(ret))
  1359. return ret;
  1360. return soc_ops.is_hardreset_asserted(oh, &ohri);
  1361. }
  1362. /**
  1363. * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
  1364. * @oh: struct omap_hwmod *
  1365. *
  1366. * If any hardreset line associated with @oh is asserted, then return true.
  1367. * Otherwise, if @oh has no hardreset lines associated with it, or if
  1368. * no hardreset lines associated with @oh are asserted, then return false.
  1369. * This function is used to avoid executing some parts of the IP block
  1370. * enable/disable sequence if a hardreset line is set.
  1371. */
  1372. static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
  1373. {
  1374. int i;
  1375. if (oh->rst_lines_cnt == 0)
  1376. return false;
  1377. for (i = 0; i < oh->rst_lines_cnt; i++)
  1378. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1379. return true;
  1380. return false;
  1381. }
  1382. /**
  1383. * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
  1384. * @oh: struct omap_hwmod *
  1385. *
  1386. * Disable the PRCM module mode related to the hwmod @oh.
  1387. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1388. */
  1389. static int _omap4_disable_module(struct omap_hwmod *oh)
  1390. {
  1391. int v;
  1392. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1393. return -EINVAL;
  1394. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1395. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  1396. oh->clkdm->cm_inst,
  1397. oh->clkdm->clkdm_offs,
  1398. oh->prcm.omap4.clkctrl_offs);
  1399. if (_are_any_hardreset_lines_asserted(oh))
  1400. return 0;
  1401. v = _omap4_wait_target_disable(oh);
  1402. if (v)
  1403. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1404. oh->name);
  1405. return 0;
  1406. }
  1407. /**
  1408. * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
  1409. * @oh: struct omap_hwmod *
  1410. *
  1411. * Disable the PRCM module mode related to the hwmod @oh.
  1412. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1413. */
  1414. static int _am33xx_disable_module(struct omap_hwmod *oh)
  1415. {
  1416. int v;
  1417. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1418. return -EINVAL;
  1419. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1420. am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
  1421. oh->prcm.omap4.clkctrl_offs);
  1422. if (_are_any_hardreset_lines_asserted(oh))
  1423. return 0;
  1424. v = _am33xx_wait_target_disable(oh);
  1425. if (v)
  1426. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1427. oh->name);
  1428. return 0;
  1429. }
  1430. /**
  1431. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1432. * @oh: struct omap_hwmod *
  1433. *
  1434. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1435. * enabled for this to work. Returns -ENOENT if the hwmod cannot be
  1436. * reset this way, -EINVAL if the hwmod is in the wrong state,
  1437. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1438. *
  1439. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1440. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1441. * use the SYSCONFIG softreset bit to provide the status.
  1442. *
  1443. * Note that some IP like McBSP do have reset control but don't have
  1444. * reset status.
  1445. */
  1446. static int _ocp_softreset(struct omap_hwmod *oh)
  1447. {
  1448. u32 v, softrst_mask;
  1449. int c = 0;
  1450. int ret = 0;
  1451. if (!oh->class->sysc ||
  1452. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1453. return -ENOENT;
  1454. /* clocks must be on for this operation */
  1455. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1456. pr_warning("omap_hwmod: %s: reset can only be entered from "
  1457. "enabled state\n", oh->name);
  1458. return -EINVAL;
  1459. }
  1460. /* For some modules, all optionnal clocks need to be enabled as well */
  1461. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1462. _enable_optional_clocks(oh);
  1463. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1464. v = oh->_sysc_cache;
  1465. ret = _set_softreset(oh, &v);
  1466. if (ret)
  1467. goto dis_opt_clks;
  1468. _write_sysconfig(v, oh);
  1469. if (oh->class->sysc->srst_udelay)
  1470. udelay(oh->class->sysc->srst_udelay);
  1471. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  1472. omap_test_timeout((omap_hwmod_read(oh,
  1473. oh->class->sysc->syss_offs)
  1474. & SYSS_RESETDONE_MASK),
  1475. MAX_MODULE_SOFTRESET_WAIT, c);
  1476. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
  1477. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  1478. omap_test_timeout(!(omap_hwmod_read(oh,
  1479. oh->class->sysc->sysc_offs)
  1480. & softrst_mask),
  1481. MAX_MODULE_SOFTRESET_WAIT, c);
  1482. }
  1483. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1484. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1485. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1486. else
  1487. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1488. /*
  1489. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1490. * _wait_target_ready() or _reset()
  1491. */
  1492. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1493. dis_opt_clks:
  1494. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1495. _disable_optional_clocks(oh);
  1496. return ret;
  1497. }
  1498. /**
  1499. * _reset - reset an omap_hwmod
  1500. * @oh: struct omap_hwmod *
  1501. *
  1502. * Resets an omap_hwmod @oh. If the module has a custom reset
  1503. * function pointer defined, then call it to reset the IP block, and
  1504. * pass along its return value to the caller. Otherwise, if the IP
  1505. * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
  1506. * associated with it, call a function to reset the IP block via that
  1507. * method, and pass along the return value to the caller. Finally, if
  1508. * the IP block has some hardreset lines associated with it, assert
  1509. * all of those, but do _not_ deassert them. (This is because driver
  1510. * authors have expressed an apparent requirement to control the
  1511. * deassertion of the hardreset lines themselves.)
  1512. *
  1513. * The default software reset mechanism for most OMAP IP blocks is
  1514. * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
  1515. * hwmods cannot be reset via this method. Some are not targets and
  1516. * therefore have no OCP header registers to access. Others (like the
  1517. * IVA) have idiosyncratic reset sequences. So for these relatively
  1518. * rare cases, custom reset code can be supplied in the struct
  1519. * omap_hwmod_class .reset function pointer.
  1520. *
  1521. * _set_dmadisable() is called to set the DMADISABLE bit so that it
  1522. * does not prevent idling of the system. This is necessary for cases
  1523. * where ROMCODE/BOOTLOADER uses dma and transfers control to the
  1524. * kernel without disabling dma.
  1525. *
  1526. * Passes along the return value from either _ocp_softreset() or the
  1527. * custom reset function - these must return -EINVAL if the hwmod
  1528. * cannot be reset this way or if the hwmod is in the wrong state,
  1529. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1530. */
  1531. static int _reset(struct omap_hwmod *oh)
  1532. {
  1533. int i, r;
  1534. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1535. if (oh->class->reset) {
  1536. r = oh->class->reset(oh);
  1537. } else {
  1538. if (oh->rst_lines_cnt > 0) {
  1539. for (i = 0; i < oh->rst_lines_cnt; i++)
  1540. _assert_hardreset(oh, oh->rst_lines[i].name);
  1541. return 0;
  1542. } else {
  1543. r = _ocp_softreset(oh);
  1544. if (r == -ENOENT)
  1545. r = 0;
  1546. }
  1547. }
  1548. _set_dmadisable(oh);
  1549. /*
  1550. * OCP_SYSCONFIG bits need to be reprogrammed after a
  1551. * softreset. The _enable() function should be split to avoid
  1552. * the rewrite of the OCP_SYSCONFIG register.
  1553. */
  1554. if (oh->class->sysc) {
  1555. _update_sysc_cache(oh);
  1556. _enable_sysc(oh);
  1557. }
  1558. return r;
  1559. }
  1560. /**
  1561. * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
  1562. *
  1563. * Call the appropriate PRM function to clear any logged I/O chain
  1564. * wakeups and to reconfigure the chain. This apparently needs to be
  1565. * done upon every mux change. Since hwmods can be concurrently
  1566. * enabled and idled, hold a spinlock around the I/O chain
  1567. * reconfiguration sequence. No return value.
  1568. *
  1569. * XXX When the PRM code is moved to drivers, this function can be removed,
  1570. * as the PRM infrastructure should abstract this.
  1571. */
  1572. static void _reconfigure_io_chain(void)
  1573. {
  1574. unsigned long flags;
  1575. spin_lock_irqsave(&io_chain_lock, flags);
  1576. if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
  1577. omap3xxx_prm_reconfigure_io_chain();
  1578. else if (cpu_is_omap44xx())
  1579. omap44xx_prm_reconfigure_io_chain();
  1580. spin_unlock_irqrestore(&io_chain_lock, flags);
  1581. }
  1582. /**
  1583. * _enable - enable an omap_hwmod
  1584. * @oh: struct omap_hwmod *
  1585. *
  1586. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1587. * register target. Returns -EINVAL if the hwmod is in the wrong
  1588. * state or passes along the return value of _wait_target_ready().
  1589. */
  1590. static int _enable(struct omap_hwmod *oh)
  1591. {
  1592. int r;
  1593. int hwsup = 0;
  1594. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1595. /*
  1596. * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
  1597. * state at init. Now that someone is really trying to enable
  1598. * them, just ensure that the hwmod mux is set.
  1599. */
  1600. if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
  1601. /*
  1602. * If the caller has mux data populated, do the mux'ing
  1603. * which wouldn't have been done as part of the _enable()
  1604. * done during setup.
  1605. */
  1606. if (oh->mux)
  1607. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1608. oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
  1609. return 0;
  1610. }
  1611. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1612. oh->_state != _HWMOD_STATE_IDLE &&
  1613. oh->_state != _HWMOD_STATE_DISABLED) {
  1614. WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
  1615. oh->name);
  1616. return -EINVAL;
  1617. }
  1618. /*
  1619. * If an IP block contains HW reset lines and any of them are
  1620. * asserted, we let integration code associated with that
  1621. * block handle the enable. We've received very little
  1622. * information on what those driver authors need, and until
  1623. * detailed information is provided and the driver code is
  1624. * posted to the public lists, this is probably the best we
  1625. * can do.
  1626. */
  1627. if (_are_any_hardreset_lines_asserted(oh))
  1628. return 0;
  1629. /* Mux pins for device runtime if populated */
  1630. if (oh->mux && (!oh->mux->enabled ||
  1631. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1632. oh->mux->pads_dynamic))) {
  1633. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1634. _reconfigure_io_chain();
  1635. }
  1636. _add_initiator_dep(oh, mpu_oh);
  1637. if (oh->clkdm) {
  1638. /*
  1639. * A clockdomain must be in SW_SUP before enabling
  1640. * completely the module. The clockdomain can be set
  1641. * in HW_AUTO only when the module become ready.
  1642. */
  1643. hwsup = clkdm_in_hwsup(oh->clkdm);
  1644. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1645. if (r) {
  1646. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1647. oh->name, oh->clkdm->name, r);
  1648. return r;
  1649. }
  1650. }
  1651. _enable_clocks(oh);
  1652. if (soc_ops.enable_module)
  1653. soc_ops.enable_module(oh);
  1654. r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
  1655. -EINVAL;
  1656. if (!r) {
  1657. /*
  1658. * Set the clockdomain to HW_AUTO only if the target is ready,
  1659. * assuming that the previous state was HW_AUTO
  1660. */
  1661. if (oh->clkdm && hwsup)
  1662. clkdm_allow_idle(oh->clkdm);
  1663. oh->_state = _HWMOD_STATE_ENABLED;
  1664. /* Access the sysconfig only if the target is ready */
  1665. if (oh->class->sysc) {
  1666. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1667. _update_sysc_cache(oh);
  1668. _enable_sysc(oh);
  1669. }
  1670. } else {
  1671. _disable_clocks(oh);
  1672. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1673. oh->name, r);
  1674. if (oh->clkdm)
  1675. clkdm_hwmod_disable(oh->clkdm, oh);
  1676. }
  1677. return r;
  1678. }
  1679. /**
  1680. * _idle - idle an omap_hwmod
  1681. * @oh: struct omap_hwmod *
  1682. *
  1683. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1684. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1685. * state or returns 0.
  1686. */
  1687. static int _idle(struct omap_hwmod *oh)
  1688. {
  1689. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1690. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1691. WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
  1692. oh->name);
  1693. return -EINVAL;
  1694. }
  1695. if (_are_any_hardreset_lines_asserted(oh))
  1696. return 0;
  1697. if (oh->class->sysc)
  1698. _idle_sysc(oh);
  1699. _del_initiator_dep(oh, mpu_oh);
  1700. if (soc_ops.disable_module)
  1701. soc_ops.disable_module(oh);
  1702. /*
  1703. * The module must be in idle mode before disabling any parents
  1704. * clocks. Otherwise, the parent clock might be disabled before
  1705. * the module transition is done, and thus will prevent the
  1706. * transition to complete properly.
  1707. */
  1708. _disable_clocks(oh);
  1709. if (oh->clkdm)
  1710. clkdm_hwmod_disable(oh->clkdm, oh);
  1711. /* Mux pins for device idle if populated */
  1712. if (oh->mux && oh->mux->pads_dynamic) {
  1713. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1714. _reconfigure_io_chain();
  1715. }
  1716. oh->_state = _HWMOD_STATE_IDLE;
  1717. return 0;
  1718. }
  1719. /**
  1720. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1721. * @oh: struct omap_hwmod *
  1722. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1723. *
  1724. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1725. * local copy. Intended to be used by drivers that require
  1726. * direct manipulation of the AUTOIDLE bits.
  1727. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1728. * along the return value from _set_module_autoidle().
  1729. *
  1730. * Any users of this function should be scrutinized carefully.
  1731. */
  1732. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1733. {
  1734. u32 v;
  1735. int retval = 0;
  1736. unsigned long flags;
  1737. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1738. return -EINVAL;
  1739. spin_lock_irqsave(&oh->_lock, flags);
  1740. v = oh->_sysc_cache;
  1741. retval = _set_module_autoidle(oh, autoidle, &v);
  1742. if (!retval)
  1743. _write_sysconfig(v, oh);
  1744. spin_unlock_irqrestore(&oh->_lock, flags);
  1745. return retval;
  1746. }
  1747. /**
  1748. * _shutdown - shutdown an omap_hwmod
  1749. * @oh: struct omap_hwmod *
  1750. *
  1751. * Shut down an omap_hwmod @oh. This should be called when the driver
  1752. * used for the hwmod is removed or unloaded or if the driver is not
  1753. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1754. * state or returns 0.
  1755. */
  1756. static int _shutdown(struct omap_hwmod *oh)
  1757. {
  1758. int ret, i;
  1759. u8 prev_state;
  1760. if (oh->_state != _HWMOD_STATE_IDLE &&
  1761. oh->_state != _HWMOD_STATE_ENABLED) {
  1762. WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
  1763. oh->name);
  1764. return -EINVAL;
  1765. }
  1766. if (_are_any_hardreset_lines_asserted(oh))
  1767. return 0;
  1768. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1769. if (oh->class->pre_shutdown) {
  1770. prev_state = oh->_state;
  1771. if (oh->_state == _HWMOD_STATE_IDLE)
  1772. _enable(oh);
  1773. ret = oh->class->pre_shutdown(oh);
  1774. if (ret) {
  1775. if (prev_state == _HWMOD_STATE_IDLE)
  1776. _idle(oh);
  1777. return ret;
  1778. }
  1779. }
  1780. if (oh->class->sysc) {
  1781. if (oh->_state == _HWMOD_STATE_IDLE)
  1782. _enable(oh);
  1783. _shutdown_sysc(oh);
  1784. }
  1785. /* clocks and deps are already disabled in idle */
  1786. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1787. _del_initiator_dep(oh, mpu_oh);
  1788. /* XXX what about the other system initiators here? dma, dsp */
  1789. if (soc_ops.disable_module)
  1790. soc_ops.disable_module(oh);
  1791. _disable_clocks(oh);
  1792. if (oh->clkdm)
  1793. clkdm_hwmod_disable(oh->clkdm, oh);
  1794. }
  1795. /* XXX Should this code also force-disable the optional clocks? */
  1796. for (i = 0; i < oh->rst_lines_cnt; i++)
  1797. _assert_hardreset(oh, oh->rst_lines[i].name);
  1798. /* Mux pins to safe mode or use populated off mode values */
  1799. if (oh->mux)
  1800. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1801. oh->_state = _HWMOD_STATE_DISABLED;
  1802. return 0;
  1803. }
  1804. /**
  1805. * _init_mpu_rt_base - populate the virtual address for a hwmod
  1806. * @oh: struct omap_hwmod * to locate the virtual address
  1807. *
  1808. * Cache the virtual address used by the MPU to access this IP block's
  1809. * registers. This address is needed early so the OCP registers that
  1810. * are part of the device's address space can be ioremapped properly.
  1811. * No return value.
  1812. */
  1813. static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1814. {
  1815. struct omap_hwmod_addr_space *mem;
  1816. void __iomem *va_start;
  1817. if (!oh)
  1818. return;
  1819. _save_mpu_port_index(oh);
  1820. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1821. return;
  1822. mem = _find_mpu_rt_addr_space(oh);
  1823. if (!mem) {
  1824. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  1825. oh->name);
  1826. return;
  1827. }
  1828. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  1829. if (!va_start) {
  1830. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  1831. return;
  1832. }
  1833. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  1834. oh->name, va_start);
  1835. oh->_mpu_rt_va = va_start;
  1836. }
  1837. /**
  1838. * _init - initialize internal data for the hwmod @oh
  1839. * @oh: struct omap_hwmod *
  1840. * @n: (unused)
  1841. *
  1842. * Look up the clocks and the address space used by the MPU to access
  1843. * registers belonging to the hwmod @oh. @oh must already be
  1844. * registered at this point. This is the first of two phases for
  1845. * hwmod initialization. Code called here does not touch any hardware
  1846. * registers, it simply prepares internal data structures. Returns 0
  1847. * upon success or if the hwmod isn't registered, or -EINVAL upon
  1848. * failure.
  1849. */
  1850. static int __init _init(struct omap_hwmod *oh, void *data)
  1851. {
  1852. int r;
  1853. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1854. return 0;
  1855. _init_mpu_rt_base(oh, NULL);
  1856. r = _init_clocks(oh, NULL);
  1857. if (IS_ERR_VALUE(r)) {
  1858. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
  1859. return -EINVAL;
  1860. }
  1861. oh->_state = _HWMOD_STATE_INITIALIZED;
  1862. return 0;
  1863. }
  1864. /**
  1865. * _setup_iclk_autoidle - configure an IP block's interface clocks
  1866. * @oh: struct omap_hwmod *
  1867. *
  1868. * Set up the module's interface clocks. XXX This function is still mostly
  1869. * a stub; implementing this properly requires iclk autoidle usecounting in
  1870. * the clock code. No return value.
  1871. */
  1872. static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
  1873. {
  1874. struct omap_hwmod_ocp_if *os;
  1875. struct list_head *p;
  1876. int i = 0;
  1877. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1878. return;
  1879. p = oh->slave_ports.next;
  1880. while (i < oh->slaves_cnt) {
  1881. os = _fetch_next_ocp_if(&p, &i);
  1882. if (!os->_clk)
  1883. continue;
  1884. if (os->flags & OCPIF_SWSUP_IDLE) {
  1885. /* XXX omap_iclk_deny_idle(c); */
  1886. } else {
  1887. /* XXX omap_iclk_allow_idle(c); */
  1888. clk_enable(os->_clk);
  1889. }
  1890. }
  1891. return;
  1892. }
  1893. /**
  1894. * _setup_reset - reset an IP block during the setup process
  1895. * @oh: struct omap_hwmod *
  1896. *
  1897. * Reset the IP block corresponding to the hwmod @oh during the setup
  1898. * process. The IP block is first enabled so it can be successfully
  1899. * reset. Returns 0 upon success or a negative error code upon
  1900. * failure.
  1901. */
  1902. static int __init _setup_reset(struct omap_hwmod *oh)
  1903. {
  1904. int r;
  1905. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1906. return -EINVAL;
  1907. if (oh->rst_lines_cnt == 0) {
  1908. r = _enable(oh);
  1909. if (r) {
  1910. pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
  1911. oh->name, oh->_state);
  1912. return -EINVAL;
  1913. }
  1914. }
  1915. if (!(oh->flags & HWMOD_INIT_NO_RESET))
  1916. r = _reset(oh);
  1917. return r;
  1918. }
  1919. /**
  1920. * _setup_postsetup - transition to the appropriate state after _setup
  1921. * @oh: struct omap_hwmod *
  1922. *
  1923. * Place an IP block represented by @oh into a "post-setup" state --
  1924. * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
  1925. * this function is called at the end of _setup().) The postsetup
  1926. * state for an IP block can be changed by calling
  1927. * omap_hwmod_enter_postsetup_state() early in the boot process,
  1928. * before one of the omap_hwmod_setup*() functions are called for the
  1929. * IP block.
  1930. *
  1931. * The IP block stays in this state until a PM runtime-based driver is
  1932. * loaded for that IP block. A post-setup state of IDLE is
  1933. * appropriate for almost all IP blocks with runtime PM-enabled
  1934. * drivers, since those drivers are able to enable the IP block. A
  1935. * post-setup state of ENABLED is appropriate for kernels with PM
  1936. * runtime disabled. The DISABLED state is appropriate for unusual IP
  1937. * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
  1938. * included, since the WDTIMER starts running on reset and will reset
  1939. * the MPU if left active.
  1940. *
  1941. * This post-setup mechanism is deprecated. Once all of the OMAP
  1942. * drivers have been converted to use PM runtime, and all of the IP
  1943. * block data and interconnect data is available to the hwmod code, it
  1944. * should be possible to replace this mechanism with a "lazy reset"
  1945. * arrangement. In a "lazy reset" setup, each IP block is enabled
  1946. * when the driver first probes, then all remaining IP blocks without
  1947. * drivers are either shut down or enabled after the drivers have
  1948. * loaded. However, this cannot take place until the above
  1949. * preconditions have been met, since otherwise the late reset code
  1950. * has no way of knowing which IP blocks are in use by drivers, and
  1951. * which ones are unused.
  1952. *
  1953. * No return value.
  1954. */
  1955. static void __init _setup_postsetup(struct omap_hwmod *oh)
  1956. {
  1957. u8 postsetup_state;
  1958. if (oh->rst_lines_cnt > 0)
  1959. return;
  1960. postsetup_state = oh->_postsetup_state;
  1961. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1962. postsetup_state = _HWMOD_STATE_ENABLED;
  1963. /*
  1964. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1965. * it should be set by the core code as a runtime flag during startup
  1966. */
  1967. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1968. (postsetup_state == _HWMOD_STATE_IDLE)) {
  1969. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  1970. postsetup_state = _HWMOD_STATE_ENABLED;
  1971. }
  1972. if (postsetup_state == _HWMOD_STATE_IDLE)
  1973. _idle(oh);
  1974. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1975. _shutdown(oh);
  1976. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1977. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1978. oh->name, postsetup_state);
  1979. return;
  1980. }
  1981. /**
  1982. * _setup - prepare IP block hardware for use
  1983. * @oh: struct omap_hwmod *
  1984. * @n: (unused, pass NULL)
  1985. *
  1986. * Configure the IP block represented by @oh. This may include
  1987. * enabling the IP block, resetting it, and placing it into a
  1988. * post-setup state, depending on the type of IP block and applicable
  1989. * flags. IP blocks are reset to prevent any previous configuration
  1990. * by the bootloader or previous operating system from interfering
  1991. * with power management or other parts of the system. The reset can
  1992. * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
  1993. * two phases for hwmod initialization. Code called here generally
  1994. * affects the IP block hardware, or system integration hardware
  1995. * associated with the IP block. Returns 0.
  1996. */
  1997. static int __init _setup(struct omap_hwmod *oh, void *data)
  1998. {
  1999. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2000. return 0;
  2001. _setup_iclk_autoidle(oh);
  2002. if (!_setup_reset(oh))
  2003. _setup_postsetup(oh);
  2004. return 0;
  2005. }
  2006. /**
  2007. * _register - register a struct omap_hwmod
  2008. * @oh: struct omap_hwmod *
  2009. *
  2010. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  2011. * already has been registered by the same name; -EINVAL if the
  2012. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  2013. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  2014. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  2015. * success.
  2016. *
  2017. * XXX The data should be copied into bootmem, so the original data
  2018. * should be marked __initdata and freed after init. This would allow
  2019. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  2020. * that the copy process would be relatively complex due to the large number
  2021. * of substructures.
  2022. */
  2023. static int __init _register(struct omap_hwmod *oh)
  2024. {
  2025. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  2026. (oh->_state != _HWMOD_STATE_UNKNOWN))
  2027. return -EINVAL;
  2028. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  2029. if (_lookup(oh->name))
  2030. return -EEXIST;
  2031. list_add_tail(&oh->node, &omap_hwmod_list);
  2032. INIT_LIST_HEAD(&oh->master_ports);
  2033. INIT_LIST_HEAD(&oh->slave_ports);
  2034. spin_lock_init(&oh->_lock);
  2035. oh->_state = _HWMOD_STATE_REGISTERED;
  2036. /*
  2037. * XXX Rather than doing a strcmp(), this should test a flag
  2038. * set in the hwmod data, inserted by the autogenerator code.
  2039. */
  2040. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  2041. mpu_oh = oh;
  2042. return 0;
  2043. }
  2044. /**
  2045. * _alloc_links - return allocated memory for hwmod links
  2046. * @ml: pointer to a struct omap_hwmod_link * for the master link
  2047. * @sl: pointer to a struct omap_hwmod_link * for the slave link
  2048. *
  2049. * Return pointers to two struct omap_hwmod_link records, via the
  2050. * addresses pointed to by @ml and @sl. Will first attempt to return
  2051. * memory allocated as part of a large initial block, but if that has
  2052. * been exhausted, will allocate memory itself. Since ideally this
  2053. * second allocation path will never occur, the number of these
  2054. * 'supplemental' allocations will be logged when debugging is
  2055. * enabled. Returns 0.
  2056. */
  2057. static int __init _alloc_links(struct omap_hwmod_link **ml,
  2058. struct omap_hwmod_link **sl)
  2059. {
  2060. unsigned int sz;
  2061. if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
  2062. *ml = &linkspace[free_ls++];
  2063. *sl = &linkspace[free_ls++];
  2064. return 0;
  2065. }
  2066. sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
  2067. *sl = NULL;
  2068. *ml = alloc_bootmem(sz);
  2069. memset(*ml, 0, sz);
  2070. *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
  2071. ls_supp++;
  2072. pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
  2073. ls_supp * LINKS_PER_OCP_IF);
  2074. return 0;
  2075. };
  2076. /**
  2077. * _add_link - add an interconnect between two IP blocks
  2078. * @oi: pointer to a struct omap_hwmod_ocp_if record
  2079. *
  2080. * Add struct omap_hwmod_link records connecting the master IP block
  2081. * specified in @oi->master to @oi, and connecting the slave IP block
  2082. * specified in @oi->slave to @oi. This code is assumed to run before
  2083. * preemption or SMP has been enabled, thus avoiding the need for
  2084. * locking in this code. Changes to this assumption will require
  2085. * additional locking. Returns 0.
  2086. */
  2087. static int __init _add_link(struct omap_hwmod_ocp_if *oi)
  2088. {
  2089. struct omap_hwmod_link *ml, *sl;
  2090. pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
  2091. oi->slave->name);
  2092. _alloc_links(&ml, &sl);
  2093. ml->ocp_if = oi;
  2094. INIT_LIST_HEAD(&ml->node);
  2095. list_add(&ml->node, &oi->master->master_ports);
  2096. oi->master->masters_cnt++;
  2097. sl->ocp_if = oi;
  2098. INIT_LIST_HEAD(&sl->node);
  2099. list_add(&sl->node, &oi->slave->slave_ports);
  2100. oi->slave->slaves_cnt++;
  2101. return 0;
  2102. }
  2103. /**
  2104. * _register_link - register a struct omap_hwmod_ocp_if
  2105. * @oi: struct omap_hwmod_ocp_if *
  2106. *
  2107. * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
  2108. * has already been registered; -EINVAL if @oi is NULL or if the
  2109. * record pointed to by @oi is missing required fields; or 0 upon
  2110. * success.
  2111. *
  2112. * XXX The data should be copied into bootmem, so the original data
  2113. * should be marked __initdata and freed after init. This would allow
  2114. * unneeded omap_hwmods to be freed on multi-OMAP configurations.
  2115. */
  2116. static int __init _register_link(struct omap_hwmod_ocp_if *oi)
  2117. {
  2118. if (!oi || !oi->master || !oi->slave || !oi->user)
  2119. return -EINVAL;
  2120. if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
  2121. return -EEXIST;
  2122. pr_debug("omap_hwmod: registering link from %s to %s\n",
  2123. oi->master->name, oi->slave->name);
  2124. /*
  2125. * Register the connected hwmods, if they haven't been
  2126. * registered already
  2127. */
  2128. if (oi->master->_state != _HWMOD_STATE_REGISTERED)
  2129. _register(oi->master);
  2130. if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
  2131. _register(oi->slave);
  2132. _add_link(oi);
  2133. oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
  2134. return 0;
  2135. }
  2136. /**
  2137. * _alloc_linkspace - allocate large block of hwmod links
  2138. * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
  2139. *
  2140. * Allocate a large block of struct omap_hwmod_link records. This
  2141. * improves boot time significantly by avoiding the need to allocate
  2142. * individual records one by one. If the number of records to
  2143. * allocate in the block hasn't been manually specified, this function
  2144. * will count the number of struct omap_hwmod_ocp_if records in @ois
  2145. * and use that to determine the allocation size. For SoC families
  2146. * that require multiple list registrations, such as OMAP3xxx, this
  2147. * estimation process isn't optimal, so manual estimation is advised
  2148. * in those cases. Returns -EEXIST if the allocation has already occurred
  2149. * or 0 upon success.
  2150. */
  2151. static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
  2152. {
  2153. unsigned int i = 0;
  2154. unsigned int sz;
  2155. if (linkspace) {
  2156. WARN(1, "linkspace already allocated\n");
  2157. return -EEXIST;
  2158. }
  2159. if (max_ls == 0)
  2160. while (ois[i++])
  2161. max_ls += LINKS_PER_OCP_IF;
  2162. sz = sizeof(struct omap_hwmod_link) * max_ls;
  2163. pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
  2164. __func__, sz, max_ls);
  2165. linkspace = alloc_bootmem(sz);
  2166. memset(linkspace, 0, sz);
  2167. return 0;
  2168. }
  2169. /* Static functions intended only for use in soc_ops field function pointers */
  2170. /**
  2171. * _omap2_wait_target_ready - wait for a module to leave slave idle
  2172. * @oh: struct omap_hwmod *
  2173. *
  2174. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2175. * does not have an IDLEST bit or if the module successfully leaves
  2176. * slave idle; otherwise, pass along the return value of the
  2177. * appropriate *_cm*_wait_module_ready() function.
  2178. */
  2179. static int _omap2_wait_target_ready(struct omap_hwmod *oh)
  2180. {
  2181. if (!oh)
  2182. return -EINVAL;
  2183. if (oh->flags & HWMOD_NO_IDLEST)
  2184. return 0;
  2185. if (!_find_mpu_rt_port(oh))
  2186. return 0;
  2187. /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
  2188. return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  2189. oh->prcm.omap2.idlest_reg_id,
  2190. oh->prcm.omap2.idlest_idle_bit);
  2191. }
  2192. /**
  2193. * _omap4_wait_target_ready - wait for a module to leave slave idle
  2194. * @oh: struct omap_hwmod *
  2195. *
  2196. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2197. * does not have an IDLEST bit or if the module successfully leaves
  2198. * slave idle; otherwise, pass along the return value of the
  2199. * appropriate *_cm*_wait_module_ready() function.
  2200. */
  2201. static int _omap4_wait_target_ready(struct omap_hwmod *oh)
  2202. {
  2203. if (!oh || !oh->clkdm)
  2204. return -EINVAL;
  2205. if (oh->flags & HWMOD_NO_IDLEST)
  2206. return 0;
  2207. if (!_find_mpu_rt_port(oh))
  2208. return 0;
  2209. /* XXX check module SIDLEMODE, hardreset status */
  2210. return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  2211. oh->clkdm->cm_inst,
  2212. oh->clkdm->clkdm_offs,
  2213. oh->prcm.omap4.clkctrl_offs);
  2214. }
  2215. /**
  2216. * _am33xx_wait_target_ready - wait for a module to leave slave idle
  2217. * @oh: struct omap_hwmod *
  2218. *
  2219. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2220. * does not have an IDLEST bit or if the module successfully leaves
  2221. * slave idle; otherwise, pass along the return value of the
  2222. * appropriate *_cm*_wait_module_ready() function.
  2223. */
  2224. static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
  2225. {
  2226. if (!oh || !oh->clkdm)
  2227. return -EINVAL;
  2228. if (oh->flags & HWMOD_NO_IDLEST)
  2229. return 0;
  2230. if (!_find_mpu_rt_port(oh))
  2231. return 0;
  2232. /* XXX check module SIDLEMODE, hardreset status */
  2233. return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
  2234. oh->clkdm->clkdm_offs,
  2235. oh->prcm.omap4.clkctrl_offs);
  2236. }
  2237. /**
  2238. * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2239. * @oh: struct omap_hwmod * to assert hardreset
  2240. * @ohri: hardreset line data
  2241. *
  2242. * Call omap2_prm_assert_hardreset() with parameters extracted from
  2243. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2244. * use as an soc_ops function pointer. Passes along the return value
  2245. * from omap2_prm_assert_hardreset(). XXX This function is scheduled
  2246. * for removal when the PRM code is moved into drivers/.
  2247. */
  2248. static int _omap2_assert_hardreset(struct omap_hwmod *oh,
  2249. struct omap_hwmod_rst_info *ohri)
  2250. {
  2251. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  2252. ohri->rst_shift);
  2253. }
  2254. /**
  2255. * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2256. * @oh: struct omap_hwmod * to deassert hardreset
  2257. * @ohri: hardreset line data
  2258. *
  2259. * Call omap2_prm_deassert_hardreset() with parameters extracted from
  2260. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2261. * use as an soc_ops function pointer. Passes along the return value
  2262. * from omap2_prm_deassert_hardreset(). XXX This function is
  2263. * scheduled for removal when the PRM code is moved into drivers/.
  2264. */
  2265. static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
  2266. struct omap_hwmod_rst_info *ohri)
  2267. {
  2268. return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  2269. ohri->rst_shift,
  2270. ohri->st_shift);
  2271. }
  2272. /**
  2273. * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
  2274. * @oh: struct omap_hwmod * to test hardreset
  2275. * @ohri: hardreset line data
  2276. *
  2277. * Call omap2_prm_is_hardreset_asserted() with parameters extracted
  2278. * from the hwmod @oh and the hardreset line data @ohri. Only
  2279. * intended for use as an soc_ops function pointer. Passes along the
  2280. * return value from omap2_prm_is_hardreset_asserted(). XXX This
  2281. * function is scheduled for removal when the PRM code is moved into
  2282. * drivers/.
  2283. */
  2284. static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
  2285. struct omap_hwmod_rst_info *ohri)
  2286. {
  2287. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  2288. ohri->st_shift);
  2289. }
  2290. /**
  2291. * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2292. * @oh: struct omap_hwmod * to assert hardreset
  2293. * @ohri: hardreset line data
  2294. *
  2295. * Call omap4_prminst_assert_hardreset() with parameters extracted
  2296. * from the hwmod @oh and the hardreset line data @ohri. Only
  2297. * intended for use as an soc_ops function pointer. Passes along the
  2298. * return value from omap4_prminst_assert_hardreset(). XXX This
  2299. * function is scheduled for removal when the PRM code is moved into
  2300. * drivers/.
  2301. */
  2302. static int _omap4_assert_hardreset(struct omap_hwmod *oh,
  2303. struct omap_hwmod_rst_info *ohri)
  2304. {
  2305. if (!oh->clkdm)
  2306. return -EINVAL;
  2307. return omap4_prminst_assert_hardreset(ohri->rst_shift,
  2308. oh->clkdm->pwrdm.ptr->prcm_partition,
  2309. oh->clkdm->pwrdm.ptr->prcm_offs,
  2310. oh->prcm.omap4.rstctrl_offs);
  2311. }
  2312. /**
  2313. * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2314. * @oh: struct omap_hwmod * to deassert hardreset
  2315. * @ohri: hardreset line data
  2316. *
  2317. * Call omap4_prminst_deassert_hardreset() with parameters extracted
  2318. * from the hwmod @oh and the hardreset line data @ohri. Only
  2319. * intended for use as an soc_ops function pointer. Passes along the
  2320. * return value from omap4_prminst_deassert_hardreset(). XXX This
  2321. * function is scheduled for removal when the PRM code is moved into
  2322. * drivers/.
  2323. */
  2324. static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
  2325. struct omap_hwmod_rst_info *ohri)
  2326. {
  2327. if (!oh->clkdm)
  2328. return -EINVAL;
  2329. if (ohri->st_shift)
  2330. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  2331. oh->name, ohri->name);
  2332. return omap4_prminst_deassert_hardreset(ohri->rst_shift,
  2333. oh->clkdm->pwrdm.ptr->prcm_partition,
  2334. oh->clkdm->pwrdm.ptr->prcm_offs,
  2335. oh->prcm.omap4.rstctrl_offs);
  2336. }
  2337. /**
  2338. * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
  2339. * @oh: struct omap_hwmod * to test hardreset
  2340. * @ohri: hardreset line data
  2341. *
  2342. * Call omap4_prminst_is_hardreset_asserted() with parameters
  2343. * extracted from the hwmod @oh and the hardreset line data @ohri.
  2344. * Only intended for use as an soc_ops function pointer. Passes along
  2345. * the return value from omap4_prminst_is_hardreset_asserted(). XXX
  2346. * This function is scheduled for removal when the PRM code is moved
  2347. * into drivers/.
  2348. */
  2349. static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
  2350. struct omap_hwmod_rst_info *ohri)
  2351. {
  2352. if (!oh->clkdm)
  2353. return -EINVAL;
  2354. return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
  2355. oh->clkdm->pwrdm.ptr->prcm_partition,
  2356. oh->clkdm->pwrdm.ptr->prcm_offs,
  2357. oh->prcm.omap4.rstctrl_offs);
  2358. }
  2359. /**
  2360. * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
  2361. * @oh: struct omap_hwmod * to assert hardreset
  2362. * @ohri: hardreset line data
  2363. *
  2364. * Call am33xx_prminst_assert_hardreset() with parameters extracted
  2365. * from the hwmod @oh and the hardreset line data @ohri. Only
  2366. * intended for use as an soc_ops function pointer. Passes along the
  2367. * return value from am33xx_prminst_assert_hardreset(). XXX This
  2368. * function is scheduled for removal when the PRM code is moved into
  2369. * drivers/.
  2370. */
  2371. static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
  2372. struct omap_hwmod_rst_info *ohri)
  2373. {
  2374. return am33xx_prm_assert_hardreset(ohri->rst_shift,
  2375. oh->clkdm->pwrdm.ptr->prcm_offs,
  2376. oh->prcm.omap4.rstctrl_offs);
  2377. }
  2378. /**
  2379. * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
  2380. * @oh: struct omap_hwmod * to deassert hardreset
  2381. * @ohri: hardreset line data
  2382. *
  2383. * Call am33xx_prminst_deassert_hardreset() with parameters extracted
  2384. * from the hwmod @oh and the hardreset line data @ohri. Only
  2385. * intended for use as an soc_ops function pointer. Passes along the
  2386. * return value from am33xx_prminst_deassert_hardreset(). XXX This
  2387. * function is scheduled for removal when the PRM code is moved into
  2388. * drivers/.
  2389. */
  2390. static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
  2391. struct omap_hwmod_rst_info *ohri)
  2392. {
  2393. if (ohri->st_shift)
  2394. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  2395. oh->name, ohri->name);
  2396. return am33xx_prm_deassert_hardreset(ohri->rst_shift,
  2397. oh->clkdm->pwrdm.ptr->prcm_offs,
  2398. oh->prcm.omap4.rstctrl_offs,
  2399. oh->prcm.omap4.rstst_offs);
  2400. }
  2401. /**
  2402. * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
  2403. * @oh: struct omap_hwmod * to test hardreset
  2404. * @ohri: hardreset line data
  2405. *
  2406. * Call am33xx_prminst_is_hardreset_asserted() with parameters
  2407. * extracted from the hwmod @oh and the hardreset line data @ohri.
  2408. * Only intended for use as an soc_ops function pointer. Passes along
  2409. * the return value from am33xx_prminst_is_hardreset_asserted(). XXX
  2410. * This function is scheduled for removal when the PRM code is moved
  2411. * into drivers/.
  2412. */
  2413. static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
  2414. struct omap_hwmod_rst_info *ohri)
  2415. {
  2416. return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
  2417. oh->clkdm->pwrdm.ptr->prcm_offs,
  2418. oh->prcm.omap4.rstctrl_offs);
  2419. }
  2420. /* Public functions */
  2421. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  2422. {
  2423. if (oh->flags & HWMOD_16BIT_REG)
  2424. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  2425. else
  2426. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  2427. }
  2428. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  2429. {
  2430. if (oh->flags & HWMOD_16BIT_REG)
  2431. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  2432. else
  2433. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  2434. }
  2435. /**
  2436. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  2437. * @oh: struct omap_hwmod *
  2438. *
  2439. * This is a public function exposed to drivers. Some drivers may need to do
  2440. * some settings before and after resetting the device. Those drivers after
  2441. * doing the necessary settings could use this function to start a reset by
  2442. * setting the SYSCONFIG.SOFTRESET bit.
  2443. */
  2444. int omap_hwmod_softreset(struct omap_hwmod *oh)
  2445. {
  2446. u32 v;
  2447. int ret;
  2448. if (!oh || !(oh->_sysc_cache))
  2449. return -EINVAL;
  2450. v = oh->_sysc_cache;
  2451. ret = _set_softreset(oh, &v);
  2452. if (ret)
  2453. goto error;
  2454. _write_sysconfig(v, oh);
  2455. error:
  2456. return ret;
  2457. }
  2458. /**
  2459. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  2460. * @oh: struct omap_hwmod *
  2461. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  2462. *
  2463. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  2464. * local copy. Intended to be used by drivers that have some erratum
  2465. * that requires direct manipulation of the SIDLEMODE bits. Returns
  2466. * -EINVAL if @oh is null, or passes along the return value from
  2467. * _set_slave_idlemode().
  2468. *
  2469. * XXX Does this function have any current users? If not, we should
  2470. * remove it; it is better to let the rest of the hwmod code handle this.
  2471. * Any users of this function should be scrutinized carefully.
  2472. */
  2473. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  2474. {
  2475. u32 v;
  2476. int retval = 0;
  2477. if (!oh)
  2478. return -EINVAL;
  2479. v = oh->_sysc_cache;
  2480. retval = _set_slave_idlemode(oh, idlemode, &v);
  2481. if (!retval)
  2482. _write_sysconfig(v, oh);
  2483. return retval;
  2484. }
  2485. /**
  2486. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  2487. * @name: name of the omap_hwmod to look up
  2488. *
  2489. * Given a @name of an omap_hwmod, return a pointer to the registered
  2490. * struct omap_hwmod *, or NULL upon error.
  2491. */
  2492. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  2493. {
  2494. struct omap_hwmod *oh;
  2495. if (!name)
  2496. return NULL;
  2497. oh = _lookup(name);
  2498. return oh;
  2499. }
  2500. /**
  2501. * omap_hwmod_for_each - call function for each registered omap_hwmod
  2502. * @fn: pointer to a callback function
  2503. * @data: void * data to pass to callback function
  2504. *
  2505. * Call @fn for each registered omap_hwmod, passing @data to each
  2506. * function. @fn must return 0 for success or any other value for
  2507. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  2508. * will stop and the non-zero return value will be passed to the
  2509. * caller of omap_hwmod_for_each(). @fn is called with
  2510. * omap_hwmod_for_each() held.
  2511. */
  2512. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  2513. void *data)
  2514. {
  2515. struct omap_hwmod *temp_oh;
  2516. int ret = 0;
  2517. if (!fn)
  2518. return -EINVAL;
  2519. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2520. ret = (*fn)(temp_oh, data);
  2521. if (ret)
  2522. break;
  2523. }
  2524. return ret;
  2525. }
  2526. /**
  2527. * omap_hwmod_register_links - register an array of hwmod links
  2528. * @ois: pointer to an array of omap_hwmod_ocp_if to register
  2529. *
  2530. * Intended to be called early in boot before the clock framework is
  2531. * initialized. If @ois is not null, will register all omap_hwmods
  2532. * listed in @ois that are valid for this chip. Returns -EINVAL if
  2533. * omap_hwmod_init() hasn't been called before calling this function,
  2534. * -ENOMEM if the link memory area can't be allocated, or 0 upon
  2535. * success.
  2536. */
  2537. int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
  2538. {
  2539. int r, i;
  2540. if (!inited)
  2541. return -EINVAL;
  2542. if (!ois)
  2543. return 0;
  2544. if (!linkspace) {
  2545. if (_alloc_linkspace(ois)) {
  2546. pr_err("omap_hwmod: could not allocate link space\n");
  2547. return -ENOMEM;
  2548. }
  2549. }
  2550. i = 0;
  2551. do {
  2552. r = _register_link(ois[i]);
  2553. WARN(r && r != -EEXIST,
  2554. "omap_hwmod: _register_link(%s -> %s) returned %d\n",
  2555. ois[i]->master->name, ois[i]->slave->name, r);
  2556. } while (ois[++i]);
  2557. return 0;
  2558. }
  2559. /**
  2560. * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
  2561. * @oh: pointer to the hwmod currently being set up (usually not the MPU)
  2562. *
  2563. * If the hwmod data corresponding to the MPU subsystem IP block
  2564. * hasn't been initialized and set up yet, do so now. This must be
  2565. * done first since sleep dependencies may be added from other hwmods
  2566. * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
  2567. * return value.
  2568. */
  2569. static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
  2570. {
  2571. if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
  2572. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  2573. __func__, MPU_INITIATOR_NAME);
  2574. else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  2575. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  2576. }
  2577. /**
  2578. * omap_hwmod_setup_one - set up a single hwmod
  2579. * @oh_name: const char * name of the already-registered hwmod to set up
  2580. *
  2581. * Initialize and set up a single hwmod. Intended to be used for a
  2582. * small number of early devices, such as the timer IP blocks used for
  2583. * the scheduler clock. Must be called after omap2_clk_init().
  2584. * Resolves the struct clk names to struct clk pointers for each
  2585. * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
  2586. * -EINVAL upon error or 0 upon success.
  2587. */
  2588. int __init omap_hwmod_setup_one(const char *oh_name)
  2589. {
  2590. struct omap_hwmod *oh;
  2591. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  2592. oh = _lookup(oh_name);
  2593. if (!oh) {
  2594. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  2595. return -EINVAL;
  2596. }
  2597. _ensure_mpu_hwmod_is_setup(oh);
  2598. _init(oh, NULL);
  2599. _setup(oh, NULL);
  2600. return 0;
  2601. }
  2602. /**
  2603. * omap_hwmod_setup_all - set up all registered IP blocks
  2604. *
  2605. * Initialize and set up all IP blocks registered with the hwmod code.
  2606. * Must be called after omap2_clk_init(). Resolves the struct clk
  2607. * names to struct clk pointers for each registered omap_hwmod. Also
  2608. * calls _setup() on each hwmod. Returns 0 upon success.
  2609. */
  2610. static int __init omap_hwmod_setup_all(void)
  2611. {
  2612. _ensure_mpu_hwmod_is_setup(NULL);
  2613. omap_hwmod_for_each(_init, NULL);
  2614. omap_hwmod_for_each(_setup, NULL);
  2615. return 0;
  2616. }
  2617. core_initcall(omap_hwmod_setup_all);
  2618. /**
  2619. * omap_hwmod_enable - enable an omap_hwmod
  2620. * @oh: struct omap_hwmod *
  2621. *
  2622. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  2623. * Returns -EINVAL on error or passes along the return value from _enable().
  2624. */
  2625. int omap_hwmod_enable(struct omap_hwmod *oh)
  2626. {
  2627. int r;
  2628. unsigned long flags;
  2629. if (!oh)
  2630. return -EINVAL;
  2631. spin_lock_irqsave(&oh->_lock, flags);
  2632. r = _enable(oh);
  2633. spin_unlock_irqrestore(&oh->_lock, flags);
  2634. return r;
  2635. }
  2636. /**
  2637. * omap_hwmod_idle - idle an omap_hwmod
  2638. * @oh: struct omap_hwmod *
  2639. *
  2640. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  2641. * Returns -EINVAL on error or passes along the return value from _idle().
  2642. */
  2643. int omap_hwmod_idle(struct omap_hwmod *oh)
  2644. {
  2645. unsigned long flags;
  2646. if (!oh)
  2647. return -EINVAL;
  2648. spin_lock_irqsave(&oh->_lock, flags);
  2649. _idle(oh);
  2650. spin_unlock_irqrestore(&oh->_lock, flags);
  2651. return 0;
  2652. }
  2653. /**
  2654. * omap_hwmod_shutdown - shutdown an omap_hwmod
  2655. * @oh: struct omap_hwmod *
  2656. *
  2657. * Shutdown an omap_hwmod @oh. Intended to be called by
  2658. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  2659. * the return value from _shutdown().
  2660. */
  2661. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  2662. {
  2663. unsigned long flags;
  2664. if (!oh)
  2665. return -EINVAL;
  2666. spin_lock_irqsave(&oh->_lock, flags);
  2667. _shutdown(oh);
  2668. spin_unlock_irqrestore(&oh->_lock, flags);
  2669. return 0;
  2670. }
  2671. /**
  2672. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  2673. * @oh: struct omap_hwmod *oh
  2674. *
  2675. * Intended to be called by the omap_device code.
  2676. */
  2677. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  2678. {
  2679. unsigned long flags;
  2680. spin_lock_irqsave(&oh->_lock, flags);
  2681. _enable_clocks(oh);
  2682. spin_unlock_irqrestore(&oh->_lock, flags);
  2683. return 0;
  2684. }
  2685. /**
  2686. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  2687. * @oh: struct omap_hwmod *oh
  2688. *
  2689. * Intended to be called by the omap_device code.
  2690. */
  2691. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  2692. {
  2693. unsigned long flags;
  2694. spin_lock_irqsave(&oh->_lock, flags);
  2695. _disable_clocks(oh);
  2696. spin_unlock_irqrestore(&oh->_lock, flags);
  2697. return 0;
  2698. }
  2699. /**
  2700. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  2701. * @oh: struct omap_hwmod *oh
  2702. *
  2703. * Intended to be called by drivers and core code when all posted
  2704. * writes to a device must complete before continuing further
  2705. * execution (for example, after clearing some device IRQSTATUS
  2706. * register bits)
  2707. *
  2708. * XXX what about targets with multiple OCP threads?
  2709. */
  2710. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  2711. {
  2712. BUG_ON(!oh);
  2713. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  2714. WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
  2715. oh->name);
  2716. return;
  2717. }
  2718. /*
  2719. * Forces posted writes to complete on the OCP thread handling
  2720. * register writes
  2721. */
  2722. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  2723. }
  2724. /**
  2725. * omap_hwmod_reset - reset the hwmod
  2726. * @oh: struct omap_hwmod *
  2727. *
  2728. * Under some conditions, a driver may wish to reset the entire device.
  2729. * Called from omap_device code. Returns -EINVAL on error or passes along
  2730. * the return value from _reset().
  2731. */
  2732. int omap_hwmod_reset(struct omap_hwmod *oh)
  2733. {
  2734. int r;
  2735. unsigned long flags;
  2736. if (!oh)
  2737. return -EINVAL;
  2738. spin_lock_irqsave(&oh->_lock, flags);
  2739. r = _reset(oh);
  2740. spin_unlock_irqrestore(&oh->_lock, flags);
  2741. return r;
  2742. }
  2743. /*
  2744. * IP block data retrieval functions
  2745. */
  2746. /**
  2747. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  2748. * @oh: struct omap_hwmod *
  2749. * @res: pointer to the first element of an array of struct resource to fill
  2750. *
  2751. * Count the number of struct resource array elements necessary to
  2752. * contain omap_hwmod @oh resources. Intended to be called by code
  2753. * that registers omap_devices. Intended to be used to determine the
  2754. * size of a dynamically-allocated struct resource array, before
  2755. * calling omap_hwmod_fill_resources(). Returns the number of struct
  2756. * resource array elements needed.
  2757. *
  2758. * XXX This code is not optimized. It could attempt to merge adjacent
  2759. * resource IDs.
  2760. *
  2761. */
  2762. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  2763. {
  2764. struct omap_hwmod_ocp_if *os;
  2765. struct list_head *p;
  2766. int ret;
  2767. int i = 0;
  2768. ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
  2769. p = oh->slave_ports.next;
  2770. while (i < oh->slaves_cnt) {
  2771. os = _fetch_next_ocp_if(&p, &i);
  2772. ret += _count_ocp_if_addr_spaces(os);
  2773. }
  2774. return ret;
  2775. }
  2776. /**
  2777. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  2778. * @oh: struct omap_hwmod *
  2779. * @res: pointer to the first element of an array of struct resource to fill
  2780. *
  2781. * Fill the struct resource array @res with resource data from the
  2782. * omap_hwmod @oh. Intended to be called by code that registers
  2783. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  2784. * number of array elements filled.
  2785. */
  2786. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  2787. {
  2788. struct omap_hwmod_ocp_if *os;
  2789. struct list_head *p;
  2790. int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
  2791. int r = 0;
  2792. /* For each IRQ, DMA, memory area, fill in array.*/
  2793. mpu_irqs_cnt = _count_mpu_irqs(oh);
  2794. for (i = 0; i < mpu_irqs_cnt; i++) {
  2795. (res + r)->name = (oh->mpu_irqs + i)->name;
  2796. (res + r)->start = (oh->mpu_irqs + i)->irq;
  2797. (res + r)->end = (oh->mpu_irqs + i)->irq;
  2798. (res + r)->flags = IORESOURCE_IRQ;
  2799. r++;
  2800. }
  2801. sdma_reqs_cnt = _count_sdma_reqs(oh);
  2802. for (i = 0; i < sdma_reqs_cnt; i++) {
  2803. (res + r)->name = (oh->sdma_reqs + i)->name;
  2804. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  2805. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  2806. (res + r)->flags = IORESOURCE_DMA;
  2807. r++;
  2808. }
  2809. p = oh->slave_ports.next;
  2810. i = 0;
  2811. while (i < oh->slaves_cnt) {
  2812. os = _fetch_next_ocp_if(&p, &i);
  2813. addr_cnt = _count_ocp_if_addr_spaces(os);
  2814. for (j = 0; j < addr_cnt; j++) {
  2815. (res + r)->name = (os->addr + j)->name;
  2816. (res + r)->start = (os->addr + j)->pa_start;
  2817. (res + r)->end = (os->addr + j)->pa_end;
  2818. (res + r)->flags = IORESOURCE_MEM;
  2819. r++;
  2820. }
  2821. }
  2822. return r;
  2823. }
  2824. /**
  2825. * omap_hwmod_get_resource_byname - fetch IP block integration data by name
  2826. * @oh: struct omap_hwmod * to operate on
  2827. * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
  2828. * @name: pointer to the name of the data to fetch (optional)
  2829. * @rsrc: pointer to a struct resource, allocated by the caller
  2830. *
  2831. * Retrieve MPU IRQ, SDMA request line, or address space start/end
  2832. * data for the IP block pointed to by @oh. The data will be filled
  2833. * into a struct resource record pointed to by @rsrc. The struct
  2834. * resource must be allocated by the caller. When @name is non-null,
  2835. * the data associated with the matching entry in the IRQ/SDMA/address
  2836. * space hwmod data arrays will be returned. If @name is null, the
  2837. * first array entry will be returned. Data order is not meaningful
  2838. * in hwmod data, so callers are strongly encouraged to use a non-null
  2839. * @name whenever possible to avoid unpredictable effects if hwmod
  2840. * data is later added that causes data ordering to change. This
  2841. * function is only intended for use by OMAP core code. Device
  2842. * drivers should not call this function - the appropriate bus-related
  2843. * data accessor functions should be used instead. Returns 0 upon
  2844. * success or a negative error code upon error.
  2845. */
  2846. int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
  2847. const char *name, struct resource *rsrc)
  2848. {
  2849. int r;
  2850. unsigned int irq, dma;
  2851. u32 pa_start, pa_end;
  2852. if (!oh || !rsrc)
  2853. return -EINVAL;
  2854. if (type == IORESOURCE_IRQ) {
  2855. r = _get_mpu_irq_by_name(oh, name, &irq);
  2856. if (r)
  2857. return r;
  2858. rsrc->start = irq;
  2859. rsrc->end = irq;
  2860. } else if (type == IORESOURCE_DMA) {
  2861. r = _get_sdma_req_by_name(oh, name, &dma);
  2862. if (r)
  2863. return r;
  2864. rsrc->start = dma;
  2865. rsrc->end = dma;
  2866. } else if (type == IORESOURCE_MEM) {
  2867. r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
  2868. if (r)
  2869. return r;
  2870. rsrc->start = pa_start;
  2871. rsrc->end = pa_end;
  2872. } else {
  2873. return -EINVAL;
  2874. }
  2875. rsrc->flags = type;
  2876. rsrc->name = name;
  2877. return 0;
  2878. }
  2879. /**
  2880. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  2881. * @oh: struct omap_hwmod *
  2882. *
  2883. * Return the powerdomain pointer associated with the OMAP module
  2884. * @oh's main clock. If @oh does not have a main clk, return the
  2885. * powerdomain associated with the interface clock associated with the
  2886. * module's MPU port. (XXX Perhaps this should use the SDMA port
  2887. * instead?) Returns NULL on error, or a struct powerdomain * on
  2888. * success.
  2889. */
  2890. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  2891. {
  2892. struct clk *c;
  2893. struct omap_hwmod_ocp_if *oi;
  2894. if (!oh)
  2895. return NULL;
  2896. if (oh->_clk) {
  2897. c = oh->_clk;
  2898. } else {
  2899. oi = _find_mpu_rt_port(oh);
  2900. if (!oi)
  2901. return NULL;
  2902. c = oi->_clk;
  2903. }
  2904. if (!c->clkdm)
  2905. return NULL;
  2906. return c->clkdm->pwrdm.ptr;
  2907. }
  2908. /**
  2909. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  2910. * @oh: struct omap_hwmod *
  2911. *
  2912. * Returns the virtual address corresponding to the beginning of the
  2913. * module's register target, in the address range that is intended to
  2914. * be used by the MPU. Returns the virtual address upon success or NULL
  2915. * upon error.
  2916. */
  2917. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  2918. {
  2919. if (!oh)
  2920. return NULL;
  2921. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  2922. return NULL;
  2923. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  2924. return NULL;
  2925. return oh->_mpu_rt_va;
  2926. }
  2927. /**
  2928. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  2929. * @oh: struct omap_hwmod *
  2930. * @init_oh: struct omap_hwmod * (initiator)
  2931. *
  2932. * Add a sleep dependency between the initiator @init_oh and @oh.
  2933. * Intended to be called by DSP/Bridge code via platform_data for the
  2934. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2935. * code needs to add/del initiator dependencies dynamically
  2936. * before/after accessing a device. Returns the return value from
  2937. * _add_initiator_dep().
  2938. *
  2939. * XXX Keep a usecount in the clockdomain code
  2940. */
  2941. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  2942. struct omap_hwmod *init_oh)
  2943. {
  2944. return _add_initiator_dep(oh, init_oh);
  2945. }
  2946. /*
  2947. * XXX what about functions for drivers to save/restore ocp_sysconfig
  2948. * for context save/restore operations?
  2949. */
  2950. /**
  2951. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  2952. * @oh: struct omap_hwmod *
  2953. * @init_oh: struct omap_hwmod * (initiator)
  2954. *
  2955. * Remove a sleep dependency between the initiator @init_oh and @oh.
  2956. * Intended to be called by DSP/Bridge code via platform_data for the
  2957. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2958. * code needs to add/del initiator dependencies dynamically
  2959. * before/after accessing a device. Returns the return value from
  2960. * _del_initiator_dep().
  2961. *
  2962. * XXX Keep a usecount in the clockdomain code
  2963. */
  2964. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  2965. struct omap_hwmod *init_oh)
  2966. {
  2967. return _del_initiator_dep(oh, init_oh);
  2968. }
  2969. /**
  2970. * omap_hwmod_enable_wakeup - allow device to wake up the system
  2971. * @oh: struct omap_hwmod *
  2972. *
  2973. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  2974. * send wakeups to the PRCM, and enable I/O ring wakeup events for
  2975. * this IP block if it has dynamic mux entries. Eventually this
  2976. * should set PRCM wakeup registers to cause the PRCM to receive
  2977. * wakeup events from the module. Does not set any wakeup routing
  2978. * registers beyond this point - if the module is to wake up any other
  2979. * module or subsystem, that must be set separately. Called by
  2980. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2981. */
  2982. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  2983. {
  2984. unsigned long flags;
  2985. u32 v;
  2986. spin_lock_irqsave(&oh->_lock, flags);
  2987. if (oh->class->sysc &&
  2988. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2989. v = oh->_sysc_cache;
  2990. _enable_wakeup(oh, &v);
  2991. _write_sysconfig(v, oh);
  2992. }
  2993. _set_idle_ioring_wakeup(oh, true);
  2994. spin_unlock_irqrestore(&oh->_lock, flags);
  2995. return 0;
  2996. }
  2997. /**
  2998. * omap_hwmod_disable_wakeup - prevent device from waking the system
  2999. * @oh: struct omap_hwmod *
  3000. *
  3001. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  3002. * from sending wakeups to the PRCM, and disable I/O ring wakeup
  3003. * events for this IP block if it has dynamic mux entries. Eventually
  3004. * this should clear PRCM wakeup registers to cause the PRCM to ignore
  3005. * wakeup events from the module. Does not set any wakeup routing
  3006. * registers beyond this point - if the module is to wake up any other
  3007. * module or subsystem, that must be set separately. Called by
  3008. * omap_device code. Returns -EINVAL on error or 0 upon success.
  3009. */
  3010. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  3011. {
  3012. unsigned long flags;
  3013. u32 v;
  3014. spin_lock_irqsave(&oh->_lock, flags);
  3015. if (oh->class->sysc &&
  3016. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  3017. v = oh->_sysc_cache;
  3018. _disable_wakeup(oh, &v);
  3019. _write_sysconfig(v, oh);
  3020. }
  3021. _set_idle_ioring_wakeup(oh, false);
  3022. spin_unlock_irqrestore(&oh->_lock, flags);
  3023. return 0;
  3024. }
  3025. /**
  3026. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  3027. * contained in the hwmod module.
  3028. * @oh: struct omap_hwmod *
  3029. * @name: name of the reset line to lookup and assert
  3030. *
  3031. * Some IP like dsp, ipu or iva contain processor that require
  3032. * an HW reset line to be assert / deassert in order to enable fully
  3033. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  3034. * yet supported on this OMAP; otherwise, passes along the return value
  3035. * from _assert_hardreset().
  3036. */
  3037. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  3038. {
  3039. int ret;
  3040. unsigned long flags;
  3041. if (!oh)
  3042. return -EINVAL;
  3043. spin_lock_irqsave(&oh->_lock, flags);
  3044. ret = _assert_hardreset(oh, name);
  3045. spin_unlock_irqrestore(&oh->_lock, flags);
  3046. return ret;
  3047. }
  3048. /**
  3049. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  3050. * contained in the hwmod module.
  3051. * @oh: struct omap_hwmod *
  3052. * @name: name of the reset line to look up and deassert
  3053. *
  3054. * Some IP like dsp, ipu or iva contain processor that require
  3055. * an HW reset line to be assert / deassert in order to enable fully
  3056. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  3057. * yet supported on this OMAP; otherwise, passes along the return value
  3058. * from _deassert_hardreset().
  3059. */
  3060. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  3061. {
  3062. int ret;
  3063. unsigned long flags;
  3064. if (!oh)
  3065. return -EINVAL;
  3066. spin_lock_irqsave(&oh->_lock, flags);
  3067. ret = _deassert_hardreset(oh, name);
  3068. spin_unlock_irqrestore(&oh->_lock, flags);
  3069. return ret;
  3070. }
  3071. /**
  3072. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  3073. * contained in the hwmod module
  3074. * @oh: struct omap_hwmod *
  3075. * @name: name of the reset line to look up and read
  3076. *
  3077. * Return the current state of the hwmod @oh's reset line named @name:
  3078. * returns -EINVAL upon parameter error or if this operation
  3079. * is unsupported on the current OMAP; otherwise, passes along the return
  3080. * value from _read_hardreset().
  3081. */
  3082. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  3083. {
  3084. int ret;
  3085. unsigned long flags;
  3086. if (!oh)
  3087. return -EINVAL;
  3088. spin_lock_irqsave(&oh->_lock, flags);
  3089. ret = _read_hardreset(oh, name);
  3090. spin_unlock_irqrestore(&oh->_lock, flags);
  3091. return ret;
  3092. }
  3093. /**
  3094. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  3095. * @classname: struct omap_hwmod_class name to search for
  3096. * @fn: callback function pointer to call for each hwmod in class @classname
  3097. * @user: arbitrary context data to pass to the callback function
  3098. *
  3099. * For each omap_hwmod of class @classname, call @fn.
  3100. * If the callback function returns something other than
  3101. * zero, the iterator is terminated, and the callback function's return
  3102. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  3103. * if @classname or @fn are NULL, or passes back the error code from @fn.
  3104. */
  3105. int omap_hwmod_for_each_by_class(const char *classname,
  3106. int (*fn)(struct omap_hwmod *oh,
  3107. void *user),
  3108. void *user)
  3109. {
  3110. struct omap_hwmod *temp_oh;
  3111. int ret = 0;
  3112. if (!classname || !fn)
  3113. return -EINVAL;
  3114. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  3115. __func__, classname);
  3116. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  3117. if (!strcmp(temp_oh->class->name, classname)) {
  3118. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  3119. __func__, temp_oh->name);
  3120. ret = (*fn)(temp_oh, user);
  3121. if (ret)
  3122. break;
  3123. }
  3124. }
  3125. if (ret)
  3126. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  3127. __func__, ret);
  3128. return ret;
  3129. }
  3130. /**
  3131. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  3132. * @oh: struct omap_hwmod *
  3133. * @state: state that _setup() should leave the hwmod in
  3134. *
  3135. * Sets the hwmod state that @oh will enter at the end of _setup()
  3136. * (called by omap_hwmod_setup_*()). See also the documentation
  3137. * for _setup_postsetup(), above. Returns 0 upon success or
  3138. * -EINVAL if there is a problem with the arguments or if the hwmod is
  3139. * in the wrong state.
  3140. */
  3141. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  3142. {
  3143. int ret;
  3144. unsigned long flags;
  3145. if (!oh)
  3146. return -EINVAL;
  3147. if (state != _HWMOD_STATE_DISABLED &&
  3148. state != _HWMOD_STATE_ENABLED &&
  3149. state != _HWMOD_STATE_IDLE)
  3150. return -EINVAL;
  3151. spin_lock_irqsave(&oh->_lock, flags);
  3152. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  3153. ret = -EINVAL;
  3154. goto ohsps_unlock;
  3155. }
  3156. oh->_postsetup_state = state;
  3157. ret = 0;
  3158. ohsps_unlock:
  3159. spin_unlock_irqrestore(&oh->_lock, flags);
  3160. return ret;
  3161. }
  3162. /**
  3163. * omap_hwmod_get_context_loss_count - get lost context count
  3164. * @oh: struct omap_hwmod *
  3165. *
  3166. * Query the powerdomain of of @oh to get the context loss
  3167. * count for this device.
  3168. *
  3169. * Returns the context loss count of the powerdomain assocated with @oh
  3170. * upon success, or zero if no powerdomain exists for @oh.
  3171. */
  3172. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  3173. {
  3174. struct powerdomain *pwrdm;
  3175. int ret = 0;
  3176. pwrdm = omap_hwmod_get_pwrdm(oh);
  3177. if (pwrdm)
  3178. ret = pwrdm_get_context_loss_count(pwrdm);
  3179. return ret;
  3180. }
  3181. /**
  3182. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  3183. * @oh: struct omap_hwmod *
  3184. *
  3185. * Prevent the hwmod @oh from being reset during the setup process.
  3186. * Intended for use by board-*.c files on boards with devices that
  3187. * cannot tolerate being reset. Must be called before the hwmod has
  3188. * been set up. Returns 0 upon success or negative error code upon
  3189. * failure.
  3190. */
  3191. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  3192. {
  3193. if (!oh)
  3194. return -EINVAL;
  3195. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  3196. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  3197. oh->name);
  3198. return -EINVAL;
  3199. }
  3200. oh->flags |= HWMOD_INIT_NO_RESET;
  3201. return 0;
  3202. }
  3203. /**
  3204. * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
  3205. * @oh: struct omap_hwmod * containing hwmod mux entries
  3206. * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
  3207. * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
  3208. *
  3209. * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
  3210. * entry number @pad_idx for the hwmod @oh, trigger the interrupt
  3211. * service routine for the hwmod's mpu_irqs array index @irq_idx. If
  3212. * this function is not called for a given pad_idx, then the ISR
  3213. * associated with @oh's first MPU IRQ will be triggered when an I/O
  3214. * pad wakeup occurs on that pad. Note that @pad_idx is the index of
  3215. * the _dynamic or wakeup_ entry: if there are other entries not
  3216. * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
  3217. * entries are NOT COUNTED in the dynamic pad index. This function
  3218. * must be called separately for each pad that requires its interrupt
  3219. * to be re-routed this way. Returns -EINVAL if there is an argument
  3220. * problem or if @oh does not have hwmod mux entries or MPU IRQs;
  3221. * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
  3222. *
  3223. * XXX This function interface is fragile. Rather than using array
  3224. * indexes, which are subject to unpredictable change, it should be
  3225. * using hwmod IRQ names, and some other stable key for the hwmod mux
  3226. * pad records.
  3227. */
  3228. int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
  3229. {
  3230. int nr_irqs;
  3231. might_sleep();
  3232. if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
  3233. pad_idx >= oh->mux->nr_pads_dynamic)
  3234. return -EINVAL;
  3235. /* Check the number of available mpu_irqs */
  3236. for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
  3237. ;
  3238. if (irq_idx >= nr_irqs)
  3239. return -EINVAL;
  3240. if (!oh->mux->irqs) {
  3241. /* XXX What frees this? */
  3242. oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
  3243. GFP_KERNEL);
  3244. if (!oh->mux->irqs)
  3245. return -ENOMEM;
  3246. }
  3247. oh->mux->irqs[pad_idx] = irq_idx;
  3248. return 0;
  3249. }
  3250. /**
  3251. * omap_hwmod_init - initialize the hwmod code
  3252. *
  3253. * Sets up some function pointers needed by the hwmod code to operate on the
  3254. * currently-booted SoC. Intended to be called once during kernel init
  3255. * before any hwmods are registered. No return value.
  3256. */
  3257. void __init omap_hwmod_init(void)
  3258. {
  3259. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  3260. soc_ops.wait_target_ready = _omap2_wait_target_ready;
  3261. soc_ops.assert_hardreset = _omap2_assert_hardreset;
  3262. soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
  3263. soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
  3264. } else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
  3265. soc_ops.enable_module = _omap4_enable_module;
  3266. soc_ops.disable_module = _omap4_disable_module;
  3267. soc_ops.wait_target_ready = _omap4_wait_target_ready;
  3268. soc_ops.assert_hardreset = _omap4_assert_hardreset;
  3269. soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
  3270. soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
  3271. soc_ops.init_clkdm = _init_clkdm;
  3272. } else if (soc_is_am33xx()) {
  3273. soc_ops.enable_module = _am33xx_enable_module;
  3274. soc_ops.disable_module = _am33xx_disable_module;
  3275. soc_ops.wait_target_ready = _am33xx_wait_target_ready;
  3276. soc_ops.assert_hardreset = _am33xx_assert_hardreset;
  3277. soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
  3278. soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
  3279. soc_ops.init_clkdm = _init_clkdm;
  3280. } else {
  3281. WARN(1, "omap_hwmod: unknown SoC type\n");
  3282. }
  3283. inited = true;
  3284. }
  3285. /**
  3286. * omap_hwmod_get_main_clk - get pointer to main clock name
  3287. * @oh: struct omap_hwmod *
  3288. *
  3289. * Returns the main clock name assocated with @oh upon success,
  3290. * or NULL if @oh is NULL.
  3291. */
  3292. const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
  3293. {
  3294. if (!oh)
  3295. return NULL;
  3296. return oh->main_clk;
  3297. }