ti_am335x_adc.c 13 KB

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  1. /*
  2. * TI ADC MFD driver
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation version 2.
  9. *
  10. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11. * kind, whether express or implied; without even the implied warranty
  12. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/kernel.h>
  17. #include <linux/err.h>
  18. #include <linux/module.h>
  19. #include <linux/slab.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/io.h>
  23. #include <linux/iio/iio.h>
  24. #include <linux/of.h>
  25. #include <linux/of_device.h>
  26. #include <linux/iio/machine.h>
  27. #include <linux/iio/driver.h>
  28. #include <linux/mfd/ti_am335x_tscadc.h>
  29. #include <linux/iio/buffer.h>
  30. #include <linux/iio/kfifo_buf.h>
  31. struct tiadc_device {
  32. struct ti_tscadc_dev *mfd_tscadc;
  33. int channels;
  34. u8 channel_line[8];
  35. u8 channel_step[8];
  36. int buffer_en_ch_steps;
  37. u16 data[8];
  38. };
  39. static unsigned int tiadc_readl(struct tiadc_device *adc, unsigned int reg)
  40. {
  41. return readl(adc->mfd_tscadc->tscadc_base + reg);
  42. }
  43. static void tiadc_writel(struct tiadc_device *adc, unsigned int reg,
  44. unsigned int val)
  45. {
  46. writel(val, adc->mfd_tscadc->tscadc_base + reg);
  47. }
  48. static u32 get_adc_step_mask(struct tiadc_device *adc_dev)
  49. {
  50. u32 step_en;
  51. step_en = ((1 << adc_dev->channels) - 1);
  52. step_en <<= TOTAL_STEPS - adc_dev->channels + 1;
  53. return step_en;
  54. }
  55. static u32 get_adc_step_bit(struct tiadc_device *adc_dev, int chan)
  56. {
  57. return 1 << adc_dev->channel_step[chan];
  58. }
  59. static void tiadc_step_config(struct iio_dev *indio_dev)
  60. {
  61. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  62. unsigned int stepconfig;
  63. int i, steps;
  64. /*
  65. * There are 16 configurable steps and 8 analog input
  66. * lines available which are shared between Touchscreen and ADC.
  67. *
  68. * Steps backwards i.e. from 16 towards 0 are used by ADC
  69. * depending on number of input lines needed.
  70. * Channel would represent which analog input
  71. * needs to be given to ADC to digitalize data.
  72. */
  73. steps = TOTAL_STEPS - adc_dev->channels;
  74. if (iio_buffer_enabled(indio_dev))
  75. stepconfig = STEPCONFIG_AVG_16 | STEPCONFIG_FIFO1
  76. | STEPCONFIG_MODE_SWCNT;
  77. else
  78. stepconfig = STEPCONFIG_AVG_16 | STEPCONFIG_FIFO1;
  79. for (i = 0; i < adc_dev->channels; i++) {
  80. int chan;
  81. chan = adc_dev->channel_line[i];
  82. tiadc_writel(adc_dev, REG_STEPCONFIG(steps),
  83. stepconfig | STEPCONFIG_INP(chan));
  84. tiadc_writel(adc_dev, REG_STEPDELAY(steps),
  85. STEPCONFIG_OPENDLY);
  86. adc_dev->channel_step[i] = steps;
  87. steps++;
  88. }
  89. }
  90. static irqreturn_t tiadc_irq_h(int irq, void *private)
  91. {
  92. struct iio_dev *indio_dev = private;
  93. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  94. unsigned int status, config;
  95. status = tiadc_readl(adc_dev, REG_IRQSTATUS);
  96. /*
  97. * ADC and touchscreen share the IRQ line.
  98. * FIFO0 interrupts are used by TSC. Handle FIFO1 IRQs here only
  99. */
  100. if (status & IRQENB_FIFO1OVRRUN) {
  101. /* FIFO Overrun. Clear flag. Disable/Enable ADC to recover */
  102. config = tiadc_readl(adc_dev, REG_CTRL);
  103. config &= ~(CNTRLREG_TSCSSENB);
  104. tiadc_writel(adc_dev, REG_CTRL, config);
  105. tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1OVRRUN
  106. | IRQENB_FIFO1UNDRFLW | IRQENB_FIFO1THRES);
  107. tiadc_writel(adc_dev, REG_CTRL, (config | CNTRLREG_TSCSSENB));
  108. return IRQ_HANDLED;
  109. } else if (status & IRQENB_FIFO1THRES) {
  110. /* Disable irq and wake worker thread */
  111. tiadc_writel(adc_dev, REG_IRQCLR, IRQENB_FIFO1THRES);
  112. return IRQ_WAKE_THREAD;
  113. }
  114. return IRQ_NONE;
  115. }
  116. static irqreturn_t tiadc_worker_h(int irq, void *private)
  117. {
  118. struct iio_dev *indio_dev = private;
  119. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  120. int i, k, fifo1count, read;
  121. u16 *data = adc_dev->data;
  122. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  123. for (k = 0; k < fifo1count; k = k + i) {
  124. for (i = 0; i < (indio_dev->scan_bytes)/2; i++) {
  125. read = tiadc_readl(adc_dev, REG_FIFO1);
  126. data[i] = read & FIFOREAD_DATA_MASK;
  127. }
  128. iio_push_to_buffers(indio_dev, (u8 *) data);
  129. }
  130. tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES);
  131. tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES);
  132. return IRQ_HANDLED;
  133. }
  134. static int tiadc_buffer_preenable(struct iio_dev *indio_dev)
  135. {
  136. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  137. int i, fifo1count, read;
  138. tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
  139. IRQENB_FIFO1OVRRUN |
  140. IRQENB_FIFO1UNDRFLW));
  141. /* Flush FIFO. Needed in corner cases in simultaneous tsc/adc use */
  142. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  143. for (i = 0; i < fifo1count; i++)
  144. read = tiadc_readl(adc_dev, REG_FIFO1);
  145. return 0;
  146. }
  147. static int tiadc_buffer_postenable(struct iio_dev *indio_dev)
  148. {
  149. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  150. struct iio_buffer *buffer = indio_dev->buffer;
  151. unsigned int enb = 0;
  152. u8 bit;
  153. tiadc_step_config(indio_dev);
  154. for_each_set_bit(bit, buffer->scan_mask, adc_dev->channels)
  155. enb |= (get_adc_step_bit(adc_dev, bit) << 1);
  156. adc_dev->buffer_en_ch_steps = enb;
  157. am335x_tsc_se_set(adc_dev->mfd_tscadc, enb);
  158. tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES
  159. | IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW);
  160. tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES
  161. | IRQENB_FIFO1OVRRUN);
  162. return 0;
  163. }
  164. static int tiadc_buffer_predisable(struct iio_dev *indio_dev)
  165. {
  166. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  167. int fifo1count, i, read;
  168. tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
  169. IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW));
  170. am335x_tsc_se_clr(adc_dev->mfd_tscadc, adc_dev->buffer_en_ch_steps);
  171. /* Flush FIFO of leftover data in the time it takes to disable adc */
  172. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  173. for (i = 0; i < fifo1count; i++)
  174. read = tiadc_readl(adc_dev, REG_FIFO1);
  175. return 0;
  176. }
  177. static int tiadc_buffer_postdisable(struct iio_dev *indio_dev)
  178. {
  179. tiadc_step_config(indio_dev);
  180. return 0;
  181. }
  182. static const struct iio_buffer_setup_ops tiadc_buffer_setup_ops = {
  183. .preenable = &tiadc_buffer_preenable,
  184. .postenable = &tiadc_buffer_postenable,
  185. .predisable = &tiadc_buffer_predisable,
  186. .postdisable = &tiadc_buffer_postdisable,
  187. };
  188. static int tiadc_iio_buffered_hardware_setup(struct iio_dev *indio_dev,
  189. irqreturn_t (*pollfunc_bh)(int irq, void *p),
  190. irqreturn_t (*pollfunc_th)(int irq, void *p),
  191. int irq,
  192. unsigned long flags,
  193. const struct iio_buffer_setup_ops *setup_ops)
  194. {
  195. struct iio_buffer *buffer;
  196. int ret;
  197. buffer = iio_kfifo_allocate(indio_dev);
  198. if (!buffer)
  199. return -ENOMEM;
  200. iio_device_attach_buffer(indio_dev, buffer);
  201. ret = request_threaded_irq(irq, pollfunc_th, pollfunc_bh,
  202. flags, indio_dev->name, indio_dev);
  203. if (ret)
  204. goto error_kfifo_free;
  205. indio_dev->setup_ops = setup_ops;
  206. indio_dev->modes |= INDIO_BUFFER_HARDWARE;
  207. ret = iio_buffer_register(indio_dev,
  208. indio_dev->channels,
  209. indio_dev->num_channels);
  210. if (ret)
  211. goto error_free_irq;
  212. return 0;
  213. error_free_irq:
  214. free_irq(irq, indio_dev);
  215. error_kfifo_free:
  216. iio_kfifo_free(indio_dev->buffer);
  217. return ret;
  218. }
  219. static void tiadc_iio_buffered_hardware_remove(struct iio_dev *indio_dev)
  220. {
  221. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  222. free_irq(adc_dev->mfd_tscadc->irq, indio_dev);
  223. iio_kfifo_free(indio_dev->buffer);
  224. iio_buffer_unregister(indio_dev);
  225. }
  226. static const char * const chan_name_ain[] = {
  227. "AIN0",
  228. "AIN1",
  229. "AIN2",
  230. "AIN3",
  231. "AIN4",
  232. "AIN5",
  233. "AIN6",
  234. "AIN7",
  235. };
  236. static int tiadc_channel_init(struct iio_dev *indio_dev, int channels)
  237. {
  238. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  239. struct iio_chan_spec *chan_array;
  240. struct iio_chan_spec *chan;
  241. int i;
  242. indio_dev->num_channels = channels;
  243. chan_array = kcalloc(channels,
  244. sizeof(struct iio_chan_spec), GFP_KERNEL);
  245. if (chan_array == NULL)
  246. return -ENOMEM;
  247. chan = chan_array;
  248. for (i = 0; i < channels; i++, chan++) {
  249. chan->type = IIO_VOLTAGE;
  250. chan->indexed = 1;
  251. chan->channel = adc_dev->channel_line[i];
  252. chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
  253. chan->datasheet_name = chan_name_ain[chan->channel];
  254. chan->scan_index = i;
  255. chan->scan_type.sign = 'u';
  256. chan->scan_type.realbits = 12;
  257. chan->scan_type.storagebits = 16;
  258. }
  259. indio_dev->channels = chan_array;
  260. return 0;
  261. }
  262. static void tiadc_channels_remove(struct iio_dev *indio_dev)
  263. {
  264. kfree(indio_dev->channels);
  265. }
  266. static int tiadc_read_raw(struct iio_dev *indio_dev,
  267. struct iio_chan_spec const *chan,
  268. int *val, int *val2, long mask)
  269. {
  270. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  271. int i, map_val;
  272. unsigned int fifo1count, read, stepid;
  273. bool found = false;
  274. u32 step_en;
  275. unsigned long timeout = jiffies + usecs_to_jiffies
  276. (IDLE_TIMEOUT * adc_dev->channels);
  277. if (iio_buffer_enabled(indio_dev))
  278. return -EBUSY;
  279. step_en = get_adc_step_mask(adc_dev);
  280. am335x_tsc_se_set(adc_dev->mfd_tscadc, step_en);
  281. /* Wait for ADC sequencer to complete sampling */
  282. while (tiadc_readl(adc_dev, REG_ADCFSM) & SEQ_STATUS) {
  283. if (time_after(jiffies, timeout))
  284. return -EAGAIN;
  285. }
  286. map_val = chan->channel + TOTAL_CHANNELS;
  287. /*
  288. * When the sub-system is first enabled,
  289. * the sequencer will always start with the
  290. * lowest step (1) and continue until step (16).
  291. * For ex: If we have enabled 4 ADC channels and
  292. * currently use only 1 out of them, the
  293. * sequencer still configures all the 4 steps,
  294. * leading to 3 unwanted data.
  295. * Hence we need to flush out this data.
  296. */
  297. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  298. for (i = 0; i < fifo1count; i++) {
  299. read = tiadc_readl(adc_dev, REG_FIFO1);
  300. stepid = read & FIFOREAD_CHNLID_MASK;
  301. stepid = stepid >> 0x10;
  302. if (stepid == map_val) {
  303. read = read & FIFOREAD_DATA_MASK;
  304. found = true;
  305. *val = (u16) read;
  306. }
  307. }
  308. if (found == false)
  309. return -EBUSY;
  310. return IIO_VAL_INT;
  311. }
  312. static const struct iio_info tiadc_info = {
  313. .read_raw = &tiadc_read_raw,
  314. .driver_module = THIS_MODULE,
  315. };
  316. static int tiadc_probe(struct platform_device *pdev)
  317. {
  318. struct iio_dev *indio_dev;
  319. struct tiadc_device *adc_dev;
  320. struct device_node *node = pdev->dev.of_node;
  321. struct property *prop;
  322. const __be32 *cur;
  323. int err;
  324. u32 val;
  325. int channels = 0;
  326. if (!node) {
  327. dev_err(&pdev->dev, "Could not find valid DT data.\n");
  328. return -EINVAL;
  329. }
  330. indio_dev = devm_iio_device_alloc(&pdev->dev,
  331. sizeof(struct tiadc_device));
  332. if (indio_dev == NULL) {
  333. dev_err(&pdev->dev, "failed to allocate iio device\n");
  334. return -ENOMEM;
  335. }
  336. adc_dev = iio_priv(indio_dev);
  337. adc_dev->mfd_tscadc = ti_tscadc_dev_get(pdev);
  338. of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
  339. adc_dev->channel_line[channels] = val;
  340. channels++;
  341. }
  342. adc_dev->channels = channels;
  343. indio_dev->dev.parent = &pdev->dev;
  344. indio_dev->name = dev_name(&pdev->dev);
  345. indio_dev->modes = INDIO_DIRECT_MODE;
  346. indio_dev->info = &tiadc_info;
  347. tiadc_step_config(indio_dev);
  348. tiadc_writel(adc_dev, REG_FIFO1THR, FIFO1_THRESHOLD);
  349. err = tiadc_channel_init(indio_dev, adc_dev->channels);
  350. if (err < 0)
  351. return err;
  352. err = tiadc_iio_buffered_hardware_setup(indio_dev,
  353. &tiadc_worker_h,
  354. &tiadc_irq_h,
  355. adc_dev->mfd_tscadc->irq,
  356. IRQF_SHARED,
  357. &tiadc_buffer_setup_ops);
  358. if (err)
  359. goto err_free_channels;
  360. err = iio_device_register(indio_dev);
  361. if (err)
  362. goto err_buffer_unregister;
  363. platform_set_drvdata(pdev, indio_dev);
  364. return 0;
  365. err_buffer_unregister:
  366. tiadc_iio_buffered_hardware_remove(indio_dev);
  367. err_free_channels:
  368. tiadc_channels_remove(indio_dev);
  369. return err;
  370. }
  371. static int tiadc_remove(struct platform_device *pdev)
  372. {
  373. struct iio_dev *indio_dev = platform_get_drvdata(pdev);
  374. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  375. u32 step_en;
  376. iio_device_unregister(indio_dev);
  377. tiadc_iio_buffered_hardware_remove(indio_dev);
  378. tiadc_channels_remove(indio_dev);
  379. step_en = get_adc_step_mask(adc_dev);
  380. am335x_tsc_se_clr(adc_dev->mfd_tscadc, step_en);
  381. return 0;
  382. }
  383. #ifdef CONFIG_PM
  384. static int tiadc_suspend(struct device *dev)
  385. {
  386. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  387. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  388. struct ti_tscadc_dev *tscadc_dev;
  389. unsigned int idle;
  390. tscadc_dev = ti_tscadc_dev_get(to_platform_device(dev));
  391. if (!device_may_wakeup(tscadc_dev->dev)) {
  392. idle = tiadc_readl(adc_dev, REG_CTRL);
  393. idle &= ~(CNTRLREG_TSCSSENB);
  394. tiadc_writel(adc_dev, REG_CTRL, (idle |
  395. CNTRLREG_POWERDOWN));
  396. }
  397. return 0;
  398. }
  399. static int tiadc_resume(struct device *dev)
  400. {
  401. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  402. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  403. unsigned int restore;
  404. /* Make sure ADC is powered up */
  405. restore = tiadc_readl(adc_dev, REG_CTRL);
  406. restore &= ~(CNTRLREG_POWERDOWN);
  407. tiadc_writel(adc_dev, REG_CTRL, restore);
  408. tiadc_step_config(indio_dev);
  409. return 0;
  410. }
  411. static const struct dev_pm_ops tiadc_pm_ops = {
  412. .suspend = tiadc_suspend,
  413. .resume = tiadc_resume,
  414. };
  415. #define TIADC_PM_OPS (&tiadc_pm_ops)
  416. #else
  417. #define TIADC_PM_OPS NULL
  418. #endif
  419. static const struct of_device_id ti_adc_dt_ids[] = {
  420. { .compatible = "ti,am3359-adc", },
  421. { }
  422. };
  423. MODULE_DEVICE_TABLE(of, ti_adc_dt_ids);
  424. static struct platform_driver tiadc_driver = {
  425. .driver = {
  426. .name = "TI-am335x-adc",
  427. .owner = THIS_MODULE,
  428. .pm = TIADC_PM_OPS,
  429. .of_match_table = ti_adc_dt_ids,
  430. },
  431. .probe = tiadc_probe,
  432. .remove = tiadc_remove,
  433. };
  434. module_platform_driver(tiadc_driver);
  435. MODULE_DESCRIPTION("TI ADC controller driver");
  436. MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
  437. MODULE_LICENSE("GPL");