iommu.c 6.3 KB

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  1. /*
  2. * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
  3. *
  4. * Rewrite, cleanup:
  5. *
  6. * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation
  7. * Copyright (C) 2006 Olof Johansson <olof@lixom.net>
  8. *
  9. * Dynamic DMA mapping support, iSeries-specific parts.
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/types.h>
  27. #include <linux/dma-mapping.h>
  28. #include <linux/list.h>
  29. #include <linux/pci.h>
  30. #include <linux/module.h>
  31. #include <asm/iommu.h>
  32. #include <asm/tce.h>
  33. #include <asm/machdep.h>
  34. #include <asm/abs_addr.h>
  35. #include <asm/prom.h>
  36. #include <asm/pci-bridge.h>
  37. #include <asm/iseries/hv_call_xm.h>
  38. #include <asm/iseries/hv_call_event.h>
  39. #include <asm/iseries/iommu.h>
  40. static void tce_build_iSeries(struct iommu_table *tbl, long index, long npages,
  41. unsigned long uaddr, enum dma_data_direction direction)
  42. {
  43. u64 rc;
  44. u64 tce, rpn;
  45. while (npages--) {
  46. rpn = virt_to_abs(uaddr) >> TCE_SHIFT;
  47. tce = (rpn & TCE_RPN_MASK) << TCE_RPN_SHIFT;
  48. if (tbl->it_type == TCE_VB) {
  49. /* Virtual Bus */
  50. tce |= TCE_VALID|TCE_ALLIO;
  51. if (direction != DMA_TO_DEVICE)
  52. tce |= TCE_VB_WRITE;
  53. } else {
  54. /* PCI Bus */
  55. tce |= TCE_PCI_READ; /* Read allowed */
  56. if (direction != DMA_TO_DEVICE)
  57. tce |= TCE_PCI_WRITE;
  58. }
  59. rc = HvCallXm_setTce((u64)tbl->it_index, (u64)index, tce);
  60. if (rc)
  61. panic("PCI_DMA: HvCallXm_setTce failed, Rc: 0x%lx\n",
  62. rc);
  63. index++;
  64. uaddr += TCE_PAGE_SIZE;
  65. }
  66. }
  67. static void tce_free_iSeries(struct iommu_table *tbl, long index, long npages)
  68. {
  69. u64 rc;
  70. while (npages--) {
  71. rc = HvCallXm_setTce((u64)tbl->it_index, (u64)index, 0);
  72. if (rc)
  73. panic("PCI_DMA: HvCallXm_setTce failed, Rc: 0x%lx\n",
  74. rc);
  75. index++;
  76. }
  77. }
  78. /*
  79. * Structure passed to HvCallXm_getTceTableParms
  80. */
  81. struct iommu_table_cb {
  82. unsigned long itc_busno; /* Bus number for this tce table */
  83. unsigned long itc_start; /* Will be NULL for secondary */
  84. unsigned long itc_totalsize; /* Size (in pages) of whole table */
  85. unsigned long itc_offset; /* Index into real tce table of the
  86. start of our section */
  87. unsigned long itc_size; /* Size (in pages) of our section */
  88. unsigned long itc_index; /* Index of this tce table */
  89. unsigned short itc_maxtables; /* Max num of tables for partition */
  90. unsigned char itc_virtbus; /* Flag to indicate virtual bus */
  91. unsigned char itc_slotno; /* IOA Tce Slot Index */
  92. unsigned char itc_rsvd[4];
  93. };
  94. /*
  95. * Call Hv with the architected data structure to get TCE table info.
  96. * info. Put the returned data into the Linux representation of the
  97. * TCE table data.
  98. * The Hardware Tce table comes in three flavors.
  99. * 1. TCE table shared between Buses.
  100. * 2. TCE table per Bus.
  101. * 3. TCE Table per IOA.
  102. */
  103. void iommu_table_getparms_iSeries(unsigned long busno,
  104. unsigned char slotno,
  105. unsigned char virtbus,
  106. struct iommu_table* tbl)
  107. {
  108. struct iommu_table_cb *parms;
  109. parms = kzalloc(sizeof(*parms), GFP_KERNEL);
  110. if (parms == NULL)
  111. panic("PCI_DMA: TCE Table Allocation failed.");
  112. parms->itc_busno = busno;
  113. parms->itc_slotno = slotno;
  114. parms->itc_virtbus = virtbus;
  115. HvCallXm_getTceTableParms(iseries_hv_addr(parms));
  116. if (parms->itc_size == 0)
  117. panic("PCI_DMA: parms->size is zero, parms is 0x%p", parms);
  118. /* itc_size is in pages worth of table, it_size is in # of entries */
  119. tbl->it_size = (parms->itc_size * TCE_PAGE_SIZE) / TCE_ENTRY_SIZE;
  120. tbl->it_busno = parms->itc_busno;
  121. tbl->it_offset = parms->itc_offset;
  122. tbl->it_index = parms->itc_index;
  123. tbl->it_blocksize = 1;
  124. tbl->it_type = virtbus ? TCE_VB : TCE_PCI;
  125. kfree(parms);
  126. }
  127. #ifdef CONFIG_PCI
  128. /*
  129. * This function compares the known tables to find an iommu_table
  130. * that has already been built for hardware TCEs.
  131. */
  132. static struct iommu_table *iommu_table_find(struct iommu_table * tbl)
  133. {
  134. struct device_node *node;
  135. for (node = NULL; (node = of_find_all_nodes(node)); ) {
  136. struct pci_dn *pdn = PCI_DN(node);
  137. struct iommu_table *it;
  138. if (pdn == NULL)
  139. continue;
  140. it = pdn->iommu_table;
  141. if ((it != NULL) &&
  142. (it->it_type == TCE_PCI) &&
  143. (it->it_offset == tbl->it_offset) &&
  144. (it->it_index == tbl->it_index) &&
  145. (it->it_size == tbl->it_size))
  146. return it;
  147. }
  148. return NULL;
  149. }
  150. void iommu_devnode_init_iSeries(struct pci_dev *pdev, struct device_node *dn)
  151. {
  152. struct iommu_table *tbl;
  153. struct pci_dn *pdn = PCI_DN(dn);
  154. const u32 *lsn = of_get_property(dn, "linux,logical-slot-number", NULL);
  155. BUG_ON(lsn == NULL);
  156. tbl = kmalloc(sizeof(struct iommu_table), GFP_KERNEL);
  157. iommu_table_getparms_iSeries(pdn->busno, *lsn, 0, tbl);
  158. /* Look for existing tce table */
  159. pdn->iommu_table = iommu_table_find(tbl);
  160. if (pdn->iommu_table == NULL)
  161. pdn->iommu_table = iommu_init_table(tbl, -1);
  162. else
  163. kfree(tbl);
  164. pdev->dev.archdata.dma_data = pdn->iommu_table;
  165. }
  166. #endif
  167. extern struct iommu_table vio_iommu_table;
  168. void *iseries_hv_alloc(size_t size, dma_addr_t *dma_handle, gfp_t flag)
  169. {
  170. return iommu_alloc_coherent(&vio_iommu_table, size, dma_handle,
  171. DMA_32BIT_MASK, flag, -1);
  172. }
  173. EXPORT_SYMBOL_GPL(iseries_hv_alloc);
  174. void iseries_hv_free(size_t size, void *vaddr, dma_addr_t dma_handle)
  175. {
  176. iommu_free_coherent(&vio_iommu_table, size, vaddr, dma_handle);
  177. }
  178. EXPORT_SYMBOL_GPL(iseries_hv_free);
  179. dma_addr_t iseries_hv_map(void *vaddr, size_t size,
  180. enum dma_data_direction direction)
  181. {
  182. return iommu_map_single(&vio_iommu_table, vaddr, size,
  183. DMA_32BIT_MASK, direction);
  184. }
  185. void iseries_hv_unmap(dma_addr_t dma_handle, size_t size,
  186. enum dma_data_direction direction)
  187. {
  188. iommu_unmap_single(&vio_iommu_table, dma_handle, size, direction);
  189. }
  190. void iommu_init_early_iSeries(void)
  191. {
  192. ppc_md.tce_build = tce_build_iSeries;
  193. ppc_md.tce_free = tce_free_iSeries;
  194. set_pci_dma_ops(&dma_iommu_ops);
  195. }