xonar_wm87x6.c 38 KB

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  1. /*
  2. * card driver for models with WM8776/WM8766 DACs (Xonar DS/HDAV1.3 Slim)
  3. *
  4. * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  5. *
  6. *
  7. * This driver is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License, version 2.
  9. *
  10. * This driver is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this driver; if not, see <http://www.gnu.org/licenses/>.
  17. */
  18. /*
  19. * Xonar DS
  20. * --------
  21. *
  22. * CMI8788:
  23. *
  24. * SPI 0 -> WM8766 (surround, center/LFE, back)
  25. * SPI 1 -> WM8776 (front, input)
  26. *
  27. * GPIO 4 <- headphone detect, 0 = plugged
  28. * GPIO 6 -> route input jack to mic-in (0) or line-in (1)
  29. * GPIO 7 -> enable output to front L/R speaker channels
  30. * GPIO 8 -> enable output to other speaker channels and front panel headphone
  31. *
  32. * WM8776:
  33. *
  34. * input 1 <- line
  35. * input 2 <- mic
  36. * input 3 <- front mic
  37. * input 4 <- aux
  38. */
  39. /*
  40. * Xonar HDAV1.3 Slim
  41. * ------------------
  42. *
  43. * CMI8788:
  44. *
  45. * I²C <-> WM8776 (addr 0011010)
  46. *
  47. * GPIO 0 -> disable HDMI output
  48. * GPIO 1 -> enable HP output
  49. * GPIO 6 -> firmware EEPROM I²C clock
  50. * GPIO 7 <-> firmware EEPROM I²C data
  51. *
  52. * UART <-> HDMI controller
  53. *
  54. * WM8776:
  55. *
  56. * input 1 <- mic
  57. * input 2 <- aux
  58. */
  59. #include <linux/pci.h>
  60. #include <linux/delay.h>
  61. #include <sound/control.h>
  62. #include <sound/core.h>
  63. #include <sound/info.h>
  64. #include <sound/jack.h>
  65. #include <sound/pcm.h>
  66. #include <sound/pcm_params.h>
  67. #include <sound/tlv.h>
  68. #include "xonar.h"
  69. #include "wm8776.h"
  70. #include "wm8766.h"
  71. #define GPIO_DS_HP_DETECT 0x0010
  72. #define GPIO_DS_INPUT_ROUTE 0x0040
  73. #define GPIO_DS_OUTPUT_FRONTLR 0x0080
  74. #define GPIO_DS_OUTPUT_ENABLE 0x0100
  75. #define GPIO_SLIM_HDMI_DISABLE 0x0001
  76. #define GPIO_SLIM_OUTPUT_ENABLE 0x0002
  77. #define GPIO_SLIM_FIRMWARE_CLK 0x0040
  78. #define GPIO_SLIM_FIRMWARE_DATA 0x0080
  79. #define I2C_DEVICE_WM8776 0x34 /* 001101, 0, /W=0 */
  80. #define LC_CONTROL_LIMITER 0x40000000
  81. #define LC_CONTROL_ALC 0x20000000
  82. struct xonar_wm87x6 {
  83. struct xonar_generic generic;
  84. u16 wm8776_regs[0x17];
  85. u16 wm8766_regs[0x10];
  86. struct snd_kcontrol *line_adcmux_control;
  87. struct snd_kcontrol *mic_adcmux_control;
  88. struct snd_kcontrol *lc_controls[13];
  89. struct snd_jack *hp_jack;
  90. struct xonar_hdmi hdmi;
  91. };
  92. static void wm8776_write_spi(struct oxygen *chip,
  93. unsigned int reg, unsigned int value)
  94. {
  95. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  96. OXYGEN_SPI_DATA_LENGTH_2 |
  97. OXYGEN_SPI_CLOCK_160 |
  98. (1 << OXYGEN_SPI_CODEC_SHIFT) |
  99. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  100. (reg << 9) | value);
  101. }
  102. static void wm8776_write_i2c(struct oxygen *chip,
  103. unsigned int reg, unsigned int value)
  104. {
  105. oxygen_write_i2c(chip, I2C_DEVICE_WM8776,
  106. (reg << 1) | (value >> 8), value);
  107. }
  108. static void wm8776_write(struct oxygen *chip,
  109. unsigned int reg, unsigned int value)
  110. {
  111. struct xonar_wm87x6 *data = chip->model_data;
  112. if ((chip->model.function_flags & OXYGEN_FUNCTION_2WIRE_SPI_MASK) ==
  113. OXYGEN_FUNCTION_SPI)
  114. wm8776_write_spi(chip, reg, value);
  115. else
  116. wm8776_write_i2c(chip, reg, value);
  117. if (reg < ARRAY_SIZE(data->wm8776_regs)) {
  118. if (reg >= WM8776_HPLVOL && reg <= WM8776_DACMASTER)
  119. value &= ~WM8776_UPDATE;
  120. data->wm8776_regs[reg] = value;
  121. }
  122. }
  123. static void wm8776_write_cached(struct oxygen *chip,
  124. unsigned int reg, unsigned int value)
  125. {
  126. struct xonar_wm87x6 *data = chip->model_data;
  127. if (reg >= ARRAY_SIZE(data->wm8776_regs) ||
  128. value != data->wm8776_regs[reg])
  129. wm8776_write(chip, reg, value);
  130. }
  131. static void wm8766_write(struct oxygen *chip,
  132. unsigned int reg, unsigned int value)
  133. {
  134. struct xonar_wm87x6 *data = chip->model_data;
  135. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  136. OXYGEN_SPI_DATA_LENGTH_2 |
  137. OXYGEN_SPI_CLOCK_160 |
  138. (0 << OXYGEN_SPI_CODEC_SHIFT) |
  139. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  140. (reg << 9) | value);
  141. if (reg < ARRAY_SIZE(data->wm8766_regs)) {
  142. if ((reg >= WM8766_LDA1 && reg <= WM8766_RDA1) ||
  143. (reg >= WM8766_LDA2 && reg <= WM8766_MASTDA))
  144. value &= ~WM8766_UPDATE;
  145. data->wm8766_regs[reg] = value;
  146. }
  147. }
  148. static void wm8766_write_cached(struct oxygen *chip,
  149. unsigned int reg, unsigned int value)
  150. {
  151. struct xonar_wm87x6 *data = chip->model_data;
  152. if (reg >= ARRAY_SIZE(data->wm8766_regs) ||
  153. value != data->wm8766_regs[reg])
  154. wm8766_write(chip, reg, value);
  155. }
  156. static void wm8776_registers_init(struct oxygen *chip)
  157. {
  158. struct xonar_wm87x6 *data = chip->model_data;
  159. wm8776_write(chip, WM8776_RESET, 0);
  160. wm8776_write(chip, WM8776_DACCTRL1, WM8776_DZCEN |
  161. WM8776_PL_LEFT_LEFT | WM8776_PL_RIGHT_RIGHT);
  162. wm8776_write(chip, WM8776_DACMUTE, chip->dac_mute ? WM8776_DMUTE : 0);
  163. wm8776_write(chip, WM8776_DACIFCTRL,
  164. WM8776_DACFMT_LJUST | WM8776_DACWL_24);
  165. wm8776_write(chip, WM8776_ADCIFCTRL,
  166. data->wm8776_regs[WM8776_ADCIFCTRL]);
  167. wm8776_write(chip, WM8776_MSTRCTRL, data->wm8776_regs[WM8776_MSTRCTRL]);
  168. wm8776_write(chip, WM8776_PWRDOWN, data->wm8776_regs[WM8776_PWRDOWN]);
  169. wm8776_write(chip, WM8776_HPLVOL, data->wm8776_regs[WM8776_HPLVOL]);
  170. wm8776_write(chip, WM8776_HPRVOL, data->wm8776_regs[WM8776_HPRVOL] |
  171. WM8776_UPDATE);
  172. wm8776_write(chip, WM8776_ADCLVOL, data->wm8776_regs[WM8776_ADCLVOL]);
  173. wm8776_write(chip, WM8776_ADCRVOL, data->wm8776_regs[WM8776_ADCRVOL]);
  174. wm8776_write(chip, WM8776_ADCMUX, data->wm8776_regs[WM8776_ADCMUX]);
  175. wm8776_write(chip, WM8776_DACLVOL, chip->dac_volume[0]);
  176. wm8776_write(chip, WM8776_DACRVOL, chip->dac_volume[1] | WM8776_UPDATE);
  177. }
  178. static void wm8766_registers_init(struct oxygen *chip)
  179. {
  180. struct xonar_wm87x6 *data = chip->model_data;
  181. wm8766_write(chip, WM8766_RESET, 0);
  182. wm8766_write(chip, WM8766_DAC_CTRL, data->wm8766_regs[WM8766_DAC_CTRL]);
  183. wm8766_write(chip, WM8766_INT_CTRL, WM8766_FMT_LJUST | WM8766_IWL_24);
  184. wm8766_write(chip, WM8766_DAC_CTRL2,
  185. WM8766_ZCD | (chip->dac_mute ? WM8766_DMUTE_MASK : 0));
  186. wm8766_write(chip, WM8766_LDA1, chip->dac_volume[2]);
  187. wm8766_write(chip, WM8766_RDA1, chip->dac_volume[3]);
  188. wm8766_write(chip, WM8766_LDA2, chip->dac_volume[4]);
  189. wm8766_write(chip, WM8766_RDA2, chip->dac_volume[5]);
  190. wm8766_write(chip, WM8766_LDA3, chip->dac_volume[6]);
  191. wm8766_write(chip, WM8766_RDA3, chip->dac_volume[7] | WM8766_UPDATE);
  192. }
  193. static void wm8776_init(struct oxygen *chip)
  194. {
  195. struct xonar_wm87x6 *data = chip->model_data;
  196. data->wm8776_regs[WM8776_HPLVOL] = (0x79 - 60) | WM8776_HPZCEN;
  197. data->wm8776_regs[WM8776_HPRVOL] = (0x79 - 60) | WM8776_HPZCEN;
  198. data->wm8776_regs[WM8776_ADCIFCTRL] =
  199. WM8776_ADCFMT_LJUST | WM8776_ADCWL_24 | WM8776_ADCMCLK;
  200. data->wm8776_regs[WM8776_MSTRCTRL] =
  201. WM8776_ADCRATE_256 | WM8776_DACRATE_256;
  202. data->wm8776_regs[WM8776_PWRDOWN] = WM8776_HPPD;
  203. data->wm8776_regs[WM8776_ADCLVOL] = 0xa5 | WM8776_ZCA;
  204. data->wm8776_regs[WM8776_ADCRVOL] = 0xa5 | WM8776_ZCA;
  205. data->wm8776_regs[WM8776_ADCMUX] = 0x001;
  206. wm8776_registers_init(chip);
  207. }
  208. static void wm8766_init(struct oxygen *chip)
  209. {
  210. struct xonar_wm87x6 *data = chip->model_data;
  211. data->wm8766_regs[WM8766_DAC_CTRL] =
  212. WM8766_PL_LEFT_LEFT | WM8766_PL_RIGHT_RIGHT;
  213. wm8766_registers_init(chip);
  214. }
  215. static void xonar_ds_handle_hp_jack(struct oxygen *chip)
  216. {
  217. struct xonar_wm87x6 *data = chip->model_data;
  218. bool hp_plugged;
  219. unsigned int reg;
  220. mutex_lock(&chip->mutex);
  221. hp_plugged = !(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
  222. GPIO_DS_HP_DETECT);
  223. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  224. hp_plugged ? 0 : GPIO_DS_OUTPUT_FRONTLR,
  225. GPIO_DS_OUTPUT_FRONTLR);
  226. reg = data->wm8766_regs[WM8766_DAC_CTRL] & ~WM8766_MUTEALL;
  227. if (hp_plugged)
  228. reg |= WM8766_MUTEALL;
  229. wm8766_write_cached(chip, WM8766_DAC_CTRL, reg);
  230. snd_jack_report(data->hp_jack, hp_plugged ? SND_JACK_HEADPHONE : 0);
  231. mutex_unlock(&chip->mutex);
  232. }
  233. static void xonar_ds_init(struct oxygen *chip)
  234. {
  235. struct xonar_wm87x6 *data = chip->model_data;
  236. data->generic.anti_pop_delay = 300;
  237. data->generic.output_enable_bit = GPIO_DS_OUTPUT_ENABLE;
  238. wm8776_init(chip);
  239. wm8766_init(chip);
  240. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
  241. GPIO_DS_INPUT_ROUTE | GPIO_DS_OUTPUT_FRONTLR);
  242. oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL,
  243. GPIO_DS_HP_DETECT);
  244. oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_DS_INPUT_ROUTE);
  245. oxygen_set_bits16(chip, OXYGEN_GPIO_INTERRUPT_MASK, GPIO_DS_HP_DETECT);
  246. chip->interrupt_mask |= OXYGEN_INT_GPIO;
  247. xonar_enable_output(chip);
  248. snd_jack_new(chip->card, "Headphone",
  249. SND_JACK_HEADPHONE, &data->hp_jack);
  250. xonar_ds_handle_hp_jack(chip);
  251. snd_component_add(chip->card, "WM8776");
  252. snd_component_add(chip->card, "WM8766");
  253. }
  254. static void xonar_hdav_slim_init(struct oxygen *chip)
  255. {
  256. struct xonar_wm87x6 *data = chip->model_data;
  257. data->generic.anti_pop_delay = 300;
  258. data->generic.output_enable_bit = GPIO_SLIM_OUTPUT_ENABLE;
  259. wm8776_init(chip);
  260. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
  261. GPIO_SLIM_HDMI_DISABLE |
  262. GPIO_SLIM_FIRMWARE_CLK |
  263. GPIO_SLIM_FIRMWARE_DATA);
  264. xonar_hdmi_init(chip, &data->hdmi);
  265. xonar_enable_output(chip);
  266. snd_component_add(chip->card, "WM8776");
  267. }
  268. static void xonar_ds_cleanup(struct oxygen *chip)
  269. {
  270. xonar_disable_output(chip);
  271. wm8776_write(chip, WM8776_RESET, 0);
  272. }
  273. static void xonar_hdav_slim_cleanup(struct oxygen *chip)
  274. {
  275. xonar_hdmi_cleanup(chip);
  276. xonar_disable_output(chip);
  277. wm8776_write(chip, WM8776_RESET, 0);
  278. msleep(2);
  279. }
  280. static void xonar_ds_suspend(struct oxygen *chip)
  281. {
  282. xonar_ds_cleanup(chip);
  283. }
  284. static void xonar_hdav_slim_suspend(struct oxygen *chip)
  285. {
  286. xonar_hdav_slim_cleanup(chip);
  287. }
  288. static void xonar_ds_resume(struct oxygen *chip)
  289. {
  290. wm8776_registers_init(chip);
  291. wm8766_registers_init(chip);
  292. xonar_enable_output(chip);
  293. xonar_ds_handle_hp_jack(chip);
  294. }
  295. static void xonar_hdav_slim_resume(struct oxygen *chip)
  296. {
  297. struct xonar_wm87x6 *data = chip->model_data;
  298. wm8776_registers_init(chip);
  299. xonar_hdmi_resume(chip, &data->hdmi);
  300. xonar_enable_output(chip);
  301. }
  302. static void wm8776_adc_hardware_filter(unsigned int channel,
  303. struct snd_pcm_hardware *hardware)
  304. {
  305. if (channel == PCM_A) {
  306. hardware->rates = SNDRV_PCM_RATE_32000 |
  307. SNDRV_PCM_RATE_44100 |
  308. SNDRV_PCM_RATE_48000 |
  309. SNDRV_PCM_RATE_64000 |
  310. SNDRV_PCM_RATE_88200 |
  311. SNDRV_PCM_RATE_96000;
  312. hardware->rate_max = 96000;
  313. }
  314. }
  315. static void xonar_hdav_slim_hardware_filter(unsigned int channel,
  316. struct snd_pcm_hardware *hardware)
  317. {
  318. wm8776_adc_hardware_filter(channel, hardware);
  319. xonar_hdmi_pcm_hardware_filter(channel, hardware);
  320. }
  321. static void set_wm87x6_dac_params(struct oxygen *chip,
  322. struct snd_pcm_hw_params *params)
  323. {
  324. }
  325. static void set_wm8776_adc_params(struct oxygen *chip,
  326. struct snd_pcm_hw_params *params)
  327. {
  328. u16 reg;
  329. reg = WM8776_ADCRATE_256 | WM8776_DACRATE_256;
  330. if (params_rate(params) > 48000)
  331. reg |= WM8776_ADCOSR;
  332. wm8776_write_cached(chip, WM8776_MSTRCTRL, reg);
  333. }
  334. static void set_hdav_slim_dac_params(struct oxygen *chip,
  335. struct snd_pcm_hw_params *params)
  336. {
  337. struct xonar_wm87x6 *data = chip->model_data;
  338. xonar_set_hdmi_params(chip, &data->hdmi, params);
  339. }
  340. static void update_wm8776_volume(struct oxygen *chip)
  341. {
  342. struct xonar_wm87x6 *data = chip->model_data;
  343. u8 to_change;
  344. if (chip->dac_volume[0] == chip->dac_volume[1]) {
  345. if (chip->dac_volume[0] != data->wm8776_regs[WM8776_DACLVOL] ||
  346. chip->dac_volume[1] != data->wm8776_regs[WM8776_DACRVOL]) {
  347. wm8776_write(chip, WM8776_DACMASTER,
  348. chip->dac_volume[0] | WM8776_UPDATE);
  349. data->wm8776_regs[WM8776_DACLVOL] = chip->dac_volume[0];
  350. data->wm8776_regs[WM8776_DACRVOL] = chip->dac_volume[0];
  351. }
  352. } else {
  353. to_change = (chip->dac_volume[0] !=
  354. data->wm8776_regs[WM8776_DACLVOL]) << 0;
  355. to_change |= (chip->dac_volume[1] !=
  356. data->wm8776_regs[WM8776_DACLVOL]) << 1;
  357. if (to_change & 1)
  358. wm8776_write(chip, WM8776_DACLVOL, chip->dac_volume[0] |
  359. ((to_change & 2) ? 0 : WM8776_UPDATE));
  360. if (to_change & 2)
  361. wm8776_write(chip, WM8776_DACRVOL,
  362. chip->dac_volume[1] | WM8776_UPDATE);
  363. }
  364. }
  365. static void update_wm87x6_volume(struct oxygen *chip)
  366. {
  367. static const u8 wm8766_regs[6] = {
  368. WM8766_LDA1, WM8766_RDA1,
  369. WM8766_LDA2, WM8766_RDA2,
  370. WM8766_LDA3, WM8766_RDA3,
  371. };
  372. struct xonar_wm87x6 *data = chip->model_data;
  373. unsigned int i;
  374. u8 to_change;
  375. update_wm8776_volume(chip);
  376. if (chip->dac_volume[2] == chip->dac_volume[3] &&
  377. chip->dac_volume[2] == chip->dac_volume[4] &&
  378. chip->dac_volume[2] == chip->dac_volume[5] &&
  379. chip->dac_volume[2] == chip->dac_volume[6] &&
  380. chip->dac_volume[2] == chip->dac_volume[7]) {
  381. to_change = 0;
  382. for (i = 0; i < 6; ++i)
  383. if (chip->dac_volume[2] !=
  384. data->wm8766_regs[wm8766_regs[i]])
  385. to_change = 1;
  386. if (to_change) {
  387. wm8766_write(chip, WM8766_MASTDA,
  388. chip->dac_volume[2] | WM8766_UPDATE);
  389. for (i = 0; i < 6; ++i)
  390. data->wm8766_regs[wm8766_regs[i]] =
  391. chip->dac_volume[2];
  392. }
  393. } else {
  394. to_change = 0;
  395. for (i = 0; i < 6; ++i)
  396. to_change |= (chip->dac_volume[2 + i] !=
  397. data->wm8766_regs[wm8766_regs[i]]) << i;
  398. for (i = 0; i < 6; ++i)
  399. if (to_change & (1 << i))
  400. wm8766_write(chip, wm8766_regs[i],
  401. chip->dac_volume[2 + i] |
  402. ((to_change & (0x3e << i))
  403. ? 0 : WM8766_UPDATE));
  404. }
  405. }
  406. static void update_wm8776_mute(struct oxygen *chip)
  407. {
  408. wm8776_write_cached(chip, WM8776_DACMUTE,
  409. chip->dac_mute ? WM8776_DMUTE : 0);
  410. }
  411. static void update_wm87x6_mute(struct oxygen *chip)
  412. {
  413. update_wm8776_mute(chip);
  414. wm8766_write_cached(chip, WM8766_DAC_CTRL2, WM8766_ZCD |
  415. (chip->dac_mute ? WM8766_DMUTE_MASK : 0));
  416. }
  417. static void update_wm8766_center_lfe_mix(struct oxygen *chip, bool mixed)
  418. {
  419. struct xonar_wm87x6 *data = chip->model_data;
  420. unsigned int reg;
  421. /*
  422. * The WM8766 can mix left and right channels, but this setting
  423. * applies to all three stereo pairs.
  424. */
  425. reg = data->wm8766_regs[WM8766_DAC_CTRL] &
  426. ~(WM8766_PL_LEFT_MASK | WM8766_PL_RIGHT_MASK);
  427. if (mixed)
  428. reg |= WM8766_PL_LEFT_LRMIX | WM8766_PL_RIGHT_LRMIX;
  429. else
  430. reg |= WM8766_PL_LEFT_LEFT | WM8766_PL_RIGHT_RIGHT;
  431. wm8766_write_cached(chip, WM8766_DAC_CTRL, reg);
  432. }
  433. static void xonar_ds_gpio_changed(struct oxygen *chip)
  434. {
  435. xonar_ds_handle_hp_jack(chip);
  436. }
  437. static int wm8776_bit_switch_get(struct snd_kcontrol *ctl,
  438. struct snd_ctl_elem_value *value)
  439. {
  440. struct oxygen *chip = ctl->private_data;
  441. struct xonar_wm87x6 *data = chip->model_data;
  442. u16 bit = ctl->private_value & 0xffff;
  443. unsigned int reg_index = (ctl->private_value >> 16) & 0xff;
  444. bool invert = (ctl->private_value >> 24) & 1;
  445. value->value.integer.value[0] =
  446. ((data->wm8776_regs[reg_index] & bit) != 0) ^ invert;
  447. return 0;
  448. }
  449. static int wm8776_bit_switch_put(struct snd_kcontrol *ctl,
  450. struct snd_ctl_elem_value *value)
  451. {
  452. struct oxygen *chip = ctl->private_data;
  453. struct xonar_wm87x6 *data = chip->model_data;
  454. u16 bit = ctl->private_value & 0xffff;
  455. u16 reg_value;
  456. unsigned int reg_index = (ctl->private_value >> 16) & 0xff;
  457. bool invert = (ctl->private_value >> 24) & 1;
  458. int changed;
  459. mutex_lock(&chip->mutex);
  460. reg_value = data->wm8776_regs[reg_index] & ~bit;
  461. if (value->value.integer.value[0] ^ invert)
  462. reg_value |= bit;
  463. changed = reg_value != data->wm8776_regs[reg_index];
  464. if (changed)
  465. wm8776_write(chip, reg_index, reg_value);
  466. mutex_unlock(&chip->mutex);
  467. return changed;
  468. }
  469. static int wm8776_field_enum_info(struct snd_kcontrol *ctl,
  470. struct snd_ctl_elem_info *info)
  471. {
  472. static const char *const hld[16] = {
  473. "0 ms", "2.67 ms", "5.33 ms", "10.6 ms",
  474. "21.3 ms", "42.7 ms", "85.3 ms", "171 ms",
  475. "341 ms", "683 ms", "1.37 s", "2.73 s",
  476. "5.46 s", "10.9 s", "21.8 s", "43.7 s",
  477. };
  478. static const char *const atk_lim[11] = {
  479. "0.25 ms", "0.5 ms", "1 ms", "2 ms",
  480. "4 ms", "8 ms", "16 ms", "32 ms",
  481. "64 ms", "128 ms", "256 ms",
  482. };
  483. static const char *const atk_alc[11] = {
  484. "8.40 ms", "16.8 ms", "33.6 ms", "67.2 ms",
  485. "134 ms", "269 ms", "538 ms", "1.08 s",
  486. "2.15 s", "4.3 s", "8.6 s",
  487. };
  488. static const char *const dcy_lim[11] = {
  489. "1.2 ms", "2.4 ms", "4.8 ms", "9.6 ms",
  490. "19.2 ms", "38.4 ms", "76.8 ms", "154 ms",
  491. "307 ms", "614 ms", "1.23 s",
  492. };
  493. static const char *const dcy_alc[11] = {
  494. "33.5 ms", "67.0 ms", "134 ms", "268 ms",
  495. "536 ms", "1.07 s", "2.14 s", "4.29 s",
  496. "8.58 s", "17.2 s", "34.3 s",
  497. };
  498. static const char *const tranwin[8] = {
  499. "0 us", "62.5 us", "125 us", "250 us",
  500. "500 us", "1 ms", "2 ms", "4 ms",
  501. };
  502. u8 max;
  503. const char *const *names;
  504. max = (ctl->private_value >> 12) & 0xf;
  505. switch ((ctl->private_value >> 24) & 0x1f) {
  506. case WM8776_ALCCTRL2:
  507. names = hld;
  508. break;
  509. case WM8776_ALCCTRL3:
  510. if (((ctl->private_value >> 20) & 0xf) == 0) {
  511. if (ctl->private_value & LC_CONTROL_LIMITER)
  512. names = atk_lim;
  513. else
  514. names = atk_alc;
  515. } else {
  516. if (ctl->private_value & LC_CONTROL_LIMITER)
  517. names = dcy_lim;
  518. else
  519. names = dcy_alc;
  520. }
  521. break;
  522. case WM8776_LIMITER:
  523. names = tranwin;
  524. break;
  525. default:
  526. return -ENXIO;
  527. }
  528. return snd_ctl_enum_info(info, 1, max + 1, names);
  529. }
  530. static int wm8776_field_volume_info(struct snd_kcontrol *ctl,
  531. struct snd_ctl_elem_info *info)
  532. {
  533. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  534. info->count = 1;
  535. info->value.integer.min = (ctl->private_value >> 8) & 0xf;
  536. info->value.integer.max = (ctl->private_value >> 12) & 0xf;
  537. return 0;
  538. }
  539. static void wm8776_field_set_from_ctl(struct snd_kcontrol *ctl)
  540. {
  541. struct oxygen *chip = ctl->private_data;
  542. struct xonar_wm87x6 *data = chip->model_data;
  543. unsigned int value, reg_index, mode;
  544. u8 min, max, shift;
  545. u16 mask, reg_value;
  546. bool invert;
  547. if ((data->wm8776_regs[WM8776_ALCCTRL1] & WM8776_LCSEL_MASK) ==
  548. WM8776_LCSEL_LIMITER)
  549. mode = LC_CONTROL_LIMITER;
  550. else
  551. mode = LC_CONTROL_ALC;
  552. if (!(ctl->private_value & mode))
  553. return;
  554. value = ctl->private_value & 0xf;
  555. min = (ctl->private_value >> 8) & 0xf;
  556. max = (ctl->private_value >> 12) & 0xf;
  557. mask = (ctl->private_value >> 16) & 0xf;
  558. shift = (ctl->private_value >> 20) & 0xf;
  559. reg_index = (ctl->private_value >> 24) & 0x1f;
  560. invert = (ctl->private_value >> 29) & 0x1;
  561. if (invert)
  562. value = max - (value - min);
  563. reg_value = data->wm8776_regs[reg_index];
  564. reg_value &= ~(mask << shift);
  565. reg_value |= value << shift;
  566. wm8776_write_cached(chip, reg_index, reg_value);
  567. }
  568. static int wm8776_field_set(struct snd_kcontrol *ctl, unsigned int value)
  569. {
  570. struct oxygen *chip = ctl->private_data;
  571. u8 min, max;
  572. int changed;
  573. min = (ctl->private_value >> 8) & 0xf;
  574. max = (ctl->private_value >> 12) & 0xf;
  575. if (value < min || value > max)
  576. return -EINVAL;
  577. mutex_lock(&chip->mutex);
  578. changed = value != (ctl->private_value & 0xf);
  579. if (changed) {
  580. ctl->private_value = (ctl->private_value & ~0xf) | value;
  581. wm8776_field_set_from_ctl(ctl);
  582. }
  583. mutex_unlock(&chip->mutex);
  584. return changed;
  585. }
  586. static int wm8776_field_enum_get(struct snd_kcontrol *ctl,
  587. struct snd_ctl_elem_value *value)
  588. {
  589. value->value.enumerated.item[0] = ctl->private_value & 0xf;
  590. return 0;
  591. }
  592. static int wm8776_field_volume_get(struct snd_kcontrol *ctl,
  593. struct snd_ctl_elem_value *value)
  594. {
  595. value->value.integer.value[0] = ctl->private_value & 0xf;
  596. return 0;
  597. }
  598. static int wm8776_field_enum_put(struct snd_kcontrol *ctl,
  599. struct snd_ctl_elem_value *value)
  600. {
  601. return wm8776_field_set(ctl, value->value.enumerated.item[0]);
  602. }
  603. static int wm8776_field_volume_put(struct snd_kcontrol *ctl,
  604. struct snd_ctl_elem_value *value)
  605. {
  606. return wm8776_field_set(ctl, value->value.integer.value[0]);
  607. }
  608. static int wm8776_hp_vol_info(struct snd_kcontrol *ctl,
  609. struct snd_ctl_elem_info *info)
  610. {
  611. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  612. info->count = 2;
  613. info->value.integer.min = 0x79 - 60;
  614. info->value.integer.max = 0x7f;
  615. return 0;
  616. }
  617. static int wm8776_hp_vol_get(struct snd_kcontrol *ctl,
  618. struct snd_ctl_elem_value *value)
  619. {
  620. struct oxygen *chip = ctl->private_data;
  621. struct xonar_wm87x6 *data = chip->model_data;
  622. mutex_lock(&chip->mutex);
  623. value->value.integer.value[0] =
  624. data->wm8776_regs[WM8776_HPLVOL] & WM8776_HPATT_MASK;
  625. value->value.integer.value[1] =
  626. data->wm8776_regs[WM8776_HPRVOL] & WM8776_HPATT_MASK;
  627. mutex_unlock(&chip->mutex);
  628. return 0;
  629. }
  630. static int wm8776_hp_vol_put(struct snd_kcontrol *ctl,
  631. struct snd_ctl_elem_value *value)
  632. {
  633. struct oxygen *chip = ctl->private_data;
  634. struct xonar_wm87x6 *data = chip->model_data;
  635. u8 to_update;
  636. mutex_lock(&chip->mutex);
  637. to_update = (value->value.integer.value[0] !=
  638. (data->wm8776_regs[WM8776_HPLVOL] & WM8776_HPATT_MASK))
  639. << 0;
  640. to_update |= (value->value.integer.value[1] !=
  641. (data->wm8776_regs[WM8776_HPRVOL] & WM8776_HPATT_MASK))
  642. << 1;
  643. if (value->value.integer.value[0] == value->value.integer.value[1]) {
  644. if (to_update) {
  645. wm8776_write(chip, WM8776_HPMASTER,
  646. value->value.integer.value[0] |
  647. WM8776_HPZCEN | WM8776_UPDATE);
  648. data->wm8776_regs[WM8776_HPLVOL] =
  649. value->value.integer.value[0] | WM8776_HPZCEN;
  650. data->wm8776_regs[WM8776_HPRVOL] =
  651. value->value.integer.value[0] | WM8776_HPZCEN;
  652. }
  653. } else {
  654. if (to_update & 1)
  655. wm8776_write(chip, WM8776_HPLVOL,
  656. value->value.integer.value[0] |
  657. WM8776_HPZCEN |
  658. ((to_update & 2) ? 0 : WM8776_UPDATE));
  659. if (to_update & 2)
  660. wm8776_write(chip, WM8776_HPRVOL,
  661. value->value.integer.value[1] |
  662. WM8776_HPZCEN | WM8776_UPDATE);
  663. }
  664. mutex_unlock(&chip->mutex);
  665. return to_update != 0;
  666. }
  667. static int wm8776_input_mux_get(struct snd_kcontrol *ctl,
  668. struct snd_ctl_elem_value *value)
  669. {
  670. struct oxygen *chip = ctl->private_data;
  671. struct xonar_wm87x6 *data = chip->model_data;
  672. unsigned int mux_bit = ctl->private_value;
  673. value->value.integer.value[0] =
  674. !!(data->wm8776_regs[WM8776_ADCMUX] & mux_bit);
  675. return 0;
  676. }
  677. static int wm8776_input_mux_put(struct snd_kcontrol *ctl,
  678. struct snd_ctl_elem_value *value)
  679. {
  680. struct oxygen *chip = ctl->private_data;
  681. struct xonar_wm87x6 *data = chip->model_data;
  682. struct snd_kcontrol *other_ctl;
  683. unsigned int mux_bit = ctl->private_value;
  684. u16 reg;
  685. int changed;
  686. mutex_lock(&chip->mutex);
  687. reg = data->wm8776_regs[WM8776_ADCMUX];
  688. if (value->value.integer.value[0]) {
  689. reg |= mux_bit;
  690. /* line-in and mic-in are exclusive */
  691. mux_bit ^= 3;
  692. if (reg & mux_bit) {
  693. reg &= ~mux_bit;
  694. if (mux_bit == 1)
  695. other_ctl = data->line_adcmux_control;
  696. else
  697. other_ctl = data->mic_adcmux_control;
  698. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
  699. &other_ctl->id);
  700. }
  701. } else
  702. reg &= ~mux_bit;
  703. changed = reg != data->wm8776_regs[WM8776_ADCMUX];
  704. if (changed) {
  705. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  706. reg & 1 ? GPIO_DS_INPUT_ROUTE : 0,
  707. GPIO_DS_INPUT_ROUTE);
  708. wm8776_write(chip, WM8776_ADCMUX, reg);
  709. }
  710. mutex_unlock(&chip->mutex);
  711. return changed;
  712. }
  713. static int wm8776_input_vol_info(struct snd_kcontrol *ctl,
  714. struct snd_ctl_elem_info *info)
  715. {
  716. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  717. info->count = 2;
  718. info->value.integer.min = 0xa5;
  719. info->value.integer.max = 0xff;
  720. return 0;
  721. }
  722. static int wm8776_input_vol_get(struct snd_kcontrol *ctl,
  723. struct snd_ctl_elem_value *value)
  724. {
  725. struct oxygen *chip = ctl->private_data;
  726. struct xonar_wm87x6 *data = chip->model_data;
  727. mutex_lock(&chip->mutex);
  728. value->value.integer.value[0] =
  729. data->wm8776_regs[WM8776_ADCLVOL] & WM8776_AGMASK;
  730. value->value.integer.value[1] =
  731. data->wm8776_regs[WM8776_ADCRVOL] & WM8776_AGMASK;
  732. mutex_unlock(&chip->mutex);
  733. return 0;
  734. }
  735. static int wm8776_input_vol_put(struct snd_kcontrol *ctl,
  736. struct snd_ctl_elem_value *value)
  737. {
  738. struct oxygen *chip = ctl->private_data;
  739. struct xonar_wm87x6 *data = chip->model_data;
  740. int changed = 0;
  741. mutex_lock(&chip->mutex);
  742. changed = (value->value.integer.value[0] !=
  743. (data->wm8776_regs[WM8776_ADCLVOL] & WM8776_AGMASK)) ||
  744. (value->value.integer.value[1] !=
  745. (data->wm8776_regs[WM8776_ADCRVOL] & WM8776_AGMASK));
  746. wm8776_write_cached(chip, WM8776_ADCLVOL,
  747. value->value.integer.value[0] | WM8776_ZCA);
  748. wm8776_write_cached(chip, WM8776_ADCRVOL,
  749. value->value.integer.value[1] | WM8776_ZCA);
  750. mutex_unlock(&chip->mutex);
  751. return changed;
  752. }
  753. static int wm8776_level_control_info(struct snd_kcontrol *ctl,
  754. struct snd_ctl_elem_info *info)
  755. {
  756. static const char *const names[3] = {
  757. "None", "Peak Limiter", "Automatic Level Control"
  758. };
  759. return snd_ctl_enum_info(info, 1, 3, names);
  760. }
  761. static int wm8776_level_control_get(struct snd_kcontrol *ctl,
  762. struct snd_ctl_elem_value *value)
  763. {
  764. struct oxygen *chip = ctl->private_data;
  765. struct xonar_wm87x6 *data = chip->model_data;
  766. if (!(data->wm8776_regs[WM8776_ALCCTRL2] & WM8776_LCEN))
  767. value->value.enumerated.item[0] = 0;
  768. else if ((data->wm8776_regs[WM8776_ALCCTRL1] & WM8776_LCSEL_MASK) ==
  769. WM8776_LCSEL_LIMITER)
  770. value->value.enumerated.item[0] = 1;
  771. else
  772. value->value.enumerated.item[0] = 2;
  773. return 0;
  774. }
  775. static void activate_control(struct oxygen *chip,
  776. struct snd_kcontrol *ctl, unsigned int mode)
  777. {
  778. unsigned int access;
  779. if (ctl->private_value & mode)
  780. access = 0;
  781. else
  782. access = SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  783. if ((ctl->vd[0].access & SNDRV_CTL_ELEM_ACCESS_INACTIVE) != access) {
  784. ctl->vd[0].access ^= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  785. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
  786. }
  787. }
  788. static int wm8776_level_control_put(struct snd_kcontrol *ctl,
  789. struct snd_ctl_elem_value *value)
  790. {
  791. struct oxygen *chip = ctl->private_data;
  792. struct xonar_wm87x6 *data = chip->model_data;
  793. unsigned int mode = 0, i;
  794. u16 ctrl1, ctrl2;
  795. int changed;
  796. if (value->value.enumerated.item[0] >= 3)
  797. return -EINVAL;
  798. mutex_lock(&chip->mutex);
  799. changed = value->value.enumerated.item[0] != ctl->private_value;
  800. if (changed) {
  801. ctl->private_value = value->value.enumerated.item[0];
  802. ctrl1 = data->wm8776_regs[WM8776_ALCCTRL1];
  803. ctrl2 = data->wm8776_regs[WM8776_ALCCTRL2];
  804. switch (value->value.enumerated.item[0]) {
  805. default:
  806. wm8776_write_cached(chip, WM8776_ALCCTRL2,
  807. ctrl2 & ~WM8776_LCEN);
  808. break;
  809. case 1:
  810. wm8776_write_cached(chip, WM8776_ALCCTRL1,
  811. (ctrl1 & ~WM8776_LCSEL_MASK) |
  812. WM8776_LCSEL_LIMITER);
  813. wm8776_write_cached(chip, WM8776_ALCCTRL2,
  814. ctrl2 | WM8776_LCEN);
  815. mode = LC_CONTROL_LIMITER;
  816. break;
  817. case 2:
  818. wm8776_write_cached(chip, WM8776_ALCCTRL1,
  819. (ctrl1 & ~WM8776_LCSEL_MASK) |
  820. WM8776_LCSEL_ALC_STEREO);
  821. wm8776_write_cached(chip, WM8776_ALCCTRL2,
  822. ctrl2 | WM8776_LCEN);
  823. mode = LC_CONTROL_ALC;
  824. break;
  825. }
  826. for (i = 0; i < ARRAY_SIZE(data->lc_controls); ++i)
  827. activate_control(chip, data->lc_controls[i], mode);
  828. }
  829. mutex_unlock(&chip->mutex);
  830. return changed;
  831. }
  832. static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
  833. {
  834. static const char *const names[2] = {
  835. "None", "High-pass Filter"
  836. };
  837. return snd_ctl_enum_info(info, 1, 2, names);
  838. }
  839. static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  840. {
  841. struct oxygen *chip = ctl->private_data;
  842. struct xonar_wm87x6 *data = chip->model_data;
  843. value->value.enumerated.item[0] =
  844. !(data->wm8776_regs[WM8776_ADCIFCTRL] & WM8776_ADCHPD);
  845. return 0;
  846. }
  847. static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  848. {
  849. struct oxygen *chip = ctl->private_data;
  850. struct xonar_wm87x6 *data = chip->model_data;
  851. unsigned int reg;
  852. int changed;
  853. mutex_lock(&chip->mutex);
  854. reg = data->wm8776_regs[WM8776_ADCIFCTRL] & ~WM8776_ADCHPD;
  855. if (!value->value.enumerated.item[0])
  856. reg |= WM8776_ADCHPD;
  857. changed = reg != data->wm8776_regs[WM8776_ADCIFCTRL];
  858. if (changed)
  859. wm8776_write(chip, WM8776_ADCIFCTRL, reg);
  860. mutex_unlock(&chip->mutex);
  861. return changed;
  862. }
  863. #define WM8776_BIT_SWITCH(xname, reg, bit, invert, flags) { \
  864. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  865. .name = xname, \
  866. .info = snd_ctl_boolean_mono_info, \
  867. .get = wm8776_bit_switch_get, \
  868. .put = wm8776_bit_switch_put, \
  869. .private_value = ((reg) << 16) | (bit) | ((invert) << 24) | (flags), \
  870. }
  871. #define _WM8776_FIELD_CTL(xname, reg, shift, initval, min, max, mask, flags) \
  872. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  873. .name = xname, \
  874. .private_value = (initval) | ((min) << 8) | ((max) << 12) | \
  875. ((mask) << 16) | ((shift) << 20) | ((reg) << 24) | (flags)
  876. #define WM8776_FIELD_CTL_ENUM(xname, reg, shift, init, min, max, mask, flags) {\
  877. _WM8776_FIELD_CTL(xname " Capture Enum", \
  878. reg, shift, init, min, max, mask, flags), \
  879. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
  880. SNDRV_CTL_ELEM_ACCESS_INACTIVE, \
  881. .info = wm8776_field_enum_info, \
  882. .get = wm8776_field_enum_get, \
  883. .put = wm8776_field_enum_put, \
  884. }
  885. #define WM8776_FIELD_CTL_VOLUME(a, b, c, d, e, f, g, h, tlv_p) { \
  886. _WM8776_FIELD_CTL(a " Capture Volume", b, c, d, e, f, g, h), \
  887. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
  888. SNDRV_CTL_ELEM_ACCESS_INACTIVE | \
  889. SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  890. .info = wm8776_field_volume_info, \
  891. .get = wm8776_field_volume_get, \
  892. .put = wm8776_field_volume_put, \
  893. .tlv = { .p = tlv_p }, \
  894. }
  895. static const DECLARE_TLV_DB_SCALE(wm87x6_dac_db_scale, -6000, 50, 0);
  896. static const DECLARE_TLV_DB_SCALE(wm8776_adc_db_scale, -2100, 50, 0);
  897. static const DECLARE_TLV_DB_SCALE(wm8776_hp_db_scale, -6000, 100, 0);
  898. static const DECLARE_TLV_DB_SCALE(wm8776_lct_db_scale, -1600, 100, 0);
  899. static const DECLARE_TLV_DB_SCALE(wm8776_maxgain_db_scale, 0, 400, 0);
  900. static const DECLARE_TLV_DB_SCALE(wm8776_ngth_db_scale, -7800, 600, 0);
  901. static const DECLARE_TLV_DB_SCALE(wm8776_maxatten_lim_db_scale, -1200, 100, 0);
  902. static const DECLARE_TLV_DB_SCALE(wm8776_maxatten_alc_db_scale, -2100, 400, 0);
  903. static const struct snd_kcontrol_new ds_controls[] = {
  904. {
  905. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  906. .name = "Headphone Playback Volume",
  907. .info = wm8776_hp_vol_info,
  908. .get = wm8776_hp_vol_get,
  909. .put = wm8776_hp_vol_put,
  910. .tlv = { .p = wm8776_hp_db_scale },
  911. },
  912. WM8776_BIT_SWITCH("Headphone Playback Switch",
  913. WM8776_PWRDOWN, WM8776_HPPD, 1, 0),
  914. {
  915. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  916. .name = "Input Capture Volume",
  917. .info = wm8776_input_vol_info,
  918. .get = wm8776_input_vol_get,
  919. .put = wm8776_input_vol_put,
  920. .tlv = { .p = wm8776_adc_db_scale },
  921. },
  922. {
  923. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  924. .name = "Line Capture Switch",
  925. .info = snd_ctl_boolean_mono_info,
  926. .get = wm8776_input_mux_get,
  927. .put = wm8776_input_mux_put,
  928. .private_value = 1 << 0,
  929. },
  930. {
  931. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  932. .name = "Mic Capture Switch",
  933. .info = snd_ctl_boolean_mono_info,
  934. .get = wm8776_input_mux_get,
  935. .put = wm8776_input_mux_put,
  936. .private_value = 1 << 1,
  937. },
  938. WM8776_BIT_SWITCH("Front Mic Capture Switch",
  939. WM8776_ADCMUX, 1 << 2, 0, 0),
  940. WM8776_BIT_SWITCH("Aux Capture Switch",
  941. WM8776_ADCMUX, 1 << 3, 0, 0),
  942. {
  943. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  944. .name = "ADC Filter Capture Enum",
  945. .info = hpf_info,
  946. .get = hpf_get,
  947. .put = hpf_put,
  948. },
  949. {
  950. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  951. .name = "Level Control Capture Enum",
  952. .info = wm8776_level_control_info,
  953. .get = wm8776_level_control_get,
  954. .put = wm8776_level_control_put,
  955. .private_value = 0,
  956. },
  957. };
  958. static const struct snd_kcontrol_new hdav_slim_controls[] = {
  959. {
  960. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  961. .name = "HDMI Playback Switch",
  962. .info = snd_ctl_boolean_mono_info,
  963. .get = xonar_gpio_bit_switch_get,
  964. .put = xonar_gpio_bit_switch_put,
  965. .private_value = GPIO_SLIM_HDMI_DISABLE | XONAR_GPIO_BIT_INVERT,
  966. },
  967. {
  968. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  969. .name = "Headphone Playback Volume",
  970. .info = wm8776_hp_vol_info,
  971. .get = wm8776_hp_vol_get,
  972. .put = wm8776_hp_vol_put,
  973. .tlv = { .p = wm8776_hp_db_scale },
  974. },
  975. WM8776_BIT_SWITCH("Headphone Playback Switch",
  976. WM8776_PWRDOWN, WM8776_HPPD, 1, 0),
  977. {
  978. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  979. .name = "Input Capture Volume",
  980. .info = wm8776_input_vol_info,
  981. .get = wm8776_input_vol_get,
  982. .put = wm8776_input_vol_put,
  983. .tlv = { .p = wm8776_adc_db_scale },
  984. },
  985. WM8776_BIT_SWITCH("Mic Capture Switch",
  986. WM8776_ADCMUX, 1 << 0, 0, 0),
  987. WM8776_BIT_SWITCH("Aux Capture Switch",
  988. WM8776_ADCMUX, 1 << 1, 0, 0),
  989. {
  990. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  991. .name = "ADC Filter Capture Enum",
  992. .info = hpf_info,
  993. .get = hpf_get,
  994. .put = hpf_put,
  995. },
  996. {
  997. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  998. .name = "Level Control Capture Enum",
  999. .info = wm8776_level_control_info,
  1000. .get = wm8776_level_control_get,
  1001. .put = wm8776_level_control_put,
  1002. .private_value = 0,
  1003. },
  1004. };
  1005. static const struct snd_kcontrol_new lc_controls[] = {
  1006. WM8776_FIELD_CTL_VOLUME("Limiter Threshold",
  1007. WM8776_ALCCTRL1, 0, 11, 0, 15, 0xf,
  1008. LC_CONTROL_LIMITER, wm8776_lct_db_scale),
  1009. WM8776_FIELD_CTL_ENUM("Limiter Attack Time",
  1010. WM8776_ALCCTRL3, 0, 2, 0, 10, 0xf,
  1011. LC_CONTROL_LIMITER),
  1012. WM8776_FIELD_CTL_ENUM("Limiter Decay Time",
  1013. WM8776_ALCCTRL3, 4, 3, 0, 10, 0xf,
  1014. LC_CONTROL_LIMITER),
  1015. WM8776_FIELD_CTL_ENUM("Limiter Transient Window",
  1016. WM8776_LIMITER, 4, 2, 0, 7, 0x7,
  1017. LC_CONTROL_LIMITER),
  1018. WM8776_FIELD_CTL_VOLUME("Limiter Maximum Attenuation",
  1019. WM8776_LIMITER, 0, 6, 3, 12, 0xf,
  1020. LC_CONTROL_LIMITER,
  1021. wm8776_maxatten_lim_db_scale),
  1022. WM8776_FIELD_CTL_VOLUME("ALC Target Level",
  1023. WM8776_ALCCTRL1, 0, 11, 0, 15, 0xf,
  1024. LC_CONTROL_ALC, wm8776_lct_db_scale),
  1025. WM8776_FIELD_CTL_ENUM("ALC Attack Time",
  1026. WM8776_ALCCTRL3, 0, 2, 0, 10, 0xf,
  1027. LC_CONTROL_ALC),
  1028. WM8776_FIELD_CTL_ENUM("ALC Decay Time",
  1029. WM8776_ALCCTRL3, 4, 3, 0, 10, 0xf,
  1030. LC_CONTROL_ALC),
  1031. WM8776_FIELD_CTL_VOLUME("ALC Maximum Gain",
  1032. WM8776_ALCCTRL1, 4, 7, 1, 7, 0x7,
  1033. LC_CONTROL_ALC, wm8776_maxgain_db_scale),
  1034. WM8776_FIELD_CTL_VOLUME("ALC Maximum Attenuation",
  1035. WM8776_LIMITER, 0, 10, 10, 15, 0xf,
  1036. LC_CONTROL_ALC, wm8776_maxatten_alc_db_scale),
  1037. WM8776_FIELD_CTL_ENUM("ALC Hold Time",
  1038. WM8776_ALCCTRL2, 0, 0, 0, 15, 0xf,
  1039. LC_CONTROL_ALC),
  1040. WM8776_BIT_SWITCH("Noise Gate Capture Switch",
  1041. WM8776_NOISEGATE, WM8776_NGAT, 0,
  1042. LC_CONTROL_ALC),
  1043. WM8776_FIELD_CTL_VOLUME("Noise Gate Threshold",
  1044. WM8776_NOISEGATE, 2, 0, 0, 7, 0x7,
  1045. LC_CONTROL_ALC, wm8776_ngth_db_scale),
  1046. };
  1047. static int add_lc_controls(struct oxygen *chip)
  1048. {
  1049. struct xonar_wm87x6 *data = chip->model_data;
  1050. unsigned int i;
  1051. struct snd_kcontrol *ctl;
  1052. int err;
  1053. BUILD_BUG_ON(ARRAY_SIZE(lc_controls) != ARRAY_SIZE(data->lc_controls));
  1054. for (i = 0; i < ARRAY_SIZE(lc_controls); ++i) {
  1055. ctl = snd_ctl_new1(&lc_controls[i], chip);
  1056. if (!ctl)
  1057. return -ENOMEM;
  1058. err = snd_ctl_add(chip->card, ctl);
  1059. if (err < 0)
  1060. return err;
  1061. data->lc_controls[i] = ctl;
  1062. }
  1063. return 0;
  1064. }
  1065. static int xonar_ds_mixer_init(struct oxygen *chip)
  1066. {
  1067. struct xonar_wm87x6 *data = chip->model_data;
  1068. unsigned int i;
  1069. struct snd_kcontrol *ctl;
  1070. int err;
  1071. for (i = 0; i < ARRAY_SIZE(ds_controls); ++i) {
  1072. ctl = snd_ctl_new1(&ds_controls[i], chip);
  1073. if (!ctl)
  1074. return -ENOMEM;
  1075. err = snd_ctl_add(chip->card, ctl);
  1076. if (err < 0)
  1077. return err;
  1078. if (!strcmp(ctl->id.name, "Line Capture Switch"))
  1079. data->line_adcmux_control = ctl;
  1080. else if (!strcmp(ctl->id.name, "Mic Capture Switch"))
  1081. data->mic_adcmux_control = ctl;
  1082. }
  1083. if (!data->line_adcmux_control || !data->mic_adcmux_control)
  1084. return -ENXIO;
  1085. return add_lc_controls(chip);
  1086. }
  1087. static int xonar_hdav_slim_mixer_init(struct oxygen *chip)
  1088. {
  1089. unsigned int i;
  1090. struct snd_kcontrol *ctl;
  1091. int err;
  1092. for (i = 0; i < ARRAY_SIZE(hdav_slim_controls); ++i) {
  1093. ctl = snd_ctl_new1(&hdav_slim_controls[i], chip);
  1094. if (!ctl)
  1095. return -ENOMEM;
  1096. err = snd_ctl_add(chip->card, ctl);
  1097. if (err < 0)
  1098. return err;
  1099. }
  1100. return add_lc_controls(chip);
  1101. }
  1102. static void dump_wm8776_registers(struct oxygen *chip,
  1103. struct snd_info_buffer *buffer)
  1104. {
  1105. struct xonar_wm87x6 *data = chip->model_data;
  1106. unsigned int i;
  1107. snd_iprintf(buffer, "\nWM8776:\n00:");
  1108. for (i = 0; i < 0x10; ++i)
  1109. snd_iprintf(buffer, " %03x", data->wm8776_regs[i]);
  1110. snd_iprintf(buffer, "\n10:");
  1111. for (i = 0x10; i < 0x17; ++i)
  1112. snd_iprintf(buffer, " %03x", data->wm8776_regs[i]);
  1113. snd_iprintf(buffer, "\n");
  1114. }
  1115. static void dump_wm87x6_registers(struct oxygen *chip,
  1116. struct snd_info_buffer *buffer)
  1117. {
  1118. struct xonar_wm87x6 *data = chip->model_data;
  1119. unsigned int i;
  1120. dump_wm8776_registers(chip, buffer);
  1121. snd_iprintf(buffer, "\nWM8766:\n00:");
  1122. for (i = 0; i < 0x10; ++i)
  1123. snd_iprintf(buffer, " %03x", data->wm8766_regs[i]);
  1124. snd_iprintf(buffer, "\n");
  1125. }
  1126. static const struct oxygen_model model_xonar_ds = {
  1127. .shortname = "Xonar DS",
  1128. .longname = "Asus Virtuoso 66",
  1129. .chip = "AV200",
  1130. .init = xonar_ds_init,
  1131. .mixer_init = xonar_ds_mixer_init,
  1132. .cleanup = xonar_ds_cleanup,
  1133. .suspend = xonar_ds_suspend,
  1134. .resume = xonar_ds_resume,
  1135. .pcm_hardware_filter = wm8776_adc_hardware_filter,
  1136. .set_dac_params = set_wm87x6_dac_params,
  1137. .set_adc_params = set_wm8776_adc_params,
  1138. .update_dac_volume = update_wm87x6_volume,
  1139. .update_dac_mute = update_wm87x6_mute,
  1140. .update_center_lfe_mix = update_wm8766_center_lfe_mix,
  1141. .gpio_changed = xonar_ds_gpio_changed,
  1142. .dump_registers = dump_wm87x6_registers,
  1143. .dac_tlv = wm87x6_dac_db_scale,
  1144. .model_data_size = sizeof(struct xonar_wm87x6),
  1145. .device_config = PLAYBACK_0_TO_I2S |
  1146. PLAYBACK_1_TO_SPDIF |
  1147. CAPTURE_0_FROM_I2S_1,
  1148. .dac_channels_pcm = 8,
  1149. .dac_channels_mixer = 8,
  1150. .dac_volume_min = 255 - 2*60,
  1151. .dac_volume_max = 255,
  1152. .function_flags = OXYGEN_FUNCTION_SPI,
  1153. .dac_mclks = OXYGEN_MCLKS(256, 256, 128),
  1154. .adc_mclks = OXYGEN_MCLKS(256, 256, 128),
  1155. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  1156. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  1157. };
  1158. static const struct oxygen_model model_xonar_hdav_slim = {
  1159. .shortname = "Xonar HDAV1.3 Slim",
  1160. .longname = "Asus Virtuoso 200",
  1161. .chip = "AV200",
  1162. .init = xonar_hdav_slim_init,
  1163. .mixer_init = xonar_hdav_slim_mixer_init,
  1164. .cleanup = xonar_hdav_slim_cleanup,
  1165. .suspend = xonar_hdav_slim_suspend,
  1166. .resume = xonar_hdav_slim_resume,
  1167. .pcm_hardware_filter = xonar_hdav_slim_hardware_filter,
  1168. .set_dac_params = set_hdav_slim_dac_params,
  1169. .set_adc_params = set_wm8776_adc_params,
  1170. .update_dac_volume = update_wm8776_volume,
  1171. .update_dac_mute = update_wm8776_mute,
  1172. .uart_input = xonar_hdmi_uart_input,
  1173. .dump_registers = dump_wm8776_registers,
  1174. .dac_tlv = wm87x6_dac_db_scale,
  1175. .model_data_size = sizeof(struct xonar_wm87x6),
  1176. .device_config = PLAYBACK_0_TO_I2S |
  1177. PLAYBACK_1_TO_SPDIF |
  1178. CAPTURE_0_FROM_I2S_1,
  1179. .dac_channels_pcm = 8,
  1180. .dac_channels_mixer = 2,
  1181. .dac_volume_min = 255 - 2*60,
  1182. .dac_volume_max = 255,
  1183. .function_flags = OXYGEN_FUNCTION_2WIRE,
  1184. .dac_mclks = OXYGEN_MCLKS(256, 256, 128),
  1185. .adc_mclks = OXYGEN_MCLKS(256, 256, 128),
  1186. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  1187. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  1188. };
  1189. int __devinit get_xonar_wm87x6_model(struct oxygen *chip,
  1190. const struct pci_device_id *id)
  1191. {
  1192. switch (id->subdevice) {
  1193. case 0x838e:
  1194. chip->model = model_xonar_ds;
  1195. break;
  1196. case 0x835e:
  1197. chip->model = model_xonar_hdav_slim;
  1198. break;
  1199. default:
  1200. return -EINVAL;
  1201. }
  1202. return 0;
  1203. }