ak4113.c 18 KB

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  1. /*
  2. * Routines for control of the AK4113 via I2C/4-wire serial interface
  3. * IEC958 (S/PDIF) receiver by Asahi Kasei
  4. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  5. * Copyright (c) by Pavel Hofman <pavel.hofman@ivitera.com>
  6. *
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/slab.h>
  24. #include <linux/delay.h>
  25. #include <sound/core.h>
  26. #include <sound/control.h>
  27. #include <sound/pcm.h>
  28. #include <sound/ak4113.h>
  29. #include <sound/asoundef.h>
  30. #include <sound/info.h>
  31. MODULE_AUTHOR("Pavel Hofman <pavel.hofman@ivitera.com>");
  32. MODULE_DESCRIPTION("AK4113 IEC958 (S/PDIF) receiver by Asahi Kasei");
  33. MODULE_LICENSE("GPL");
  34. #define AK4113_ADDR 0x00 /* fixed address */
  35. static void ak4113_stats(struct work_struct *work);
  36. static void ak4113_init_regs(struct ak4113 *chip);
  37. static void reg_write(struct ak4113 *ak4113, unsigned char reg,
  38. unsigned char val)
  39. {
  40. ak4113->write(ak4113->private_data, reg, val);
  41. if (reg < sizeof(ak4113->regmap))
  42. ak4113->regmap[reg] = val;
  43. }
  44. static inline unsigned char reg_read(struct ak4113 *ak4113, unsigned char reg)
  45. {
  46. return ak4113->read(ak4113->private_data, reg);
  47. }
  48. static void snd_ak4113_free(struct ak4113 *chip)
  49. {
  50. chip->init = 1; /* don't schedule new work */
  51. mb();
  52. cancel_delayed_work_sync(&chip->work);
  53. kfree(chip);
  54. }
  55. static int snd_ak4113_dev_free(struct snd_device *device)
  56. {
  57. struct ak4113 *chip = device->device_data;
  58. snd_ak4113_free(chip);
  59. return 0;
  60. }
  61. int snd_ak4113_create(struct snd_card *card, ak4113_read_t *read,
  62. ak4113_write_t *write, const unsigned char *pgm,
  63. void *private_data, struct ak4113 **r_ak4113)
  64. {
  65. struct ak4113 *chip;
  66. int err = 0;
  67. unsigned char reg;
  68. static struct snd_device_ops ops = {
  69. .dev_free = snd_ak4113_dev_free,
  70. };
  71. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  72. if (chip == NULL)
  73. return -ENOMEM;
  74. spin_lock_init(&chip->lock);
  75. chip->card = card;
  76. chip->read = read;
  77. chip->write = write;
  78. chip->private_data = private_data;
  79. INIT_DELAYED_WORK(&chip->work, ak4113_stats);
  80. for (reg = 0; reg < AK4113_WRITABLE_REGS ; reg++)
  81. chip->regmap[reg] = pgm[reg];
  82. ak4113_init_regs(chip);
  83. chip->rcs0 = reg_read(chip, AK4113_REG_RCS0) & ~(AK4113_QINT |
  84. AK4113_CINT | AK4113_STC);
  85. chip->rcs1 = reg_read(chip, AK4113_REG_RCS1);
  86. chip->rcs2 = reg_read(chip, AK4113_REG_RCS2);
  87. err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
  88. if (err < 0)
  89. goto __fail;
  90. if (r_ak4113)
  91. *r_ak4113 = chip;
  92. return 0;
  93. __fail:
  94. snd_ak4113_free(chip);
  95. return err < 0 ? err : -EIO;
  96. }
  97. EXPORT_SYMBOL_GPL(snd_ak4113_create);
  98. void snd_ak4113_reg_write(struct ak4113 *chip, unsigned char reg,
  99. unsigned char mask, unsigned char val)
  100. {
  101. if (reg >= AK4113_WRITABLE_REGS)
  102. return;
  103. reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
  104. }
  105. EXPORT_SYMBOL_GPL(snd_ak4113_reg_write);
  106. static void ak4113_init_regs(struct ak4113 *chip)
  107. {
  108. unsigned char old = chip->regmap[AK4113_REG_PWRDN], reg;
  109. /* bring the chip to reset state and powerdown state */
  110. reg_write(chip, AK4113_REG_PWRDN, old & ~(AK4113_RST|AK4113_PWN));
  111. udelay(200);
  112. /* release reset, but leave powerdown */
  113. reg_write(chip, AK4113_REG_PWRDN, (old | AK4113_RST) & ~AK4113_PWN);
  114. udelay(200);
  115. for (reg = 1; reg < AK4113_WRITABLE_REGS; reg++)
  116. reg_write(chip, reg, chip->regmap[reg]);
  117. /* release powerdown, everything is initialized now */
  118. reg_write(chip, AK4113_REG_PWRDN, old | AK4113_RST | AK4113_PWN);
  119. }
  120. void snd_ak4113_reinit(struct ak4113 *chip)
  121. {
  122. chip->init = 1;
  123. mb();
  124. flush_delayed_work_sync(&chip->work);
  125. ak4113_init_regs(chip);
  126. /* bring up statistics / event queing */
  127. chip->init = 0;
  128. if (chip->kctls[0])
  129. schedule_delayed_work(&chip->work, HZ / 10);
  130. }
  131. EXPORT_SYMBOL_GPL(snd_ak4113_reinit);
  132. static unsigned int external_rate(unsigned char rcs1)
  133. {
  134. switch (rcs1 & (AK4113_FS0|AK4113_FS1|AK4113_FS2|AK4113_FS3)) {
  135. case AK4113_FS_8000HZ:
  136. return 8000;
  137. case AK4113_FS_11025HZ:
  138. return 11025;
  139. case AK4113_FS_16000HZ:
  140. return 16000;
  141. case AK4113_FS_22050HZ:
  142. return 22050;
  143. case AK4113_FS_24000HZ:
  144. return 24000;
  145. case AK4113_FS_32000HZ:
  146. return 32000;
  147. case AK4113_FS_44100HZ:
  148. return 44100;
  149. case AK4113_FS_48000HZ:
  150. return 48000;
  151. case AK4113_FS_64000HZ:
  152. return 64000;
  153. case AK4113_FS_88200HZ:
  154. return 88200;
  155. case AK4113_FS_96000HZ:
  156. return 96000;
  157. case AK4113_FS_176400HZ:
  158. return 176400;
  159. case AK4113_FS_192000HZ:
  160. return 192000;
  161. default:
  162. return 0;
  163. }
  164. }
  165. static int snd_ak4113_in_error_info(struct snd_kcontrol *kcontrol,
  166. struct snd_ctl_elem_info *uinfo)
  167. {
  168. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  169. uinfo->count = 1;
  170. uinfo->value.integer.min = 0;
  171. uinfo->value.integer.max = LONG_MAX;
  172. return 0;
  173. }
  174. static int snd_ak4113_in_error_get(struct snd_kcontrol *kcontrol,
  175. struct snd_ctl_elem_value *ucontrol)
  176. {
  177. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  178. long *ptr;
  179. spin_lock_irq(&chip->lock);
  180. ptr = (long *)(((char *)chip) + kcontrol->private_value);
  181. ucontrol->value.integer.value[0] = *ptr;
  182. *ptr = 0;
  183. spin_unlock_irq(&chip->lock);
  184. return 0;
  185. }
  186. #define snd_ak4113_in_bit_info snd_ctl_boolean_mono_info
  187. static int snd_ak4113_in_bit_get(struct snd_kcontrol *kcontrol,
  188. struct snd_ctl_elem_value *ucontrol)
  189. {
  190. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  191. unsigned char reg = kcontrol->private_value & 0xff;
  192. unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
  193. unsigned char inv = (kcontrol->private_value >> 31) & 1;
  194. ucontrol->value.integer.value[0] =
  195. ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
  196. return 0;
  197. }
  198. static int snd_ak4113_rx_info(struct snd_kcontrol *kcontrol,
  199. struct snd_ctl_elem_info *uinfo)
  200. {
  201. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  202. uinfo->count = 1;
  203. uinfo->value.integer.min = 0;
  204. uinfo->value.integer.max = 5;
  205. return 0;
  206. }
  207. static int snd_ak4113_rx_get(struct snd_kcontrol *kcontrol,
  208. struct snd_ctl_elem_value *ucontrol)
  209. {
  210. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  211. ucontrol->value.integer.value[0] =
  212. (AK4113_IPS(chip->regmap[AK4113_REG_IO1]));
  213. return 0;
  214. }
  215. static int snd_ak4113_rx_put(struct snd_kcontrol *kcontrol,
  216. struct snd_ctl_elem_value *ucontrol)
  217. {
  218. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  219. int change;
  220. u8 old_val;
  221. spin_lock_irq(&chip->lock);
  222. old_val = chip->regmap[AK4113_REG_IO1];
  223. change = ucontrol->value.integer.value[0] != AK4113_IPS(old_val);
  224. if (change)
  225. reg_write(chip, AK4113_REG_IO1,
  226. (old_val & (~AK4113_IPS(0xff))) |
  227. (AK4113_IPS(ucontrol->value.integer.value[0])));
  228. spin_unlock_irq(&chip->lock);
  229. return change;
  230. }
  231. static int snd_ak4113_rate_info(struct snd_kcontrol *kcontrol,
  232. struct snd_ctl_elem_info *uinfo)
  233. {
  234. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  235. uinfo->count = 1;
  236. uinfo->value.integer.min = 0;
  237. uinfo->value.integer.max = 192000;
  238. return 0;
  239. }
  240. static int snd_ak4113_rate_get(struct snd_kcontrol *kcontrol,
  241. struct snd_ctl_elem_value *ucontrol)
  242. {
  243. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  244. ucontrol->value.integer.value[0] = external_rate(reg_read(chip,
  245. AK4113_REG_RCS1));
  246. return 0;
  247. }
  248. static int snd_ak4113_spdif_info(struct snd_kcontrol *kcontrol,
  249. struct snd_ctl_elem_info *uinfo)
  250. {
  251. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  252. uinfo->count = 1;
  253. return 0;
  254. }
  255. static int snd_ak4113_spdif_get(struct snd_kcontrol *kcontrol,
  256. struct snd_ctl_elem_value *ucontrol)
  257. {
  258. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  259. unsigned i;
  260. for (i = 0; i < AK4113_REG_RXCSB_SIZE; i++)
  261. ucontrol->value.iec958.status[i] = reg_read(chip,
  262. AK4113_REG_RXCSB0 + i);
  263. return 0;
  264. }
  265. static int snd_ak4113_spdif_mask_info(struct snd_kcontrol *kcontrol,
  266. struct snd_ctl_elem_info *uinfo)
  267. {
  268. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  269. uinfo->count = 1;
  270. return 0;
  271. }
  272. static int snd_ak4113_spdif_mask_get(struct snd_kcontrol *kcontrol,
  273. struct snd_ctl_elem_value *ucontrol)
  274. {
  275. memset(ucontrol->value.iec958.status, 0xff, AK4113_REG_RXCSB_SIZE);
  276. return 0;
  277. }
  278. static int snd_ak4113_spdif_pinfo(struct snd_kcontrol *kcontrol,
  279. struct snd_ctl_elem_info *uinfo)
  280. {
  281. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  282. uinfo->value.integer.min = 0;
  283. uinfo->value.integer.max = 0xffff;
  284. uinfo->count = 4;
  285. return 0;
  286. }
  287. static int snd_ak4113_spdif_pget(struct snd_kcontrol *kcontrol,
  288. struct snd_ctl_elem_value *ucontrol)
  289. {
  290. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  291. unsigned short tmp;
  292. ucontrol->value.integer.value[0] = 0xf8f2;
  293. ucontrol->value.integer.value[1] = 0x4e1f;
  294. tmp = reg_read(chip, AK4113_REG_Pc0) |
  295. (reg_read(chip, AK4113_REG_Pc1) << 8);
  296. ucontrol->value.integer.value[2] = tmp;
  297. tmp = reg_read(chip, AK4113_REG_Pd0) |
  298. (reg_read(chip, AK4113_REG_Pd1) << 8);
  299. ucontrol->value.integer.value[3] = tmp;
  300. return 0;
  301. }
  302. static int snd_ak4113_spdif_qinfo(struct snd_kcontrol *kcontrol,
  303. struct snd_ctl_elem_info *uinfo)
  304. {
  305. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  306. uinfo->count = AK4113_REG_QSUB_SIZE;
  307. return 0;
  308. }
  309. static int snd_ak4113_spdif_qget(struct snd_kcontrol *kcontrol,
  310. struct snd_ctl_elem_value *ucontrol)
  311. {
  312. struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
  313. unsigned i;
  314. for (i = 0; i < AK4113_REG_QSUB_SIZE; i++)
  315. ucontrol->value.bytes.data[i] = reg_read(chip,
  316. AK4113_REG_QSUB_ADDR + i);
  317. return 0;
  318. }
  319. /* Don't forget to change AK4113_CONTROLS define!!! */
  320. static struct snd_kcontrol_new snd_ak4113_iec958_controls[] = {
  321. {
  322. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  323. .name = "IEC958 Parity Errors",
  324. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  325. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  326. .info = snd_ak4113_in_error_info,
  327. .get = snd_ak4113_in_error_get,
  328. .private_value = offsetof(struct ak4113, parity_errors),
  329. },
  330. {
  331. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  332. .name = "IEC958 V-Bit Errors",
  333. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  334. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  335. .info = snd_ak4113_in_error_info,
  336. .get = snd_ak4113_in_error_get,
  337. .private_value = offsetof(struct ak4113, v_bit_errors),
  338. },
  339. {
  340. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  341. .name = "IEC958 C-CRC Errors",
  342. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  343. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  344. .info = snd_ak4113_in_error_info,
  345. .get = snd_ak4113_in_error_get,
  346. .private_value = offsetof(struct ak4113, ccrc_errors),
  347. },
  348. {
  349. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  350. .name = "IEC958 Q-CRC Errors",
  351. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  352. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  353. .info = snd_ak4113_in_error_info,
  354. .get = snd_ak4113_in_error_get,
  355. .private_value = offsetof(struct ak4113, qcrc_errors),
  356. },
  357. {
  358. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  359. .name = "IEC958 External Rate",
  360. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  361. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  362. .info = snd_ak4113_rate_info,
  363. .get = snd_ak4113_rate_get,
  364. },
  365. {
  366. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  367. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),
  368. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  369. .info = snd_ak4113_spdif_mask_info,
  370. .get = snd_ak4113_spdif_mask_get,
  371. },
  372. {
  373. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  374. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
  375. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  376. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  377. .info = snd_ak4113_spdif_info,
  378. .get = snd_ak4113_spdif_get,
  379. },
  380. {
  381. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  382. .name = "IEC958 Preample Capture Default",
  383. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  384. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  385. .info = snd_ak4113_spdif_pinfo,
  386. .get = snd_ak4113_spdif_pget,
  387. },
  388. {
  389. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  390. .name = "IEC958 Q-subcode Capture Default",
  391. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  392. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  393. .info = snd_ak4113_spdif_qinfo,
  394. .get = snd_ak4113_spdif_qget,
  395. },
  396. {
  397. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  398. .name = "IEC958 Audio",
  399. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  400. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  401. .info = snd_ak4113_in_bit_info,
  402. .get = snd_ak4113_in_bit_get,
  403. .private_value = (1<<31) | (1<<8) | AK4113_REG_RCS0,
  404. },
  405. {
  406. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  407. .name = "IEC958 Non-PCM Bitstream",
  408. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  409. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  410. .info = snd_ak4113_in_bit_info,
  411. .get = snd_ak4113_in_bit_get,
  412. .private_value = (0<<8) | AK4113_REG_RCS1,
  413. },
  414. {
  415. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  416. .name = "IEC958 DTS Bitstream",
  417. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  418. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  419. .info = snd_ak4113_in_bit_info,
  420. .get = snd_ak4113_in_bit_get,
  421. .private_value = (1<<8) | AK4113_REG_RCS1,
  422. },
  423. {
  424. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  425. .name = "AK4113 Input Select",
  426. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  427. SNDRV_CTL_ELEM_ACCESS_WRITE,
  428. .info = snd_ak4113_rx_info,
  429. .get = snd_ak4113_rx_get,
  430. .put = snd_ak4113_rx_put,
  431. }
  432. };
  433. static void snd_ak4113_proc_regs_read(struct snd_info_entry *entry,
  434. struct snd_info_buffer *buffer)
  435. {
  436. struct ak4113 *ak4113 = entry->private_data;
  437. int reg, val;
  438. /* all ak4113 registers 0x00 - 0x1c */
  439. for (reg = 0; reg < 0x1d; reg++) {
  440. val = reg_read(ak4113, reg);
  441. snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val);
  442. }
  443. }
  444. static void snd_ak4113_proc_init(struct ak4113 *ak4113)
  445. {
  446. struct snd_info_entry *entry;
  447. if (!snd_card_proc_new(ak4113->card, "ak4113", &entry))
  448. snd_info_set_text_ops(entry, ak4113, snd_ak4113_proc_regs_read);
  449. }
  450. int snd_ak4113_build(struct ak4113 *ak4113,
  451. struct snd_pcm_substream *cap_substream)
  452. {
  453. struct snd_kcontrol *kctl;
  454. unsigned int idx;
  455. int err;
  456. if (snd_BUG_ON(!cap_substream))
  457. return -EINVAL;
  458. ak4113->substream = cap_substream;
  459. for (idx = 0; idx < AK4113_CONTROLS; idx++) {
  460. kctl = snd_ctl_new1(&snd_ak4113_iec958_controls[idx], ak4113);
  461. if (kctl == NULL)
  462. return -ENOMEM;
  463. kctl->id.device = cap_substream->pcm->device;
  464. kctl->id.subdevice = cap_substream->number;
  465. err = snd_ctl_add(ak4113->card, kctl);
  466. if (err < 0)
  467. return err;
  468. ak4113->kctls[idx] = kctl;
  469. }
  470. snd_ak4113_proc_init(ak4113);
  471. /* trigger workq */
  472. schedule_delayed_work(&ak4113->work, HZ / 10);
  473. return 0;
  474. }
  475. EXPORT_SYMBOL_GPL(snd_ak4113_build);
  476. int snd_ak4113_external_rate(struct ak4113 *ak4113)
  477. {
  478. unsigned char rcs1;
  479. rcs1 = reg_read(ak4113, AK4113_REG_RCS1);
  480. return external_rate(rcs1);
  481. }
  482. EXPORT_SYMBOL_GPL(snd_ak4113_external_rate);
  483. int snd_ak4113_check_rate_and_errors(struct ak4113 *ak4113, unsigned int flags)
  484. {
  485. struct snd_pcm_runtime *runtime =
  486. ak4113->substream ? ak4113->substream->runtime : NULL;
  487. unsigned long _flags;
  488. int res = 0;
  489. unsigned char rcs0, rcs1, rcs2;
  490. unsigned char c0, c1;
  491. rcs1 = reg_read(ak4113, AK4113_REG_RCS1);
  492. if (flags & AK4113_CHECK_NO_STAT)
  493. goto __rate;
  494. rcs0 = reg_read(ak4113, AK4113_REG_RCS0);
  495. rcs2 = reg_read(ak4113, AK4113_REG_RCS2);
  496. spin_lock_irqsave(&ak4113->lock, _flags);
  497. if (rcs0 & AK4113_PAR)
  498. ak4113->parity_errors++;
  499. if (rcs0 & AK4113_V)
  500. ak4113->v_bit_errors++;
  501. if (rcs2 & AK4113_CCRC)
  502. ak4113->ccrc_errors++;
  503. if (rcs2 & AK4113_QCRC)
  504. ak4113->qcrc_errors++;
  505. c0 = (ak4113->rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC |
  506. AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK)) ^
  507. (rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC |
  508. AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK));
  509. c1 = (ak4113->rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM |
  510. AK4113_DAT | 0xf0)) ^
  511. (rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM |
  512. AK4113_DAT | 0xf0));
  513. ak4113->rcs0 = rcs0 & ~(AK4113_QINT | AK4113_CINT | AK4113_STC);
  514. ak4113->rcs1 = rcs1;
  515. ak4113->rcs2 = rcs2;
  516. spin_unlock_irqrestore(&ak4113->lock, _flags);
  517. if (rcs0 & AK4113_PAR)
  518. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  519. &ak4113->kctls[0]->id);
  520. if (rcs0 & AK4113_V)
  521. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  522. &ak4113->kctls[1]->id);
  523. if (rcs2 & AK4113_CCRC)
  524. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  525. &ak4113->kctls[2]->id);
  526. if (rcs2 & AK4113_QCRC)
  527. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  528. &ak4113->kctls[3]->id);
  529. /* rate change */
  530. if (c1 & 0xf0)
  531. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  532. &ak4113->kctls[4]->id);
  533. if ((c1 & AK4113_PEM) | (c0 & AK4113_CINT))
  534. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  535. &ak4113->kctls[6]->id);
  536. if (c0 & AK4113_QINT)
  537. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  538. &ak4113->kctls[8]->id);
  539. if (c0 & AK4113_AUDION)
  540. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  541. &ak4113->kctls[9]->id);
  542. if (c1 & AK4113_NPCM)
  543. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  544. &ak4113->kctls[10]->id);
  545. if (c1 & AK4113_DTSCD)
  546. snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
  547. &ak4113->kctls[11]->id);
  548. if (ak4113->change_callback && (c0 | c1) != 0)
  549. ak4113->change_callback(ak4113, c0, c1);
  550. __rate:
  551. /* compare rate */
  552. res = external_rate(rcs1);
  553. if (!(flags & AK4113_CHECK_NO_RATE) && runtime &&
  554. (runtime->rate != res)) {
  555. snd_pcm_stream_lock_irqsave(ak4113->substream, _flags);
  556. if (snd_pcm_running(ak4113->substream)) {
  557. /*printk(KERN_DEBUG "rate changed (%i <- %i)\n",
  558. * runtime->rate, res); */
  559. snd_pcm_stop(ak4113->substream,
  560. SNDRV_PCM_STATE_DRAINING);
  561. wake_up(&runtime->sleep);
  562. res = 1;
  563. }
  564. snd_pcm_stream_unlock_irqrestore(ak4113->substream, _flags);
  565. }
  566. return res;
  567. }
  568. EXPORT_SYMBOL_GPL(snd_ak4113_check_rate_and_errors);
  569. static void ak4113_stats(struct work_struct *work)
  570. {
  571. struct ak4113 *chip = container_of(work, struct ak4113, work.work);
  572. if (!chip->init)
  573. snd_ak4113_check_rate_and_errors(chip, chip->check_flags);
  574. schedule_delayed_work(&chip->work, HZ / 10);
  575. }