musb_virthub.c 12 KB

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  1. /*
  2. * MUSB OTG driver virtual root hub support
  3. *
  4. * Copyright 2005 Mentor Graphics Corporation
  5. * Copyright (C) 2005-2006 by Texas Instruments
  6. * Copyright (C) 2006-2007 Nokia Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  25. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. */
  34. #include <linux/module.h>
  35. #include <linux/kernel.h>
  36. #include <linux/sched.h>
  37. #include <linux/errno.h>
  38. #include <linux/init.h>
  39. #include <linux/time.h>
  40. #include <linux/timer.h>
  41. #include <asm/unaligned.h>
  42. #include "musb_core.h"
  43. static void musb_port_suspend(struct musb *musb, bool do_suspend)
  44. {
  45. u8 power;
  46. void __iomem *mbase = musb->mregs;
  47. if (!is_host_active(musb))
  48. return;
  49. /* NOTE: this doesn't necessarily put PHY into low power mode,
  50. * turning off its clock; that's a function of PHY integration and
  51. * MUSB_POWER_ENSUSPEND. PHY may need a clock (sigh) to detect
  52. * SE0 changing to connect (J) or wakeup (K) states.
  53. */
  54. power = musb_readb(mbase, MUSB_POWER);
  55. if (do_suspend) {
  56. int retries = 10000;
  57. power &= ~MUSB_POWER_RESUME;
  58. power |= MUSB_POWER_SUSPENDM;
  59. musb_writeb(mbase, MUSB_POWER, power);
  60. /* Needed for OPT A tests */
  61. power = musb_readb(mbase, MUSB_POWER);
  62. while (power & MUSB_POWER_SUSPENDM) {
  63. power = musb_readb(mbase, MUSB_POWER);
  64. if (retries-- < 1)
  65. break;
  66. }
  67. dev_dbg(musb->controller, "Root port suspended, power %02x\n", power);
  68. musb->port1_status |= USB_PORT_STAT_SUSPEND;
  69. switch (musb->xceiv->state) {
  70. case OTG_STATE_A_HOST:
  71. musb->xceiv->state = OTG_STATE_A_SUSPEND;
  72. musb->is_active = is_otg_enabled(musb)
  73. && musb->xceiv->host->b_hnp_enable;
  74. if (musb->is_active)
  75. mod_timer(&musb->otg_timer, jiffies
  76. + msecs_to_jiffies(
  77. OTG_TIME_A_AIDL_BDIS));
  78. musb_platform_try_idle(musb, 0);
  79. break;
  80. case OTG_STATE_B_HOST:
  81. musb->xceiv->state = OTG_STATE_B_WAIT_ACON;
  82. musb->is_active = is_otg_enabled(musb)
  83. && musb->xceiv->host->b_hnp_enable;
  84. musb_platform_try_idle(musb, 0);
  85. break;
  86. default:
  87. dev_dbg(musb->controller, "bogus rh suspend? %s\n",
  88. otg_state_string(musb->xceiv->state));
  89. }
  90. } else if (power & MUSB_POWER_SUSPENDM) {
  91. power &= ~MUSB_POWER_SUSPENDM;
  92. power |= MUSB_POWER_RESUME;
  93. musb_writeb(mbase, MUSB_POWER, power);
  94. dev_dbg(musb->controller, "Root port resuming, power %02x\n", power);
  95. /* later, GetPortStatus will stop RESUME signaling */
  96. musb->port1_status |= MUSB_PORT_STAT_RESUME;
  97. musb->rh_timer = jiffies + msecs_to_jiffies(20);
  98. }
  99. }
  100. static void musb_port_reset(struct musb *musb, bool do_reset)
  101. {
  102. u8 power;
  103. void __iomem *mbase = musb->mregs;
  104. if (musb->xceiv->state == OTG_STATE_B_IDLE) {
  105. dev_dbg(musb->controller, "HNP: Returning from HNP; no hub reset from b_idle\n");
  106. musb->port1_status &= ~USB_PORT_STAT_RESET;
  107. return;
  108. }
  109. if (!is_host_active(musb))
  110. return;
  111. /* NOTE: caller guarantees it will turn off the reset when
  112. * the appropriate amount of time has passed
  113. */
  114. power = musb_readb(mbase, MUSB_POWER);
  115. if (do_reset) {
  116. /*
  117. * If RESUME is set, we must make sure it stays minimum 20 ms.
  118. * Then we must clear RESUME and wait a bit to let musb start
  119. * generating SOFs. If we don't do this, OPT HS A 6.8 tests
  120. * fail with "Error! Did not receive an SOF before suspend
  121. * detected".
  122. */
  123. if (power & MUSB_POWER_RESUME) {
  124. while (time_before(jiffies, musb->rh_timer))
  125. msleep(1);
  126. musb_writeb(mbase, MUSB_POWER,
  127. power & ~MUSB_POWER_RESUME);
  128. msleep(1);
  129. }
  130. musb->ignore_disconnect = true;
  131. power &= 0xf0;
  132. musb_writeb(mbase, MUSB_POWER,
  133. power | MUSB_POWER_RESET);
  134. musb->port1_status |= USB_PORT_STAT_RESET;
  135. musb->port1_status &= ~USB_PORT_STAT_ENABLE;
  136. musb->rh_timer = jiffies + msecs_to_jiffies(50);
  137. } else {
  138. dev_dbg(musb->controller, "root port reset stopped\n");
  139. musb_writeb(mbase, MUSB_POWER,
  140. power & ~MUSB_POWER_RESET);
  141. musb->ignore_disconnect = false;
  142. power = musb_readb(mbase, MUSB_POWER);
  143. if (power & MUSB_POWER_HSMODE) {
  144. dev_dbg(musb->controller, "high-speed device connected\n");
  145. musb->port1_status |= USB_PORT_STAT_HIGH_SPEED;
  146. }
  147. musb->port1_status &= ~USB_PORT_STAT_RESET;
  148. musb->port1_status |= USB_PORT_STAT_ENABLE
  149. | (USB_PORT_STAT_C_RESET << 16)
  150. | (USB_PORT_STAT_C_ENABLE << 16);
  151. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  152. musb->vbuserr_retry = VBUSERR_RETRY_COUNT;
  153. }
  154. }
  155. void musb_root_disconnect(struct musb *musb)
  156. {
  157. musb->port1_status = USB_PORT_STAT_POWER
  158. | (USB_PORT_STAT_C_CONNECTION << 16);
  159. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  160. musb->is_active = 0;
  161. switch (musb->xceiv->state) {
  162. case OTG_STATE_A_SUSPEND:
  163. if (is_otg_enabled(musb)
  164. && musb->xceiv->host->b_hnp_enable) {
  165. musb->xceiv->state = OTG_STATE_A_PERIPHERAL;
  166. musb->g.is_a_peripheral = 1;
  167. break;
  168. }
  169. /* FALLTHROUGH */
  170. case OTG_STATE_A_HOST:
  171. musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
  172. musb->is_active = 0;
  173. break;
  174. case OTG_STATE_A_WAIT_VFALL:
  175. musb->xceiv->state = OTG_STATE_B_IDLE;
  176. break;
  177. default:
  178. dev_dbg(musb->controller, "host disconnect (%s)\n",
  179. otg_state_string(musb->xceiv->state));
  180. }
  181. }
  182. /*---------------------------------------------------------------------*/
  183. /* Caller may or may not hold musb->lock */
  184. int musb_hub_status_data(struct usb_hcd *hcd, char *buf)
  185. {
  186. struct musb *musb = hcd_to_musb(hcd);
  187. int retval = 0;
  188. /* called in_irq() via usb_hcd_poll_rh_status() */
  189. if (musb->port1_status & 0xffff0000) {
  190. *buf = 0x02;
  191. retval = 1;
  192. }
  193. return retval;
  194. }
  195. int musb_hub_control(
  196. struct usb_hcd *hcd,
  197. u16 typeReq,
  198. u16 wValue,
  199. u16 wIndex,
  200. char *buf,
  201. u16 wLength)
  202. {
  203. struct musb *musb = hcd_to_musb(hcd);
  204. u32 temp;
  205. int retval = 0;
  206. unsigned long flags;
  207. spin_lock_irqsave(&musb->lock, flags);
  208. if (unlikely(!HCD_HW_ACCESSIBLE(hcd))) {
  209. spin_unlock_irqrestore(&musb->lock, flags);
  210. return -ESHUTDOWN;
  211. }
  212. /* hub features: always zero, setting is a NOP
  213. * port features: reported, sometimes updated when host is active
  214. * no indicators
  215. */
  216. switch (typeReq) {
  217. case ClearHubFeature:
  218. case SetHubFeature:
  219. switch (wValue) {
  220. case C_HUB_OVER_CURRENT:
  221. case C_HUB_LOCAL_POWER:
  222. break;
  223. default:
  224. goto error;
  225. }
  226. break;
  227. case ClearPortFeature:
  228. if ((wIndex & 0xff) != 1)
  229. goto error;
  230. switch (wValue) {
  231. case USB_PORT_FEAT_ENABLE:
  232. break;
  233. case USB_PORT_FEAT_SUSPEND:
  234. musb_port_suspend(musb, false);
  235. break;
  236. case USB_PORT_FEAT_POWER:
  237. if (!(is_otg_enabled(musb) && hcd->self.is_b_host))
  238. musb_platform_set_vbus(musb, 0);
  239. break;
  240. case USB_PORT_FEAT_C_CONNECTION:
  241. case USB_PORT_FEAT_C_ENABLE:
  242. case USB_PORT_FEAT_C_OVER_CURRENT:
  243. case USB_PORT_FEAT_C_RESET:
  244. case USB_PORT_FEAT_C_SUSPEND:
  245. break;
  246. default:
  247. goto error;
  248. }
  249. dev_dbg(musb->controller, "clear feature %d\n", wValue);
  250. musb->port1_status &= ~(1 << wValue);
  251. break;
  252. case GetHubDescriptor:
  253. {
  254. struct usb_hub_descriptor *desc = (void *)buf;
  255. desc->bDescLength = 9;
  256. desc->bDescriptorType = 0x29;
  257. desc->bNbrPorts = 1;
  258. desc->wHubCharacteristics = cpu_to_le16(
  259. 0x0001 /* per-port power switching */
  260. | 0x0010 /* no overcurrent reporting */
  261. );
  262. desc->bPwrOn2PwrGood = 5; /* msec/2 */
  263. desc->bHubContrCurrent = 0;
  264. /* workaround bogus struct definition */
  265. desc->u.hs.DeviceRemovable[0] = 0x02; /* port 1 */
  266. desc->u.hs.DeviceRemovable[1] = 0xff;
  267. }
  268. break;
  269. case GetHubStatus:
  270. temp = 0;
  271. *(__le32 *) buf = cpu_to_le32(temp);
  272. break;
  273. case GetPortStatus:
  274. if (wIndex != 1)
  275. goto error;
  276. /* finish RESET signaling? */
  277. if ((musb->port1_status & USB_PORT_STAT_RESET)
  278. && time_after_eq(jiffies, musb->rh_timer))
  279. musb_port_reset(musb, false);
  280. /* finish RESUME signaling? */
  281. if ((musb->port1_status & MUSB_PORT_STAT_RESUME)
  282. && time_after_eq(jiffies, musb->rh_timer)) {
  283. u8 power;
  284. power = musb_readb(musb->mregs, MUSB_POWER);
  285. power &= ~MUSB_POWER_RESUME;
  286. dev_dbg(musb->controller, "root port resume stopped, power %02x\n",
  287. power);
  288. musb_writeb(musb->mregs, MUSB_POWER, power);
  289. /* ISSUE: DaVinci (RTL 1.300) disconnects after
  290. * resume of high speed peripherals (but not full
  291. * speed ones).
  292. */
  293. musb->is_active = 1;
  294. musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
  295. | MUSB_PORT_STAT_RESUME);
  296. musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
  297. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  298. /* NOTE: it might really be A_WAIT_BCON ... */
  299. musb->xceiv->state = OTG_STATE_A_HOST;
  300. }
  301. put_unaligned(cpu_to_le32(musb->port1_status
  302. & ~MUSB_PORT_STAT_RESUME),
  303. (__le32 *) buf);
  304. /* port change status is more interesting */
  305. dev_dbg(musb->controller, "port status %08x\n",
  306. musb->port1_status);
  307. break;
  308. case SetPortFeature:
  309. if ((wIndex & 0xff) != 1)
  310. goto error;
  311. switch (wValue) {
  312. case USB_PORT_FEAT_POWER:
  313. /* NOTE: this controller has a strange state machine
  314. * that involves "requesting sessions" according to
  315. * magic side effects from incompletely-described
  316. * rules about startup...
  317. *
  318. * This call is what really starts the host mode; be
  319. * very careful about side effects if you reorder any
  320. * initialization logic, e.g. for OTG, or change any
  321. * logic relating to VBUS power-up.
  322. */
  323. if (!(is_otg_enabled(musb) && hcd->self.is_b_host))
  324. musb_start(musb);
  325. break;
  326. case USB_PORT_FEAT_RESET:
  327. musb_port_reset(musb, true);
  328. break;
  329. case USB_PORT_FEAT_SUSPEND:
  330. musb_port_suspend(musb, true);
  331. break;
  332. case USB_PORT_FEAT_TEST:
  333. if (unlikely(is_host_active(musb)))
  334. goto error;
  335. wIndex >>= 8;
  336. switch (wIndex) {
  337. case 1:
  338. pr_debug("TEST_J\n");
  339. temp = MUSB_TEST_J;
  340. break;
  341. case 2:
  342. pr_debug("TEST_K\n");
  343. temp = MUSB_TEST_K;
  344. break;
  345. case 3:
  346. pr_debug("TEST_SE0_NAK\n");
  347. temp = MUSB_TEST_SE0_NAK;
  348. break;
  349. case 4:
  350. pr_debug("TEST_PACKET\n");
  351. temp = MUSB_TEST_PACKET;
  352. musb_load_testpacket(musb);
  353. break;
  354. case 5:
  355. pr_debug("TEST_FORCE_ENABLE\n");
  356. temp = MUSB_TEST_FORCE_HOST
  357. | MUSB_TEST_FORCE_HS;
  358. musb_writeb(musb->mregs, MUSB_DEVCTL,
  359. MUSB_DEVCTL_SESSION);
  360. break;
  361. case 6:
  362. pr_debug("TEST_FIFO_ACCESS\n");
  363. temp = MUSB_TEST_FIFO_ACCESS;
  364. break;
  365. default:
  366. goto error;
  367. }
  368. musb_writeb(musb->mregs, MUSB_TESTMODE, temp);
  369. break;
  370. default:
  371. goto error;
  372. }
  373. dev_dbg(musb->controller, "set feature %d\n", wValue);
  374. musb->port1_status |= 1 << wValue;
  375. break;
  376. default:
  377. error:
  378. /* "protocol stall" on error */
  379. retval = -EPIPE;
  380. }
  381. spin_unlock_irqrestore(&musb->lock, flags);
  382. return retval;
  383. }