pxa.c 21 KB

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  1. /*
  2. * Based on drivers/serial/8250.c by Russell King.
  3. *
  4. * Author: Nicolas Pitre
  5. * Created: Feb 20, 2003
  6. * Copyright: (C) 2003 Monta Vista Software, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * Note 1: This driver is made separate from the already too overloaded
  14. * 8250.c because it needs some kirks of its own and that'll make it
  15. * easier to add DMA support.
  16. *
  17. * Note 2: I'm too sick of device allocation policies for serial ports.
  18. * If someone else wants to request an "official" allocation of major/minor
  19. * for this driver please be my guest. And don't forget that new hardware
  20. * to come from Intel might have more than 3 or 4 of those UARTs. Let's
  21. * hope for a better port registration and dynamic device allocation scheme
  22. * with the serial core maintainer satisfaction to appear soon.
  23. */
  24. #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  25. #define SUPPORT_SYSRQ
  26. #endif
  27. #include <linux/module.h>
  28. #include <linux/ioport.h>
  29. #include <linux/init.h>
  30. #include <linux/console.h>
  31. #include <linux/sysrq.h>
  32. #include <linux/serial_reg.h>
  33. #include <linux/circ_buf.h>
  34. #include <linux/delay.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/platform_device.h>
  37. #include <linux/tty.h>
  38. #include <linux/tty_flip.h>
  39. #include <linux/serial_core.h>
  40. #include <linux/clk.h>
  41. #include <linux/io.h>
  42. #include <linux/slab.h>
  43. struct uart_pxa_port {
  44. struct uart_port port;
  45. unsigned char ier;
  46. unsigned char lcr;
  47. unsigned char mcr;
  48. unsigned int lsr_break_flag;
  49. struct clk *clk;
  50. char *name;
  51. };
  52. static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
  53. {
  54. offset <<= 2;
  55. return readl(up->port.membase + offset);
  56. }
  57. static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
  58. {
  59. offset <<= 2;
  60. writel(value, up->port.membase + offset);
  61. }
  62. static void serial_pxa_enable_ms(struct uart_port *port)
  63. {
  64. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  65. up->ier |= UART_IER_MSI;
  66. serial_out(up, UART_IER, up->ier);
  67. }
  68. static void serial_pxa_stop_tx(struct uart_port *port)
  69. {
  70. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  71. if (up->ier & UART_IER_THRI) {
  72. up->ier &= ~UART_IER_THRI;
  73. serial_out(up, UART_IER, up->ier);
  74. }
  75. }
  76. static void serial_pxa_stop_rx(struct uart_port *port)
  77. {
  78. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  79. up->ier &= ~UART_IER_RLSI;
  80. up->port.read_status_mask &= ~UART_LSR_DR;
  81. serial_out(up, UART_IER, up->ier);
  82. }
  83. static inline void receive_chars(struct uart_pxa_port *up, int *status)
  84. {
  85. struct tty_struct *tty = up->port.state->port.tty;
  86. unsigned int ch, flag;
  87. int max_count = 256;
  88. do {
  89. ch = serial_in(up, UART_RX);
  90. flag = TTY_NORMAL;
  91. up->port.icount.rx++;
  92. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  93. UART_LSR_FE | UART_LSR_OE))) {
  94. /*
  95. * For statistics only
  96. */
  97. if (*status & UART_LSR_BI) {
  98. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  99. up->port.icount.brk++;
  100. /*
  101. * We do the SysRQ and SAK checking
  102. * here because otherwise the break
  103. * may get masked by ignore_status_mask
  104. * or read_status_mask.
  105. */
  106. if (uart_handle_break(&up->port))
  107. goto ignore_char;
  108. } else if (*status & UART_LSR_PE)
  109. up->port.icount.parity++;
  110. else if (*status & UART_LSR_FE)
  111. up->port.icount.frame++;
  112. if (*status & UART_LSR_OE)
  113. up->port.icount.overrun++;
  114. /*
  115. * Mask off conditions which should be ignored.
  116. */
  117. *status &= up->port.read_status_mask;
  118. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  119. if (up->port.line == up->port.cons->index) {
  120. /* Recover the break flag from console xmit */
  121. *status |= up->lsr_break_flag;
  122. up->lsr_break_flag = 0;
  123. }
  124. #endif
  125. if (*status & UART_LSR_BI) {
  126. flag = TTY_BREAK;
  127. } else if (*status & UART_LSR_PE)
  128. flag = TTY_PARITY;
  129. else if (*status & UART_LSR_FE)
  130. flag = TTY_FRAME;
  131. }
  132. if (uart_handle_sysrq_char(&up->port, ch))
  133. goto ignore_char;
  134. uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
  135. ignore_char:
  136. *status = serial_in(up, UART_LSR);
  137. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  138. tty_flip_buffer_push(tty);
  139. }
  140. static void transmit_chars(struct uart_pxa_port *up)
  141. {
  142. struct circ_buf *xmit = &up->port.state->xmit;
  143. int count;
  144. if (up->port.x_char) {
  145. serial_out(up, UART_TX, up->port.x_char);
  146. up->port.icount.tx++;
  147. up->port.x_char = 0;
  148. return;
  149. }
  150. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  151. serial_pxa_stop_tx(&up->port);
  152. return;
  153. }
  154. count = up->port.fifosize / 2;
  155. do {
  156. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  157. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  158. up->port.icount.tx++;
  159. if (uart_circ_empty(xmit))
  160. break;
  161. } while (--count > 0);
  162. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  163. uart_write_wakeup(&up->port);
  164. if (uart_circ_empty(xmit))
  165. serial_pxa_stop_tx(&up->port);
  166. }
  167. static void serial_pxa_start_tx(struct uart_port *port)
  168. {
  169. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  170. if (!(up->ier & UART_IER_THRI)) {
  171. up->ier |= UART_IER_THRI;
  172. serial_out(up, UART_IER, up->ier);
  173. }
  174. }
  175. static inline void check_modem_status(struct uart_pxa_port *up)
  176. {
  177. int status;
  178. status = serial_in(up, UART_MSR);
  179. if ((status & UART_MSR_ANY_DELTA) == 0)
  180. return;
  181. if (status & UART_MSR_TERI)
  182. up->port.icount.rng++;
  183. if (status & UART_MSR_DDSR)
  184. up->port.icount.dsr++;
  185. if (status & UART_MSR_DDCD)
  186. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  187. if (status & UART_MSR_DCTS)
  188. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  189. wake_up_interruptible(&up->port.state->port.delta_msr_wait);
  190. }
  191. /*
  192. * This handles the interrupt from one port.
  193. */
  194. static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id)
  195. {
  196. struct uart_pxa_port *up = dev_id;
  197. unsigned int iir, lsr;
  198. iir = serial_in(up, UART_IIR);
  199. if (iir & UART_IIR_NO_INT)
  200. return IRQ_NONE;
  201. lsr = serial_in(up, UART_LSR);
  202. if (lsr & UART_LSR_DR)
  203. receive_chars(up, &lsr);
  204. check_modem_status(up);
  205. if (lsr & UART_LSR_THRE)
  206. transmit_chars(up);
  207. return IRQ_HANDLED;
  208. }
  209. static unsigned int serial_pxa_tx_empty(struct uart_port *port)
  210. {
  211. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  212. unsigned long flags;
  213. unsigned int ret;
  214. spin_lock_irqsave(&up->port.lock, flags);
  215. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  216. spin_unlock_irqrestore(&up->port.lock, flags);
  217. return ret;
  218. }
  219. static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
  220. {
  221. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  222. unsigned char status;
  223. unsigned int ret;
  224. status = serial_in(up, UART_MSR);
  225. ret = 0;
  226. if (status & UART_MSR_DCD)
  227. ret |= TIOCM_CAR;
  228. if (status & UART_MSR_RI)
  229. ret |= TIOCM_RNG;
  230. if (status & UART_MSR_DSR)
  231. ret |= TIOCM_DSR;
  232. if (status & UART_MSR_CTS)
  233. ret |= TIOCM_CTS;
  234. return ret;
  235. }
  236. static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
  237. {
  238. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  239. unsigned char mcr = 0;
  240. if (mctrl & TIOCM_RTS)
  241. mcr |= UART_MCR_RTS;
  242. if (mctrl & TIOCM_DTR)
  243. mcr |= UART_MCR_DTR;
  244. if (mctrl & TIOCM_OUT1)
  245. mcr |= UART_MCR_OUT1;
  246. if (mctrl & TIOCM_OUT2)
  247. mcr |= UART_MCR_OUT2;
  248. if (mctrl & TIOCM_LOOP)
  249. mcr |= UART_MCR_LOOP;
  250. mcr |= up->mcr;
  251. serial_out(up, UART_MCR, mcr);
  252. }
  253. static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
  254. {
  255. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  256. unsigned long flags;
  257. spin_lock_irqsave(&up->port.lock, flags);
  258. if (break_state == -1)
  259. up->lcr |= UART_LCR_SBC;
  260. else
  261. up->lcr &= ~UART_LCR_SBC;
  262. serial_out(up, UART_LCR, up->lcr);
  263. spin_unlock_irqrestore(&up->port.lock, flags);
  264. }
  265. #if 0
  266. static void serial_pxa_dma_init(struct pxa_uart *up)
  267. {
  268. up->rxdma =
  269. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
  270. if (up->rxdma < 0)
  271. goto out;
  272. up->txdma =
  273. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
  274. if (up->txdma < 0)
  275. goto err_txdma;
  276. up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
  277. if (!up->dmadesc)
  278. goto err_alloc;
  279. /* ... */
  280. err_alloc:
  281. pxa_free_dma(up->txdma);
  282. err_rxdma:
  283. pxa_free_dma(up->rxdma);
  284. out:
  285. return;
  286. }
  287. #endif
  288. static int serial_pxa_startup(struct uart_port *port)
  289. {
  290. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  291. unsigned long flags;
  292. int retval;
  293. if (port->line == 3) /* HWUART */
  294. up->mcr |= UART_MCR_AFE;
  295. else
  296. up->mcr = 0;
  297. up->port.uartclk = clk_get_rate(up->clk);
  298. /*
  299. * Allocate the IRQ
  300. */
  301. retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
  302. if (retval)
  303. return retval;
  304. /*
  305. * Clear the FIFO buffers and disable them.
  306. * (they will be reenabled in set_termios())
  307. */
  308. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  309. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  310. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  311. serial_out(up, UART_FCR, 0);
  312. /*
  313. * Clear the interrupt registers.
  314. */
  315. (void) serial_in(up, UART_LSR);
  316. (void) serial_in(up, UART_RX);
  317. (void) serial_in(up, UART_IIR);
  318. (void) serial_in(up, UART_MSR);
  319. /*
  320. * Now, initialize the UART
  321. */
  322. serial_out(up, UART_LCR, UART_LCR_WLEN8);
  323. spin_lock_irqsave(&up->port.lock, flags);
  324. up->port.mctrl |= TIOCM_OUT2;
  325. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  326. spin_unlock_irqrestore(&up->port.lock, flags);
  327. /*
  328. * Finally, enable interrupts. Note: Modem status interrupts
  329. * are set via set_termios(), which will be occurring imminently
  330. * anyway, so we don't enable them here.
  331. */
  332. up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
  333. serial_out(up, UART_IER, up->ier);
  334. /*
  335. * And clear the interrupt registers again for luck.
  336. */
  337. (void) serial_in(up, UART_LSR);
  338. (void) serial_in(up, UART_RX);
  339. (void) serial_in(up, UART_IIR);
  340. (void) serial_in(up, UART_MSR);
  341. return 0;
  342. }
  343. static void serial_pxa_shutdown(struct uart_port *port)
  344. {
  345. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  346. unsigned long flags;
  347. free_irq(up->port.irq, up);
  348. /*
  349. * Disable interrupts from this port
  350. */
  351. up->ier = 0;
  352. serial_out(up, UART_IER, 0);
  353. spin_lock_irqsave(&up->port.lock, flags);
  354. up->port.mctrl &= ~TIOCM_OUT2;
  355. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  356. spin_unlock_irqrestore(&up->port.lock, flags);
  357. /*
  358. * Disable break condition and FIFOs
  359. */
  360. serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
  361. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  362. UART_FCR_CLEAR_RCVR |
  363. UART_FCR_CLEAR_XMIT);
  364. serial_out(up, UART_FCR, 0);
  365. }
  366. static void
  367. serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
  368. struct ktermios *old)
  369. {
  370. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  371. unsigned char cval, fcr = 0;
  372. unsigned long flags;
  373. unsigned int baud, quot;
  374. unsigned int dll;
  375. switch (termios->c_cflag & CSIZE) {
  376. case CS5:
  377. cval = UART_LCR_WLEN5;
  378. break;
  379. case CS6:
  380. cval = UART_LCR_WLEN6;
  381. break;
  382. case CS7:
  383. cval = UART_LCR_WLEN7;
  384. break;
  385. default:
  386. case CS8:
  387. cval = UART_LCR_WLEN8;
  388. break;
  389. }
  390. if (termios->c_cflag & CSTOPB)
  391. cval |= UART_LCR_STOP;
  392. if (termios->c_cflag & PARENB)
  393. cval |= UART_LCR_PARITY;
  394. if (!(termios->c_cflag & PARODD))
  395. cval |= UART_LCR_EPAR;
  396. /*
  397. * Ask the core to calculate the divisor for us.
  398. */
  399. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  400. quot = uart_get_divisor(port, baud);
  401. if ((up->port.uartclk / quot) < (2400 * 16))
  402. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
  403. else if ((up->port.uartclk / quot) < (230400 * 16))
  404. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
  405. else
  406. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
  407. /*
  408. * Ok, we're now changing the port state. Do it with
  409. * interrupts disabled.
  410. */
  411. spin_lock_irqsave(&up->port.lock, flags);
  412. /*
  413. * Ensure the port will be enabled.
  414. * This is required especially for serial console.
  415. */
  416. up->ier |= UART_IER_UUE;
  417. /*
  418. * Update the per-port timeout.
  419. */
  420. uart_update_timeout(port, termios->c_cflag, baud);
  421. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  422. if (termios->c_iflag & INPCK)
  423. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  424. if (termios->c_iflag & (BRKINT | PARMRK))
  425. up->port.read_status_mask |= UART_LSR_BI;
  426. /*
  427. * Characters to ignore
  428. */
  429. up->port.ignore_status_mask = 0;
  430. if (termios->c_iflag & IGNPAR)
  431. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  432. if (termios->c_iflag & IGNBRK) {
  433. up->port.ignore_status_mask |= UART_LSR_BI;
  434. /*
  435. * If we're ignoring parity and break indicators,
  436. * ignore overruns too (for real raw support).
  437. */
  438. if (termios->c_iflag & IGNPAR)
  439. up->port.ignore_status_mask |= UART_LSR_OE;
  440. }
  441. /*
  442. * ignore all characters if CREAD is not set
  443. */
  444. if ((termios->c_cflag & CREAD) == 0)
  445. up->port.ignore_status_mask |= UART_LSR_DR;
  446. /*
  447. * CTS flow control flag and modem status interrupts
  448. */
  449. up->ier &= ~UART_IER_MSI;
  450. if (UART_ENABLE_MS(&up->port, termios->c_cflag))
  451. up->ier |= UART_IER_MSI;
  452. serial_out(up, UART_IER, up->ier);
  453. if (termios->c_cflag & CRTSCTS)
  454. up->mcr |= UART_MCR_AFE;
  455. else
  456. up->mcr &= ~UART_MCR_AFE;
  457. serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
  458. serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
  459. /*
  460. * work around Errata #75 according to Intel(R) PXA27x Processor Family
  461. * Specification Update (Nov 2005)
  462. */
  463. dll = serial_in(up, UART_DLL);
  464. WARN_ON(dll != (quot & 0xff));
  465. serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
  466. serial_out(up, UART_LCR, cval); /* reset DLAB */
  467. up->lcr = cval; /* Save LCR */
  468. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  469. serial_out(up, UART_FCR, fcr);
  470. spin_unlock_irqrestore(&up->port.lock, flags);
  471. }
  472. static void
  473. serial_pxa_pm(struct uart_port *port, unsigned int state,
  474. unsigned int oldstate)
  475. {
  476. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  477. if (!state)
  478. clk_enable(up->clk);
  479. else
  480. clk_disable(up->clk);
  481. }
  482. static void serial_pxa_release_port(struct uart_port *port)
  483. {
  484. }
  485. static int serial_pxa_request_port(struct uart_port *port)
  486. {
  487. return 0;
  488. }
  489. static void serial_pxa_config_port(struct uart_port *port, int flags)
  490. {
  491. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  492. up->port.type = PORT_PXA;
  493. }
  494. static int
  495. serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
  496. {
  497. /* we don't want the core code to modify any port params */
  498. return -EINVAL;
  499. }
  500. static const char *
  501. serial_pxa_type(struct uart_port *port)
  502. {
  503. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  504. return up->name;
  505. }
  506. static struct uart_pxa_port *serial_pxa_ports[4];
  507. static struct uart_driver serial_pxa_reg;
  508. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  509. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  510. /*
  511. * Wait for transmitter & holding register to empty
  512. */
  513. static inline void wait_for_xmitr(struct uart_pxa_port *up)
  514. {
  515. unsigned int status, tmout = 10000;
  516. /* Wait up to 10ms for the character(s) to be sent. */
  517. do {
  518. status = serial_in(up, UART_LSR);
  519. if (status & UART_LSR_BI)
  520. up->lsr_break_flag = UART_LSR_BI;
  521. if (--tmout == 0)
  522. break;
  523. udelay(1);
  524. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  525. /* Wait up to 1s for flow control if necessary */
  526. if (up->port.flags & UPF_CONS_FLOW) {
  527. tmout = 1000000;
  528. while (--tmout &&
  529. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  530. udelay(1);
  531. }
  532. }
  533. static void serial_pxa_console_putchar(struct uart_port *port, int ch)
  534. {
  535. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  536. wait_for_xmitr(up);
  537. serial_out(up, UART_TX, ch);
  538. }
  539. /*
  540. * Print a string to the serial port trying not to disturb
  541. * any possible real use of the port...
  542. *
  543. * The console_lock must be held when we get here.
  544. */
  545. static void
  546. serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
  547. {
  548. struct uart_pxa_port *up = serial_pxa_ports[co->index];
  549. unsigned int ier;
  550. clk_enable(up->clk);
  551. /*
  552. * First save the IER then disable the interrupts
  553. */
  554. ier = serial_in(up, UART_IER);
  555. serial_out(up, UART_IER, UART_IER_UUE);
  556. uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
  557. /*
  558. * Finally, wait for transmitter to become empty
  559. * and restore the IER
  560. */
  561. wait_for_xmitr(up);
  562. serial_out(up, UART_IER, ier);
  563. clk_disable(up->clk);
  564. }
  565. static int __init
  566. serial_pxa_console_setup(struct console *co, char *options)
  567. {
  568. struct uart_pxa_port *up;
  569. int baud = 9600;
  570. int bits = 8;
  571. int parity = 'n';
  572. int flow = 'n';
  573. if (co->index == -1 || co->index >= serial_pxa_reg.nr)
  574. co->index = 0;
  575. up = serial_pxa_ports[co->index];
  576. if (!up)
  577. return -ENODEV;
  578. if (options)
  579. uart_parse_options(options, &baud, &parity, &bits, &flow);
  580. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  581. }
  582. static struct console serial_pxa_console = {
  583. .name = "ttyS",
  584. .write = serial_pxa_console_write,
  585. .device = uart_console_device,
  586. .setup = serial_pxa_console_setup,
  587. .flags = CON_PRINTBUFFER,
  588. .index = -1,
  589. .data = &serial_pxa_reg,
  590. };
  591. #define PXA_CONSOLE &serial_pxa_console
  592. #else
  593. #define PXA_CONSOLE NULL
  594. #endif
  595. struct uart_ops serial_pxa_pops = {
  596. .tx_empty = serial_pxa_tx_empty,
  597. .set_mctrl = serial_pxa_set_mctrl,
  598. .get_mctrl = serial_pxa_get_mctrl,
  599. .stop_tx = serial_pxa_stop_tx,
  600. .start_tx = serial_pxa_start_tx,
  601. .stop_rx = serial_pxa_stop_rx,
  602. .enable_ms = serial_pxa_enable_ms,
  603. .break_ctl = serial_pxa_break_ctl,
  604. .startup = serial_pxa_startup,
  605. .shutdown = serial_pxa_shutdown,
  606. .set_termios = serial_pxa_set_termios,
  607. .pm = serial_pxa_pm,
  608. .type = serial_pxa_type,
  609. .release_port = serial_pxa_release_port,
  610. .request_port = serial_pxa_request_port,
  611. .config_port = serial_pxa_config_port,
  612. .verify_port = serial_pxa_verify_port,
  613. };
  614. static struct uart_driver serial_pxa_reg = {
  615. .owner = THIS_MODULE,
  616. .driver_name = "PXA serial",
  617. .dev_name = "ttyS",
  618. .major = TTY_MAJOR,
  619. .minor = 64,
  620. .nr = 4,
  621. .cons = PXA_CONSOLE,
  622. };
  623. #ifdef CONFIG_PM
  624. static int serial_pxa_suspend(struct device *dev)
  625. {
  626. struct uart_pxa_port *sport = dev_get_drvdata(dev);
  627. if (sport)
  628. uart_suspend_port(&serial_pxa_reg, &sport->port);
  629. return 0;
  630. }
  631. static int serial_pxa_resume(struct device *dev)
  632. {
  633. struct uart_pxa_port *sport = dev_get_drvdata(dev);
  634. if (sport)
  635. uart_resume_port(&serial_pxa_reg, &sport->port);
  636. return 0;
  637. }
  638. static const struct dev_pm_ops serial_pxa_pm_ops = {
  639. .suspend = serial_pxa_suspend,
  640. .resume = serial_pxa_resume,
  641. };
  642. #endif
  643. static int serial_pxa_probe(struct platform_device *dev)
  644. {
  645. struct uart_pxa_port *sport;
  646. struct resource *mmres, *irqres;
  647. int ret;
  648. mmres = platform_get_resource(dev, IORESOURCE_MEM, 0);
  649. irqres = platform_get_resource(dev, IORESOURCE_IRQ, 0);
  650. if (!mmres || !irqres)
  651. return -ENODEV;
  652. sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL);
  653. if (!sport)
  654. return -ENOMEM;
  655. sport->clk = clk_get(&dev->dev, NULL);
  656. if (IS_ERR(sport->clk)) {
  657. ret = PTR_ERR(sport->clk);
  658. goto err_free;
  659. }
  660. sport->port.type = PORT_PXA;
  661. sport->port.iotype = UPIO_MEM;
  662. sport->port.mapbase = mmres->start;
  663. sport->port.irq = irqres->start;
  664. sport->port.fifosize = 64;
  665. sport->port.ops = &serial_pxa_pops;
  666. sport->port.line = dev->id;
  667. sport->port.dev = &dev->dev;
  668. sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
  669. sport->port.uartclk = clk_get_rate(sport->clk);
  670. switch (dev->id) {
  671. case 0: sport->name = "FFUART"; break;
  672. case 1: sport->name = "BTUART"; break;
  673. case 2: sport->name = "STUART"; break;
  674. case 3: sport->name = "HWUART"; break;
  675. default:
  676. sport->name = "???";
  677. break;
  678. }
  679. sport->port.membase = ioremap(mmres->start, resource_size(mmres));
  680. if (!sport->port.membase) {
  681. ret = -ENOMEM;
  682. goto err_clk;
  683. }
  684. serial_pxa_ports[dev->id] = sport;
  685. uart_add_one_port(&serial_pxa_reg, &sport->port);
  686. platform_set_drvdata(dev, sport);
  687. return 0;
  688. err_clk:
  689. clk_put(sport->clk);
  690. err_free:
  691. kfree(sport);
  692. return ret;
  693. }
  694. static int serial_pxa_remove(struct platform_device *dev)
  695. {
  696. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  697. platform_set_drvdata(dev, NULL);
  698. uart_remove_one_port(&serial_pxa_reg, &sport->port);
  699. clk_put(sport->clk);
  700. kfree(sport);
  701. return 0;
  702. }
  703. static struct platform_driver serial_pxa_driver = {
  704. .probe = serial_pxa_probe,
  705. .remove = serial_pxa_remove,
  706. .driver = {
  707. .name = "pxa2xx-uart",
  708. .owner = THIS_MODULE,
  709. #ifdef CONFIG_PM
  710. .pm = &serial_pxa_pm_ops,
  711. #endif
  712. },
  713. };
  714. int __init serial_pxa_init(void)
  715. {
  716. int ret;
  717. ret = uart_register_driver(&serial_pxa_reg);
  718. if (ret != 0)
  719. return ret;
  720. ret = platform_driver_register(&serial_pxa_driver);
  721. if (ret != 0)
  722. uart_unregister_driver(&serial_pxa_reg);
  723. return ret;
  724. }
  725. void __exit serial_pxa_exit(void)
  726. {
  727. platform_driver_unregister(&serial_pxa_driver);
  728. uart_unregister_driver(&serial_pxa_reg);
  729. }
  730. module_init(serial_pxa_init);
  731. module_exit(serial_pxa_exit);
  732. MODULE_LICENSE("GPL");
  733. MODULE_ALIAS("platform:pxa2xx-uart");