hpsa.c 124 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/fs.h>
  29. #include <linux/timer.h>
  30. #include <linux/seq_file.h>
  31. #include <linux/init.h>
  32. #include <linux/spinlock.h>
  33. #include <linux/compat.h>
  34. #include <linux/blktrace_api.h>
  35. #include <linux/uaccess.h>
  36. #include <linux/io.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/completion.h>
  39. #include <linux/moduleparam.h>
  40. #include <scsi/scsi.h>
  41. #include <scsi/scsi_cmnd.h>
  42. #include <scsi/scsi_device.h>
  43. #include <scsi/scsi_host.h>
  44. #include <scsi/scsi_tcq.h>
  45. #include <linux/cciss_ioctl.h>
  46. #include <linux/string.h>
  47. #include <linux/bitmap.h>
  48. #include <linux/atomic.h>
  49. #include <linux/kthread.h>
  50. #include "hpsa_cmd.h"
  51. #include "hpsa.h"
  52. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  53. #define HPSA_DRIVER_VERSION "2.0.2-1"
  54. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  55. /* How long to wait (in milliseconds) for board to go into simple mode */
  56. #define MAX_CONFIG_WAIT 30000
  57. #define MAX_IOCTL_CONFIG_WAIT 1000
  58. /*define how many times we will try a command because of bus resets */
  59. #define MAX_CMD_RETRIES 3
  60. /* Embedded module documentation macros - see modules.h */
  61. MODULE_AUTHOR("Hewlett-Packard Company");
  62. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  63. HPSA_DRIVER_VERSION);
  64. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  65. MODULE_VERSION(HPSA_DRIVER_VERSION);
  66. MODULE_LICENSE("GPL");
  67. static int hpsa_allow_any;
  68. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  69. MODULE_PARM_DESC(hpsa_allow_any,
  70. "Allow hpsa driver to access unknown HP Smart Array hardware");
  71. static int hpsa_simple_mode;
  72. module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  73. MODULE_PARM_DESC(hpsa_simple_mode,
  74. "Use 'simple mode' rather than 'performant mode'");
  75. /* define the PCI info for the cards we can control */
  76. static const struct pci_device_id hpsa_pci_device_id[] = {
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
  92. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  93. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  94. {0,}
  95. };
  96. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  97. /* board_id = Subsystem Device ID & Vendor ID
  98. * product = Marketing Name for the board
  99. * access = Address of the struct of function pointers
  100. */
  101. static struct board_type products[] = {
  102. {0x3241103C, "Smart Array P212", &SA5_access},
  103. {0x3243103C, "Smart Array P410", &SA5_access},
  104. {0x3245103C, "Smart Array P410i", &SA5_access},
  105. {0x3247103C, "Smart Array P411", &SA5_access},
  106. {0x3249103C, "Smart Array P812", &SA5_access},
  107. {0x324a103C, "Smart Array P712m", &SA5_access},
  108. {0x324b103C, "Smart Array P711m", &SA5_access},
  109. {0x3350103C, "Smart Array", &SA5_access},
  110. {0x3351103C, "Smart Array", &SA5_access},
  111. {0x3352103C, "Smart Array", &SA5_access},
  112. {0x3353103C, "Smart Array", &SA5_access},
  113. {0x3354103C, "Smart Array", &SA5_access},
  114. {0x3355103C, "Smart Array", &SA5_access},
  115. {0x3356103C, "Smart Array", &SA5_access},
  116. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  117. };
  118. static int number_of_controllers;
  119. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  120. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  121. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  122. static void start_io(struct ctlr_info *h);
  123. #ifdef CONFIG_COMPAT
  124. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  125. #endif
  126. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  127. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  128. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  129. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  130. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  131. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  132. int cmd_type);
  133. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  134. static void hpsa_scan_start(struct Scsi_Host *);
  135. static int hpsa_scan_finished(struct Scsi_Host *sh,
  136. unsigned long elapsed_time);
  137. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  138. int qdepth, int reason);
  139. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  140. static int hpsa_slave_alloc(struct scsi_device *sdev);
  141. static void hpsa_slave_destroy(struct scsi_device *sdev);
  142. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  143. static int check_for_unit_attention(struct ctlr_info *h,
  144. struct CommandList *c);
  145. static void check_ioctl_unit_attention(struct ctlr_info *h,
  146. struct CommandList *c);
  147. /* performant mode helper functions */
  148. static void calc_bucket_map(int *bucket, int num_buckets,
  149. int nsgs, int *bucket_map);
  150. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  151. static inline u32 next_command(struct ctlr_info *h);
  152. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  153. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  154. u64 *cfg_offset);
  155. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  156. unsigned long *memory_bar);
  157. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  158. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  159. void __iomem *vaddr, int wait_for_ready);
  160. #define BOARD_NOT_READY 0
  161. #define BOARD_READY 1
  162. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  163. {
  164. unsigned long *priv = shost_priv(sdev->host);
  165. return (struct ctlr_info *) *priv;
  166. }
  167. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  168. {
  169. unsigned long *priv = shost_priv(sh);
  170. return (struct ctlr_info *) *priv;
  171. }
  172. static int check_for_unit_attention(struct ctlr_info *h,
  173. struct CommandList *c)
  174. {
  175. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  176. return 0;
  177. switch (c->err_info->SenseInfo[12]) {
  178. case STATE_CHANGED:
  179. dev_warn(&h->pdev->dev, "hpsa%d: a state change "
  180. "detected, command retried\n", h->ctlr);
  181. break;
  182. case LUN_FAILED:
  183. dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
  184. "detected, action required\n", h->ctlr);
  185. break;
  186. case REPORT_LUNS_CHANGED:
  187. dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
  188. "changed, action required\n", h->ctlr);
  189. /*
  190. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  191. */
  192. break;
  193. case POWER_OR_RESET:
  194. dev_warn(&h->pdev->dev, "hpsa%d: a power on "
  195. "or device reset detected\n", h->ctlr);
  196. break;
  197. case UNIT_ATTENTION_CLEARED:
  198. dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
  199. "cleared by another initiator\n", h->ctlr);
  200. break;
  201. default:
  202. dev_warn(&h->pdev->dev, "hpsa%d: unknown "
  203. "unit attention detected\n", h->ctlr);
  204. break;
  205. }
  206. return 1;
  207. }
  208. static ssize_t host_store_rescan(struct device *dev,
  209. struct device_attribute *attr,
  210. const char *buf, size_t count)
  211. {
  212. struct ctlr_info *h;
  213. struct Scsi_Host *shost = class_to_shost(dev);
  214. h = shost_to_hba(shost);
  215. hpsa_scan_start(h->scsi_host);
  216. return count;
  217. }
  218. static ssize_t host_show_firmware_revision(struct device *dev,
  219. struct device_attribute *attr, char *buf)
  220. {
  221. struct ctlr_info *h;
  222. struct Scsi_Host *shost = class_to_shost(dev);
  223. unsigned char *fwrev;
  224. h = shost_to_hba(shost);
  225. if (!h->hba_inquiry_data)
  226. return 0;
  227. fwrev = &h->hba_inquiry_data[32];
  228. return snprintf(buf, 20, "%c%c%c%c\n",
  229. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  230. }
  231. static ssize_t host_show_commands_outstanding(struct device *dev,
  232. struct device_attribute *attr, char *buf)
  233. {
  234. struct Scsi_Host *shost = class_to_shost(dev);
  235. struct ctlr_info *h = shost_to_hba(shost);
  236. return snprintf(buf, 20, "%d\n", h->commands_outstanding);
  237. }
  238. static ssize_t host_show_transport_mode(struct device *dev,
  239. struct device_attribute *attr, char *buf)
  240. {
  241. struct ctlr_info *h;
  242. struct Scsi_Host *shost = class_to_shost(dev);
  243. h = shost_to_hba(shost);
  244. return snprintf(buf, 20, "%s\n",
  245. h->transMethod & CFGTBL_Trans_Performant ?
  246. "performant" : "simple");
  247. }
  248. /* List of controllers which cannot be hard reset on kexec with reset_devices */
  249. static u32 unresettable_controller[] = {
  250. 0x324a103C, /* Smart Array P712m */
  251. 0x324b103C, /* SmartArray P711m */
  252. 0x3223103C, /* Smart Array P800 */
  253. 0x3234103C, /* Smart Array P400 */
  254. 0x3235103C, /* Smart Array P400i */
  255. 0x3211103C, /* Smart Array E200i */
  256. 0x3212103C, /* Smart Array E200 */
  257. 0x3213103C, /* Smart Array E200i */
  258. 0x3214103C, /* Smart Array E200i */
  259. 0x3215103C, /* Smart Array E200i */
  260. 0x3237103C, /* Smart Array E500 */
  261. 0x323D103C, /* Smart Array P700m */
  262. 0x409C0E11, /* Smart Array 6400 */
  263. 0x409D0E11, /* Smart Array 6400 EM */
  264. };
  265. /* List of controllers which cannot even be soft reset */
  266. static u32 soft_unresettable_controller[] = {
  267. /* Exclude 640x boards. These are two pci devices in one slot
  268. * which share a battery backed cache module. One controls the
  269. * cache, the other accesses the cache through the one that controls
  270. * it. If we reset the one controlling the cache, the other will
  271. * likely not be happy. Just forbid resetting this conjoined mess.
  272. * The 640x isn't really supported by hpsa anyway.
  273. */
  274. 0x409C0E11, /* Smart Array 6400 */
  275. 0x409D0E11, /* Smart Array 6400 EM */
  276. };
  277. static int ctlr_is_hard_resettable(u32 board_id)
  278. {
  279. int i;
  280. for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
  281. if (unresettable_controller[i] == board_id)
  282. return 0;
  283. return 1;
  284. }
  285. static int ctlr_is_soft_resettable(u32 board_id)
  286. {
  287. int i;
  288. for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
  289. if (soft_unresettable_controller[i] == board_id)
  290. return 0;
  291. return 1;
  292. }
  293. static int ctlr_is_resettable(u32 board_id)
  294. {
  295. return ctlr_is_hard_resettable(board_id) ||
  296. ctlr_is_soft_resettable(board_id);
  297. }
  298. static ssize_t host_show_resettable(struct device *dev,
  299. struct device_attribute *attr, char *buf)
  300. {
  301. struct ctlr_info *h;
  302. struct Scsi_Host *shost = class_to_shost(dev);
  303. h = shost_to_hba(shost);
  304. return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
  305. }
  306. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  307. {
  308. return (scsi3addr[3] & 0xC0) == 0x40;
  309. }
  310. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  311. "UNKNOWN"
  312. };
  313. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  314. static ssize_t raid_level_show(struct device *dev,
  315. struct device_attribute *attr, char *buf)
  316. {
  317. ssize_t l = 0;
  318. unsigned char rlevel;
  319. struct ctlr_info *h;
  320. struct scsi_device *sdev;
  321. struct hpsa_scsi_dev_t *hdev;
  322. unsigned long flags;
  323. sdev = to_scsi_device(dev);
  324. h = sdev_to_hba(sdev);
  325. spin_lock_irqsave(&h->lock, flags);
  326. hdev = sdev->hostdata;
  327. if (!hdev) {
  328. spin_unlock_irqrestore(&h->lock, flags);
  329. return -ENODEV;
  330. }
  331. /* Is this even a logical drive? */
  332. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  333. spin_unlock_irqrestore(&h->lock, flags);
  334. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  335. return l;
  336. }
  337. rlevel = hdev->raid_level;
  338. spin_unlock_irqrestore(&h->lock, flags);
  339. if (rlevel > RAID_UNKNOWN)
  340. rlevel = RAID_UNKNOWN;
  341. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  342. return l;
  343. }
  344. static ssize_t lunid_show(struct device *dev,
  345. struct device_attribute *attr, char *buf)
  346. {
  347. struct ctlr_info *h;
  348. struct scsi_device *sdev;
  349. struct hpsa_scsi_dev_t *hdev;
  350. unsigned long flags;
  351. unsigned char lunid[8];
  352. sdev = to_scsi_device(dev);
  353. h = sdev_to_hba(sdev);
  354. spin_lock_irqsave(&h->lock, flags);
  355. hdev = sdev->hostdata;
  356. if (!hdev) {
  357. spin_unlock_irqrestore(&h->lock, flags);
  358. return -ENODEV;
  359. }
  360. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  361. spin_unlock_irqrestore(&h->lock, flags);
  362. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  363. lunid[0], lunid[1], lunid[2], lunid[3],
  364. lunid[4], lunid[5], lunid[6], lunid[7]);
  365. }
  366. static ssize_t unique_id_show(struct device *dev,
  367. struct device_attribute *attr, char *buf)
  368. {
  369. struct ctlr_info *h;
  370. struct scsi_device *sdev;
  371. struct hpsa_scsi_dev_t *hdev;
  372. unsigned long flags;
  373. unsigned char sn[16];
  374. sdev = to_scsi_device(dev);
  375. h = sdev_to_hba(sdev);
  376. spin_lock_irqsave(&h->lock, flags);
  377. hdev = sdev->hostdata;
  378. if (!hdev) {
  379. spin_unlock_irqrestore(&h->lock, flags);
  380. return -ENODEV;
  381. }
  382. memcpy(sn, hdev->device_id, sizeof(sn));
  383. spin_unlock_irqrestore(&h->lock, flags);
  384. return snprintf(buf, 16 * 2 + 2,
  385. "%02X%02X%02X%02X%02X%02X%02X%02X"
  386. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  387. sn[0], sn[1], sn[2], sn[3],
  388. sn[4], sn[5], sn[6], sn[7],
  389. sn[8], sn[9], sn[10], sn[11],
  390. sn[12], sn[13], sn[14], sn[15]);
  391. }
  392. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  393. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  394. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  395. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  396. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  397. host_show_firmware_revision, NULL);
  398. static DEVICE_ATTR(commands_outstanding, S_IRUGO,
  399. host_show_commands_outstanding, NULL);
  400. static DEVICE_ATTR(transport_mode, S_IRUGO,
  401. host_show_transport_mode, NULL);
  402. static DEVICE_ATTR(resettable, S_IRUGO,
  403. host_show_resettable, NULL);
  404. static struct device_attribute *hpsa_sdev_attrs[] = {
  405. &dev_attr_raid_level,
  406. &dev_attr_lunid,
  407. &dev_attr_unique_id,
  408. NULL,
  409. };
  410. static struct device_attribute *hpsa_shost_attrs[] = {
  411. &dev_attr_rescan,
  412. &dev_attr_firmware_revision,
  413. &dev_attr_commands_outstanding,
  414. &dev_attr_transport_mode,
  415. &dev_attr_resettable,
  416. NULL,
  417. };
  418. static struct scsi_host_template hpsa_driver_template = {
  419. .module = THIS_MODULE,
  420. .name = "hpsa",
  421. .proc_name = "hpsa",
  422. .queuecommand = hpsa_scsi_queue_command,
  423. .scan_start = hpsa_scan_start,
  424. .scan_finished = hpsa_scan_finished,
  425. .change_queue_depth = hpsa_change_queue_depth,
  426. .this_id = -1,
  427. .use_clustering = ENABLE_CLUSTERING,
  428. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  429. .ioctl = hpsa_ioctl,
  430. .slave_alloc = hpsa_slave_alloc,
  431. .slave_destroy = hpsa_slave_destroy,
  432. #ifdef CONFIG_COMPAT
  433. .compat_ioctl = hpsa_compat_ioctl,
  434. #endif
  435. .sdev_attrs = hpsa_sdev_attrs,
  436. .shost_attrs = hpsa_shost_attrs,
  437. };
  438. /* Enqueuing and dequeuing functions for cmdlists. */
  439. static inline void addQ(struct list_head *list, struct CommandList *c)
  440. {
  441. list_add_tail(&c->list, list);
  442. }
  443. static inline u32 next_command(struct ctlr_info *h)
  444. {
  445. u32 a;
  446. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  447. return h->access.command_completed(h);
  448. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  449. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  450. (h->reply_pool_head)++;
  451. h->commands_outstanding--;
  452. } else {
  453. a = FIFO_EMPTY;
  454. }
  455. /* Check for wraparound */
  456. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  457. h->reply_pool_head = h->reply_pool;
  458. h->reply_pool_wraparound ^= 1;
  459. }
  460. return a;
  461. }
  462. /* set_performant_mode: Modify the tag for cciss performant
  463. * set bit 0 for pull model, bits 3-1 for block fetch
  464. * register number
  465. */
  466. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  467. {
  468. if (likely(h->transMethod & CFGTBL_Trans_Performant))
  469. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  470. }
  471. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  472. struct CommandList *c)
  473. {
  474. unsigned long flags;
  475. set_performant_mode(h, c);
  476. spin_lock_irqsave(&h->lock, flags);
  477. addQ(&h->reqQ, c);
  478. h->Qdepth++;
  479. start_io(h);
  480. spin_unlock_irqrestore(&h->lock, flags);
  481. }
  482. static inline void removeQ(struct CommandList *c)
  483. {
  484. if (WARN_ON(list_empty(&c->list)))
  485. return;
  486. list_del_init(&c->list);
  487. }
  488. static inline int is_hba_lunid(unsigned char scsi3addr[])
  489. {
  490. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  491. }
  492. static inline int is_scsi_rev_5(struct ctlr_info *h)
  493. {
  494. if (!h->hba_inquiry_data)
  495. return 0;
  496. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  497. return 1;
  498. return 0;
  499. }
  500. static int hpsa_find_target_lun(struct ctlr_info *h,
  501. unsigned char scsi3addr[], int bus, int *target, int *lun)
  502. {
  503. /* finds an unused bus, target, lun for a new physical device
  504. * assumes h->devlock is held
  505. */
  506. int i, found = 0;
  507. DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
  508. memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
  509. for (i = 0; i < h->ndevices; i++) {
  510. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  511. set_bit(h->dev[i]->target, lun_taken);
  512. }
  513. for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
  514. if (!test_bit(i, lun_taken)) {
  515. /* *bus = 1; */
  516. *target = i;
  517. *lun = 0;
  518. found = 1;
  519. break;
  520. }
  521. }
  522. return !found;
  523. }
  524. /* Add an entry into h->dev[] array. */
  525. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  526. struct hpsa_scsi_dev_t *device,
  527. struct hpsa_scsi_dev_t *added[], int *nadded)
  528. {
  529. /* assumes h->devlock is held */
  530. int n = h->ndevices;
  531. int i;
  532. unsigned char addr1[8], addr2[8];
  533. struct hpsa_scsi_dev_t *sd;
  534. if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
  535. dev_err(&h->pdev->dev, "too many devices, some will be "
  536. "inaccessible.\n");
  537. return -1;
  538. }
  539. /* physical devices do not have lun or target assigned until now. */
  540. if (device->lun != -1)
  541. /* Logical device, lun is already assigned. */
  542. goto lun_assigned;
  543. /* If this device a non-zero lun of a multi-lun device
  544. * byte 4 of the 8-byte LUN addr will contain the logical
  545. * unit no, zero otherise.
  546. */
  547. if (device->scsi3addr[4] == 0) {
  548. /* This is not a non-zero lun of a multi-lun device */
  549. if (hpsa_find_target_lun(h, device->scsi3addr,
  550. device->bus, &device->target, &device->lun) != 0)
  551. return -1;
  552. goto lun_assigned;
  553. }
  554. /* This is a non-zero lun of a multi-lun device.
  555. * Search through our list and find the device which
  556. * has the same 8 byte LUN address, excepting byte 4.
  557. * Assign the same bus and target for this new LUN.
  558. * Use the logical unit number from the firmware.
  559. */
  560. memcpy(addr1, device->scsi3addr, 8);
  561. addr1[4] = 0;
  562. for (i = 0; i < n; i++) {
  563. sd = h->dev[i];
  564. memcpy(addr2, sd->scsi3addr, 8);
  565. addr2[4] = 0;
  566. /* differ only in byte 4? */
  567. if (memcmp(addr1, addr2, 8) == 0) {
  568. device->bus = sd->bus;
  569. device->target = sd->target;
  570. device->lun = device->scsi3addr[4];
  571. break;
  572. }
  573. }
  574. if (device->lun == -1) {
  575. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  576. " suspect firmware bug or unsupported hardware "
  577. "configuration.\n");
  578. return -1;
  579. }
  580. lun_assigned:
  581. h->dev[n] = device;
  582. h->ndevices++;
  583. added[*nadded] = device;
  584. (*nadded)++;
  585. /* initially, (before registering with scsi layer) we don't
  586. * know our hostno and we don't want to print anything first
  587. * time anyway (the scsi layer's inquiries will show that info)
  588. */
  589. /* if (hostno != -1) */
  590. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  591. scsi_device_type(device->devtype), hostno,
  592. device->bus, device->target, device->lun);
  593. return 0;
  594. }
  595. /* Replace an entry from h->dev[] array. */
  596. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  597. int entry, struct hpsa_scsi_dev_t *new_entry,
  598. struct hpsa_scsi_dev_t *added[], int *nadded,
  599. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  600. {
  601. /* assumes h->devlock is held */
  602. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  603. removed[*nremoved] = h->dev[entry];
  604. (*nremoved)++;
  605. h->dev[entry] = new_entry;
  606. added[*nadded] = new_entry;
  607. (*nadded)++;
  608. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  609. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  610. new_entry->target, new_entry->lun);
  611. }
  612. /* Remove an entry from h->dev[] array. */
  613. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  614. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  615. {
  616. /* assumes h->devlock is held */
  617. int i;
  618. struct hpsa_scsi_dev_t *sd;
  619. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  620. sd = h->dev[entry];
  621. removed[*nremoved] = h->dev[entry];
  622. (*nremoved)++;
  623. for (i = entry; i < h->ndevices-1; i++)
  624. h->dev[i] = h->dev[i+1];
  625. h->ndevices--;
  626. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  627. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  628. sd->lun);
  629. }
  630. #define SCSI3ADDR_EQ(a, b) ( \
  631. (a)[7] == (b)[7] && \
  632. (a)[6] == (b)[6] && \
  633. (a)[5] == (b)[5] && \
  634. (a)[4] == (b)[4] && \
  635. (a)[3] == (b)[3] && \
  636. (a)[2] == (b)[2] && \
  637. (a)[1] == (b)[1] && \
  638. (a)[0] == (b)[0])
  639. static void fixup_botched_add(struct ctlr_info *h,
  640. struct hpsa_scsi_dev_t *added)
  641. {
  642. /* called when scsi_add_device fails in order to re-adjust
  643. * h->dev[] to match the mid layer's view.
  644. */
  645. unsigned long flags;
  646. int i, j;
  647. spin_lock_irqsave(&h->lock, flags);
  648. for (i = 0; i < h->ndevices; i++) {
  649. if (h->dev[i] == added) {
  650. for (j = i; j < h->ndevices-1; j++)
  651. h->dev[j] = h->dev[j+1];
  652. h->ndevices--;
  653. break;
  654. }
  655. }
  656. spin_unlock_irqrestore(&h->lock, flags);
  657. kfree(added);
  658. }
  659. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  660. struct hpsa_scsi_dev_t *dev2)
  661. {
  662. /* we compare everything except lun and target as these
  663. * are not yet assigned. Compare parts likely
  664. * to differ first
  665. */
  666. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  667. sizeof(dev1->scsi3addr)) != 0)
  668. return 0;
  669. if (memcmp(dev1->device_id, dev2->device_id,
  670. sizeof(dev1->device_id)) != 0)
  671. return 0;
  672. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  673. return 0;
  674. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  675. return 0;
  676. if (dev1->devtype != dev2->devtype)
  677. return 0;
  678. if (dev1->bus != dev2->bus)
  679. return 0;
  680. return 1;
  681. }
  682. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  683. * and return needle location in *index. If scsi3addr matches, but not
  684. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  685. * location in *index. If needle not found, return DEVICE_NOT_FOUND.
  686. */
  687. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  688. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  689. int *index)
  690. {
  691. int i;
  692. #define DEVICE_NOT_FOUND 0
  693. #define DEVICE_CHANGED 1
  694. #define DEVICE_SAME 2
  695. for (i = 0; i < haystack_size; i++) {
  696. if (haystack[i] == NULL) /* previously removed. */
  697. continue;
  698. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  699. *index = i;
  700. if (device_is_the_same(needle, haystack[i]))
  701. return DEVICE_SAME;
  702. else
  703. return DEVICE_CHANGED;
  704. }
  705. }
  706. *index = -1;
  707. return DEVICE_NOT_FOUND;
  708. }
  709. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  710. struct hpsa_scsi_dev_t *sd[], int nsds)
  711. {
  712. /* sd contains scsi3 addresses and devtypes, and inquiry
  713. * data. This function takes what's in sd to be the current
  714. * reality and updates h->dev[] to reflect that reality.
  715. */
  716. int i, entry, device_change, changes = 0;
  717. struct hpsa_scsi_dev_t *csd;
  718. unsigned long flags;
  719. struct hpsa_scsi_dev_t **added, **removed;
  720. int nadded, nremoved;
  721. struct Scsi_Host *sh = NULL;
  722. added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  723. GFP_KERNEL);
  724. removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  725. GFP_KERNEL);
  726. if (!added || !removed) {
  727. dev_warn(&h->pdev->dev, "out of memory in "
  728. "adjust_hpsa_scsi_table\n");
  729. goto free_and_out;
  730. }
  731. spin_lock_irqsave(&h->devlock, flags);
  732. /* find any devices in h->dev[] that are not in
  733. * sd[] and remove them from h->dev[], and for any
  734. * devices which have changed, remove the old device
  735. * info and add the new device info.
  736. */
  737. i = 0;
  738. nremoved = 0;
  739. nadded = 0;
  740. while (i < h->ndevices) {
  741. csd = h->dev[i];
  742. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  743. if (device_change == DEVICE_NOT_FOUND) {
  744. changes++;
  745. hpsa_scsi_remove_entry(h, hostno, i,
  746. removed, &nremoved);
  747. continue; /* remove ^^^, hence i not incremented */
  748. } else if (device_change == DEVICE_CHANGED) {
  749. changes++;
  750. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  751. added, &nadded, removed, &nremoved);
  752. /* Set it to NULL to prevent it from being freed
  753. * at the bottom of hpsa_update_scsi_devices()
  754. */
  755. sd[entry] = NULL;
  756. }
  757. i++;
  758. }
  759. /* Now, make sure every device listed in sd[] is also
  760. * listed in h->dev[], adding them if they aren't found
  761. */
  762. for (i = 0; i < nsds; i++) {
  763. if (!sd[i]) /* if already added above. */
  764. continue;
  765. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  766. h->ndevices, &entry);
  767. if (device_change == DEVICE_NOT_FOUND) {
  768. changes++;
  769. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  770. added, &nadded) != 0)
  771. break;
  772. sd[i] = NULL; /* prevent from being freed later. */
  773. } else if (device_change == DEVICE_CHANGED) {
  774. /* should never happen... */
  775. changes++;
  776. dev_warn(&h->pdev->dev,
  777. "device unexpectedly changed.\n");
  778. /* but if it does happen, we just ignore that device */
  779. }
  780. }
  781. spin_unlock_irqrestore(&h->devlock, flags);
  782. /* Don't notify scsi mid layer of any changes the first time through
  783. * (or if there are no changes) scsi_scan_host will do it later the
  784. * first time through.
  785. */
  786. if (hostno == -1 || !changes)
  787. goto free_and_out;
  788. sh = h->scsi_host;
  789. /* Notify scsi mid layer of any removed devices */
  790. for (i = 0; i < nremoved; i++) {
  791. struct scsi_device *sdev =
  792. scsi_device_lookup(sh, removed[i]->bus,
  793. removed[i]->target, removed[i]->lun);
  794. if (sdev != NULL) {
  795. scsi_remove_device(sdev);
  796. scsi_device_put(sdev);
  797. } else {
  798. /* We don't expect to get here.
  799. * future cmds to this device will get selection
  800. * timeout as if the device was gone.
  801. */
  802. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  803. " for removal.", hostno, removed[i]->bus,
  804. removed[i]->target, removed[i]->lun);
  805. }
  806. kfree(removed[i]);
  807. removed[i] = NULL;
  808. }
  809. /* Notify scsi mid layer of any added devices */
  810. for (i = 0; i < nadded; i++) {
  811. if (scsi_add_device(sh, added[i]->bus,
  812. added[i]->target, added[i]->lun) == 0)
  813. continue;
  814. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  815. "device not added.\n", hostno, added[i]->bus,
  816. added[i]->target, added[i]->lun);
  817. /* now we have to remove it from h->dev,
  818. * since it didn't get added to scsi mid layer
  819. */
  820. fixup_botched_add(h, added[i]);
  821. }
  822. free_and_out:
  823. kfree(added);
  824. kfree(removed);
  825. }
  826. /*
  827. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  828. * Assume's h->devlock is held.
  829. */
  830. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  831. int bus, int target, int lun)
  832. {
  833. int i;
  834. struct hpsa_scsi_dev_t *sd;
  835. for (i = 0; i < h->ndevices; i++) {
  836. sd = h->dev[i];
  837. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  838. return sd;
  839. }
  840. return NULL;
  841. }
  842. /* link sdev->hostdata to our per-device structure. */
  843. static int hpsa_slave_alloc(struct scsi_device *sdev)
  844. {
  845. struct hpsa_scsi_dev_t *sd;
  846. unsigned long flags;
  847. struct ctlr_info *h;
  848. h = sdev_to_hba(sdev);
  849. spin_lock_irqsave(&h->devlock, flags);
  850. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  851. sdev_id(sdev), sdev->lun);
  852. if (sd != NULL)
  853. sdev->hostdata = sd;
  854. spin_unlock_irqrestore(&h->devlock, flags);
  855. return 0;
  856. }
  857. static void hpsa_slave_destroy(struct scsi_device *sdev)
  858. {
  859. /* nothing to do. */
  860. }
  861. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  862. {
  863. int i;
  864. if (!h->cmd_sg_list)
  865. return;
  866. for (i = 0; i < h->nr_cmds; i++) {
  867. kfree(h->cmd_sg_list[i]);
  868. h->cmd_sg_list[i] = NULL;
  869. }
  870. kfree(h->cmd_sg_list);
  871. h->cmd_sg_list = NULL;
  872. }
  873. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  874. {
  875. int i;
  876. if (h->chainsize <= 0)
  877. return 0;
  878. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  879. GFP_KERNEL);
  880. if (!h->cmd_sg_list)
  881. return -ENOMEM;
  882. for (i = 0; i < h->nr_cmds; i++) {
  883. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  884. h->chainsize, GFP_KERNEL);
  885. if (!h->cmd_sg_list[i])
  886. goto clean;
  887. }
  888. return 0;
  889. clean:
  890. hpsa_free_sg_chain_blocks(h);
  891. return -ENOMEM;
  892. }
  893. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  894. struct CommandList *c)
  895. {
  896. struct SGDescriptor *chain_sg, *chain_block;
  897. u64 temp64;
  898. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  899. chain_block = h->cmd_sg_list[c->cmdindex];
  900. chain_sg->Ext = HPSA_SG_CHAIN;
  901. chain_sg->Len = sizeof(*chain_sg) *
  902. (c->Header.SGTotal - h->max_cmd_sg_entries);
  903. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  904. PCI_DMA_TODEVICE);
  905. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  906. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  907. }
  908. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  909. struct CommandList *c)
  910. {
  911. struct SGDescriptor *chain_sg;
  912. union u64bit temp64;
  913. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  914. return;
  915. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  916. temp64.val32.lower = chain_sg->Addr.lower;
  917. temp64.val32.upper = chain_sg->Addr.upper;
  918. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  919. }
  920. static void complete_scsi_command(struct CommandList *cp)
  921. {
  922. struct scsi_cmnd *cmd;
  923. struct ctlr_info *h;
  924. struct ErrorInfo *ei;
  925. unsigned char sense_key;
  926. unsigned char asc; /* additional sense code */
  927. unsigned char ascq; /* additional sense code qualifier */
  928. unsigned long sense_data_size;
  929. ei = cp->err_info;
  930. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  931. h = cp->h;
  932. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  933. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  934. hpsa_unmap_sg_chain_block(h, cp);
  935. cmd->result = (DID_OK << 16); /* host byte */
  936. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  937. cmd->result |= ei->ScsiStatus;
  938. /* copy the sense data whether we need to or not. */
  939. if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
  940. sense_data_size = SCSI_SENSE_BUFFERSIZE;
  941. else
  942. sense_data_size = sizeof(ei->SenseInfo);
  943. if (ei->SenseLen < sense_data_size)
  944. sense_data_size = ei->SenseLen;
  945. memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
  946. scsi_set_resid(cmd, ei->ResidualCnt);
  947. if (ei->CommandStatus == 0) {
  948. cmd->scsi_done(cmd);
  949. cmd_free(h, cp);
  950. return;
  951. }
  952. /* an error has occurred */
  953. switch (ei->CommandStatus) {
  954. case CMD_TARGET_STATUS:
  955. if (ei->ScsiStatus) {
  956. /* Get sense key */
  957. sense_key = 0xf & ei->SenseInfo[2];
  958. /* Get additional sense code */
  959. asc = ei->SenseInfo[12];
  960. /* Get addition sense code qualifier */
  961. ascq = ei->SenseInfo[13];
  962. }
  963. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  964. if (check_for_unit_attention(h, cp)) {
  965. cmd->result = DID_SOFT_ERROR << 16;
  966. break;
  967. }
  968. if (sense_key == ILLEGAL_REQUEST) {
  969. /*
  970. * SCSI REPORT_LUNS is commonly unsupported on
  971. * Smart Array. Suppress noisy complaint.
  972. */
  973. if (cp->Request.CDB[0] == REPORT_LUNS)
  974. break;
  975. /* If ASC/ASCQ indicate Logical Unit
  976. * Not Supported condition,
  977. */
  978. if ((asc == 0x25) && (ascq == 0x0)) {
  979. dev_warn(&h->pdev->dev, "cp %p "
  980. "has check condition\n", cp);
  981. break;
  982. }
  983. }
  984. if (sense_key == NOT_READY) {
  985. /* If Sense is Not Ready, Logical Unit
  986. * Not ready, Manual Intervention
  987. * required
  988. */
  989. if ((asc == 0x04) && (ascq == 0x03)) {
  990. dev_warn(&h->pdev->dev, "cp %p "
  991. "has check condition: unit "
  992. "not ready, manual "
  993. "intervention required\n", cp);
  994. break;
  995. }
  996. }
  997. if (sense_key == ABORTED_COMMAND) {
  998. /* Aborted command is retryable */
  999. dev_warn(&h->pdev->dev, "cp %p "
  1000. "has check condition: aborted command: "
  1001. "ASC: 0x%x, ASCQ: 0x%x\n",
  1002. cp, asc, ascq);
  1003. cmd->result = DID_SOFT_ERROR << 16;
  1004. break;
  1005. }
  1006. /* Must be some other type of check condition */
  1007. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  1008. "unknown type: "
  1009. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1010. "Returning result: 0x%x, "
  1011. "cmd=[%02x %02x %02x %02x %02x "
  1012. "%02x %02x %02x %02x %02x %02x "
  1013. "%02x %02x %02x %02x %02x]\n",
  1014. cp, sense_key, asc, ascq,
  1015. cmd->result,
  1016. cmd->cmnd[0], cmd->cmnd[1],
  1017. cmd->cmnd[2], cmd->cmnd[3],
  1018. cmd->cmnd[4], cmd->cmnd[5],
  1019. cmd->cmnd[6], cmd->cmnd[7],
  1020. cmd->cmnd[8], cmd->cmnd[9],
  1021. cmd->cmnd[10], cmd->cmnd[11],
  1022. cmd->cmnd[12], cmd->cmnd[13],
  1023. cmd->cmnd[14], cmd->cmnd[15]);
  1024. break;
  1025. }
  1026. /* Problem was not a check condition
  1027. * Pass it up to the upper layers...
  1028. */
  1029. if (ei->ScsiStatus) {
  1030. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  1031. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1032. "Returning result: 0x%x\n",
  1033. cp, ei->ScsiStatus,
  1034. sense_key, asc, ascq,
  1035. cmd->result);
  1036. } else { /* scsi status is zero??? How??? */
  1037. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  1038. "Returning no connection.\n", cp),
  1039. /* Ordinarily, this case should never happen,
  1040. * but there is a bug in some released firmware
  1041. * revisions that allows it to happen if, for
  1042. * example, a 4100 backplane loses power and
  1043. * the tape drive is in it. We assume that
  1044. * it's a fatal error of some kind because we
  1045. * can't show that it wasn't. We will make it
  1046. * look like selection timeout since that is
  1047. * the most common reason for this to occur,
  1048. * and it's severe enough.
  1049. */
  1050. cmd->result = DID_NO_CONNECT << 16;
  1051. }
  1052. break;
  1053. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1054. break;
  1055. case CMD_DATA_OVERRUN:
  1056. dev_warn(&h->pdev->dev, "cp %p has"
  1057. " completed with data overrun "
  1058. "reported\n", cp);
  1059. break;
  1060. case CMD_INVALID: {
  1061. /* print_bytes(cp, sizeof(*cp), 1, 0);
  1062. print_cmd(cp); */
  1063. /* We get CMD_INVALID if you address a non-existent device
  1064. * instead of a selection timeout (no response). You will
  1065. * see this if you yank out a drive, then try to access it.
  1066. * This is kind of a shame because it means that any other
  1067. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1068. * missing target. */
  1069. cmd->result = DID_NO_CONNECT << 16;
  1070. }
  1071. break;
  1072. case CMD_PROTOCOL_ERR:
  1073. dev_warn(&h->pdev->dev, "cp %p has "
  1074. "protocol error \n", cp);
  1075. break;
  1076. case CMD_HARDWARE_ERR:
  1077. cmd->result = DID_ERROR << 16;
  1078. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1079. break;
  1080. case CMD_CONNECTION_LOST:
  1081. cmd->result = DID_ERROR << 16;
  1082. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1083. break;
  1084. case CMD_ABORTED:
  1085. cmd->result = DID_ABORT << 16;
  1086. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1087. cp, ei->ScsiStatus);
  1088. break;
  1089. case CMD_ABORT_FAILED:
  1090. cmd->result = DID_ERROR << 16;
  1091. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1092. break;
  1093. case CMD_UNSOLICITED_ABORT:
  1094. cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
  1095. dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
  1096. "abort\n", cp);
  1097. break;
  1098. case CMD_TIMEOUT:
  1099. cmd->result = DID_TIME_OUT << 16;
  1100. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1101. break;
  1102. case CMD_UNABORTABLE:
  1103. cmd->result = DID_ERROR << 16;
  1104. dev_warn(&h->pdev->dev, "Command unabortable\n");
  1105. break;
  1106. default:
  1107. cmd->result = DID_ERROR << 16;
  1108. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1109. cp, ei->CommandStatus);
  1110. }
  1111. cmd->scsi_done(cmd);
  1112. cmd_free(h, cp);
  1113. }
  1114. static int hpsa_scsi_detect(struct ctlr_info *h)
  1115. {
  1116. struct Scsi_Host *sh;
  1117. int error;
  1118. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1119. if (sh == NULL)
  1120. goto fail;
  1121. sh->io_port = 0;
  1122. sh->n_io_port = 0;
  1123. sh->this_id = -1;
  1124. sh->max_channel = 3;
  1125. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1126. sh->max_lun = HPSA_MAX_LUN;
  1127. sh->max_id = HPSA_MAX_LUN;
  1128. sh->can_queue = h->nr_cmds;
  1129. sh->cmd_per_lun = h->nr_cmds;
  1130. sh->sg_tablesize = h->maxsgentries;
  1131. h->scsi_host = sh;
  1132. sh->hostdata[0] = (unsigned long) h;
  1133. sh->irq = h->intr[h->intr_mode];
  1134. sh->unique_id = sh->irq;
  1135. error = scsi_add_host(sh, &h->pdev->dev);
  1136. if (error)
  1137. goto fail_host_put;
  1138. scsi_scan_host(sh);
  1139. return 0;
  1140. fail_host_put:
  1141. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
  1142. " failed for controller %d\n", h->ctlr);
  1143. scsi_host_put(sh);
  1144. return error;
  1145. fail:
  1146. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
  1147. " failed for controller %d\n", h->ctlr);
  1148. return -ENOMEM;
  1149. }
  1150. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1151. struct CommandList *c, int sg_used, int data_direction)
  1152. {
  1153. int i;
  1154. union u64bit addr64;
  1155. for (i = 0; i < sg_used; i++) {
  1156. addr64.val32.lower = c->SG[i].Addr.lower;
  1157. addr64.val32.upper = c->SG[i].Addr.upper;
  1158. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1159. data_direction);
  1160. }
  1161. }
  1162. static void hpsa_map_one(struct pci_dev *pdev,
  1163. struct CommandList *cp,
  1164. unsigned char *buf,
  1165. size_t buflen,
  1166. int data_direction)
  1167. {
  1168. u64 addr64;
  1169. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1170. cp->Header.SGList = 0;
  1171. cp->Header.SGTotal = 0;
  1172. return;
  1173. }
  1174. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1175. cp->SG[0].Addr.lower =
  1176. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1177. cp->SG[0].Addr.upper =
  1178. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1179. cp->SG[0].Len = buflen;
  1180. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1181. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1182. }
  1183. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1184. struct CommandList *c)
  1185. {
  1186. DECLARE_COMPLETION_ONSTACK(wait);
  1187. c->waiting = &wait;
  1188. enqueue_cmd_and_start_io(h, c);
  1189. wait_for_completion(&wait);
  1190. }
  1191. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1192. struct CommandList *c, int data_direction)
  1193. {
  1194. int retry_count = 0;
  1195. do {
  1196. memset(c->err_info, 0, sizeof(*c->err_info));
  1197. hpsa_scsi_do_simple_cmd_core(h, c);
  1198. retry_count++;
  1199. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1200. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1201. }
  1202. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1203. {
  1204. struct ErrorInfo *ei;
  1205. struct device *d = &cp->h->pdev->dev;
  1206. ei = cp->err_info;
  1207. switch (ei->CommandStatus) {
  1208. case CMD_TARGET_STATUS:
  1209. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1210. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1211. ei->ScsiStatus);
  1212. if (ei->ScsiStatus == 0)
  1213. dev_warn(d, "SCSI status is abnormally zero. "
  1214. "(probably indicates selection timeout "
  1215. "reported incorrectly due to a known "
  1216. "firmware bug, circa July, 2001.)\n");
  1217. break;
  1218. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1219. dev_info(d, "UNDERRUN\n");
  1220. break;
  1221. case CMD_DATA_OVERRUN:
  1222. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1223. break;
  1224. case CMD_INVALID: {
  1225. /* controller unfortunately reports SCSI passthru's
  1226. * to non-existent targets as invalid commands.
  1227. */
  1228. dev_warn(d, "cp %p is reported invalid (probably means "
  1229. "target device no longer present)\n", cp);
  1230. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1231. print_cmd(cp); */
  1232. }
  1233. break;
  1234. case CMD_PROTOCOL_ERR:
  1235. dev_warn(d, "cp %p has protocol error \n", cp);
  1236. break;
  1237. case CMD_HARDWARE_ERR:
  1238. /* cmd->result = DID_ERROR << 16; */
  1239. dev_warn(d, "cp %p had hardware error\n", cp);
  1240. break;
  1241. case CMD_CONNECTION_LOST:
  1242. dev_warn(d, "cp %p had connection lost\n", cp);
  1243. break;
  1244. case CMD_ABORTED:
  1245. dev_warn(d, "cp %p was aborted\n", cp);
  1246. break;
  1247. case CMD_ABORT_FAILED:
  1248. dev_warn(d, "cp %p reports abort failed\n", cp);
  1249. break;
  1250. case CMD_UNSOLICITED_ABORT:
  1251. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1252. break;
  1253. case CMD_TIMEOUT:
  1254. dev_warn(d, "cp %p timed out\n", cp);
  1255. break;
  1256. case CMD_UNABORTABLE:
  1257. dev_warn(d, "Command unabortable\n");
  1258. break;
  1259. default:
  1260. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1261. ei->CommandStatus);
  1262. }
  1263. }
  1264. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1265. unsigned char page, unsigned char *buf,
  1266. unsigned char bufsize)
  1267. {
  1268. int rc = IO_OK;
  1269. struct CommandList *c;
  1270. struct ErrorInfo *ei;
  1271. c = cmd_special_alloc(h);
  1272. if (c == NULL) { /* trouble... */
  1273. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1274. return -ENOMEM;
  1275. }
  1276. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1277. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1278. ei = c->err_info;
  1279. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1280. hpsa_scsi_interpret_error(c);
  1281. rc = -1;
  1282. }
  1283. cmd_special_free(h, c);
  1284. return rc;
  1285. }
  1286. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1287. {
  1288. int rc = IO_OK;
  1289. struct CommandList *c;
  1290. struct ErrorInfo *ei;
  1291. c = cmd_special_alloc(h);
  1292. if (c == NULL) { /* trouble... */
  1293. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1294. return -ENOMEM;
  1295. }
  1296. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1297. hpsa_scsi_do_simple_cmd_core(h, c);
  1298. /* no unmap needed here because no data xfer. */
  1299. ei = c->err_info;
  1300. if (ei->CommandStatus != 0) {
  1301. hpsa_scsi_interpret_error(c);
  1302. rc = -1;
  1303. }
  1304. cmd_special_free(h, c);
  1305. return rc;
  1306. }
  1307. static void hpsa_get_raid_level(struct ctlr_info *h,
  1308. unsigned char *scsi3addr, unsigned char *raid_level)
  1309. {
  1310. int rc;
  1311. unsigned char *buf;
  1312. *raid_level = RAID_UNKNOWN;
  1313. buf = kzalloc(64, GFP_KERNEL);
  1314. if (!buf)
  1315. return;
  1316. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1317. if (rc == 0)
  1318. *raid_level = buf[8];
  1319. if (*raid_level > RAID_UNKNOWN)
  1320. *raid_level = RAID_UNKNOWN;
  1321. kfree(buf);
  1322. return;
  1323. }
  1324. /* Get the device id from inquiry page 0x83 */
  1325. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1326. unsigned char *device_id, int buflen)
  1327. {
  1328. int rc;
  1329. unsigned char *buf;
  1330. if (buflen > 16)
  1331. buflen = 16;
  1332. buf = kzalloc(64, GFP_KERNEL);
  1333. if (!buf)
  1334. return -1;
  1335. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1336. if (rc == 0)
  1337. memcpy(device_id, &buf[8], buflen);
  1338. kfree(buf);
  1339. return rc != 0;
  1340. }
  1341. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1342. struct ReportLUNdata *buf, int bufsize,
  1343. int extended_response)
  1344. {
  1345. int rc = IO_OK;
  1346. struct CommandList *c;
  1347. unsigned char scsi3addr[8];
  1348. struct ErrorInfo *ei;
  1349. c = cmd_special_alloc(h);
  1350. if (c == NULL) { /* trouble... */
  1351. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1352. return -1;
  1353. }
  1354. /* address the controller */
  1355. memset(scsi3addr, 0, sizeof(scsi3addr));
  1356. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1357. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1358. if (extended_response)
  1359. c->Request.CDB[1] = extended_response;
  1360. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1361. ei = c->err_info;
  1362. if (ei->CommandStatus != 0 &&
  1363. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1364. hpsa_scsi_interpret_error(c);
  1365. rc = -1;
  1366. }
  1367. cmd_special_free(h, c);
  1368. return rc;
  1369. }
  1370. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1371. struct ReportLUNdata *buf,
  1372. int bufsize, int extended_response)
  1373. {
  1374. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1375. }
  1376. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1377. struct ReportLUNdata *buf, int bufsize)
  1378. {
  1379. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1380. }
  1381. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1382. int bus, int target, int lun)
  1383. {
  1384. device->bus = bus;
  1385. device->target = target;
  1386. device->lun = lun;
  1387. }
  1388. static int hpsa_update_device_info(struct ctlr_info *h,
  1389. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
  1390. {
  1391. #define OBDR_TAPE_INQ_SIZE 49
  1392. unsigned char *inq_buff;
  1393. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1394. if (!inq_buff)
  1395. goto bail_out;
  1396. /* Do an inquiry to the device to see what it is. */
  1397. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1398. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1399. /* Inquiry failed (msg printed already) */
  1400. dev_err(&h->pdev->dev,
  1401. "hpsa_update_device_info: inquiry failed\n");
  1402. goto bail_out;
  1403. }
  1404. this_device->devtype = (inq_buff[0] & 0x1f);
  1405. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1406. memcpy(this_device->vendor, &inq_buff[8],
  1407. sizeof(this_device->vendor));
  1408. memcpy(this_device->model, &inq_buff[16],
  1409. sizeof(this_device->model));
  1410. memset(this_device->device_id, 0,
  1411. sizeof(this_device->device_id));
  1412. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1413. sizeof(this_device->device_id));
  1414. if (this_device->devtype == TYPE_DISK &&
  1415. is_logical_dev_addr_mode(scsi3addr))
  1416. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1417. else
  1418. this_device->raid_level = RAID_UNKNOWN;
  1419. kfree(inq_buff);
  1420. return 0;
  1421. bail_out:
  1422. kfree(inq_buff);
  1423. return 1;
  1424. }
  1425. static unsigned char *msa2xxx_model[] = {
  1426. "MSA2012",
  1427. "MSA2024",
  1428. "MSA2312",
  1429. "MSA2324",
  1430. "P2000 G3 SAS",
  1431. NULL,
  1432. };
  1433. static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1434. {
  1435. int i;
  1436. for (i = 0; msa2xxx_model[i]; i++)
  1437. if (strncmp(device->model, msa2xxx_model[i],
  1438. strlen(msa2xxx_model[i])) == 0)
  1439. return 1;
  1440. return 0;
  1441. }
  1442. /* Helper function to assign bus, target, lun mapping of devices.
  1443. * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
  1444. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1445. * Logical drive target and lun are assigned at this time, but
  1446. * physical device lun and target assignment are deferred (assigned
  1447. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1448. */
  1449. static void figure_bus_target_lun(struct ctlr_info *h,
  1450. u8 *lunaddrbytes, int *bus, int *target, int *lun,
  1451. struct hpsa_scsi_dev_t *device)
  1452. {
  1453. u32 lunid;
  1454. if (is_logical_dev_addr_mode(lunaddrbytes)) {
  1455. /* logical device */
  1456. if (unlikely(is_scsi_rev_5(h))) {
  1457. /* p1210m, logical drives lun assignments
  1458. * match SCSI REPORT LUNS data.
  1459. */
  1460. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1461. *bus = 0;
  1462. *target = 0;
  1463. *lun = (lunid & 0x3fff) + 1;
  1464. } else {
  1465. /* not p1210m... */
  1466. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1467. if (is_msa2xxx(h, device)) {
  1468. /* msa2xxx way, put logicals on bus 1
  1469. * and match target/lun numbers box
  1470. * reports.
  1471. */
  1472. *bus = 1;
  1473. *target = (lunid >> 16) & 0x3fff;
  1474. *lun = lunid & 0x00ff;
  1475. } else {
  1476. /* Traditional smart array way. */
  1477. *bus = 0;
  1478. *lun = 0;
  1479. *target = lunid & 0x3fff;
  1480. }
  1481. }
  1482. } else {
  1483. /* physical device */
  1484. if (is_hba_lunid(lunaddrbytes))
  1485. if (unlikely(is_scsi_rev_5(h))) {
  1486. *bus = 0; /* put p1210m ctlr at 0,0,0 */
  1487. *target = 0;
  1488. *lun = 0;
  1489. return;
  1490. } else
  1491. *bus = 3; /* traditional smartarray */
  1492. else
  1493. *bus = 2; /* physical disk */
  1494. *target = -1;
  1495. *lun = -1; /* we will fill these in later. */
  1496. }
  1497. }
  1498. /*
  1499. * If there is no lun 0 on a target, linux won't find any devices.
  1500. * For the MSA2xxx boxes, we have to manually detect the enclosure
  1501. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1502. * it for some reason. *tmpdevice is the target we're adding,
  1503. * this_device is a pointer into the current element of currentsd[]
  1504. * that we're building up in update_scsi_devices(), below.
  1505. * lunzerobits is a bitmap that tracks which targets already have a
  1506. * lun 0 assigned.
  1507. * Returns 1 if an enclosure was added, 0 if not.
  1508. */
  1509. static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
  1510. struct hpsa_scsi_dev_t *tmpdevice,
  1511. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1512. int bus, int target, int lun, unsigned long lunzerobits[],
  1513. int *nmsa2xxx_enclosures)
  1514. {
  1515. unsigned char scsi3addr[8];
  1516. if (test_bit(target, lunzerobits))
  1517. return 0; /* There is already a lun 0 on this target. */
  1518. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1519. return 0; /* It's the logical targets that may lack lun 0. */
  1520. if (!is_msa2xxx(h, tmpdevice))
  1521. return 0; /* It's only the MSA2xxx that have this problem. */
  1522. if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
  1523. return 0;
  1524. memset(scsi3addr, 0, 8);
  1525. scsi3addr[3] = target;
  1526. if (is_hba_lunid(scsi3addr))
  1527. return 0; /* Don't add the RAID controller here. */
  1528. if (is_scsi_rev_5(h))
  1529. return 0; /* p1210m doesn't need to do this. */
  1530. #define MAX_MSA2XXX_ENCLOSURES 32
  1531. if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
  1532. dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
  1533. "enclosures exceeded. Check your hardware "
  1534. "configuration.");
  1535. return 0;
  1536. }
  1537. if (hpsa_update_device_info(h, scsi3addr, this_device))
  1538. return 0;
  1539. (*nmsa2xxx_enclosures)++;
  1540. hpsa_set_bus_target_lun(this_device, bus, target, 0);
  1541. set_bit(target, lunzerobits);
  1542. return 1;
  1543. }
  1544. /*
  1545. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1546. * logdev. The number of luns in physdev and logdev are returned in
  1547. * *nphysicals and *nlogicals, respectively.
  1548. * Returns 0 on success, -1 otherwise.
  1549. */
  1550. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1551. int reportlunsize,
  1552. struct ReportLUNdata *physdev, u32 *nphysicals,
  1553. struct ReportLUNdata *logdev, u32 *nlogicals)
  1554. {
  1555. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1556. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1557. return -1;
  1558. }
  1559. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1560. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1561. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1562. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1563. *nphysicals - HPSA_MAX_PHYS_LUN);
  1564. *nphysicals = HPSA_MAX_PHYS_LUN;
  1565. }
  1566. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1567. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1568. return -1;
  1569. }
  1570. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1571. /* Reject Logicals in excess of our max capability. */
  1572. if (*nlogicals > HPSA_MAX_LUN) {
  1573. dev_warn(&h->pdev->dev,
  1574. "maximum logical LUNs (%d) exceeded. "
  1575. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1576. *nlogicals - HPSA_MAX_LUN);
  1577. *nlogicals = HPSA_MAX_LUN;
  1578. }
  1579. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1580. dev_warn(&h->pdev->dev,
  1581. "maximum logical + physical LUNs (%d) exceeded. "
  1582. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1583. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1584. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1585. }
  1586. return 0;
  1587. }
  1588. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1589. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1590. struct ReportLUNdata *logdev_list)
  1591. {
  1592. /* Helper function, figure out where the LUN ID info is coming from
  1593. * given index i, lists of physical and logical devices, where in
  1594. * the list the raid controller is supposed to appear (first or last)
  1595. */
  1596. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1597. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1598. if (i == raid_ctlr_position)
  1599. return RAID_CTLR_LUNID;
  1600. if (i < logicals_start)
  1601. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1602. if (i < last_device)
  1603. return &logdev_list->LUN[i - nphysicals -
  1604. (raid_ctlr_position == 0)][0];
  1605. BUG();
  1606. return NULL;
  1607. }
  1608. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1609. {
  1610. /* the idea here is we could get notified
  1611. * that some devices have changed, so we do a report
  1612. * physical luns and report logical luns cmd, and adjust
  1613. * our list of devices accordingly.
  1614. *
  1615. * The scsi3addr's of devices won't change so long as the
  1616. * adapter is not reset. That means we can rescan and
  1617. * tell which devices we already know about, vs. new
  1618. * devices, vs. disappearing devices.
  1619. */
  1620. struct ReportLUNdata *physdev_list = NULL;
  1621. struct ReportLUNdata *logdev_list = NULL;
  1622. unsigned char *inq_buff = NULL;
  1623. u32 nphysicals = 0;
  1624. u32 nlogicals = 0;
  1625. u32 ndev_allocated = 0;
  1626. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1627. int ncurrent = 0;
  1628. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1629. int i, nmsa2xxx_enclosures, ndevs_to_allocate;
  1630. int bus, target, lun;
  1631. int raid_ctlr_position;
  1632. DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
  1633. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  1634. GFP_KERNEL);
  1635. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1636. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1637. inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1638. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1639. if (!currentsd || !physdev_list || !logdev_list ||
  1640. !inq_buff || !tmpdevice) {
  1641. dev_err(&h->pdev->dev, "out of memory\n");
  1642. goto out;
  1643. }
  1644. memset(lunzerobits, 0, sizeof(lunzerobits));
  1645. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1646. logdev_list, &nlogicals))
  1647. goto out;
  1648. /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
  1649. * but each of them 4 times through different paths. The plus 1
  1650. * is for the RAID controller.
  1651. */
  1652. ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
  1653. /* Allocate the per device structures */
  1654. for (i = 0; i < ndevs_to_allocate; i++) {
  1655. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1656. if (!currentsd[i]) {
  1657. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1658. __FILE__, __LINE__);
  1659. goto out;
  1660. }
  1661. ndev_allocated++;
  1662. }
  1663. if (unlikely(is_scsi_rev_5(h)))
  1664. raid_ctlr_position = 0;
  1665. else
  1666. raid_ctlr_position = nphysicals + nlogicals;
  1667. /* adjust our table of devices */
  1668. nmsa2xxx_enclosures = 0;
  1669. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1670. u8 *lunaddrbytes;
  1671. /* Figure out where the LUN ID info is coming from */
  1672. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1673. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1674. /* skip masked physical devices. */
  1675. if (lunaddrbytes[3] & 0xC0 &&
  1676. i < nphysicals + (raid_ctlr_position == 0))
  1677. continue;
  1678. /* Get device type, vendor, model, device id */
  1679. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
  1680. continue; /* skip it if we can't talk to it. */
  1681. figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
  1682. tmpdevice);
  1683. this_device = currentsd[ncurrent];
  1684. /*
  1685. * For the msa2xxx boxes, we have to insert a LUN 0 which
  1686. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1687. * is nonetheless an enclosure device there. We have to
  1688. * present that otherwise linux won't find anything if
  1689. * there is no lun 0.
  1690. */
  1691. if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
  1692. lunaddrbytes, bus, target, lun, lunzerobits,
  1693. &nmsa2xxx_enclosures)) {
  1694. ncurrent++;
  1695. this_device = currentsd[ncurrent];
  1696. }
  1697. *this_device = *tmpdevice;
  1698. hpsa_set_bus_target_lun(this_device, bus, target, lun);
  1699. switch (this_device->devtype) {
  1700. case TYPE_ROM: {
  1701. /* We don't *really* support actual CD-ROM devices,
  1702. * just "One Button Disaster Recovery" tape drive
  1703. * which temporarily pretends to be a CD-ROM drive.
  1704. * So we check that the device is really an OBDR tape
  1705. * device by checking for "$DR-10" in bytes 43-48 of
  1706. * the inquiry data.
  1707. */
  1708. char obdr_sig[7];
  1709. #define OBDR_TAPE_SIG "$DR-10"
  1710. strncpy(obdr_sig, &inq_buff[43], 6);
  1711. obdr_sig[6] = '\0';
  1712. if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
  1713. /* Not OBDR device, ignore it. */
  1714. break;
  1715. }
  1716. ncurrent++;
  1717. break;
  1718. case TYPE_DISK:
  1719. if (i < nphysicals)
  1720. break;
  1721. ncurrent++;
  1722. break;
  1723. case TYPE_TAPE:
  1724. case TYPE_MEDIUM_CHANGER:
  1725. ncurrent++;
  1726. break;
  1727. case TYPE_RAID:
  1728. /* Only present the Smartarray HBA as a RAID controller.
  1729. * If it's a RAID controller other than the HBA itself
  1730. * (an external RAID controller, MSA500 or similar)
  1731. * don't present it.
  1732. */
  1733. if (!is_hba_lunid(lunaddrbytes))
  1734. break;
  1735. ncurrent++;
  1736. break;
  1737. default:
  1738. break;
  1739. }
  1740. if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
  1741. break;
  1742. }
  1743. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1744. out:
  1745. kfree(tmpdevice);
  1746. for (i = 0; i < ndev_allocated; i++)
  1747. kfree(currentsd[i]);
  1748. kfree(currentsd);
  1749. kfree(inq_buff);
  1750. kfree(physdev_list);
  1751. kfree(logdev_list);
  1752. }
  1753. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1754. * dma mapping and fills in the scatter gather entries of the
  1755. * hpsa command, cp.
  1756. */
  1757. static int hpsa_scatter_gather(struct ctlr_info *h,
  1758. struct CommandList *cp,
  1759. struct scsi_cmnd *cmd)
  1760. {
  1761. unsigned int len;
  1762. struct scatterlist *sg;
  1763. u64 addr64;
  1764. int use_sg, i, sg_index, chained;
  1765. struct SGDescriptor *curr_sg;
  1766. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1767. use_sg = scsi_dma_map(cmd);
  1768. if (use_sg < 0)
  1769. return use_sg;
  1770. if (!use_sg)
  1771. goto sglist_finished;
  1772. curr_sg = cp->SG;
  1773. chained = 0;
  1774. sg_index = 0;
  1775. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1776. if (i == h->max_cmd_sg_entries - 1 &&
  1777. use_sg > h->max_cmd_sg_entries) {
  1778. chained = 1;
  1779. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1780. sg_index = 0;
  1781. }
  1782. addr64 = (u64) sg_dma_address(sg);
  1783. len = sg_dma_len(sg);
  1784. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1785. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1786. curr_sg->Len = len;
  1787. curr_sg->Ext = 0; /* we are not chaining */
  1788. curr_sg++;
  1789. }
  1790. if (use_sg + chained > h->maxSG)
  1791. h->maxSG = use_sg + chained;
  1792. if (chained) {
  1793. cp->Header.SGList = h->max_cmd_sg_entries;
  1794. cp->Header.SGTotal = (u16) (use_sg + 1);
  1795. hpsa_map_sg_chain_block(h, cp);
  1796. return 0;
  1797. }
  1798. sglist_finished:
  1799. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1800. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1801. return 0;
  1802. }
  1803. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1804. void (*done)(struct scsi_cmnd *))
  1805. {
  1806. struct ctlr_info *h;
  1807. struct hpsa_scsi_dev_t *dev;
  1808. unsigned char scsi3addr[8];
  1809. struct CommandList *c;
  1810. unsigned long flags;
  1811. /* Get the ptr to our adapter structure out of cmd->host. */
  1812. h = sdev_to_hba(cmd->device);
  1813. dev = cmd->device->hostdata;
  1814. if (!dev) {
  1815. cmd->result = DID_NO_CONNECT << 16;
  1816. done(cmd);
  1817. return 0;
  1818. }
  1819. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1820. /* Need a lock as this is being allocated from the pool */
  1821. spin_lock_irqsave(&h->lock, flags);
  1822. c = cmd_alloc(h);
  1823. spin_unlock_irqrestore(&h->lock, flags);
  1824. if (c == NULL) { /* trouble... */
  1825. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1826. return SCSI_MLQUEUE_HOST_BUSY;
  1827. }
  1828. /* Fill in the command list header */
  1829. cmd->scsi_done = done; /* save this for use by completion code */
  1830. /* save c in case we have to abort it */
  1831. cmd->host_scribble = (unsigned char *) c;
  1832. c->cmd_type = CMD_SCSI;
  1833. c->scsi_cmd = cmd;
  1834. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1835. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1836. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1837. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1838. /* Fill in the request block... */
  1839. c->Request.Timeout = 0;
  1840. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1841. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1842. c->Request.CDBLen = cmd->cmd_len;
  1843. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1844. c->Request.Type.Type = TYPE_CMD;
  1845. c->Request.Type.Attribute = ATTR_SIMPLE;
  1846. switch (cmd->sc_data_direction) {
  1847. case DMA_TO_DEVICE:
  1848. c->Request.Type.Direction = XFER_WRITE;
  1849. break;
  1850. case DMA_FROM_DEVICE:
  1851. c->Request.Type.Direction = XFER_READ;
  1852. break;
  1853. case DMA_NONE:
  1854. c->Request.Type.Direction = XFER_NONE;
  1855. break;
  1856. case DMA_BIDIRECTIONAL:
  1857. /* This can happen if a buggy application does a scsi passthru
  1858. * and sets both inlen and outlen to non-zero. ( see
  1859. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1860. */
  1861. c->Request.Type.Direction = XFER_RSVD;
  1862. /* This is technically wrong, and hpsa controllers should
  1863. * reject it with CMD_INVALID, which is the most correct
  1864. * response, but non-fibre backends appear to let it
  1865. * slide by, and give the same results as if this field
  1866. * were set correctly. Either way is acceptable for
  1867. * our purposes here.
  1868. */
  1869. break;
  1870. default:
  1871. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1872. cmd->sc_data_direction);
  1873. BUG();
  1874. break;
  1875. }
  1876. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1877. cmd_free(h, c);
  1878. return SCSI_MLQUEUE_HOST_BUSY;
  1879. }
  1880. enqueue_cmd_and_start_io(h, c);
  1881. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1882. return 0;
  1883. }
  1884. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1885. static void hpsa_scan_start(struct Scsi_Host *sh)
  1886. {
  1887. struct ctlr_info *h = shost_to_hba(sh);
  1888. unsigned long flags;
  1889. /* wait until any scan already in progress is finished. */
  1890. while (1) {
  1891. spin_lock_irqsave(&h->scan_lock, flags);
  1892. if (h->scan_finished)
  1893. break;
  1894. spin_unlock_irqrestore(&h->scan_lock, flags);
  1895. wait_event(h->scan_wait_queue, h->scan_finished);
  1896. /* Note: We don't need to worry about a race between this
  1897. * thread and driver unload because the midlayer will
  1898. * have incremented the reference count, so unload won't
  1899. * happen if we're in here.
  1900. */
  1901. }
  1902. h->scan_finished = 0; /* mark scan as in progress */
  1903. spin_unlock_irqrestore(&h->scan_lock, flags);
  1904. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1905. spin_lock_irqsave(&h->scan_lock, flags);
  1906. h->scan_finished = 1; /* mark scan as finished. */
  1907. wake_up_all(&h->scan_wait_queue);
  1908. spin_unlock_irqrestore(&h->scan_lock, flags);
  1909. }
  1910. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1911. unsigned long elapsed_time)
  1912. {
  1913. struct ctlr_info *h = shost_to_hba(sh);
  1914. unsigned long flags;
  1915. int finished;
  1916. spin_lock_irqsave(&h->scan_lock, flags);
  1917. finished = h->scan_finished;
  1918. spin_unlock_irqrestore(&h->scan_lock, flags);
  1919. return finished;
  1920. }
  1921. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1922. int qdepth, int reason)
  1923. {
  1924. struct ctlr_info *h = sdev_to_hba(sdev);
  1925. if (reason != SCSI_QDEPTH_DEFAULT)
  1926. return -ENOTSUPP;
  1927. if (qdepth < 1)
  1928. qdepth = 1;
  1929. else
  1930. if (qdepth > h->nr_cmds)
  1931. qdepth = h->nr_cmds;
  1932. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1933. return sdev->queue_depth;
  1934. }
  1935. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1936. {
  1937. /* we are being forcibly unloaded, and may not refuse. */
  1938. scsi_remove_host(h->scsi_host);
  1939. scsi_host_put(h->scsi_host);
  1940. h->scsi_host = NULL;
  1941. }
  1942. static int hpsa_register_scsi(struct ctlr_info *h)
  1943. {
  1944. int rc;
  1945. rc = hpsa_scsi_detect(h);
  1946. if (rc != 0)
  1947. dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
  1948. " hpsa_scsi_detect(), rc is %d\n", rc);
  1949. return rc;
  1950. }
  1951. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  1952. unsigned char lunaddr[])
  1953. {
  1954. int rc = 0;
  1955. int count = 0;
  1956. int waittime = 1; /* seconds */
  1957. struct CommandList *c;
  1958. c = cmd_special_alloc(h);
  1959. if (!c) {
  1960. dev_warn(&h->pdev->dev, "out of memory in "
  1961. "wait_for_device_to_become_ready.\n");
  1962. return IO_ERROR;
  1963. }
  1964. /* Send test unit ready until device ready, or give up. */
  1965. while (count < HPSA_TUR_RETRY_LIMIT) {
  1966. /* Wait for a bit. do this first, because if we send
  1967. * the TUR right away, the reset will just abort it.
  1968. */
  1969. msleep(1000 * waittime);
  1970. count++;
  1971. /* Increase wait time with each try, up to a point. */
  1972. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  1973. waittime = waittime * 2;
  1974. /* Send the Test Unit Ready */
  1975. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  1976. hpsa_scsi_do_simple_cmd_core(h, c);
  1977. /* no unmap needed here because no data xfer. */
  1978. if (c->err_info->CommandStatus == CMD_SUCCESS)
  1979. break;
  1980. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1981. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  1982. (c->err_info->SenseInfo[2] == NO_SENSE ||
  1983. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  1984. break;
  1985. dev_warn(&h->pdev->dev, "waiting %d secs "
  1986. "for device to become ready.\n", waittime);
  1987. rc = 1; /* device not ready. */
  1988. }
  1989. if (rc)
  1990. dev_warn(&h->pdev->dev, "giving up on device.\n");
  1991. else
  1992. dev_warn(&h->pdev->dev, "device is ready.\n");
  1993. cmd_special_free(h, c);
  1994. return rc;
  1995. }
  1996. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  1997. * complaining. Doing a host- or bus-reset can't do anything good here.
  1998. */
  1999. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  2000. {
  2001. int rc;
  2002. struct ctlr_info *h;
  2003. struct hpsa_scsi_dev_t *dev;
  2004. /* find the controller to which the command to be aborted was sent */
  2005. h = sdev_to_hba(scsicmd->device);
  2006. if (h == NULL) /* paranoia */
  2007. return FAILED;
  2008. dev = scsicmd->device->hostdata;
  2009. if (!dev) {
  2010. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  2011. "device lookup failed.\n");
  2012. return FAILED;
  2013. }
  2014. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  2015. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2016. /* send a reset to the SCSI LUN which the command was sent to */
  2017. rc = hpsa_send_reset(h, dev->scsi3addr);
  2018. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  2019. return SUCCESS;
  2020. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  2021. return FAILED;
  2022. }
  2023. /*
  2024. * For operations that cannot sleep, a command block is allocated at init,
  2025. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  2026. * which ones are free or in use. Lock must be held when calling this.
  2027. * cmd_free() is the complement.
  2028. */
  2029. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  2030. {
  2031. struct CommandList *c;
  2032. int i;
  2033. union u64bit temp64;
  2034. dma_addr_t cmd_dma_handle, err_dma_handle;
  2035. do {
  2036. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  2037. if (i == h->nr_cmds)
  2038. return NULL;
  2039. } while (test_and_set_bit
  2040. (i & (BITS_PER_LONG - 1),
  2041. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  2042. c = h->cmd_pool + i;
  2043. memset(c, 0, sizeof(*c));
  2044. cmd_dma_handle = h->cmd_pool_dhandle
  2045. + i * sizeof(*c);
  2046. c->err_info = h->errinfo_pool + i;
  2047. memset(c->err_info, 0, sizeof(*c->err_info));
  2048. err_dma_handle = h->errinfo_pool_dhandle
  2049. + i * sizeof(*c->err_info);
  2050. h->nr_allocs++;
  2051. c->cmdindex = i;
  2052. INIT_LIST_HEAD(&c->list);
  2053. c->busaddr = (u32) cmd_dma_handle;
  2054. temp64.val = (u64) err_dma_handle;
  2055. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2056. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2057. c->ErrDesc.Len = sizeof(*c->err_info);
  2058. c->h = h;
  2059. return c;
  2060. }
  2061. /* For operations that can wait for kmalloc to possibly sleep,
  2062. * this routine can be called. Lock need not be held to call
  2063. * cmd_special_alloc. cmd_special_free() is the complement.
  2064. */
  2065. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  2066. {
  2067. struct CommandList *c;
  2068. union u64bit temp64;
  2069. dma_addr_t cmd_dma_handle, err_dma_handle;
  2070. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  2071. if (c == NULL)
  2072. return NULL;
  2073. memset(c, 0, sizeof(*c));
  2074. c->cmdindex = -1;
  2075. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2076. &err_dma_handle);
  2077. if (c->err_info == NULL) {
  2078. pci_free_consistent(h->pdev,
  2079. sizeof(*c), c, cmd_dma_handle);
  2080. return NULL;
  2081. }
  2082. memset(c->err_info, 0, sizeof(*c->err_info));
  2083. INIT_LIST_HEAD(&c->list);
  2084. c->busaddr = (u32) cmd_dma_handle;
  2085. temp64.val = (u64) err_dma_handle;
  2086. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2087. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2088. c->ErrDesc.Len = sizeof(*c->err_info);
  2089. c->h = h;
  2090. return c;
  2091. }
  2092. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2093. {
  2094. int i;
  2095. i = c - h->cmd_pool;
  2096. clear_bit(i & (BITS_PER_LONG - 1),
  2097. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2098. h->nr_frees++;
  2099. }
  2100. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2101. {
  2102. union u64bit temp64;
  2103. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2104. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2105. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2106. c->err_info, (dma_addr_t) temp64.val);
  2107. pci_free_consistent(h->pdev, sizeof(*c),
  2108. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2109. }
  2110. #ifdef CONFIG_COMPAT
  2111. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2112. {
  2113. IOCTL32_Command_struct __user *arg32 =
  2114. (IOCTL32_Command_struct __user *) arg;
  2115. IOCTL_Command_struct arg64;
  2116. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2117. int err;
  2118. u32 cp;
  2119. memset(&arg64, 0, sizeof(arg64));
  2120. err = 0;
  2121. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2122. sizeof(arg64.LUN_info));
  2123. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2124. sizeof(arg64.Request));
  2125. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2126. sizeof(arg64.error_info));
  2127. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2128. err |= get_user(cp, &arg32->buf);
  2129. arg64.buf = compat_ptr(cp);
  2130. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2131. if (err)
  2132. return -EFAULT;
  2133. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2134. if (err)
  2135. return err;
  2136. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2137. sizeof(arg32->error_info));
  2138. if (err)
  2139. return -EFAULT;
  2140. return err;
  2141. }
  2142. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2143. int cmd, void *arg)
  2144. {
  2145. BIG_IOCTL32_Command_struct __user *arg32 =
  2146. (BIG_IOCTL32_Command_struct __user *) arg;
  2147. BIG_IOCTL_Command_struct arg64;
  2148. BIG_IOCTL_Command_struct __user *p =
  2149. compat_alloc_user_space(sizeof(arg64));
  2150. int err;
  2151. u32 cp;
  2152. memset(&arg64, 0, sizeof(arg64));
  2153. err = 0;
  2154. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2155. sizeof(arg64.LUN_info));
  2156. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2157. sizeof(arg64.Request));
  2158. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2159. sizeof(arg64.error_info));
  2160. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2161. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2162. err |= get_user(cp, &arg32->buf);
  2163. arg64.buf = compat_ptr(cp);
  2164. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2165. if (err)
  2166. return -EFAULT;
  2167. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2168. if (err)
  2169. return err;
  2170. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2171. sizeof(arg32->error_info));
  2172. if (err)
  2173. return -EFAULT;
  2174. return err;
  2175. }
  2176. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2177. {
  2178. switch (cmd) {
  2179. case CCISS_GETPCIINFO:
  2180. case CCISS_GETINTINFO:
  2181. case CCISS_SETINTINFO:
  2182. case CCISS_GETNODENAME:
  2183. case CCISS_SETNODENAME:
  2184. case CCISS_GETHEARTBEAT:
  2185. case CCISS_GETBUSTYPES:
  2186. case CCISS_GETFIRMVER:
  2187. case CCISS_GETDRIVVER:
  2188. case CCISS_REVALIDVOLS:
  2189. case CCISS_DEREGDISK:
  2190. case CCISS_REGNEWDISK:
  2191. case CCISS_REGNEWD:
  2192. case CCISS_RESCANDISK:
  2193. case CCISS_GETLUNINFO:
  2194. return hpsa_ioctl(dev, cmd, arg);
  2195. case CCISS_PASSTHRU32:
  2196. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2197. case CCISS_BIG_PASSTHRU32:
  2198. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2199. default:
  2200. return -ENOIOCTLCMD;
  2201. }
  2202. }
  2203. #endif
  2204. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2205. {
  2206. struct hpsa_pci_info pciinfo;
  2207. if (!argp)
  2208. return -EINVAL;
  2209. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2210. pciinfo.bus = h->pdev->bus->number;
  2211. pciinfo.dev_fn = h->pdev->devfn;
  2212. pciinfo.board_id = h->board_id;
  2213. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2214. return -EFAULT;
  2215. return 0;
  2216. }
  2217. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2218. {
  2219. DriverVer_type DriverVer;
  2220. unsigned char vmaj, vmin, vsubmin;
  2221. int rc;
  2222. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2223. &vmaj, &vmin, &vsubmin);
  2224. if (rc != 3) {
  2225. dev_info(&h->pdev->dev, "driver version string '%s' "
  2226. "unrecognized.", HPSA_DRIVER_VERSION);
  2227. vmaj = 0;
  2228. vmin = 0;
  2229. vsubmin = 0;
  2230. }
  2231. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2232. if (!argp)
  2233. return -EINVAL;
  2234. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2235. return -EFAULT;
  2236. return 0;
  2237. }
  2238. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2239. {
  2240. IOCTL_Command_struct iocommand;
  2241. struct CommandList *c;
  2242. char *buff = NULL;
  2243. union u64bit temp64;
  2244. if (!argp)
  2245. return -EINVAL;
  2246. if (!capable(CAP_SYS_RAWIO))
  2247. return -EPERM;
  2248. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2249. return -EFAULT;
  2250. if ((iocommand.buf_size < 1) &&
  2251. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2252. return -EINVAL;
  2253. }
  2254. if (iocommand.buf_size > 0) {
  2255. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2256. if (buff == NULL)
  2257. return -EFAULT;
  2258. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2259. /* Copy the data into the buffer we created */
  2260. if (copy_from_user(buff, iocommand.buf,
  2261. iocommand.buf_size)) {
  2262. kfree(buff);
  2263. return -EFAULT;
  2264. }
  2265. } else {
  2266. memset(buff, 0, iocommand.buf_size);
  2267. }
  2268. }
  2269. c = cmd_special_alloc(h);
  2270. if (c == NULL) {
  2271. kfree(buff);
  2272. return -ENOMEM;
  2273. }
  2274. /* Fill in the command type */
  2275. c->cmd_type = CMD_IOCTL_PEND;
  2276. /* Fill in Command Header */
  2277. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2278. if (iocommand.buf_size > 0) { /* buffer to fill */
  2279. c->Header.SGList = 1;
  2280. c->Header.SGTotal = 1;
  2281. } else { /* no buffers to fill */
  2282. c->Header.SGList = 0;
  2283. c->Header.SGTotal = 0;
  2284. }
  2285. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2286. /* use the kernel address the cmd block for tag */
  2287. c->Header.Tag.lower = c->busaddr;
  2288. /* Fill in Request block */
  2289. memcpy(&c->Request, &iocommand.Request,
  2290. sizeof(c->Request));
  2291. /* Fill in the scatter gather information */
  2292. if (iocommand.buf_size > 0) {
  2293. temp64.val = pci_map_single(h->pdev, buff,
  2294. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2295. c->SG[0].Addr.lower = temp64.val32.lower;
  2296. c->SG[0].Addr.upper = temp64.val32.upper;
  2297. c->SG[0].Len = iocommand.buf_size;
  2298. c->SG[0].Ext = 0; /* we are not chaining*/
  2299. }
  2300. hpsa_scsi_do_simple_cmd_core(h, c);
  2301. if (iocommand.buf_size > 0)
  2302. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2303. check_ioctl_unit_attention(h, c);
  2304. /* Copy the error information out */
  2305. memcpy(&iocommand.error_info, c->err_info,
  2306. sizeof(iocommand.error_info));
  2307. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2308. kfree(buff);
  2309. cmd_special_free(h, c);
  2310. return -EFAULT;
  2311. }
  2312. if (iocommand.Request.Type.Direction == XFER_READ &&
  2313. iocommand.buf_size > 0) {
  2314. /* Copy the data out of the buffer we created */
  2315. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2316. kfree(buff);
  2317. cmd_special_free(h, c);
  2318. return -EFAULT;
  2319. }
  2320. }
  2321. kfree(buff);
  2322. cmd_special_free(h, c);
  2323. return 0;
  2324. }
  2325. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2326. {
  2327. BIG_IOCTL_Command_struct *ioc;
  2328. struct CommandList *c;
  2329. unsigned char **buff = NULL;
  2330. int *buff_size = NULL;
  2331. union u64bit temp64;
  2332. BYTE sg_used = 0;
  2333. int status = 0;
  2334. int i;
  2335. u32 left;
  2336. u32 sz;
  2337. BYTE __user *data_ptr;
  2338. if (!argp)
  2339. return -EINVAL;
  2340. if (!capable(CAP_SYS_RAWIO))
  2341. return -EPERM;
  2342. ioc = (BIG_IOCTL_Command_struct *)
  2343. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2344. if (!ioc) {
  2345. status = -ENOMEM;
  2346. goto cleanup1;
  2347. }
  2348. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2349. status = -EFAULT;
  2350. goto cleanup1;
  2351. }
  2352. if ((ioc->buf_size < 1) &&
  2353. (ioc->Request.Type.Direction != XFER_NONE)) {
  2354. status = -EINVAL;
  2355. goto cleanup1;
  2356. }
  2357. /* Check kmalloc limits using all SGs */
  2358. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2359. status = -EINVAL;
  2360. goto cleanup1;
  2361. }
  2362. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  2363. status = -EINVAL;
  2364. goto cleanup1;
  2365. }
  2366. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  2367. if (!buff) {
  2368. status = -ENOMEM;
  2369. goto cleanup1;
  2370. }
  2371. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  2372. if (!buff_size) {
  2373. status = -ENOMEM;
  2374. goto cleanup1;
  2375. }
  2376. left = ioc->buf_size;
  2377. data_ptr = ioc->buf;
  2378. while (left) {
  2379. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2380. buff_size[sg_used] = sz;
  2381. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2382. if (buff[sg_used] == NULL) {
  2383. status = -ENOMEM;
  2384. goto cleanup1;
  2385. }
  2386. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2387. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2388. status = -ENOMEM;
  2389. goto cleanup1;
  2390. }
  2391. } else
  2392. memset(buff[sg_used], 0, sz);
  2393. left -= sz;
  2394. data_ptr += sz;
  2395. sg_used++;
  2396. }
  2397. c = cmd_special_alloc(h);
  2398. if (c == NULL) {
  2399. status = -ENOMEM;
  2400. goto cleanup1;
  2401. }
  2402. c->cmd_type = CMD_IOCTL_PEND;
  2403. c->Header.ReplyQueue = 0;
  2404. c->Header.SGList = c->Header.SGTotal = sg_used;
  2405. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2406. c->Header.Tag.lower = c->busaddr;
  2407. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2408. if (ioc->buf_size > 0) {
  2409. int i;
  2410. for (i = 0; i < sg_used; i++) {
  2411. temp64.val = pci_map_single(h->pdev, buff[i],
  2412. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2413. c->SG[i].Addr.lower = temp64.val32.lower;
  2414. c->SG[i].Addr.upper = temp64.val32.upper;
  2415. c->SG[i].Len = buff_size[i];
  2416. /* we are not chaining */
  2417. c->SG[i].Ext = 0;
  2418. }
  2419. }
  2420. hpsa_scsi_do_simple_cmd_core(h, c);
  2421. if (sg_used)
  2422. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2423. check_ioctl_unit_attention(h, c);
  2424. /* Copy the error information out */
  2425. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2426. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2427. cmd_special_free(h, c);
  2428. status = -EFAULT;
  2429. goto cleanup1;
  2430. }
  2431. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2432. /* Copy the data out of the buffer we created */
  2433. BYTE __user *ptr = ioc->buf;
  2434. for (i = 0; i < sg_used; i++) {
  2435. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2436. cmd_special_free(h, c);
  2437. status = -EFAULT;
  2438. goto cleanup1;
  2439. }
  2440. ptr += buff_size[i];
  2441. }
  2442. }
  2443. cmd_special_free(h, c);
  2444. status = 0;
  2445. cleanup1:
  2446. if (buff) {
  2447. for (i = 0; i < sg_used; i++)
  2448. kfree(buff[i]);
  2449. kfree(buff);
  2450. }
  2451. kfree(buff_size);
  2452. kfree(ioc);
  2453. return status;
  2454. }
  2455. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2456. struct CommandList *c)
  2457. {
  2458. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2459. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2460. (void) check_for_unit_attention(h, c);
  2461. }
  2462. /*
  2463. * ioctl
  2464. */
  2465. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2466. {
  2467. struct ctlr_info *h;
  2468. void __user *argp = (void __user *)arg;
  2469. h = sdev_to_hba(dev);
  2470. switch (cmd) {
  2471. case CCISS_DEREGDISK:
  2472. case CCISS_REGNEWDISK:
  2473. case CCISS_REGNEWD:
  2474. hpsa_scan_start(h->scsi_host);
  2475. return 0;
  2476. case CCISS_GETPCIINFO:
  2477. return hpsa_getpciinfo_ioctl(h, argp);
  2478. case CCISS_GETDRIVVER:
  2479. return hpsa_getdrivver_ioctl(h, argp);
  2480. case CCISS_PASSTHRU:
  2481. return hpsa_passthru_ioctl(h, argp);
  2482. case CCISS_BIG_PASSTHRU:
  2483. return hpsa_big_passthru_ioctl(h, argp);
  2484. default:
  2485. return -ENOTTY;
  2486. }
  2487. }
  2488. static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
  2489. unsigned char *scsi3addr, u8 reset_type)
  2490. {
  2491. struct CommandList *c;
  2492. c = cmd_alloc(h);
  2493. if (!c)
  2494. return -ENOMEM;
  2495. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
  2496. RAID_CTLR_LUNID, TYPE_MSG);
  2497. c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
  2498. c->waiting = NULL;
  2499. enqueue_cmd_and_start_io(h, c);
  2500. /* Don't wait for completion, the reset won't complete. Don't free
  2501. * the command either. This is the last command we will send before
  2502. * re-initializing everything, so it doesn't matter and won't leak.
  2503. */
  2504. return 0;
  2505. }
  2506. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2507. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2508. int cmd_type)
  2509. {
  2510. int pci_dir = XFER_NONE;
  2511. c->cmd_type = CMD_IOCTL_PEND;
  2512. c->Header.ReplyQueue = 0;
  2513. if (buff != NULL && size > 0) {
  2514. c->Header.SGList = 1;
  2515. c->Header.SGTotal = 1;
  2516. } else {
  2517. c->Header.SGList = 0;
  2518. c->Header.SGTotal = 0;
  2519. }
  2520. c->Header.Tag.lower = c->busaddr;
  2521. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2522. c->Request.Type.Type = cmd_type;
  2523. if (cmd_type == TYPE_CMD) {
  2524. switch (cmd) {
  2525. case HPSA_INQUIRY:
  2526. /* are we trying to read a vital product page */
  2527. if (page_code != 0) {
  2528. c->Request.CDB[1] = 0x01;
  2529. c->Request.CDB[2] = page_code;
  2530. }
  2531. c->Request.CDBLen = 6;
  2532. c->Request.Type.Attribute = ATTR_SIMPLE;
  2533. c->Request.Type.Direction = XFER_READ;
  2534. c->Request.Timeout = 0;
  2535. c->Request.CDB[0] = HPSA_INQUIRY;
  2536. c->Request.CDB[4] = size & 0xFF;
  2537. break;
  2538. case HPSA_REPORT_LOG:
  2539. case HPSA_REPORT_PHYS:
  2540. /* Talking to controller so It's a physical command
  2541. mode = 00 target = 0. Nothing to write.
  2542. */
  2543. c->Request.CDBLen = 12;
  2544. c->Request.Type.Attribute = ATTR_SIMPLE;
  2545. c->Request.Type.Direction = XFER_READ;
  2546. c->Request.Timeout = 0;
  2547. c->Request.CDB[0] = cmd;
  2548. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2549. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2550. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2551. c->Request.CDB[9] = size & 0xFF;
  2552. break;
  2553. case HPSA_CACHE_FLUSH:
  2554. c->Request.CDBLen = 12;
  2555. c->Request.Type.Attribute = ATTR_SIMPLE;
  2556. c->Request.Type.Direction = XFER_WRITE;
  2557. c->Request.Timeout = 0;
  2558. c->Request.CDB[0] = BMIC_WRITE;
  2559. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2560. break;
  2561. case TEST_UNIT_READY:
  2562. c->Request.CDBLen = 6;
  2563. c->Request.Type.Attribute = ATTR_SIMPLE;
  2564. c->Request.Type.Direction = XFER_NONE;
  2565. c->Request.Timeout = 0;
  2566. break;
  2567. default:
  2568. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2569. BUG();
  2570. return;
  2571. }
  2572. } else if (cmd_type == TYPE_MSG) {
  2573. switch (cmd) {
  2574. case HPSA_DEVICE_RESET_MSG:
  2575. c->Request.CDBLen = 16;
  2576. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2577. c->Request.Type.Attribute = ATTR_SIMPLE;
  2578. c->Request.Type.Direction = XFER_NONE;
  2579. c->Request.Timeout = 0; /* Don't time out */
  2580. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2581. c->Request.CDB[0] = cmd;
  2582. c->Request.CDB[1] = 0x03; /* Reset target above */
  2583. /* If bytes 4-7 are zero, it means reset the */
  2584. /* LunID device */
  2585. c->Request.CDB[4] = 0x00;
  2586. c->Request.CDB[5] = 0x00;
  2587. c->Request.CDB[6] = 0x00;
  2588. c->Request.CDB[7] = 0x00;
  2589. break;
  2590. default:
  2591. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2592. cmd);
  2593. BUG();
  2594. }
  2595. } else {
  2596. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2597. BUG();
  2598. }
  2599. switch (c->Request.Type.Direction) {
  2600. case XFER_READ:
  2601. pci_dir = PCI_DMA_FROMDEVICE;
  2602. break;
  2603. case XFER_WRITE:
  2604. pci_dir = PCI_DMA_TODEVICE;
  2605. break;
  2606. case XFER_NONE:
  2607. pci_dir = PCI_DMA_NONE;
  2608. break;
  2609. default:
  2610. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2611. }
  2612. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2613. return;
  2614. }
  2615. /*
  2616. * Map (physical) PCI mem into (virtual) kernel space
  2617. */
  2618. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2619. {
  2620. ulong page_base = ((ulong) base) & PAGE_MASK;
  2621. ulong page_offs = ((ulong) base) - page_base;
  2622. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2623. return page_remapped ? (page_remapped + page_offs) : NULL;
  2624. }
  2625. /* Takes cmds off the submission queue and sends them to the hardware,
  2626. * then puts them on the queue of cmds waiting for completion.
  2627. */
  2628. static void start_io(struct ctlr_info *h)
  2629. {
  2630. struct CommandList *c;
  2631. while (!list_empty(&h->reqQ)) {
  2632. c = list_entry(h->reqQ.next, struct CommandList, list);
  2633. /* can't do anything if fifo is full */
  2634. if ((h->access.fifo_full(h))) {
  2635. dev_warn(&h->pdev->dev, "fifo full\n");
  2636. break;
  2637. }
  2638. /* Get the first entry from the Request Q */
  2639. removeQ(c);
  2640. h->Qdepth--;
  2641. /* Tell the controller execute command */
  2642. h->access.submit_command(h, c);
  2643. /* Put job onto the completed Q */
  2644. addQ(&h->cmpQ, c);
  2645. }
  2646. }
  2647. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2648. {
  2649. return h->access.command_completed(h);
  2650. }
  2651. static inline bool interrupt_pending(struct ctlr_info *h)
  2652. {
  2653. return h->access.intr_pending(h);
  2654. }
  2655. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2656. {
  2657. return (h->access.intr_pending(h) == 0) ||
  2658. (h->interrupts_enabled == 0);
  2659. }
  2660. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2661. u32 raw_tag)
  2662. {
  2663. if (unlikely(tag_index >= h->nr_cmds)) {
  2664. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2665. return 1;
  2666. }
  2667. return 0;
  2668. }
  2669. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2670. {
  2671. removeQ(c);
  2672. if (likely(c->cmd_type == CMD_SCSI))
  2673. complete_scsi_command(c);
  2674. else if (c->cmd_type == CMD_IOCTL_PEND)
  2675. complete(c->waiting);
  2676. }
  2677. static inline u32 hpsa_tag_contains_index(u32 tag)
  2678. {
  2679. return tag & DIRECT_LOOKUP_BIT;
  2680. }
  2681. static inline u32 hpsa_tag_to_index(u32 tag)
  2682. {
  2683. return tag >> DIRECT_LOOKUP_SHIFT;
  2684. }
  2685. static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
  2686. {
  2687. #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
  2688. #define HPSA_SIMPLE_ERROR_BITS 0x03
  2689. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  2690. return tag & ~HPSA_SIMPLE_ERROR_BITS;
  2691. return tag & ~HPSA_PERF_ERROR_BITS;
  2692. }
  2693. /* process completion of an indexed ("direct lookup") command */
  2694. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2695. u32 raw_tag)
  2696. {
  2697. u32 tag_index;
  2698. struct CommandList *c;
  2699. tag_index = hpsa_tag_to_index(raw_tag);
  2700. if (bad_tag(h, tag_index, raw_tag))
  2701. return next_command(h);
  2702. c = h->cmd_pool + tag_index;
  2703. finish_cmd(c, raw_tag);
  2704. return next_command(h);
  2705. }
  2706. /* process completion of a non-indexed command */
  2707. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2708. u32 raw_tag)
  2709. {
  2710. u32 tag;
  2711. struct CommandList *c = NULL;
  2712. tag = hpsa_tag_discard_error_bits(h, raw_tag);
  2713. list_for_each_entry(c, &h->cmpQ, list) {
  2714. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2715. finish_cmd(c, raw_tag);
  2716. return next_command(h);
  2717. }
  2718. }
  2719. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2720. return next_command(h);
  2721. }
  2722. /* Some controllers, like p400, will give us one interrupt
  2723. * after a soft reset, even if we turned interrupts off.
  2724. * Only need to check for this in the hpsa_xxx_discard_completions
  2725. * functions.
  2726. */
  2727. static int ignore_bogus_interrupt(struct ctlr_info *h)
  2728. {
  2729. if (likely(!reset_devices))
  2730. return 0;
  2731. if (likely(h->interrupts_enabled))
  2732. return 0;
  2733. dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
  2734. "(known firmware bug.) Ignoring.\n");
  2735. return 1;
  2736. }
  2737. static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
  2738. {
  2739. struct ctlr_info *h = dev_id;
  2740. unsigned long flags;
  2741. u32 raw_tag;
  2742. if (ignore_bogus_interrupt(h))
  2743. return IRQ_NONE;
  2744. if (interrupt_not_for_us(h))
  2745. return IRQ_NONE;
  2746. spin_lock_irqsave(&h->lock, flags);
  2747. while (interrupt_pending(h)) {
  2748. raw_tag = get_next_completion(h);
  2749. while (raw_tag != FIFO_EMPTY)
  2750. raw_tag = next_command(h);
  2751. }
  2752. spin_unlock_irqrestore(&h->lock, flags);
  2753. return IRQ_HANDLED;
  2754. }
  2755. static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
  2756. {
  2757. struct ctlr_info *h = dev_id;
  2758. unsigned long flags;
  2759. u32 raw_tag;
  2760. if (ignore_bogus_interrupt(h))
  2761. return IRQ_NONE;
  2762. spin_lock_irqsave(&h->lock, flags);
  2763. raw_tag = get_next_completion(h);
  2764. while (raw_tag != FIFO_EMPTY)
  2765. raw_tag = next_command(h);
  2766. spin_unlock_irqrestore(&h->lock, flags);
  2767. return IRQ_HANDLED;
  2768. }
  2769. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
  2770. {
  2771. struct ctlr_info *h = dev_id;
  2772. unsigned long flags;
  2773. u32 raw_tag;
  2774. if (interrupt_not_for_us(h))
  2775. return IRQ_NONE;
  2776. spin_lock_irqsave(&h->lock, flags);
  2777. while (interrupt_pending(h)) {
  2778. raw_tag = get_next_completion(h);
  2779. while (raw_tag != FIFO_EMPTY) {
  2780. if (hpsa_tag_contains_index(raw_tag))
  2781. raw_tag = process_indexed_cmd(h, raw_tag);
  2782. else
  2783. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2784. }
  2785. }
  2786. spin_unlock_irqrestore(&h->lock, flags);
  2787. return IRQ_HANDLED;
  2788. }
  2789. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
  2790. {
  2791. struct ctlr_info *h = dev_id;
  2792. unsigned long flags;
  2793. u32 raw_tag;
  2794. spin_lock_irqsave(&h->lock, flags);
  2795. raw_tag = get_next_completion(h);
  2796. while (raw_tag != FIFO_EMPTY) {
  2797. if (hpsa_tag_contains_index(raw_tag))
  2798. raw_tag = process_indexed_cmd(h, raw_tag);
  2799. else
  2800. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2801. }
  2802. spin_unlock_irqrestore(&h->lock, flags);
  2803. return IRQ_HANDLED;
  2804. }
  2805. /* Send a message CDB to the firmware. Careful, this only works
  2806. * in simple mode, not performant mode due to the tag lookup.
  2807. * We only ever use this immediately after a controller reset.
  2808. */
  2809. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2810. unsigned char type)
  2811. {
  2812. struct Command {
  2813. struct CommandListHeader CommandHeader;
  2814. struct RequestBlock Request;
  2815. struct ErrDescriptor ErrorDescriptor;
  2816. };
  2817. struct Command *cmd;
  2818. static const size_t cmd_sz = sizeof(*cmd) +
  2819. sizeof(cmd->ErrorDescriptor);
  2820. dma_addr_t paddr64;
  2821. uint32_t paddr32, tag;
  2822. void __iomem *vaddr;
  2823. int i, err;
  2824. vaddr = pci_ioremap_bar(pdev, 0);
  2825. if (vaddr == NULL)
  2826. return -ENOMEM;
  2827. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2828. * CCISS commands, so they must be allocated from the lower 4GiB of
  2829. * memory.
  2830. */
  2831. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2832. if (err) {
  2833. iounmap(vaddr);
  2834. return -ENOMEM;
  2835. }
  2836. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2837. if (cmd == NULL) {
  2838. iounmap(vaddr);
  2839. return -ENOMEM;
  2840. }
  2841. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2842. * although there's no guarantee, we assume that the address is at
  2843. * least 4-byte aligned (most likely, it's page-aligned).
  2844. */
  2845. paddr32 = paddr64;
  2846. cmd->CommandHeader.ReplyQueue = 0;
  2847. cmd->CommandHeader.SGList = 0;
  2848. cmd->CommandHeader.SGTotal = 0;
  2849. cmd->CommandHeader.Tag.lower = paddr32;
  2850. cmd->CommandHeader.Tag.upper = 0;
  2851. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2852. cmd->Request.CDBLen = 16;
  2853. cmd->Request.Type.Type = TYPE_MSG;
  2854. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2855. cmd->Request.Type.Direction = XFER_NONE;
  2856. cmd->Request.Timeout = 0; /* Don't time out */
  2857. cmd->Request.CDB[0] = opcode;
  2858. cmd->Request.CDB[1] = type;
  2859. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2860. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2861. cmd->ErrorDescriptor.Addr.upper = 0;
  2862. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2863. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2864. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2865. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2866. if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
  2867. break;
  2868. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2869. }
  2870. iounmap(vaddr);
  2871. /* we leak the DMA buffer here ... no choice since the controller could
  2872. * still complete the command.
  2873. */
  2874. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2875. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2876. opcode, type);
  2877. return -ETIMEDOUT;
  2878. }
  2879. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2880. if (tag & HPSA_ERROR_BIT) {
  2881. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2882. opcode, type);
  2883. return -EIO;
  2884. }
  2885. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2886. opcode, type);
  2887. return 0;
  2888. }
  2889. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2890. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  2891. void * __iomem vaddr, u32 use_doorbell)
  2892. {
  2893. u16 pmcsr;
  2894. int pos;
  2895. if (use_doorbell) {
  2896. /* For everything after the P600, the PCI power state method
  2897. * of resetting the controller doesn't work, so we have this
  2898. * other way using the doorbell register.
  2899. */
  2900. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  2901. writel(use_doorbell, vaddr + SA5_DOORBELL);
  2902. } else { /* Try to do it the PCI power state way */
  2903. /* Quoting from the Open CISS Specification: "The Power
  2904. * Management Control/Status Register (CSR) controls the power
  2905. * state of the device. The normal operating state is D0,
  2906. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2907. * the controller, place the interface device in D3 then to D0,
  2908. * this causes a secondary PCI reset which will reset the
  2909. * controller." */
  2910. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2911. if (pos == 0) {
  2912. dev_err(&pdev->dev,
  2913. "hpsa_reset_controller: "
  2914. "PCI PM not supported\n");
  2915. return -ENODEV;
  2916. }
  2917. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2918. /* enter the D3hot power management state */
  2919. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2920. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2921. pmcsr |= PCI_D3hot;
  2922. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2923. msleep(500);
  2924. /* enter the D0 power management state */
  2925. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2926. pmcsr |= PCI_D0;
  2927. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2928. }
  2929. return 0;
  2930. }
  2931. static __devinit void init_driver_version(char *driver_version, int len)
  2932. {
  2933. memset(driver_version, 0, len);
  2934. strncpy(driver_version, "hpsa " HPSA_DRIVER_VERSION, len - 1);
  2935. }
  2936. static __devinit int write_driver_ver_to_cfgtable(
  2937. struct CfgTable __iomem *cfgtable)
  2938. {
  2939. char *driver_version;
  2940. int i, size = sizeof(cfgtable->driver_version);
  2941. driver_version = kmalloc(size, GFP_KERNEL);
  2942. if (!driver_version)
  2943. return -ENOMEM;
  2944. init_driver_version(driver_version, size);
  2945. for (i = 0; i < size; i++)
  2946. writeb(driver_version[i], &cfgtable->driver_version[i]);
  2947. kfree(driver_version);
  2948. return 0;
  2949. }
  2950. static __devinit void read_driver_ver_from_cfgtable(
  2951. struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
  2952. {
  2953. int i;
  2954. for (i = 0; i < sizeof(cfgtable->driver_version); i++)
  2955. driver_ver[i] = readb(&cfgtable->driver_version[i]);
  2956. }
  2957. static __devinit int controller_reset_failed(
  2958. struct CfgTable __iomem *cfgtable)
  2959. {
  2960. char *driver_ver, *old_driver_ver;
  2961. int rc, size = sizeof(cfgtable->driver_version);
  2962. old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
  2963. if (!old_driver_ver)
  2964. return -ENOMEM;
  2965. driver_ver = old_driver_ver + size;
  2966. /* After a reset, the 32 bytes of "driver version" in the cfgtable
  2967. * should have been changed, otherwise we know the reset failed.
  2968. */
  2969. init_driver_version(old_driver_ver, size);
  2970. read_driver_ver_from_cfgtable(cfgtable, driver_ver);
  2971. rc = !memcmp(driver_ver, old_driver_ver, size);
  2972. kfree(old_driver_ver);
  2973. return rc;
  2974. }
  2975. /* This does a hard reset of the controller using PCI power management
  2976. * states or the using the doorbell register.
  2977. */
  2978. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  2979. {
  2980. u64 cfg_offset;
  2981. u32 cfg_base_addr;
  2982. u64 cfg_base_addr_index;
  2983. void __iomem *vaddr;
  2984. unsigned long paddr;
  2985. u32 misc_fw_support;
  2986. int rc;
  2987. struct CfgTable __iomem *cfgtable;
  2988. u32 use_doorbell;
  2989. u32 board_id;
  2990. u16 command_register;
  2991. /* For controllers as old as the P600, this is very nearly
  2992. * the same thing as
  2993. *
  2994. * pci_save_state(pci_dev);
  2995. * pci_set_power_state(pci_dev, PCI_D3hot);
  2996. * pci_set_power_state(pci_dev, PCI_D0);
  2997. * pci_restore_state(pci_dev);
  2998. *
  2999. * For controllers newer than the P600, the pci power state
  3000. * method of resetting doesn't work so we have another way
  3001. * using the doorbell register.
  3002. */
  3003. rc = hpsa_lookup_board_id(pdev, &board_id);
  3004. if (rc < 0 || !ctlr_is_resettable(board_id)) {
  3005. dev_warn(&pdev->dev, "Not resetting device.\n");
  3006. return -ENODEV;
  3007. }
  3008. /* if controller is soft- but not hard resettable... */
  3009. if (!ctlr_is_hard_resettable(board_id))
  3010. return -ENOTSUPP; /* try soft reset later. */
  3011. /* Save the PCI command register */
  3012. pci_read_config_word(pdev, 4, &command_register);
  3013. /* Turn the board off. This is so that later pci_restore_state()
  3014. * won't turn the board on before the rest of config space is ready.
  3015. */
  3016. pci_disable_device(pdev);
  3017. pci_save_state(pdev);
  3018. /* find the first memory BAR, so we can find the cfg table */
  3019. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  3020. if (rc)
  3021. return rc;
  3022. vaddr = remap_pci_mem(paddr, 0x250);
  3023. if (!vaddr)
  3024. return -ENOMEM;
  3025. /* find cfgtable in order to check if reset via doorbell is supported */
  3026. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  3027. &cfg_base_addr_index, &cfg_offset);
  3028. if (rc)
  3029. goto unmap_vaddr;
  3030. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3031. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  3032. if (!cfgtable) {
  3033. rc = -ENOMEM;
  3034. goto unmap_vaddr;
  3035. }
  3036. rc = write_driver_ver_to_cfgtable(cfgtable);
  3037. if (rc)
  3038. goto unmap_vaddr;
  3039. /* If reset via doorbell register is supported, use that.
  3040. * There are two such methods. Favor the newest method.
  3041. */
  3042. misc_fw_support = readl(&cfgtable->misc_fw_support);
  3043. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
  3044. if (use_doorbell) {
  3045. use_doorbell = DOORBELL_CTLR_RESET2;
  3046. } else {
  3047. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  3048. if (use_doorbell) {
  3049. dev_warn(&pdev->dev, "Controller claims that "
  3050. "'Bit 2 doorbell reset' is "
  3051. "supported, but not 'bit 5 doorbell reset'. "
  3052. "Firmware update is recommended.\n");
  3053. rc = -ENOTSUPP; /* try soft reset */
  3054. goto unmap_cfgtable;
  3055. }
  3056. }
  3057. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  3058. if (rc)
  3059. goto unmap_cfgtable;
  3060. pci_restore_state(pdev);
  3061. rc = pci_enable_device(pdev);
  3062. if (rc) {
  3063. dev_warn(&pdev->dev, "failed to enable device.\n");
  3064. goto unmap_cfgtable;
  3065. }
  3066. pci_write_config_word(pdev, 4, command_register);
  3067. /* Some devices (notably the HP Smart Array 5i Controller)
  3068. need a little pause here */
  3069. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  3070. /* Wait for board to become not ready, then ready. */
  3071. dev_info(&pdev->dev, "Waiting for board to reset.\n");
  3072. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  3073. if (rc) {
  3074. dev_warn(&pdev->dev,
  3075. "failed waiting for board to reset."
  3076. " Will try soft reset.\n");
  3077. rc = -ENOTSUPP; /* Not expected, but try soft reset later */
  3078. goto unmap_cfgtable;
  3079. }
  3080. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  3081. if (rc) {
  3082. dev_warn(&pdev->dev,
  3083. "failed waiting for board to become ready "
  3084. "after hard reset\n");
  3085. goto unmap_cfgtable;
  3086. }
  3087. rc = controller_reset_failed(vaddr);
  3088. if (rc < 0)
  3089. goto unmap_cfgtable;
  3090. if (rc) {
  3091. dev_warn(&pdev->dev, "Unable to successfully reset "
  3092. "controller. Will try soft reset.\n");
  3093. rc = -ENOTSUPP;
  3094. } else {
  3095. dev_info(&pdev->dev, "board ready after hard reset.\n");
  3096. }
  3097. unmap_cfgtable:
  3098. iounmap(cfgtable);
  3099. unmap_vaddr:
  3100. iounmap(vaddr);
  3101. return rc;
  3102. }
  3103. /*
  3104. * We cannot read the structure directly, for portability we must use
  3105. * the io functions.
  3106. * This is for debug only.
  3107. */
  3108. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  3109. {
  3110. #ifdef HPSA_DEBUG
  3111. int i;
  3112. char temp_name[17];
  3113. dev_info(dev, "Controller Configuration information\n");
  3114. dev_info(dev, "------------------------------------\n");
  3115. for (i = 0; i < 4; i++)
  3116. temp_name[i] = readb(&(tb->Signature[i]));
  3117. temp_name[4] = '\0';
  3118. dev_info(dev, " Signature = %s\n", temp_name);
  3119. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  3120. dev_info(dev, " Transport methods supported = 0x%x\n",
  3121. readl(&(tb->TransportSupport)));
  3122. dev_info(dev, " Transport methods active = 0x%x\n",
  3123. readl(&(tb->TransportActive)));
  3124. dev_info(dev, " Requested transport Method = 0x%x\n",
  3125. readl(&(tb->HostWrite.TransportRequest)));
  3126. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  3127. readl(&(tb->HostWrite.CoalIntDelay)));
  3128. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  3129. readl(&(tb->HostWrite.CoalIntCount)));
  3130. dev_info(dev, " Max outstanding commands = 0x%d\n",
  3131. readl(&(tb->CmdsOutMax)));
  3132. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  3133. for (i = 0; i < 16; i++)
  3134. temp_name[i] = readb(&(tb->ServerName[i]));
  3135. temp_name[16] = '\0';
  3136. dev_info(dev, " Server Name = %s\n", temp_name);
  3137. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  3138. readl(&(tb->HeartBeat)));
  3139. #endif /* HPSA_DEBUG */
  3140. }
  3141. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3142. {
  3143. int i, offset, mem_type, bar_type;
  3144. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3145. return 0;
  3146. offset = 0;
  3147. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3148. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3149. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3150. offset += 4;
  3151. else {
  3152. mem_type = pci_resource_flags(pdev, i) &
  3153. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3154. switch (mem_type) {
  3155. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3156. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3157. offset += 4; /* 32 bit */
  3158. break;
  3159. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3160. offset += 8;
  3161. break;
  3162. default: /* reserved in PCI 2.2 */
  3163. dev_warn(&pdev->dev,
  3164. "base address is invalid\n");
  3165. return -1;
  3166. break;
  3167. }
  3168. }
  3169. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3170. return i + 1;
  3171. }
  3172. return -1;
  3173. }
  3174. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3175. * controllers that are capable. If not, we use IO-APIC mode.
  3176. */
  3177. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  3178. {
  3179. #ifdef CONFIG_PCI_MSI
  3180. int err;
  3181. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  3182. {0, 2}, {0, 3}
  3183. };
  3184. /* Some boards advertise MSI but don't really support it */
  3185. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3186. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3187. goto default_int_mode;
  3188. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3189. dev_info(&h->pdev->dev, "MSIX\n");
  3190. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  3191. if (!err) {
  3192. h->intr[0] = hpsa_msix_entries[0].vector;
  3193. h->intr[1] = hpsa_msix_entries[1].vector;
  3194. h->intr[2] = hpsa_msix_entries[2].vector;
  3195. h->intr[3] = hpsa_msix_entries[3].vector;
  3196. h->msix_vector = 1;
  3197. return;
  3198. }
  3199. if (err > 0) {
  3200. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3201. "available\n", err);
  3202. goto default_int_mode;
  3203. } else {
  3204. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3205. err);
  3206. goto default_int_mode;
  3207. }
  3208. }
  3209. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3210. dev_info(&h->pdev->dev, "MSI\n");
  3211. if (!pci_enable_msi(h->pdev))
  3212. h->msi_vector = 1;
  3213. else
  3214. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3215. }
  3216. default_int_mode:
  3217. #endif /* CONFIG_PCI_MSI */
  3218. /* if we get here we're going to use the default interrupt mode */
  3219. h->intr[h->intr_mode] = h->pdev->irq;
  3220. }
  3221. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3222. {
  3223. int i;
  3224. u32 subsystem_vendor_id, subsystem_device_id;
  3225. subsystem_vendor_id = pdev->subsystem_vendor;
  3226. subsystem_device_id = pdev->subsystem_device;
  3227. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3228. subsystem_vendor_id;
  3229. for (i = 0; i < ARRAY_SIZE(products); i++)
  3230. if (*board_id == products[i].board_id)
  3231. return i;
  3232. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3233. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3234. !hpsa_allow_any) {
  3235. dev_warn(&pdev->dev, "unrecognized board ID: "
  3236. "0x%08x, ignoring.\n", *board_id);
  3237. return -ENODEV;
  3238. }
  3239. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3240. }
  3241. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  3242. {
  3243. u16 command;
  3244. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  3245. return ((command & PCI_COMMAND_MEMORY) == 0);
  3246. }
  3247. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3248. unsigned long *memory_bar)
  3249. {
  3250. int i;
  3251. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3252. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3253. /* addressing mode bits already removed */
  3254. *memory_bar = pci_resource_start(pdev, i);
  3255. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3256. *memory_bar);
  3257. return 0;
  3258. }
  3259. dev_warn(&pdev->dev, "no memory BAR found\n");
  3260. return -ENODEV;
  3261. }
  3262. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  3263. void __iomem *vaddr, int wait_for_ready)
  3264. {
  3265. int i, iterations;
  3266. u32 scratchpad;
  3267. if (wait_for_ready)
  3268. iterations = HPSA_BOARD_READY_ITERATIONS;
  3269. else
  3270. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3271. for (i = 0; i < iterations; i++) {
  3272. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3273. if (wait_for_ready) {
  3274. if (scratchpad == HPSA_FIRMWARE_READY)
  3275. return 0;
  3276. } else {
  3277. if (scratchpad != HPSA_FIRMWARE_READY)
  3278. return 0;
  3279. }
  3280. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3281. }
  3282. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3283. return -ENODEV;
  3284. }
  3285. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3286. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3287. u64 *cfg_offset)
  3288. {
  3289. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3290. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3291. *cfg_base_addr &= (u32) 0x0000ffff;
  3292. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3293. if (*cfg_base_addr_index == -1) {
  3294. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3295. return -ENODEV;
  3296. }
  3297. return 0;
  3298. }
  3299. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3300. {
  3301. u64 cfg_offset;
  3302. u32 cfg_base_addr;
  3303. u64 cfg_base_addr_index;
  3304. u32 trans_offset;
  3305. int rc;
  3306. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3307. &cfg_base_addr_index, &cfg_offset);
  3308. if (rc)
  3309. return rc;
  3310. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3311. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3312. if (!h->cfgtable)
  3313. return -ENOMEM;
  3314. rc = write_driver_ver_to_cfgtable(h->cfgtable);
  3315. if (rc)
  3316. return rc;
  3317. /* Find performant mode table. */
  3318. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3319. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3320. cfg_base_addr_index)+cfg_offset+trans_offset,
  3321. sizeof(*h->transtable));
  3322. if (!h->transtable)
  3323. return -ENOMEM;
  3324. return 0;
  3325. }
  3326. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3327. {
  3328. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3329. /* Limit commands in memory limited kdump scenario. */
  3330. if (reset_devices && h->max_commands > 32)
  3331. h->max_commands = 32;
  3332. if (h->max_commands < 16) {
  3333. dev_warn(&h->pdev->dev, "Controller reports "
  3334. "max supported commands of %d, an obvious lie. "
  3335. "Using 16. Ensure that firmware is up to date.\n",
  3336. h->max_commands);
  3337. h->max_commands = 16;
  3338. }
  3339. }
  3340. /* Interrogate the hardware for some limits:
  3341. * max commands, max SG elements without chaining, and with chaining,
  3342. * SG chain block size, etc.
  3343. */
  3344. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3345. {
  3346. hpsa_get_max_perf_mode_cmds(h);
  3347. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3348. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3349. /*
  3350. * Limit in-command s/g elements to 32 save dma'able memory.
  3351. * Howvever spec says if 0, use 31
  3352. */
  3353. h->max_cmd_sg_entries = 31;
  3354. if (h->maxsgentries > 512) {
  3355. h->max_cmd_sg_entries = 32;
  3356. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3357. h->maxsgentries--; /* save one for chain pointer */
  3358. } else {
  3359. h->maxsgentries = 31; /* default to traditional values */
  3360. h->chainsize = 0;
  3361. }
  3362. }
  3363. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3364. {
  3365. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3366. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3367. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3368. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3369. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3370. return false;
  3371. }
  3372. return true;
  3373. }
  3374. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3375. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3376. {
  3377. #ifdef CONFIG_X86
  3378. u32 prefetch;
  3379. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3380. prefetch |= 0x100;
  3381. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3382. #endif
  3383. }
  3384. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3385. * in a prefetch beyond physical memory.
  3386. */
  3387. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3388. {
  3389. u32 dma_prefetch;
  3390. if (h->board_id != 0x3225103C)
  3391. return;
  3392. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3393. dma_prefetch |= 0x8000;
  3394. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3395. }
  3396. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3397. {
  3398. int i;
  3399. u32 doorbell_value;
  3400. unsigned long flags;
  3401. /* under certain very rare conditions, this can take awhile.
  3402. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3403. * as we enter this code.)
  3404. */
  3405. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3406. spin_lock_irqsave(&h->lock, flags);
  3407. doorbell_value = readl(h->vaddr + SA5_DOORBELL);
  3408. spin_unlock_irqrestore(&h->lock, flags);
  3409. if (!(doorbell_value & CFGTBL_ChangeReq))
  3410. break;
  3411. /* delay and try again */
  3412. usleep_range(10000, 20000);
  3413. }
  3414. }
  3415. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3416. {
  3417. u32 trans_support;
  3418. trans_support = readl(&(h->cfgtable->TransportSupport));
  3419. if (!(trans_support & SIMPLE_MODE))
  3420. return -ENOTSUPP;
  3421. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3422. /* Update the field, and then ring the doorbell */
  3423. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3424. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3425. hpsa_wait_for_mode_change_ack(h);
  3426. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3427. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3428. dev_warn(&h->pdev->dev,
  3429. "unable to get board into simple mode\n");
  3430. return -ENODEV;
  3431. }
  3432. h->transMethod = CFGTBL_Trans_Simple;
  3433. return 0;
  3434. }
  3435. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3436. {
  3437. int prod_index, err;
  3438. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3439. if (prod_index < 0)
  3440. return -ENODEV;
  3441. h->product_name = products[prod_index].product_name;
  3442. h->access = *(products[prod_index].access);
  3443. if (hpsa_board_disabled(h->pdev)) {
  3444. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3445. return -ENODEV;
  3446. }
  3447. err = pci_enable_device(h->pdev);
  3448. if (err) {
  3449. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3450. return err;
  3451. }
  3452. err = pci_request_regions(h->pdev, "hpsa");
  3453. if (err) {
  3454. dev_err(&h->pdev->dev,
  3455. "cannot obtain PCI resources, aborting\n");
  3456. return err;
  3457. }
  3458. hpsa_interrupt_mode(h);
  3459. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3460. if (err)
  3461. goto err_out_free_res;
  3462. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3463. if (!h->vaddr) {
  3464. err = -ENOMEM;
  3465. goto err_out_free_res;
  3466. }
  3467. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3468. if (err)
  3469. goto err_out_free_res;
  3470. err = hpsa_find_cfgtables(h);
  3471. if (err)
  3472. goto err_out_free_res;
  3473. hpsa_find_board_params(h);
  3474. if (!hpsa_CISS_signature_present(h)) {
  3475. err = -ENODEV;
  3476. goto err_out_free_res;
  3477. }
  3478. hpsa_enable_scsi_prefetch(h);
  3479. hpsa_p600_dma_prefetch_quirk(h);
  3480. err = hpsa_enter_simple_mode(h);
  3481. if (err)
  3482. goto err_out_free_res;
  3483. return 0;
  3484. err_out_free_res:
  3485. if (h->transtable)
  3486. iounmap(h->transtable);
  3487. if (h->cfgtable)
  3488. iounmap(h->cfgtable);
  3489. if (h->vaddr)
  3490. iounmap(h->vaddr);
  3491. /*
  3492. * Deliberately omit pci_disable_device(): it does something nasty to
  3493. * Smart Array controllers that pci_enable_device does not undo
  3494. */
  3495. pci_release_regions(h->pdev);
  3496. return err;
  3497. }
  3498. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3499. {
  3500. int rc;
  3501. #define HBA_INQUIRY_BYTE_COUNT 64
  3502. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3503. if (!h->hba_inquiry_data)
  3504. return;
  3505. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3506. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3507. if (rc != 0) {
  3508. kfree(h->hba_inquiry_data);
  3509. h->hba_inquiry_data = NULL;
  3510. }
  3511. }
  3512. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3513. {
  3514. int rc, i;
  3515. if (!reset_devices)
  3516. return 0;
  3517. /* Reset the controller with a PCI power-cycle or via doorbell */
  3518. rc = hpsa_kdump_hard_reset_controller(pdev);
  3519. /* -ENOTSUPP here means we cannot reset the controller
  3520. * but it's already (and still) up and running in
  3521. * "performant mode". Or, it might be 640x, which can't reset
  3522. * due to concerns about shared bbwc between 6402/6404 pair.
  3523. */
  3524. if (rc == -ENOTSUPP)
  3525. return rc; /* just try to do the kdump anyhow. */
  3526. if (rc)
  3527. return -ENODEV;
  3528. /* Now try to get the controller to respond to a no-op */
  3529. dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
  3530. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3531. if (hpsa_noop(pdev) == 0)
  3532. break;
  3533. else
  3534. dev_warn(&pdev->dev, "no-op failed%s\n",
  3535. (i < 11 ? "; re-trying" : ""));
  3536. }
  3537. return 0;
  3538. }
  3539. static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
  3540. {
  3541. h->cmd_pool_bits = kzalloc(
  3542. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
  3543. sizeof(unsigned long), GFP_KERNEL);
  3544. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3545. h->nr_cmds * sizeof(*h->cmd_pool),
  3546. &(h->cmd_pool_dhandle));
  3547. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3548. h->nr_cmds * sizeof(*h->errinfo_pool),
  3549. &(h->errinfo_pool_dhandle));
  3550. if ((h->cmd_pool_bits == NULL)
  3551. || (h->cmd_pool == NULL)
  3552. || (h->errinfo_pool == NULL)) {
  3553. dev_err(&h->pdev->dev, "out of memory in %s", __func__);
  3554. return -ENOMEM;
  3555. }
  3556. return 0;
  3557. }
  3558. static void hpsa_free_cmd_pool(struct ctlr_info *h)
  3559. {
  3560. kfree(h->cmd_pool_bits);
  3561. if (h->cmd_pool)
  3562. pci_free_consistent(h->pdev,
  3563. h->nr_cmds * sizeof(struct CommandList),
  3564. h->cmd_pool, h->cmd_pool_dhandle);
  3565. if (h->errinfo_pool)
  3566. pci_free_consistent(h->pdev,
  3567. h->nr_cmds * sizeof(struct ErrorInfo),
  3568. h->errinfo_pool,
  3569. h->errinfo_pool_dhandle);
  3570. }
  3571. static int hpsa_request_irq(struct ctlr_info *h,
  3572. irqreturn_t (*msixhandler)(int, void *),
  3573. irqreturn_t (*intxhandler)(int, void *))
  3574. {
  3575. int rc;
  3576. if (h->msix_vector || h->msi_vector)
  3577. rc = request_irq(h->intr[h->intr_mode], msixhandler,
  3578. IRQF_DISABLED, h->devname, h);
  3579. else
  3580. rc = request_irq(h->intr[h->intr_mode], intxhandler,
  3581. IRQF_DISABLED, h->devname, h);
  3582. if (rc) {
  3583. dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
  3584. h->intr[h->intr_mode], h->devname);
  3585. return -ENODEV;
  3586. }
  3587. return 0;
  3588. }
  3589. static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
  3590. {
  3591. if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
  3592. HPSA_RESET_TYPE_CONTROLLER)) {
  3593. dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
  3594. return -EIO;
  3595. }
  3596. dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
  3597. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
  3598. dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
  3599. return -1;
  3600. }
  3601. dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
  3602. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
  3603. dev_warn(&h->pdev->dev, "Board failed to become ready "
  3604. "after soft reset.\n");
  3605. return -1;
  3606. }
  3607. return 0;
  3608. }
  3609. static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
  3610. {
  3611. free_irq(h->intr[h->intr_mode], h);
  3612. #ifdef CONFIG_PCI_MSI
  3613. if (h->msix_vector)
  3614. pci_disable_msix(h->pdev);
  3615. else if (h->msi_vector)
  3616. pci_disable_msi(h->pdev);
  3617. #endif /* CONFIG_PCI_MSI */
  3618. hpsa_free_sg_chain_blocks(h);
  3619. hpsa_free_cmd_pool(h);
  3620. kfree(h->blockFetchTable);
  3621. pci_free_consistent(h->pdev, h->reply_pool_size,
  3622. h->reply_pool, h->reply_pool_dhandle);
  3623. if (h->vaddr)
  3624. iounmap(h->vaddr);
  3625. if (h->transtable)
  3626. iounmap(h->transtable);
  3627. if (h->cfgtable)
  3628. iounmap(h->cfgtable);
  3629. pci_release_regions(h->pdev);
  3630. kfree(h);
  3631. }
  3632. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3633. const struct pci_device_id *ent)
  3634. {
  3635. int dac, rc;
  3636. struct ctlr_info *h;
  3637. int try_soft_reset = 0;
  3638. unsigned long flags;
  3639. if (number_of_controllers == 0)
  3640. printk(KERN_INFO DRIVER_NAME "\n");
  3641. rc = hpsa_init_reset_devices(pdev);
  3642. if (rc) {
  3643. if (rc != -ENOTSUPP)
  3644. return rc;
  3645. /* If the reset fails in a particular way (it has no way to do
  3646. * a proper hard reset, so returns -ENOTSUPP) we can try to do
  3647. * a soft reset once we get the controller configured up to the
  3648. * point that it can accept a command.
  3649. */
  3650. try_soft_reset = 1;
  3651. rc = 0;
  3652. }
  3653. reinit_after_soft_reset:
  3654. /* Command structures must be aligned on a 32-byte boundary because
  3655. * the 5 lower bits of the address are used by the hardware. and by
  3656. * the driver. See comments in hpsa.h for more info.
  3657. */
  3658. #define COMMANDLIST_ALIGNMENT 32
  3659. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3660. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3661. if (!h)
  3662. return -ENOMEM;
  3663. h->pdev = pdev;
  3664. h->busy_initializing = 1;
  3665. h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
  3666. INIT_LIST_HEAD(&h->cmpQ);
  3667. INIT_LIST_HEAD(&h->reqQ);
  3668. spin_lock_init(&h->lock);
  3669. spin_lock_init(&h->scan_lock);
  3670. rc = hpsa_pci_init(h);
  3671. if (rc != 0)
  3672. goto clean1;
  3673. sprintf(h->devname, "hpsa%d", number_of_controllers);
  3674. h->ctlr = number_of_controllers;
  3675. number_of_controllers++;
  3676. /* configure PCI DMA stuff */
  3677. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3678. if (rc == 0) {
  3679. dac = 1;
  3680. } else {
  3681. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3682. if (rc == 0) {
  3683. dac = 0;
  3684. } else {
  3685. dev_err(&pdev->dev, "no suitable DMA available\n");
  3686. goto clean1;
  3687. }
  3688. }
  3689. /* make sure the board interrupts are off */
  3690. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3691. if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
  3692. goto clean2;
  3693. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3694. h->devname, pdev->device,
  3695. h->intr[h->intr_mode], dac ? "" : " not");
  3696. if (hpsa_allocate_cmd_pool(h))
  3697. goto clean4;
  3698. if (hpsa_allocate_sg_chain_blocks(h))
  3699. goto clean4;
  3700. init_waitqueue_head(&h->scan_wait_queue);
  3701. h->scan_finished = 1; /* no scan currently in progress */
  3702. pci_set_drvdata(pdev, h);
  3703. h->ndevices = 0;
  3704. h->scsi_host = NULL;
  3705. spin_lock_init(&h->devlock);
  3706. hpsa_put_ctlr_into_performant_mode(h);
  3707. /* At this point, the controller is ready to take commands.
  3708. * Now, if reset_devices and the hard reset didn't work, try
  3709. * the soft reset and see if that works.
  3710. */
  3711. if (try_soft_reset) {
  3712. /* This is kind of gross. We may or may not get a completion
  3713. * from the soft reset command, and if we do, then the value
  3714. * from the fifo may or may not be valid. So, we wait 10 secs
  3715. * after the reset throwing away any completions we get during
  3716. * that time. Unregister the interrupt handler and register
  3717. * fake ones to scoop up any residual completions.
  3718. */
  3719. spin_lock_irqsave(&h->lock, flags);
  3720. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3721. spin_unlock_irqrestore(&h->lock, flags);
  3722. free_irq(h->intr[h->intr_mode], h);
  3723. rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
  3724. hpsa_intx_discard_completions);
  3725. if (rc) {
  3726. dev_warn(&h->pdev->dev, "Failed to request_irq after "
  3727. "soft reset.\n");
  3728. goto clean4;
  3729. }
  3730. rc = hpsa_kdump_soft_reset(h);
  3731. if (rc)
  3732. /* Neither hard nor soft reset worked, we're hosed. */
  3733. goto clean4;
  3734. dev_info(&h->pdev->dev, "Board READY.\n");
  3735. dev_info(&h->pdev->dev,
  3736. "Waiting for stale completions to drain.\n");
  3737. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3738. msleep(10000);
  3739. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3740. rc = controller_reset_failed(h->cfgtable);
  3741. if (rc)
  3742. dev_info(&h->pdev->dev,
  3743. "Soft reset appears to have failed.\n");
  3744. /* since the controller's reset, we have to go back and re-init
  3745. * everything. Easiest to just forget what we've done and do it
  3746. * all over again.
  3747. */
  3748. hpsa_undo_allocations_after_kdump_soft_reset(h);
  3749. try_soft_reset = 0;
  3750. if (rc)
  3751. /* don't go to clean4, we already unallocated */
  3752. return -ENODEV;
  3753. goto reinit_after_soft_reset;
  3754. }
  3755. /* Turn the interrupts on so we can service requests */
  3756. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3757. hpsa_hba_inquiry(h);
  3758. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3759. h->busy_initializing = 0;
  3760. return 1;
  3761. clean4:
  3762. hpsa_free_sg_chain_blocks(h);
  3763. hpsa_free_cmd_pool(h);
  3764. free_irq(h->intr[h->intr_mode], h);
  3765. clean2:
  3766. clean1:
  3767. h->busy_initializing = 0;
  3768. kfree(h);
  3769. return rc;
  3770. }
  3771. static void hpsa_flush_cache(struct ctlr_info *h)
  3772. {
  3773. char *flush_buf;
  3774. struct CommandList *c;
  3775. flush_buf = kzalloc(4, GFP_KERNEL);
  3776. if (!flush_buf)
  3777. return;
  3778. c = cmd_special_alloc(h);
  3779. if (!c) {
  3780. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3781. goto out_of_memory;
  3782. }
  3783. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3784. RAID_CTLR_LUNID, TYPE_CMD);
  3785. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3786. if (c->err_info->CommandStatus != 0)
  3787. dev_warn(&h->pdev->dev,
  3788. "error flushing cache on controller\n");
  3789. cmd_special_free(h, c);
  3790. out_of_memory:
  3791. kfree(flush_buf);
  3792. }
  3793. static void hpsa_shutdown(struct pci_dev *pdev)
  3794. {
  3795. struct ctlr_info *h;
  3796. h = pci_get_drvdata(pdev);
  3797. /* Turn board interrupts off and send the flush cache command
  3798. * sendcmd will turn off interrupt, and send the flush...
  3799. * To write all data in the battery backed cache to disks
  3800. */
  3801. hpsa_flush_cache(h);
  3802. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3803. free_irq(h->intr[h->intr_mode], h);
  3804. #ifdef CONFIG_PCI_MSI
  3805. if (h->msix_vector)
  3806. pci_disable_msix(h->pdev);
  3807. else if (h->msi_vector)
  3808. pci_disable_msi(h->pdev);
  3809. #endif /* CONFIG_PCI_MSI */
  3810. }
  3811. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  3812. {
  3813. struct ctlr_info *h;
  3814. if (pci_get_drvdata(pdev) == NULL) {
  3815. dev_err(&pdev->dev, "unable to remove device \n");
  3816. return;
  3817. }
  3818. h = pci_get_drvdata(pdev);
  3819. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  3820. hpsa_shutdown(pdev);
  3821. iounmap(h->vaddr);
  3822. iounmap(h->transtable);
  3823. iounmap(h->cfgtable);
  3824. hpsa_free_sg_chain_blocks(h);
  3825. pci_free_consistent(h->pdev,
  3826. h->nr_cmds * sizeof(struct CommandList),
  3827. h->cmd_pool, h->cmd_pool_dhandle);
  3828. pci_free_consistent(h->pdev,
  3829. h->nr_cmds * sizeof(struct ErrorInfo),
  3830. h->errinfo_pool, h->errinfo_pool_dhandle);
  3831. pci_free_consistent(h->pdev, h->reply_pool_size,
  3832. h->reply_pool, h->reply_pool_dhandle);
  3833. kfree(h->cmd_pool_bits);
  3834. kfree(h->blockFetchTable);
  3835. kfree(h->hba_inquiry_data);
  3836. /*
  3837. * Deliberately omit pci_disable_device(): it does something nasty to
  3838. * Smart Array controllers that pci_enable_device does not undo
  3839. */
  3840. pci_release_regions(pdev);
  3841. pci_set_drvdata(pdev, NULL);
  3842. kfree(h);
  3843. }
  3844. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  3845. __attribute__((unused)) pm_message_t state)
  3846. {
  3847. return -ENOSYS;
  3848. }
  3849. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  3850. {
  3851. return -ENOSYS;
  3852. }
  3853. static struct pci_driver hpsa_pci_driver = {
  3854. .name = "hpsa",
  3855. .probe = hpsa_init_one,
  3856. .remove = __devexit_p(hpsa_remove_one),
  3857. .id_table = hpsa_pci_device_id, /* id_table */
  3858. .shutdown = hpsa_shutdown,
  3859. .suspend = hpsa_suspend,
  3860. .resume = hpsa_resume,
  3861. };
  3862. /* Fill in bucket_map[], given nsgs (the max number of
  3863. * scatter gather elements supported) and bucket[],
  3864. * which is an array of 8 integers. The bucket[] array
  3865. * contains 8 different DMA transfer sizes (in 16
  3866. * byte increments) which the controller uses to fetch
  3867. * commands. This function fills in bucket_map[], which
  3868. * maps a given number of scatter gather elements to one of
  3869. * the 8 DMA transfer sizes. The point of it is to allow the
  3870. * controller to only do as much DMA as needed to fetch the
  3871. * command, with the DMA transfer size encoded in the lower
  3872. * bits of the command address.
  3873. */
  3874. static void calc_bucket_map(int bucket[], int num_buckets,
  3875. int nsgs, int *bucket_map)
  3876. {
  3877. int i, j, b, size;
  3878. /* even a command with 0 SGs requires 4 blocks */
  3879. #define MINIMUM_TRANSFER_BLOCKS 4
  3880. #define NUM_BUCKETS 8
  3881. /* Note, bucket_map must have nsgs+1 entries. */
  3882. for (i = 0; i <= nsgs; i++) {
  3883. /* Compute size of a command with i SG entries */
  3884. size = i + MINIMUM_TRANSFER_BLOCKS;
  3885. b = num_buckets; /* Assume the biggest bucket */
  3886. /* Find the bucket that is just big enough */
  3887. for (j = 0; j < 8; j++) {
  3888. if (bucket[j] >= size) {
  3889. b = j;
  3890. break;
  3891. }
  3892. }
  3893. /* for a command with i SG entries, use bucket b. */
  3894. bucket_map[i] = b;
  3895. }
  3896. }
  3897. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
  3898. u32 use_short_tags)
  3899. {
  3900. int i;
  3901. unsigned long register_value;
  3902. /* This is a bit complicated. There are 8 registers on
  3903. * the controller which we write to to tell it 8 different
  3904. * sizes of commands which there may be. It's a way of
  3905. * reducing the DMA done to fetch each command. Encoded into
  3906. * each command's tag are 3 bits which communicate to the controller
  3907. * which of the eight sizes that command fits within. The size of
  3908. * each command depends on how many scatter gather entries there are.
  3909. * Each SG entry requires 16 bytes. The eight registers are programmed
  3910. * with the number of 16-byte blocks a command of that size requires.
  3911. * The smallest command possible requires 5 such 16 byte blocks.
  3912. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3913. * blocks. Note, this only extends to the SG entries contained
  3914. * within the command block, and does not extend to chained blocks
  3915. * of SG elements. bft[] contains the eight values we write to
  3916. * the registers. They are not evenly distributed, but have more
  3917. * sizes for small commands, and fewer sizes for larger commands.
  3918. */
  3919. int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3920. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3921. /* 5 = 1 s/g entry or 4k
  3922. * 6 = 2 s/g entry or 8k
  3923. * 8 = 4 s/g entry or 16k
  3924. * 10 = 6 s/g entry or 24k
  3925. */
  3926. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3927. /* Controller spec: zero out this buffer. */
  3928. memset(h->reply_pool, 0, h->reply_pool_size);
  3929. h->reply_pool_head = h->reply_pool;
  3930. bft[7] = h->max_sg_entries + 4;
  3931. calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
  3932. for (i = 0; i < 8; i++)
  3933. writel(bft[i], &h->transtable->BlockFetch[i]);
  3934. /* size of controller ring buffer */
  3935. writel(h->max_commands, &h->transtable->RepQSize);
  3936. writel(1, &h->transtable->RepQCount);
  3937. writel(0, &h->transtable->RepQCtrAddrLow32);
  3938. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3939. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3940. writel(0, &h->transtable->RepQAddr0High32);
  3941. writel(CFGTBL_Trans_Performant | use_short_tags,
  3942. &(h->cfgtable->HostWrite.TransportRequest));
  3943. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3944. hpsa_wait_for_mode_change_ack(h);
  3945. register_value = readl(&(h->cfgtable->TransportActive));
  3946. if (!(register_value & CFGTBL_Trans_Performant)) {
  3947. dev_warn(&h->pdev->dev, "unable to get board into"
  3948. " performant mode\n");
  3949. return;
  3950. }
  3951. /* Change the access methods to the performant access methods */
  3952. h->access = SA5_performant_access;
  3953. h->transMethod = CFGTBL_Trans_Performant;
  3954. }
  3955. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  3956. {
  3957. u32 trans_support;
  3958. if (hpsa_simple_mode)
  3959. return;
  3960. trans_support = readl(&(h->cfgtable->TransportSupport));
  3961. if (!(trans_support & PERFORMANT_MODE))
  3962. return;
  3963. hpsa_get_max_perf_mode_cmds(h);
  3964. h->max_sg_entries = 32;
  3965. /* Performant mode ring buffer and supporting data structures */
  3966. h->reply_pool_size = h->max_commands * sizeof(u64);
  3967. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  3968. &(h->reply_pool_dhandle));
  3969. /* Need a block fetch table for performant mode */
  3970. h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
  3971. sizeof(u32)), GFP_KERNEL);
  3972. if ((h->reply_pool == NULL)
  3973. || (h->blockFetchTable == NULL))
  3974. goto clean_up;
  3975. hpsa_enter_performant_mode(h,
  3976. trans_support & CFGTBL_Trans_use_short_tags);
  3977. return;
  3978. clean_up:
  3979. if (h->reply_pool)
  3980. pci_free_consistent(h->pdev, h->reply_pool_size,
  3981. h->reply_pool, h->reply_pool_dhandle);
  3982. kfree(h->blockFetchTable);
  3983. }
  3984. /*
  3985. * This is it. Register the PCI driver information for the cards we control
  3986. * the OS will call our registered routines when it finds one of our cards.
  3987. */
  3988. static int __init hpsa_init(void)
  3989. {
  3990. return pci_register_driver(&hpsa_pci_driver);
  3991. }
  3992. static void __exit hpsa_cleanup(void)
  3993. {
  3994. pci_unregister_driver(&hpsa_pci_driver);
  3995. }
  3996. module_init(hpsa_init);
  3997. module_exit(hpsa_cleanup);