spi.c 11 KB

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  1. /*
  2. * This file is part of wl1271
  3. *
  4. * Copyright (C) 2008-2009 Nokia Corporation
  5. *
  6. * Contact: Luciano Coelho <luciano.coelho@nokia.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. */
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/module.h>
  26. #include <linux/crc7.h>
  27. #include <linux/spi/spi.h>
  28. #include <linux/wl12xx.h>
  29. #include <linux/slab.h>
  30. #include "wl12xx.h"
  31. #include "wl12xx_80211.h"
  32. #include "io.h"
  33. #include "reg.h"
  34. #define WSPI_CMD_READ 0x40000000
  35. #define WSPI_CMD_WRITE 0x00000000
  36. #define WSPI_CMD_FIXED 0x20000000
  37. #define WSPI_CMD_BYTE_LENGTH 0x1FFE0000
  38. #define WSPI_CMD_BYTE_LENGTH_OFFSET 17
  39. #define WSPI_CMD_BYTE_ADDR 0x0001FFFF
  40. #define WSPI_INIT_CMD_CRC_LEN 5
  41. #define WSPI_INIT_CMD_START 0x00
  42. #define WSPI_INIT_CMD_TX 0x40
  43. /* the extra bypass bit is sampled by the TNET as '1' */
  44. #define WSPI_INIT_CMD_BYPASS_BIT 0x80
  45. #define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07
  46. #define WSPI_INIT_CMD_EN_FIXEDBUSY 0x80
  47. #define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00
  48. #define WSPI_INIT_CMD_IOD 0x40
  49. #define WSPI_INIT_CMD_IP 0x20
  50. #define WSPI_INIT_CMD_CS 0x10
  51. #define WSPI_INIT_CMD_WS 0x08
  52. #define WSPI_INIT_CMD_WSPI 0x01
  53. #define WSPI_INIT_CMD_END 0x01
  54. #define WSPI_INIT_CMD_LEN 8
  55. #define HW_ACCESS_WSPI_FIXED_BUSY_LEN \
  56. ((WL1271_BUSY_WORD_LEN - 4) / sizeof(u32))
  57. #define HW_ACCESS_WSPI_INIT_CMD_MASK 0
  58. /* HW limitation: maximum possible chunk size is 4095 bytes */
  59. #define WSPI_MAX_CHUNK_SIZE 4092
  60. #define WSPI_MAX_NUM_OF_CHUNKS (WL1271_AGGR_BUFFER_SIZE / WSPI_MAX_CHUNK_SIZE)
  61. static inline struct spi_device *wl_to_spi(struct wl1271 *wl)
  62. {
  63. return wl->if_priv;
  64. }
  65. static struct device *wl1271_spi_wl_to_dev(struct wl1271 *wl)
  66. {
  67. return &(wl_to_spi(wl)->dev);
  68. }
  69. static void wl1271_spi_disable_interrupts(struct wl1271 *wl)
  70. {
  71. disable_irq(wl->irq);
  72. }
  73. static void wl1271_spi_enable_interrupts(struct wl1271 *wl)
  74. {
  75. enable_irq(wl->irq);
  76. }
  77. static void wl1271_spi_reset(struct wl1271 *wl)
  78. {
  79. u8 *cmd;
  80. struct spi_transfer t;
  81. struct spi_message m;
  82. cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
  83. if (!cmd) {
  84. wl1271_error("could not allocate cmd for spi reset");
  85. return;
  86. }
  87. memset(&t, 0, sizeof(t));
  88. spi_message_init(&m);
  89. memset(cmd, 0xff, WSPI_INIT_CMD_LEN);
  90. t.tx_buf = cmd;
  91. t.len = WSPI_INIT_CMD_LEN;
  92. spi_message_add_tail(&t, &m);
  93. spi_sync(wl_to_spi(wl), &m);
  94. wl1271_dump(DEBUG_SPI, "spi reset -> ", cmd, WSPI_INIT_CMD_LEN);
  95. kfree(cmd);
  96. }
  97. static void wl1271_spi_init(struct wl1271 *wl)
  98. {
  99. u8 crc[WSPI_INIT_CMD_CRC_LEN], *cmd;
  100. struct spi_transfer t;
  101. struct spi_message m;
  102. cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
  103. if (!cmd) {
  104. wl1271_error("could not allocate cmd for spi init");
  105. return;
  106. }
  107. memset(crc, 0, sizeof(crc));
  108. memset(&t, 0, sizeof(t));
  109. spi_message_init(&m);
  110. /*
  111. * Set WSPI_INIT_COMMAND
  112. * the data is being send from the MSB to LSB
  113. */
  114. cmd[2] = 0xff;
  115. cmd[3] = 0xff;
  116. cmd[1] = WSPI_INIT_CMD_START | WSPI_INIT_CMD_TX;
  117. cmd[0] = 0;
  118. cmd[7] = 0;
  119. cmd[6] |= HW_ACCESS_WSPI_INIT_CMD_MASK << 3;
  120. cmd[6] |= HW_ACCESS_WSPI_FIXED_BUSY_LEN & WSPI_INIT_CMD_FIXEDBUSY_LEN;
  121. if (HW_ACCESS_WSPI_FIXED_BUSY_LEN == 0)
  122. cmd[5] |= WSPI_INIT_CMD_DIS_FIXEDBUSY;
  123. else
  124. cmd[5] |= WSPI_INIT_CMD_EN_FIXEDBUSY;
  125. cmd[5] |= WSPI_INIT_CMD_IOD | WSPI_INIT_CMD_IP | WSPI_INIT_CMD_CS
  126. | WSPI_INIT_CMD_WSPI | WSPI_INIT_CMD_WS;
  127. crc[0] = cmd[1];
  128. crc[1] = cmd[0];
  129. crc[2] = cmd[7];
  130. crc[3] = cmd[6];
  131. crc[4] = cmd[5];
  132. cmd[4] |= crc7(0, crc, WSPI_INIT_CMD_CRC_LEN) << 1;
  133. cmd[4] |= WSPI_INIT_CMD_END;
  134. t.tx_buf = cmd;
  135. t.len = WSPI_INIT_CMD_LEN;
  136. spi_message_add_tail(&t, &m);
  137. spi_sync(wl_to_spi(wl), &m);
  138. wl1271_dump(DEBUG_SPI, "spi init -> ", cmd, WSPI_INIT_CMD_LEN);
  139. kfree(cmd);
  140. }
  141. #define WL1271_BUSY_WORD_TIMEOUT 1000
  142. static int wl1271_spi_read_busy(struct wl1271 *wl)
  143. {
  144. struct spi_transfer t[1];
  145. struct spi_message m;
  146. u32 *busy_buf;
  147. int num_busy_bytes = 0;
  148. /*
  149. * Read further busy words from SPI until a non-busy word is
  150. * encountered, then read the data itself into the buffer.
  151. */
  152. num_busy_bytes = WL1271_BUSY_WORD_TIMEOUT;
  153. busy_buf = wl->buffer_busyword;
  154. while (num_busy_bytes) {
  155. num_busy_bytes--;
  156. spi_message_init(&m);
  157. memset(t, 0, sizeof(t));
  158. t[0].rx_buf = busy_buf;
  159. t[0].len = sizeof(u32);
  160. t[0].cs_change = true;
  161. spi_message_add_tail(&t[0], &m);
  162. spi_sync(wl_to_spi(wl), &m);
  163. if (*busy_buf & 0x1)
  164. return 0;
  165. }
  166. /* The SPI bus is unresponsive, the read failed. */
  167. wl1271_error("SPI read busy-word timeout!\n");
  168. return -ETIMEDOUT;
  169. }
  170. static void wl1271_spi_raw_read(struct wl1271 *wl, int addr, void *buf,
  171. size_t len, bool fixed)
  172. {
  173. struct spi_transfer t[2];
  174. struct spi_message m;
  175. u32 *busy_buf;
  176. u32 *cmd;
  177. u32 chunk_len;
  178. while (len > 0) {
  179. chunk_len = min((size_t)WSPI_MAX_CHUNK_SIZE, len);
  180. cmd = &wl->buffer_cmd;
  181. busy_buf = wl->buffer_busyword;
  182. *cmd = 0;
  183. *cmd |= WSPI_CMD_READ;
  184. *cmd |= (chunk_len << WSPI_CMD_BYTE_LENGTH_OFFSET) &
  185. WSPI_CMD_BYTE_LENGTH;
  186. *cmd |= addr & WSPI_CMD_BYTE_ADDR;
  187. if (fixed)
  188. *cmd |= WSPI_CMD_FIXED;
  189. spi_message_init(&m);
  190. memset(t, 0, sizeof(t));
  191. t[0].tx_buf = cmd;
  192. t[0].len = 4;
  193. t[0].cs_change = true;
  194. spi_message_add_tail(&t[0], &m);
  195. /* Busy and non busy words read */
  196. t[1].rx_buf = busy_buf;
  197. t[1].len = WL1271_BUSY_WORD_LEN;
  198. t[1].cs_change = true;
  199. spi_message_add_tail(&t[1], &m);
  200. spi_sync(wl_to_spi(wl), &m);
  201. if (!(busy_buf[WL1271_BUSY_WORD_CNT - 1] & 0x1) &&
  202. wl1271_spi_read_busy(wl)) {
  203. memset(buf, 0, chunk_len);
  204. return;
  205. }
  206. spi_message_init(&m);
  207. memset(t, 0, sizeof(t));
  208. t[0].rx_buf = buf;
  209. t[0].len = chunk_len;
  210. t[0].cs_change = true;
  211. spi_message_add_tail(&t[0], &m);
  212. spi_sync(wl_to_spi(wl), &m);
  213. wl1271_dump(DEBUG_SPI, "spi_read cmd -> ", cmd, sizeof(*cmd));
  214. wl1271_dump(DEBUG_SPI, "spi_read buf <- ", buf, chunk_len);
  215. if (!fixed)
  216. addr += chunk_len;
  217. buf += chunk_len;
  218. len -= chunk_len;
  219. }
  220. }
  221. static void wl1271_spi_raw_write(struct wl1271 *wl, int addr, void *buf,
  222. size_t len, bool fixed)
  223. {
  224. struct spi_transfer t[2 * WSPI_MAX_NUM_OF_CHUNKS];
  225. struct spi_message m;
  226. u32 commands[WSPI_MAX_NUM_OF_CHUNKS];
  227. u32 *cmd;
  228. u32 chunk_len;
  229. int i;
  230. WARN_ON(len > WL1271_AGGR_BUFFER_SIZE);
  231. spi_message_init(&m);
  232. memset(t, 0, sizeof(t));
  233. cmd = &commands[0];
  234. i = 0;
  235. while (len > 0) {
  236. chunk_len = min((size_t)WSPI_MAX_CHUNK_SIZE, len);
  237. *cmd = 0;
  238. *cmd |= WSPI_CMD_WRITE;
  239. *cmd |= (chunk_len << WSPI_CMD_BYTE_LENGTH_OFFSET) &
  240. WSPI_CMD_BYTE_LENGTH;
  241. *cmd |= addr & WSPI_CMD_BYTE_ADDR;
  242. if (fixed)
  243. *cmd |= WSPI_CMD_FIXED;
  244. t[i].tx_buf = cmd;
  245. t[i].len = sizeof(*cmd);
  246. spi_message_add_tail(&t[i++], &m);
  247. t[i].tx_buf = buf;
  248. t[i].len = chunk_len;
  249. spi_message_add_tail(&t[i++], &m);
  250. wl1271_dump(DEBUG_SPI, "spi_write cmd -> ", cmd, sizeof(*cmd));
  251. wl1271_dump(DEBUG_SPI, "spi_write buf -> ", buf, chunk_len);
  252. if (!fixed)
  253. addr += chunk_len;
  254. buf += chunk_len;
  255. len -= chunk_len;
  256. cmd++;
  257. }
  258. spi_sync(wl_to_spi(wl), &m);
  259. }
  260. static irqreturn_t wl1271_hardirq(int irq, void *cookie)
  261. {
  262. struct wl1271 *wl = cookie;
  263. unsigned long flags;
  264. wl1271_debug(DEBUG_IRQ, "IRQ");
  265. /* complete the ELP completion */
  266. spin_lock_irqsave(&wl->wl_lock, flags);
  267. set_bit(WL1271_FLAG_IRQ_RUNNING, &wl->flags);
  268. if (wl->elp_compl) {
  269. complete(wl->elp_compl);
  270. wl->elp_compl = NULL;
  271. }
  272. spin_unlock_irqrestore(&wl->wl_lock, flags);
  273. return IRQ_WAKE_THREAD;
  274. }
  275. static int wl1271_spi_set_power(struct wl1271 *wl, bool enable)
  276. {
  277. if (wl->set_power)
  278. wl->set_power(enable);
  279. return 0;
  280. }
  281. static struct wl1271_if_operations spi_ops = {
  282. .read = wl1271_spi_raw_read,
  283. .write = wl1271_spi_raw_write,
  284. .reset = wl1271_spi_reset,
  285. .init = wl1271_spi_init,
  286. .power = wl1271_spi_set_power,
  287. .dev = wl1271_spi_wl_to_dev,
  288. .enable_irq = wl1271_spi_enable_interrupts,
  289. .disable_irq = wl1271_spi_disable_interrupts,
  290. .set_block_size = NULL,
  291. };
  292. static int __devinit wl1271_probe(struct spi_device *spi)
  293. {
  294. struct wl12xx_platform_data *pdata;
  295. struct ieee80211_hw *hw;
  296. struct wl1271 *wl;
  297. unsigned long irqflags;
  298. int ret;
  299. pdata = spi->dev.platform_data;
  300. if (!pdata) {
  301. wl1271_error("no platform data");
  302. return -ENODEV;
  303. }
  304. hw = wl1271_alloc_hw();
  305. if (IS_ERR(hw))
  306. return PTR_ERR(hw);
  307. wl = hw->priv;
  308. dev_set_drvdata(&spi->dev, wl);
  309. wl->if_priv = spi;
  310. wl->if_ops = &spi_ops;
  311. /* This is the only SPI value that we need to set here, the rest
  312. * comes from the board-peripherals file */
  313. spi->bits_per_word = 32;
  314. ret = spi_setup(spi);
  315. if (ret < 0) {
  316. wl1271_error("spi_setup failed");
  317. goto out_free;
  318. }
  319. wl->set_power = pdata->set_power;
  320. if (!wl->set_power) {
  321. wl1271_error("set power function missing in platform data");
  322. ret = -ENODEV;
  323. goto out_free;
  324. }
  325. wl->ref_clock = pdata->board_ref_clock;
  326. wl->tcxo_clock = pdata->board_tcxo_clock;
  327. wl->platform_quirks = pdata->platform_quirks;
  328. if (wl->platform_quirks & WL12XX_PLATFORM_QUIRK_EDGE_IRQ)
  329. irqflags = IRQF_TRIGGER_RISING;
  330. else
  331. irqflags = IRQF_TRIGGER_HIGH | IRQF_ONESHOT;
  332. wl->irq = spi->irq;
  333. if (wl->irq < 0) {
  334. wl1271_error("irq missing in platform data");
  335. ret = -ENODEV;
  336. goto out_free;
  337. }
  338. ret = request_threaded_irq(wl->irq, wl1271_hardirq, wl1271_irq,
  339. irqflags,
  340. DRIVER_NAME, wl);
  341. if (ret < 0) {
  342. wl1271_error("request_irq() failed: %d", ret);
  343. goto out_free;
  344. }
  345. disable_irq(wl->irq);
  346. ret = wl1271_init_ieee80211(wl);
  347. if (ret)
  348. goto out_irq;
  349. ret = wl1271_register_hw(wl);
  350. if (ret)
  351. goto out_irq;
  352. return 0;
  353. out_irq:
  354. free_irq(wl->irq, wl);
  355. out_free:
  356. wl1271_free_hw(wl);
  357. return ret;
  358. }
  359. static int __devexit wl1271_remove(struct spi_device *spi)
  360. {
  361. struct wl1271 *wl = dev_get_drvdata(&spi->dev);
  362. wl1271_unregister_hw(wl);
  363. free_irq(wl->irq, wl);
  364. wl1271_free_hw(wl);
  365. return 0;
  366. }
  367. static struct spi_driver wl1271_spi_driver = {
  368. .driver = {
  369. .name = "wl1271_spi",
  370. .bus = &spi_bus_type,
  371. .owner = THIS_MODULE,
  372. },
  373. .probe = wl1271_probe,
  374. .remove = __devexit_p(wl1271_remove),
  375. };
  376. static int __init wl1271_init(void)
  377. {
  378. return spi_register_driver(&wl1271_spi_driver);
  379. }
  380. static void __exit wl1271_exit(void)
  381. {
  382. spi_unregister_driver(&wl1271_spi_driver);
  383. }
  384. module_init(wl1271_init);
  385. module_exit(wl1271_exit);
  386. MODULE_LICENSE("GPL");
  387. MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
  388. MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");
  389. MODULE_FIRMWARE(WL1271_FW_NAME);
  390. MODULE_FIRMWARE(WL128X_FW_NAME);
  391. MODULE_FIRMWARE(WL127X_AP_FW_NAME);
  392. MODULE_FIRMWARE(WL128X_AP_FW_NAME);
  393. MODULE_ALIAS("spi:wl1271");